Low noise amplifier

Abstract

The invention relates to a low noise amplifier. Comprising a radio frequency input end, an input matching module, a first-stage common-source amplification module, a first gate bias module, a first inter-stage matching module, a second-stage common-source amplification module, a second gate bias module, a second inter-stage matching module, a third-stage common-source amplification module, a third gate bias module, an output matching module and a radio frequency output end. The low-noise amplifier comprises an input matching module, a first-stage common-source amplification module, a first gate bias module, a first inter-stage matching module, a second-stage common-source amplification module, a second gate bias module, a second inter-stage matching module and a third-stage common-source amplification module, the third gate bias module and the output matching module cooperate with each other to realize the low-noise amplifier with low noise, high gain, good linearity and low power consumption in a broadband range, and the performance of the low-noise amplifier applied to communication, radar and Internet of Things systems is improved.

Description

Technical Field

[0001] The present application belongs to the technical field of radio frequency integrated circuits, and in particular to a low noise amplifier. Background Art

[0002] There are many design methods for the gate bias structure of the existing low noise amplifier LNA. Common gate bias structures include fixed bias, voltage divider bias and source self-bias. These bias structures are affected by temperature drift and process angle deviation and cannot provide stable voltage, and cannot improve the linearity index output power 1 dB compression point, and even reduce the output power 1 dB compression point in some design situations. In the prior art, there is also a constant current source bias as the gate bias structure of the low noise amplifier LNA, such as the existing patent document CN202410217587.5: A microwave broadband low noise amplifier based on a diode feedback branch. This microwave broadband low noise amplifier based on a diode feedback branch uses an active transistor to provide a stable bias current, which can reduce the influence of temperature drift and process angle deviation, but the use of this bias cannot optimize the linearity index P1dB (output power 1 dB compression point) of the low noise amplifier.

[0003] Fixed bias: A fixed resistor is connected to the power supply to provide gate voltage to provide bias. This bias will be affected by temperature drift. Since the characteristics of the transistor will change with temperature, the operating point of the fixed bias circuit will also change with temperature, which will lead to unstable amplifier performance. In addition, different transistor parameters caused by process angle deviation will also affect consistency and stability.

[0004] Contents of voltage divider bias: A voltage divider formed by two resistors provides a fixed gate bias, which is also affected by temperature drift and process angle deviation, and is sensitive to the resistance value. A small change in resistance will significantly affect the bias voltage.

[0005] Source self-biasing: Automatic biasing is achieved by inserting a resistor between the source and the ground. This biasing will cause effects such as increased noise and reduced bandwidth due to the introduction of source resistance. Moreover, this biasing can only provide a non-positive bias voltage, so it is only applicable to depletion-type transistors and cannot be used in enhancement-type transistor designs.

[0006] In addition to the above-mentioned bias structure, the matching methods and various structures in the common design structure of the gate bias structure of the low noise amplifier LNA cannot simultaneously achieve the low noise and high gain amplifier design requirements of the present design with broadband, low power consumption and high output power 1dB compression point index. Summary of the invention

[0007] An embodiment of the present application provides a low noise amplifier to solve the problem that the bias structure of the existing low noise amplifier cannot achieve broadband, low power consumption and high output power 1dB compression point indicators at the same time.

[0008] An embodiment of the present application provides a low noise amplifier, comprising:

[0009] RF input terminal;

[0010] A first-stage common-source amplifier module is cascade-connected to the RF input terminal, and an input matching module and a first gate bias module for stabilizing the gate voltage of the first-stage common-source amplifier module are connected between the first-stage common-source amplifier module and the RF input terminal;

[0011] A second-stage common-source amplification module is cascade-connected to the first-stage common-source amplification module, and a first inter-stage matching module for impedance matching and a second gate bias module for stabilizing the gate voltage of the second-stage common-source amplification module are connected between the second-stage common-source amplification module and the first-stage common-source amplification module;

[0012] A third-stage common-source amplifier module is cascade-connected to the second-stage common-source amplifier module, and a second inter-stage matching module for impedance matching and a third gate bias module for stabilizing the gate voltage of the third-stage common-source amplifier module are connected between the third-stage common-source amplifier module and the second-stage common-source amplifier module;

[0013] The radio frequency output end is cascade-connected to the third-stage common-source amplifier module, and an output matching module is connected between the radio frequency output end and the third-stage common-source amplifier module.

[0014] Optionally, the first-stage common-source amplifier module includes a first transistor element, a first negative feedback inductor, a first negative feedback resistor and a first negative feedback capacitor, the gate terminal of the first transistor element is connected to the input matching module, the first negative feedback resistor and the first negative feedback capacitor are connected in series and then connected between the drain terminal of the first transistor element and the gate terminal of the first transistor element, the source terminal of the first transistor element is connected in series with the first negative feedback inductor and then grounded, and the drain terminal of the first transistor element is also connected to the first inter-stage matching module.

[0015] Optionally, the input matching module includes a first input matching capacitor, an input matching inductor, and a second input matching capacitor, the first end of the first input matching capacitor is connected to the RF input end, the second end of the first input matching capacitor is respectively connected to the first end of the input matching inductor and the first-stage common source amplifier module, the second end of the input matching inductor is respectively connected to the first end of the second input matching capacitor and the first gate bias module, and the second end of the second input matching capacitor is grounded.

[0016] Optionally, the first gate bias module includes a first bias resistor, a second bias resistor, a third bias resistor, a fourth bias resistor, a fifth bias resistor, a sixth bias resistor, a seventh bias resistor, a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor and a first decoupling capacitor, the gate end of the third transistor is respectively connected to the second end of the first bias resistor and the first end of the second bias resistor, the first end of the first bias resistor, the drain end of the third transistor and the first end of the fourth bias resistor are all connected to the power connection end, the second end of the second bias resistor is respectively connected to the gate end of the fourth transistor and the drain end of the first transistor, the second end of the fourth bias resistor is connected to the drain end of the fourth transistor, and the source of the fourth transistor is The terminal is connected to the first end of the fifth first-level bias resistor, the second end of the fifth first-level bias resistor is connected in series with the sixth first-level bias resistor and then connected to the drain terminal of the fifth first-level transistor, the second end of the fifth first-level bias resistor is connected in series with the seventh first-level bias resistor and then respectively connected to the gate terminal of the fifth first-level transistor and the first end of the first-level decoupling capacitor, the first end of the seventh first-level bias resistor is also connected to the input matching module, the source terminal of the third first-level transistor is respectively connected to the gate terminal of the first first-level transistor and the first end of the third first-level bias resistor, the source terminal of the first first-level transistor is connected to the drain terminal of the second first-level transistor, the gate terminal of the second first-level transistor is connected to the drain terminal of the second first-level transistor, the source terminal of the second first-level transistor, the second end of the third first-level bias resistor, the source terminal of the fifth first-level transistor and the second end of the first-level decoupling capacitor are all grounded.

[0017] Optionally, the second-stage common-source amplifier module includes a second transistor element, a second negative feedback inductor, a second negative feedback resistor and a second negative feedback capacitor, the gate terminal of the second transistor element is respectively connected to the first inter-stage matching module and the second gate bias module, the second negative feedback inductor, the second negative feedback resistor and the second negative feedback capacitor are connected in series in sequence and connected between the drain terminal of the second transistor element and the gate terminal of the second transistor element, and the source terminal of the second transistor element is grounded.

[0018] Optionally, the first inter-stage matching module includes a first inter-stage matching capacitor for impedance matching between the first-stage common-source amplification module and the second-stage common-source amplification module; and / or, the second inter-stage matching module includes a second inter-stage matching capacitor, a third inter-stage matching capacitor and an inter-stage matching resistor, the second inter-stage matching capacitor is connected in series with the inter-stage matching resistor and then connected in parallel with the second-stage common-source amplification module, and the third inter-stage matching capacitor is connected in series between the second-stage common-source amplification module and the third-stage common-source amplification module.

[0019] Optionally, the second gate bias module includes a first secondary bias resistor, a second secondary bias resistor, a third secondary bias resistor, a fourth secondary bias resistor, a fifth secondary bias resistor, a sixth secondary bias resistor, a seventh secondary bias resistor, a first secondary transistor, a second secondary transistor, a third secondary transistor, a fourth secondary transistor, a fifth secondary transistor, a secondary decoupling capacitor and a secondary capacitor, the gate end of the third secondary transistor is respectively connected to the second end of the first secondary bias resistor and the first end of the second secondary bias resistor, the first end of the first secondary bias resistor, the drain end of the third secondary transistor and the first end of the fourth secondary bias resistor are all connected to the power supply connection end, the second end of the second secondary bias resistor is respectively connected to the gate end of the fourth secondary transistor and the drain end of the first secondary transistor, the second end of the fourth secondary bias resistor is connected to the drain end of the fourth secondary transistor, and the source end of the fourth secondary transistor is connected to the first end of the fifth secondary bias resistor. One end is connected, the second end of the fifth secondary bias resistor is connected in series with the sixth secondary bias resistor and then connected to the drain end of the fifth secondary transistor, the secondary capacitor is connected in parallel with the sixth secondary bias resistor, the second end of the fifth secondary bias resistor is connected in series with the seventh secondary bias resistor and then respectively connected to the gate end of the fifth secondary transistor and the first end of the secondary decoupling capacitor, the first end of the seventh secondary bias resistor is also respectively connected to the first inter-stage matching module and the second-stage common source amplification module, the source end of the third secondary transistor is respectively connected to the gate end of the first secondary transistor and the first end of the third secondary bias resistor, the source end of the first secondary transistor is connected to the drain end of the second secondary transistor, the gate end of the second secondary transistor is connected to the drain end of the second secondary transistor, the source end of the second secondary transistor, the second end of the third secondary bias resistor, the source end of the fifth secondary transistor and the second end of the secondary decoupling capacitor are all grounded.

[0020] Optionally, the third-stage common-source amplifier module includes a third transistor element, a third negative feedback inductor, a third negative feedback resistor and a third negative feedback capacitor, the gate terminal of the third transistor element is respectively connected to the second inter-stage matching module and the third gate bias module, the third negative feedback inductor, the third negative feedback resistor and the third negative feedback capacitor are connected in series in sequence and connected between the drain terminal of the third transistor element and the gate terminal of the third transistor element, and the source terminal of the third transistor element is grounded.

[0021] Optionally, the third gate bias module includes a first three-level bias resistor, a second three-level bias resistor, a third three-level bias resistor, a fourth three-level bias resistor, a fifth three-level bias resistor, a sixth three-level bias resistor, a seventh three-level bias resistor, a first three-level transistor, a second three-level transistor, a third three-level transistor, a fourth three-level transistor, a fifth three-level transistor, a three-level decoupling capacitor and a three-level capacitor, the gate end of the third three-level transistor is respectively connected to the second end of the first three-level bias resistor and the first end of the second three-level bias resistor, the first end of the first three-level bias resistor, the drain end of the third three-level transistor and the first end of the fourth three-level bias resistor are all connected to the power supply connection end, the second end of the second three-level bias resistor is respectively connected to the gate end of the fourth three-level transistor and the drain end of the first three-level transistor, the second end of the fourth three-level bias resistor is connected to the drain end of the fourth three-level transistor, and the source end of the fourth three-level transistor is connected to the first end of the fifth three-level bias resistor. The third-level transistor of the first embodiment is connected to the third-level common source amplification module of the second stage, and the gate terminal of the first third-level transistor and the first end of the third-level decoupling capacitor are connected to the third-level bias resistor in parallel, the second end of the fifth third-level bias resistor is connected to the seventh third-level bias resistor in series, and the gate terminal of the fifth third-level transistor and the first end of the third-level decoupling capacitor are connected to the third-level bias resistor in parallel, the first end of the seventh third-level bias resistor is also connected to the second inter-stage matching module and the third-level common source amplification module respectively, the source terminal of the third third-level transistor is connected to the gate terminal of the first third-level transistor and the first end of the third third-level bias resistor respectively, the source terminal of the first third-level transistor is connected to the drain terminal of the second third-level transistor, the gate terminal of the second third-level transistor is connected to the drain terminal of the second third-level transistor, the source terminal of the second third-level transistor, the second end of the third third-level bias resistor, the source terminal of the fifth third-level transistor and the second end of the third-level decoupling capacitor are all grounded.

[0022] Optionally, the output matching module includes a first output matching capacitor, a second output matching capacitor, an output matching resistor and a transmission line element. The first output matching capacitor is connected in series with the output matching resistor and then connected in parallel with the third-stage common-source amplifier module. The second output matching capacitor is connected in series with the transmission line element and then connected between the third-stage common-source amplifier module and the RF output terminal.

[0023] A low-noise amplifier provided by an embodiment of the present application realizes a low-noise amplifier with low noise, high gain, good linearity and low power consumption within a wide bandwidth through the cooperation of an input matching module, a first-stage common-source amplification module, a first gate bias module, a first inter-stage matching module, a second-stage common-source amplification module, a second gate bias module, a second inter-stage matching module, a third-stage common-source amplification module, a third gate bias module and an output matching module, thereby improving the overall performance of the low-noise amplifier in communication, radar and Internet of Things systems. A cascade structure is formed by connecting three stages, namely, a first-stage common-source amplifier module, a second-stage common-source amplifier module and a third-stage common-source amplifier module, in a cascade connection. By providing differentiated first gate bias modules, second gate bias modules and third gate bias modules at the gates of the cascaded three-stage transistor elements, and using a first-stage inter-matching module and a second-stage inter-matching module that are different from common matching methods to achieve broadband matching, the linearity of the low-noise amplifier can be significantly improved without deteriorating the wide-band, low-noise, high-gain and low-power performance of the amplifier, thereby solving the problem that the bias structure of the existing low-noise amplifier cannot simultaneously achieve broadband, low power consumption and high output power 1dB compression point indicators. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] In order to more clearly illustrate the technical solution in an embodiment of the present application, the following briefly introduces the drawings required for use in the description of the embodiment. Obviously, the drawings described below are only some embodiments of the present application, and those skilled in the art can also obtain other drawings based on these drawings without creative work.

[0025] In order to more completely understand the present application and its beneficial effects, the following description will be given in conjunction with the accompanying drawings. In the following description, the same reference numerals represent the same parts.

[0026] Figure 1 A schematic diagram of a low noise amplifier framework provided for one embodiment of the present application.

[0027] Figure 2 A circuit diagram of a low noise amplifier provided for one embodiment of the present application.

[0028] Figure 3A circuit diagram of an input matching module, a first-stage common-source amplification module, and a first-stage inter-matching module in a low-noise amplifier provided in one embodiment of the present application.

[0029] Figure 4 A circuit diagram of a first gate bias module in a low noise amplifier provided in one embodiment of the present application.

[0030] Figure 5 A circuit diagram of a second-stage common-source amplification module and a second-stage inter-matching module in a low-noise amplifier provided in one embodiment of the present application.

[0031] Figure 6 A circuit diagram of a second gate bias module in a low noise amplifier provided in one embodiment of the present application.

[0032] Figure 7 A circuit diagram of a third-stage common-source amplifier module and an output matching module in a low-noise amplifier provided in one embodiment of the present application.

[0033] Figure 8 A circuit diagram of a third gate bias module in a low noise amplifier provided in one embodiment of the present application.

[0034] Fig. 9 A diagram of circuit simulation results of a low noise amplifier provided for one embodiment of the present application. DETAILED DESCRIPTION

[0035] The technical scheme in one embodiment of the present application will be clearly and completely described below in conjunction with the drawings in one embodiment of the present application. Obviously, the described embodiment is only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without making creative work are within the scope of protection of the present application.

[0036] In modern wireless communications and radar systems, low noise amplifiers (LNAs) are key components in radio receivers. The main function of a low noise amplifier (LNA) is to amplify the weak RF signal received while minimizing the interference of the introduced noise on the useful signal. With the rapid development of communication technology, especially the popularity of 5G and the Internet of Things (IoT), the demand for broadband, low power consumption, and high linearity low noise amplifiers has become increasingly urgent.

[0037] Traditional low-noise amplifiers usually have good performance within a specific frequency band, but their performance may degrade significantly under broadband conditions. This is because the amplifier's gain, noise figure, and input matching network are difficult to maintain excellent performance over a wide frequency band.

[0038] Low power design is an important consideration in portable communication devices and IoT nodes, because these communication devices usually need to run for a long time, and low power design can extend the battery life to reduce the frequency of user charging and battery replacement. However, reducing power consumption often leads to a decrease in amplifier linearity and gain. Linearity is a key parameter in the design of low noise amplifiers (LNAs). It directly affects the signal fidelity and interference suppression capabilities of the communication system, thereby affecting the quality of the signal received by the communication device. Therefore, the design needs to be optimized to maintain high performance under low power conditions.

[0039] The improvement of various performances often leads to the reduction of other performances, and various performance indicators influence and restrict each other. Therefore, in actual design, it is often necessary to compromise the design to meet the comprehensive performance requirements of the system on the basis of sacrificing some surplus performance indicators.

[0040] An embodiment of the present application provides a low noise amplifier to solve the problem that the bias structure of the existing low noise amplifier cannot achieve broadband, low power consumption and high output power 1dB compression point indicators at the same time.

[0041] An embodiment of the present application provides a low noise amplifier, for example, see Figure 1 , Figure 1 A schematic diagram of a low noise amplifier provided in accordance with an embodiment of the present application is shown in FIG. Figure 2 A circuit diagram of a low noise amplifier provided in one embodiment of the present application. The low noise amplifier can be applied to a low noise amplifier designed with InGaP GaAs PHEMT.

[0042] like Figure 1 and Figure 2As shown, the invention of the present application provides a low noise amplifier, including a radio frequency input terminal RFIN, an input matching module INPUT MATCH, a first-stage common-source amplifier module LNA1, a first gate bias module BIAS1, a first inter-stage matching module MID-NODE MATCH1, a second-stage common-source amplifier module LNA2, a second gate bias module BIAS2, a second inter-stage matching module MID-NODE MATCH2, a third-stage common-source amplifier module LNA3, a third gate bias module BIAS3, an output matching module OUTPUT MATCH and a radio frequency output terminal RFOUT, and the output terminals of the first-stage common-source amplifier module LNA1, the second-stage common-source amplifier module LNA2 and the third-stage common-source amplifier module LNA3 are all connected to a power supply terminal VDD for powering the drain terminal of a transistor element.

[0043] It is further explained that the low noise amplifier can improve the gain of the low noise amplifier through the three-stage cascade structure of the first-stage common source amplifier module LNA1, the second-stage common source amplifier module LNA2, and the third-stage common source amplifier module LNA3. The noise of the cascade structure mainly comes from the noise of the first-stage common source amplifier module LNA1 when the first stage is high gain. Similarly, the linearity index P1dB of the cascade structure mainly comes from the linearity index P1dB of the last stage (i.e., the third-stage common source amplifier module LNA3). Therefore, the low noise amplifier can provide low noise and high gain for the first-stage common source amplifier module LNA1 and high linearity for the third-stage common source amplifier module LNA3 by using the differentiated corresponding input matching module INPUTMATCH, the first gate bias module BIAS1, the first inter-stage matching module MID-NODE MATCH1, the second gate bias module BIAS2, the second inter-stage matching module MID-NODE MATCH2, the third-stage common source amplifier module LNA3, the third gate bias module BIAS3 and the output matching module OUTPUT MATCH. The DC power consumption of this low noise amplifier is 194.6mW.

[0044] It is further explained that the RF input terminal RFIN is used for inputting RF signals; the first-stage common-source amplifier module LNA1 is cascade-connected with the RF input terminal RFIN, and an input matching module INPUT MATCH and a first gate bias module BIAS1 for stabilizing the gate voltage of the first-stage common-source amplifier module LNA1 are connected between the first-stage common-source amplifier module LNA1 and the RF input terminal RFIN. The second-stage common-source amplifier module LNA2 is cascade-connected with the first-stage common-source amplifier module LNA1, and a first inter-stage matching module MID-NODE MATCH1 for impedance matching and a second gate bias module BIAS2 for stabilizing the gate voltage of the second-stage common-source amplifier module LNA2 are connected between the second-stage common-source amplifier module LNA2 and the first-stage common-source amplifier module LNA1. The third-stage common-source amplifier module LNA3 is cascade-connected with the second-stage common-source amplifier module LNA2, and a second inter-stage matching module MID-NODE MATCH2 for impedance matching and a third gate bias module BIAS3 for stabilizing the gate voltage of the third-stage common-source amplifier module LNA3 are connected between the third-stage common-source amplifier module LNA3 and the second-stage common-source amplifier module LNA2; the RF output terminal RFOUT is used for outputting RF signals, and the RF output terminal RFOUT is cascade-connected with the third-stage common-source amplifier module LNA3, and an output matching module OUTPUT MATCH is connected between the RF output terminal RFOUT and the third-stage common-source amplifier module LNA3.

[0045] At this time, by improving the bias structure, matching network and circuit structure design, a low-noise amplifier with low noise, high gain, good linearity and low power consumption in a wide bandwidth is realized, thereby improving the overall performance of communication, radar and Internet of Things systems. The circuit adopts a three-stage cascade design, and proposes a constant current source bias network with a source transistor by improving the common constant current source structure, and optimizes the negative feedback network, improves the input and output and inter-stage matching network matching methods, and provides a differentiated bias structure at the gate of the cascaded three-stage amplifier, and uses a matching network different from the common matching method to achieve broadband matching, which can achieve a significant improvement in the linearity of the low-noise amplifier without deteriorating the amplifier's broadband, low noise, high gain, low power consumption and other performance.

[0046] A low-noise amplifier provided by an embodiment of the present application realizes a low-noise amplifier with low noise, high gain, good linearity and low power consumption within a wide bandwidth through the cooperation of an input matching module, a first-stage common-source amplification module, a first gate bias module, a first inter-stage matching module, a second-stage common-source amplification module, a second gate bias module, a second inter-stage matching module, a third-stage common-source amplification module, a third gate bias module and an output matching module, thereby improving the overall performance of the low-noise amplifier in communication, radar and Internet of Things systems. A cascade structure is formed by connecting three stages, namely, a first-stage common-source amplifier module, a second-stage common-source amplifier module and a third-stage common-source amplifier module, in a cascade connection. By providing differentiated first gate bias modules, second gate bias modules and third gate bias modules at the gates of the cascaded three-stage transistor elements, and using a first-stage inter-matching module and a second-stage inter-matching module that are different from common matching methods to achieve broadband matching, the linearity of the low-noise amplifier can be significantly improved without deteriorating the wide-band, low-noise, high-gain and low-power performance of the amplifier, thereby solving the problem that the bias structure of the existing low-noise amplifier cannot simultaneously achieve broadband, low power consumption and high output power 1dB compression point indicators.

[0047] Figure 3 A circuit diagram of an input matching module, a first-stage common-source amplification module, and a first-stage inter-matching module in a low-noise amplifier provided in one embodiment of the present application.

[0048] like Figure 2 and Figure 3 As shown, in one embodiment of the invention of the present application, the first-stage common-source amplifier module LNA1 includes a first transistor element Q1, a first negative feedback inductor Ll1_2, a first negative feedback resistor Rl1 and a first negative feedback capacitor Cl1_2, the gate terminal of the first transistor element Q1 is connected to the input matching module INPUT MATCH, the first negative feedback resistor Rl1 and the first negative feedback capacitor Cl1_2 are connected in series and then connected between the drain terminal of the first transistor element Q1 and the gate terminal of the first transistor element Q1, the source terminal of the first transistor element Q1 is connected in series with the first negative feedback inductor Ll1_2 and then grounded, and the drain terminal of the first transistor element Q1 is also connected to the first inter-stage matching module MID-NODE MATCH1.

[0049] It is further explained that the first transistor element Q1 is a HEMT tube, the gate of the HEMT tube serves as the gate of the first transistor element Q1, the source of the HEMT tube serves as the source terminal of the first transistor element Q1, and the drain of the HEMT tube serves as the drain terminal of the first transistor element Q1. In this embodiment, the first negative feedback inductor Ll1_2, the first negative feedback resistor Rl1 and the first negative feedback capacitor Cl1_2 can play a role in improving the stability of the low noise amplifier circuit in a wider frequency band. The first-stage common source amplifier module LNA1 can adjust the matching relationship between the input impedance and the noise impedance of the first-stage common source amplifier module LNA1 by adjusting the first negative feedback inductor Ll1_2. The first negative feedback resistor Rl1 is used to determine the gain bandwidth product of the first-stage common source amplifier module LNA1, and can also be used to adjust the noise of the first-stage common source amplifier module LNA1. The first negative feedback capacitor Cl1_2 is used to isolate the DC signal and adjust the resonance.

[0050] like Figure 2 and Figure 3 As shown, in one embodiment of the invention of the present application, the input matching module INPUT MATCH includes a first input matching capacitor Cl1_1, an input matching inductor Ll1_1 and a second input matching capacitor Cl1_2, the first end of the first input matching capacitor Cl1_1 is connected to the RF input terminal RFIN, the second end of the first input matching capacitor Cl1_1 is respectively connected to the first end of the input matching inductor Ll1_1 and the first-stage common-source amplifier module LNA1, the second end of the input matching inductor Ll1_1 is respectively connected to the first end of the second input matching capacitor Cl1_2 and the first gate bias module BIAS1, and the second end of the second input matching capacitor Cl1_2 is grounded.

[0051] It is further explained that the input matching module INPUTMATCH can better meet the requirements of matching the input impedance and noise impedance of the first-stage common-source amplifier module LNA1 to approximately 50 ohms.

[0052] like Figure 2 and Figure 3 As shown, in one embodiment of the present invention, the first inter-stage matching module MID-NODEMATCH1 includes a first inter-stage matching capacitor Cl1_4 for impedance matching between the first-stage common-source amplifier module LNA1 and the second-stage common-source amplifier module LNA2. The source terminal of the first transistor element Q1 and the first inter-stage matching capacitor Cl1_4 are also connected to the power supply terminal VDD.

[0053] It is further explained that the first inter-stage matching capacitor Cl1_4 is used to perform impedance matching between the first-stage common-source amplifier module LNA1 and the second-stage common-source amplifier module LNA2, which can reduce the inter-stage loss of the circuit between the first-stage common-source amplifier module LNA1 and the second-stage common-source amplifier module LNA2.

[0054] Figure 4 A circuit diagram of a first gate bias module in a low noise amplifier provided in one embodiment of the present application.

[0055] like Figure 2 and Figure 4As shown, in one embodiment of the present invention, the first gate bias module BIAS1 includes a first bias resistor Rb1_1, a second bias resistor Rb1_2, a third bias resistor Rb1_3, a fourth bias resistor Rb1_4, a fifth bias resistor Rb1_5, a sixth bias resistor Rb1_6, a seventh bias resistor Rb1_7, a first transistor Qb1_1, a second transistor Qb1_2, a third transistor Qb1_3, a fourth transistor Qb1_4, a fifth transistor Qb1_5 and a first decoupling capacitor Cb1, the gate end of the third transistor Qb1_3 is respectively connected to the second end of the first bias resistor Rb1_1 and the first end of the second bias resistor Rb1_2 and the connection node is used as a node A, the first end of the first bias resistor Rb1_1, the drain end of the third transistor Qb1_3 and the first end of the fourth bias resistor Rb1_4 are all connected to the power connection end Vdd , the second end of the second bias resistor Rb1_2 is respectively connected to the gate end of the fourth transistor Qb1_4 and the drain end of the first transistor Qb1_1, and the connection node is used as a node B, the second end of the fourth bias resistor Rb1_4 is connected to the drain end of the fourth transistor Qb1_4, the source end of the fourth transistor Qb1_4 is connected to the first end of the fifth bias resistor Rb1_5, the second end of the fifth bias resistor Rb1_5 is connected to the drain end of the fifth transistor Qb1_5 after being connected in series with the sixth bias resistor Rb1_6, and the series connection node between the fifth bias resistor Rb1_5 and the sixth bias resistor Rb1_6 is used as a node D, the second end of the fifth bias resistor Rb1_5 is connected to the gate end of the fifth transistor Qb1_5 and the first end of the first decoupling capacitor Cb1 after being connected in series with the seventh bias resistor Rb1_7, and the first end of the seventh bias resistor Rb1_7 is also connected to the input matching module INPUT MATCH is connected, the source terminal of the third-level transistor Qb1_3 is respectively connected to the gate terminal of the first-level transistor Qb1_1 and the first end of the third-level bias resistor Rb1_3 and the connection node is used as node C, the source terminal of the first-level transistor Qb1_1 is connected to the drain terminal of the second-level transistor Qb1_2, the gate terminal of the second-level transistor Qb1_2 is connected to the drain terminal of the second-level transistor Qb1_2, the source terminal of the second-level transistor Qb1_2, the second end of the third-level bias resistor Rb1_3, the source terminal of the fifth-level transistor Qb1_5 and the second end of the first-level decoupling capacitor Cb1 are all grounded.

[0056] It is further explained that the first-level transistor Qb1_1, the second-level transistor Qb1_2, the third-level transistor Qb1_3, the fourth-level transistor Qb1_4 and the fifth-level transistor Qb1_5 are all active transistors, the gate of the active transistor serves as the gate terminal of the transistor, the source of the active transistor serves as the source terminal of the transistor, and the drain of the active transistor serves as the drain terminal of the transistor. In this embodiment, the first gate bias module BIAS1 can play a role in voltage stabilization, which can reduce the effects of inconsistent turn-on voltage caused by temperature drift and process angle deviation of the low-noise amplifier, so that the gate voltage acting on the first transistor element Q1 can be stable. For example, when the voltage of the power connection terminal Vdd fluctuates and decreases, the voltage of node A will decrease accordingly, which will cause the current flowing through the third-level transistor Qb1_3 to decrease, and then cause the voltage of node C to drop. The voltage drop of the node C will cause the current flowing through the first transistor Qb1_1 to drop, thereby causing the voltage drop across the first bias resistor Rb1_1 and the second bias resistor Rb1_2 to decrease, thereby reducing the ratio of the voltage of the node B to decrease due to the decrease of the power supply connection terminal Vdd. The advantage of using the second transistor Qb1_2 as a diode instead of a common resistor at the source end of the first transistor Qb1_1 is that the source end voltage of the first transistor Qb1_1 can be clamped, and the structure of the first gate bias module BIAS1 can stabilize the voltage of the node B. The voltage of the node B is relatively stable, and the current flowing through the branch formed by the fourth bias resistor Rb1_4, the fifth bias resistor Rb1_5, the sixth bias resistor Rb1_6, the fourth transistor Qb1_4 and the fifth transistor Qb1_5 is relatively stable, so that the voltage of the node D is relatively stable, thereby suppressing the instability of the gate bias voltage of the first transistor element Q1 due to the fluctuation of the power supply voltage. The sixth level bias resistor Rb1_6, the seventh level bias resistor Rb1_7, the fifth level transistor Qb1_5 and the first level decoupling capacitor Cb1 are introduced to suppress the influence of temperature drift and process angle deviation. When the first transistor element Q1 changes its turn-on voltage due to temperature and process angle deviation, the turn-on voltage of the fifth level transistor Qb1_5 will also change accordingly, thereby suppressing the current fluctuation caused by temperature drift and process angle deviation. Furthermore, compared with the common active bias structure, the structure of the first gate bias module BIAS1 can play a role in not reducing P1dB. Among them, the first level decoupling capacitor Cb1 is used as a decoupling capacitor to provide a stable power supply and reduce circuit noise.

[0057] Figure 5 A circuit diagram of a second-stage common-source amplification module and a second-stage inter-matching module in a low-noise amplifier provided in one embodiment of the present application.

[0058] like Figure 2 and Figure 5 As shown, in one embodiment of the present invention, the second-stage common-source amplifier module LNA2 includes a second transistor element Q2, a second negative feedback inductor Ll2_1, a second negative feedback resistor Rl2_1, and a second negative feedback capacitor Cl2_1. The gate terminal of the second transistor element Q2 is respectively connected to the first inter-stage matching module MID-NODE MATCH1 and the second gate bias module BIAS2. The second negative feedback inductor Ll2_1, the second negative feedback resistor Rl2_1, and the second negative feedback capacitor Cl2_1 are sequentially connected in series and connected between the drain terminal of the second transistor element Q2 and the gate terminal of the second transistor element Q2. The source terminal of the second transistor element Q2 is grounded. The drain terminal of the second transistor element Q2 is also connected to the power supply terminal VDD.

[0059] It is further explained that the second transistor element Q2 is a HEMT tube, the gate of the HEMT tube serves as the gate of the second transistor element Q2, the source of the HEMT tube serves as the source terminal of the second transistor element Q2, and the drain of the HEMT tube serves as the drain terminal of the second transistor element Q2. In this embodiment, the second-stage common-source amplifier module LNA2 uses parallel negative feedback to improve the circuit stability within a wider frequency band. The second negative feedback resistor Rl2_1 is used to determine the gain-bandwidth product of the second-stage common-source amplifier module LNA2 circuit, and can also be used to adjust the noise of the second-stage common-source amplifier module LNA2. The second negative feedback capacitor Cl2_1 is used to isolate the DC signal and adjust the resonance. The second negative feedback inductor Ll2_1 is used to increase the high-frequency gain and determine the gain flatness, so that the circuit of the second-stage common-source amplifier module LNA2 has a stable gain within a wider frequency band.

[0060] like Figure 2 and Figure 5 As shown, in one embodiment of the invention of the present application, the second inter-stage matching module MID-NODEMATCH2 includes a second inter-stage matching capacitor Cl2_2, a third inter-stage matching capacitor Cl2_3 and an inter-stage matching resistor Rl2_2. The second inter-stage matching capacitor Cl2_2 and the inter-stage matching resistor Rl2_2 are connected in series and then connected in parallel with the second-stage common-source amplifier module LNA2. The third inter-stage matching capacitor Cl2_3 is connected in series between the second-stage common-source amplifier module LNA2 and the third-stage common-source amplifier module LNA3.

[0061] It is further explained that the second inter-stage matching module MID-NODEMATCH2 can better match the inter-stage impedance between the second-stage common-source amplifier module LNA2 and the third-stage common-source amplifier module LNA3 to an ideal impedance point by introducing the inter-stage matching resistor Rl2_2.

[0062] Figure 6A circuit diagram of a second gate bias module in a low noise amplifier provided in one embodiment of the present application.

[0063] like Figure 2 and Figure 6 As shown, in one embodiment of the invention of the present application, the second gate bias module BIAS2 includes a first secondary bias resistor Rb2_1, a second secondary bias resistor Rb2_2, a third secondary bias resistor Rb2_3, a fourth secondary bias resistor Rb2_4, a fifth secondary bias resistor Rb2_5, a sixth secondary bias resistor Rb2_6, a seventh secondary bias resistor Rb2_7, a first secondary transistor Qb2_1, a second secondary transistor Qb2_2, a third secondary transistor Qb2_3, a fourth secondary transistor Qb2_4, a fifth secondary transistor Qb2_5, a secondary decoupling capacitor Cb2_1 and a secondary capacitor Cb2_2, and a third The gate terminal of the secondary transistor Qb2_3 is respectively connected to the second end of the first secondary bias resistor Rb2_1 and the first end of the second secondary bias resistor Rb2_2, the first end of the first secondary bias resistor Rb2_1, the drain end of the third secondary transistor Qb2_3 and the first end of the fourth secondary bias resistor Rb2_4 are all connected to the power connection terminal Vdd, the second end of the second secondary bias resistor Rb2_2 is respectively connected to the gate end of the fourth secondary transistor Qb2_4 and the drain end of the first secondary transistor Qb2_1, the second end of the fourth secondary bias resistor Rb2_4 is connected to the drain end of the fourth secondary transistor Qb2_4, and the fourth secondary transistor The source terminal of Qb2_4 is connected to the first end of the fifth secondary bias resistor Rb2_5, the second end of the fifth secondary bias resistor Rb2_5 is connected in series with the sixth secondary bias resistor Rb2_6 and then connected to the drain terminal of the fifth secondary transistor Qb2_5, the secondary capacitor Cb2_2 is connected in parallel with the sixth secondary bias resistor Rb2_6, the second end of the fifth secondary bias resistor Rb2_5 is connected in series with the seventh secondary bias resistor Rb2_7 and then respectively connected to the gate terminal of the fifth secondary transistor Qb2_5 and the first end of the secondary decoupling capacitor Cb2_1, the first end of the seventh secondary bias resistor Rb2_7 is also respectively connected to the first inter-stage matching module MID-NODEMA TCH1 is connected to the second-stage common source amplifier module LNA2, the source terminal of the third-secondary transistor Qb2_3 is respectively connected to the gate terminal of the first-secondary transistor Qb2_1 and the first end of the third-secondary bias resistor Rb2_3, the source terminal of the first-secondary transistor Qb2_1 is connected to the drain terminal of the second-secondary transistor Qb2_2, the gate terminal of the second-secondary transistor Qb2_2 is connected to the drain terminal of the second-secondary transistor Qb2_2, the source terminal of the second-secondary transistor Qb2_2, the second end of the third-secondary bias resistor Rb2_3, the source terminal of the fifth-secondary transistor Qb2_5 and the second end of the secondary decoupling capacitor Cb2_1 are all grounded.

[0064] It is further explained that the first secondary transistor Qb2_1, the second secondary transistor Qb2_2, the third secondary transistor Qb2_3, the fourth secondary transistor Qb2_4 and the fifth secondary transistor Qb2_5 are all active transistors, the gate of the active transistor serves as the gate terminal of the transistor, the source of the active transistor serves as the source terminal of the transistor, and the drain of the active transistor serves as the drain terminal of the transistor. In this embodiment, the use of the second gate bias module BIAS2 can play a role in voltage stabilization, which can reduce the effects of inconsistent turn-on voltages caused by temperature drift and process angle deviation, so that the gate voltage acting on the second transistor element Q2 can be stable. By introducing the secondary capacitor Cb2_2, a higher P1dB can be obtained at the cost of slightly sacrificing a little noise. Because of the characteristics of the cascade structure, the source of noise mainly comes from the first-stage common source transistor. The little noise sacrificed here has little effect on the overall noise performance. The slightly differentiated second gate bias module BIAS2 can optimize the performance of the low-noise amplifier.

[0065] Figure 7 A circuit diagram of a third-stage common-source amplifier module and an output matching module in a low-noise amplifier provided in one embodiment of the present application.

[0066] like Figure 2 and Figure 7 As shown, in one embodiment of the present invention, the third-stage common-source amplifier module LNA2 includes a third transistor element Q3, a third negative feedback inductor Ll3_1, a third negative feedback resistor Rl3_1 and a third negative feedback capacitor Cl3_1, the gate terminal of the third transistor element Q3 is respectively connected to the second inter-stage matching module MID-NODEMATCH2 and the third gate bias module BIAS3, the third negative feedback inductor Ll3_1, the third negative feedback resistor Rl3_1 and the third negative feedback capacitor Cl3_1 are sequentially connected in series and connected between the drain terminal of the third transistor element Q3 and the gate terminal of the third transistor element Q3, and the source terminal of the third transistor element Q3 is grounded. The drain terminal of the third transistor element Q3 is also connected to the power supply terminal VDD.

[0067] It is further explained that the third transistor element Q3 is a HEMT tube, the gate of the HEMT tube serves as the gate of the third transistor element Q3, the source of the HEMT tube serves as the source terminal of the third transistor element Q3, and the drain of the HEMT tube serves as the drain terminal of the third transistor element Q3. In this embodiment, the third-stage common-source amplifier module LNA2 uses parallel negative feedback to improve the circuit stability within a wider frequency band. The third negative feedback resistor Rl3_1 is used to determine the gain-bandwidth product of the third-stage common-source amplifier module LNA3 circuit, and can also be used to adjust the noise of the third-stage common-source amplifier module LNA3. The third negative feedback capacitor Cl3_1 is used to isolate the DC signal and adjust the resonance. The third negative feedback inductor Ll3_1 is used to increase the high-frequency gain and determine the gain flatness, so that the circuit of the third-stage common-source amplifier module LNA3 has a stable gain within a wider frequency band.

[0068] like Figure 2 and Figure 7 As shown, in one embodiment of the present invention, the output matching module OUTPUT MATCH includes a first output matching capacitor Cl3_2, a second output matching capacitor Cl3_3, an output matching resistor Rl3_2 and a transmission line element Tl3. The first output matching capacitor Cl3_2 is connected in series with the output matching resistor Rl3_2 and then connected in parallel with the third-stage common-source amplifier module LNA3. The second output matching capacitor Cl3_3 is connected in series with the transmission line element Tl3 and then connected between the third-stage common-source amplifier module LNA3 and the RF output terminal RFOUT.

[0069] It is further explained that the output matching module OUTPUTMATCH introduces the output matching resistor Rl3_2 and the transmission line element Tl3 to better match the inter-stage impedance between the third-stage common-source amplifier module LNA3 and the RF output terminal RFOUT to an ideal impedance point.

[0070] Figure 8 A circuit diagram of a third gate bias module in a low noise amplifier provided in one embodiment of the present application.

[0071] like Figure 2 and Figure 8As shown, in one embodiment of the invention of the present application, the third gate bias module BIAS3 includes a first three-level bias resistor Rb3_1, a second three-level bias resistor Rb3_2, a third three-level bias resistor Rb3_3, a fourth three-level bias resistor Rb3_4, a fifth three-level bias resistor Rb3_5, a sixth three-level bias resistor Rb3_6, a seventh three-level bias resistor Rb3_7, a first three-level transistor Qb3_1, a second three-level transistor Qb3_2, a third three-level transistor Qb3_3, a fourth three-level transistor Qb3_4, a fifth three-level transistor Qb3_5, a three-level decoupling capacitor Cb3_1 and a three-level capacitor Cb3_2, and a third The gate terminal of the tertiary transistor Qb3_3 is respectively connected to the second end of the first tertiary bias resistor Rb3_1 and the first end of the second tertiary bias resistor Rb3_2, the first end of the first tertiary bias resistor Rb3_1, the drain end of the third tertiary transistor Qb3_3 and the first end of the fourth tertiary bias resistor Rb3_4 are all connected to the power connection end Vdd, the second end of the second tertiary bias resistor Rb3_2 is respectively connected to the gate end of the fourth tertiary transistor Qb3_4 and the drain end of the first tertiary transistor Qb3_1, the second end of the fourth tertiary bias resistor Rb3_4 is connected to the drain end of the fourth tertiary transistor Qb3_4, and the fourth tertiary transistor The source terminal of Qb3_4 is connected to the first end of the fifth third-level bias resistor Rb3_5, the second end of the fifth third-level bias resistor Rb3_5 is connected in series with the sixth third-level bias resistor Rb3_6 and then connected to the drain terminal of the fifth third-level transistor Qb3_5, the third-level capacitor Cb3_2 is connected in parallel with the sixth third-level bias resistor Rb3_6, the second end of the fifth third-level bias resistor Rb3_5 is connected in series with the seventh third-level bias resistor Rb3_7 and then respectively connected to the gate terminal of the fifth third-level transistor Qb3_5 and the first end of the third-level decoupling capacitor Cb3_1, the first end of the seventh third-level bias resistor Rb3_7 is also respectively connected to the second inter-stage matching module MID-NODEMA TCH2 is connected to the third-stage common-source amplifier module LNA3, the source terminal of the third-stage transistor Qb3_3 is respectively connected to the gate terminal of the first-stage transistor Qb3_1 and the first end of the third-stage bias resistor Rb3_3, the source terminal of the first-stage transistor Qb3_1 is connected to the drain terminal of the second-stage transistor Qb3_2, the gate terminal of the second-stage transistor Qb3_2 is connected to the drain terminal of the second-stage transistor Qb3_2, the source terminal of the second-stage transistor Qb3_2, the second end of the third-stage bias resistor Rb3_3, the source terminal of the fifth-stage transistor Qb3_5 and the second end of the third-stage decoupling capacitor Cb3_1 are all grounded.

[0072] It is further explained that the first three-stage transistor Qb3_1, the second three-stage transistor Qb3_2, the third three-stage transistor Qb3_3, the fourth three-stage transistor Qb3_4 and the fifth three-stage transistor Qb3_5 are all active transistors, the gate of the active transistor is used as the gate terminal of the transistor, the source of the active transistor is used as the source terminal of the transistor, and the drain of the active transistor is used as the drain terminal of the transistor. In this embodiment, the use of the third gate bias module BIAS3 can play a role in voltage stabilization, can reduce the effects of inconsistent turn-on voltages caused by temperature drift and process angle deviation, so that the gate voltage acting on the third transistor element Q3 can be stable. By introducing the three-stage capacitor Cb3_2, a higher P1dB can be obtained at the cost of slightly sacrificing a little noise. Because of the characteristics of the cascade structure, the linearity index P1dB of the cascade structure of the low-noise amplifier mainly comes from the linearity index P1dB of the last stage (such as the third-stage common source amplifier module LNA3), and the P1dB improved in the last stage will significantly improve the P1dB of the overall circuit of the low-noise amplifier. Furthermore, by adjusting the resistance values ​​of the fifth secondary bias resistor Rb2_5 and the fifth tertiary bias resistor Rb3_5, incompletely consistent voltages are provided for the gate bias of the second-stage common-source amplifier module LNA2 and the third-stage common-source amplifier module LNA3, thereby better optimizing the overall performance.

[0073] Fig. 9 A circuit simulation result diagram of a low noise amplifier provided in an embodiment of the present application. Among them, Figure 9(A) is a simulation result diagram of the relationship between the linearity index P1dB and the frequency freq of this embodiment, Figure 9(B) is a simulation result diagram of the relationship between the gain index dB(S21) and the frequency freq of this embodiment, Figure 9(C) is a simulation result diagram of the relationship between the noise index two-port noise nf(2) and the frequency freq of this embodiment, and Figure 9(D) is a simulation result diagram of the relationship between the input return loss dB(S11) and the output return loss dB(S22) and the frequency freq of this embodiment.

[0074] In the embodiment of the present application, the DC power consumption of the low noise amplifier is 194.6 mW. The DC power consumption biased by the present embodiment is consistent with other biased DC power consumptions. Fig. 9 It can be seen that the simulation results show that the low noise amplifier can achieve a significant improvement in the linearity of the low noise amplifier without deteriorating the wide bandwidth, low noise, high gain and low power consumption performance of the amplifier through the first gate bias module BIAS1, the second gate bias module BIAS2 and the third gate bias module BIAS3.

[0075] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0076] In the description of this application, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more features.

[0077] The low noise amplifier provided in an embodiment of the present application is introduced in detail above. Specific examples are used in this article to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea. At the same time, for technicians in this field, according to the idea of ​​the present application, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. A low noise amplifier, It is characterized in that include: RF input terminal; A first-stage common-source amplifier module is cascade-connected to the RF input terminal, and an input matching module and a first gate bias module for stabilizing the gate voltage of the first-stage common-source amplifier module are connected between the first-stage common-source amplifier module and the RF input terminal; A second-stage common-source amplification module is cascade-connected to the first-stage common-source amplification module, and a first inter-stage matching module for impedance matching and a second gate bias module for stabilizing the gate voltage of the second-stage common-source amplification module are connected between the second-stage common-source amplification module and the first-stage common-source amplification module; A third-stage common-source amplifier module is cascade-connected to the second-stage common-source amplifier module, and a second inter-stage matching module for impedance matching and a third gate bias module for stabilizing the gate voltage of the third-stage common-source amplifier module are connected between the third-stage common-source amplifier module and the second-stage common-source amplifier module; The radio frequency output end is cascade-connected to the third-stage common-source amplifier module, and an output matching module is connected between the radio frequency output end and the third-stage common-source amplifier module.

2. The low noise amplifier according to claim 1, It is characterized in that The first-stage common-source amplifier module includes a first transistor element, a first negative feedback inductor, a first negative feedback resistor and a first negative feedback capacitor. The gate of the first transistor element is connected to the input matching module. The first negative feedback resistor and the first negative feedback capacitor are connected in series and then connected between the gate terminal of the first transistor element and the drain terminal of the first transistor element. The source terminal of the first transistor element is connected in series with the first negative feedback inductor and then grounded. The gate terminal of the first transistor element is also connected to the first inter-stage matching module.

3. The low noise amplifier according to claim 1, It is characterized in that The input matching module includes a first input matching capacitor, an input matching inductor, and a second input matching capacitor. The first end of the first input matching capacitor is connected to the RF input end, the second end of the first input matching capacitor is respectively connected to the first end of the input matching inductor and the first-stage common source amplifier module, the second end of the input matching inductor is respectively connected to the first end of the second input matching capacitor and the first gate bias module, and the second end of the second input matching capacitor is grounded.

4. The low noise amplifier according to claim 1, It is characterized in that The first gate bias module includes a first bias resistor, a second bias resistor, a third bias resistor, a fourth bias resistor, a fifth bias resistor, a sixth bias resistor, a seventh bias resistor, a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor and a first decoupling capacitor, the gate end of the third transistor is respectively connected to the second end of the first bias resistor and the first end of the second bias resistor, the first end of the first bias resistor, the drain end of the third transistor and the first end of the fourth bias resistor are all connected to the power connection end, the second end of the second bias resistor is respectively connected to the gate end of the fourth transistor and the drain end of the first transistor, the second end of the fourth bias resistor is connected to the drain end of the fourth transistor, and the source end of the fourth transistor is connected to the drain end of the fourth transistor. The first end of the fifth first-level bias resistor is connected to the first end of the fifth first-level bias resistor, the second end of the fifth first-level bias resistor is connected in series with the sixth first-level bias resistor and then connected to the drain end of the fifth first-level transistor, the second end of the fifth first-level bias resistor is connected in series with the seventh first-level bias resistor and then respectively connected to the gate end of the fifth first-level transistor and the first end of the first-level decoupling capacitor, the first end of the seventh first-level bias resistor is also connected to the input matching module, the source end of the third first-level transistor is respectively connected to the gate end of the first first-level transistor and the first end of the third first-level bias resistor, the source end of the first first-level transistor is connected to the drain end of the second first-level transistor, the gate end of the second first-level transistor is connected to the drain end of the second first-level transistor, the source end of the second first-level transistor, the second end of the third first-level bias resistor, the source end of the fifth first-level transistor and the second end of the first-level decoupling capacitor are all grounded.

5. The low noise amplifier according to claim 1, It is characterized in that The second-stage common-source amplifier module includes a second transistor element, a second negative feedback inductor, a second negative feedback resistor and a second negative feedback capacitor. The gate terminal of the second transistor element is respectively connected to the first inter-stage matching module and the second gate bias module. The second negative feedback inductor, the second negative feedback resistor and the second negative feedback capacitor are sequentially connected in series and connected between the drain terminal of the second transistor element and the gate terminal of the second transistor element. The source terminal of the second transistor element is grounded.

6. The low noise amplifier according to claim 1, It is characterized in that The first inter-stage matching module includes a first inter-stage matching capacitor for impedance matching between the first-stage common-source amplification module and the second-stage common-source amplification module; and / or the second inter-stage matching module includes a second inter-stage matching capacitor, a third inter-stage matching capacitor and an inter-stage matching resistor, the second inter-stage matching capacitor is connected in series with the inter-stage matching resistor and then connected in parallel with the second-stage common-source amplification module, and the third inter-stage matching capacitor is connected in series between the second-stage common-source amplification module and the third-stage common-source amplification module.

7. The low noise amplifier according to claim 1, It is characterized in that The second gate bias module includes a first secondary bias resistor, a second secondary bias resistor, a third secondary bias resistor, a fourth secondary bias resistor, a fifth secondary bias resistor, a sixth secondary bias resistor, a seventh secondary bias resistor, a first secondary transistor, a second secondary transistor, a third secondary transistor, a fourth secondary transistor, a fifth secondary transistor, a secondary decoupling capacitor and a secondary capacitor. The gate terminal of the third secondary transistor is respectively connected to the second end of the first secondary bias resistor and the first end of the second secondary bias resistor, the first end of the first secondary bias resistor, the drain terminal of the third secondary transistor and the first end of the fourth secondary bias resistor are all connected to the power connection terminal, the second end of the second secondary bias resistor is respectively connected to the gate terminal of the fourth secondary transistor and the drain terminal of the first secondary transistor, the second end of the fourth secondary bias resistor is connected to the drain terminal of the fourth secondary transistor, and the source terminal of the fourth secondary transistor is connected to the first end of the fifth secondary bias resistor. The second end of the fifth secondary bias resistor is connected in series with the sixth secondary bias resistor and then connected to the drain end of the fifth secondary transistor, the secondary capacitor is connected in parallel with the sixth secondary bias resistor, the second end of the fifth secondary bias resistor is connected in series with the seventh secondary bias resistor and then respectively connected to the gate end of the fifth secondary transistor and the first end of the secondary decoupling capacitor, the first end of the seventh secondary bias resistor is also respectively connected to the first inter-stage matching module and the second-stage common source amplifier module, the source end of the third secondary transistor is respectively connected to the gate end of the first secondary transistor and the first end of the third secondary bias resistor, the source end of the first secondary transistor is connected to the drain end of the second secondary transistor, the gate end of the second secondary transistor is connected to the drain end of the second secondary transistor, the source end of the second secondary transistor, the second end of the third secondary bias resistor, the source end of the fifth secondary transistor and the second end of the secondary decoupling capacitor are all grounded.

8. The low noise amplifier according to claim 1, It is characterized in that The third-stage common-source amplifier module includes a third transistor element, a third negative feedback inductor, a third negative feedback resistor and a third negative feedback capacitor. The gate terminal of the third transistor element is respectively connected to the second inter-stage matching module and the third gate bias module. The third negative feedback inductor, the third negative feedback resistor and the third negative feedback capacitor are sequentially connected in series and connected between the drain terminal of the third transistor element and the gate terminal of the third transistor element. The source terminal of the third transistor element is grounded.

9. The low noise amplifier according to claim 1, It is characterized in that The third gate bias module includes a first three-level bias resistor, a second three-level bias resistor, a third three-level bias resistor, a fourth three-level bias resistor, a fifth three-level bias resistor, a sixth three-level bias resistor, a seventh three-level bias resistor, a first three-level transistor, a second three-level transistor, a third three-level transistor, a fourth three-level transistor, a fifth three-level transistor, a three-level decoupling capacitor and a three-level capacitor. The gate terminal of the third three-level transistor is respectively connected to the second end of the first three-level bias resistor and the first end of the second three-level bias resistor, the first end of the first three-level bias resistor, the drain terminal of the third three-level transistor and the first end of the fourth three-level bias resistor are all connected to the power connection terminal, the second end of the second three-level bias resistor is respectively connected to the gate terminal of the fourth three-level transistor and the drain terminal of the first three-level transistor, the second end of the fourth three-level bias resistor is connected to the drain terminal of the fourth three-level transistor, and the source terminal of the fourth three-level transistor is connected to the first end of the fifth three-level bias resistor. The third-level transistor is connected to the third-level transistor by a first end of the third-level decoupling capacitor and a second end of the third-level bias resistor. The third-level transistor is connected to the third-level transistor by a first end of the third-level bias resistor and a second end of the third-level bias resistor. The third-level transistor is connected to the third-level transistor by a first end of the third-level bias resistor and a second end of the third-level bias resistor. The third-level transistor is connected to the third-level transistor by a first end of the third-level bias resistor and a second end of the third-level decoupling capacitor. The third-level transistor is connected to the third-level transistor by a first end of the third-level bias resistor and a second end of the third-level bias resistor. The third-level transistor is connected to the third-level transistor by a second end of the third-level bias resistor and a second end of the third-level bias resistor.

10. The low noise amplifier according to claim 1, It is characterized in that The output matching module includes a first output matching capacitor, a second output matching capacitor, an output matching resistor and a transmission line element. The first output matching capacitor is connected in series with the output matching resistor and then connected in parallel with the third-stage common-source amplifier module. The second output matching capacitor is connected in series with the transmission line element and then connected between the third-stage common-source amplifier module and the RF output terminal.

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