Common input low noise amplifier and RF chip

Abstract

The present invention relates to the field of wireless communication technology, and provides a common input low noise amplifier and radio frequency chip, including a common input port selection module, a first amplifier module, a second amplifier module, a first input switch module, a second input switch module, a first output matching module and a second output matching module; the input end of the common input port selection module is used to receive a control signal, and the output end of the common input port selection module is used to control the input end of the first amplifier module or the second amplifier module to select and output a signal; the input end of the first input switch module is used to access the first input signal, and the output end of the first input switch module is used to connect the input end of the first amplifier module; the input end of the second input switch module is used to connect the second input signal, and the output end of the second input switch module is used to connect the input end of the second amplifier module. The low noise amplifier of the present invention can improve radio frequency performance and performance indicators.

Description

Technical Field

[0001] The present invention relates to the field of wireless communication technology, and in particular to a common input low noise amplifier and a radio frequency chip. Background Art

[0002] With the updating and iteration of electronic devices, their performance is constantly improving. In 4G and 5G networks, data transmission is completed through carrier channels. In the 5G era, due to the increase in spectrum resources and more advanced technology, carrier aggregation (CA) has become one of the key technologies to achieve high-speed data transmission.

[0003] The low noise amplifier (LNA), as the first-stage active device of the RF front-end system, provides a channel for carrier aggregation. In order to meet the carrier aggregation combination requirements between RF low noise amplifiers, there will be multiple RF low noise amplifiers that need to meet the same channel input. In previous designs, it is impossible to balance the area and the performance of the low noise amplifier itself. Therefore, it is very important to design a low noise amplifier with excellent performance in all low noise amplifier paths and advantages in area.

[0004] The current design of LNA with common input port has a certain deterioration in linearity indicators other than gain and noise figure due to the trade-off between area and performance. In order to meet CA and non-CA requirements, the performance of each LNA input port in frequency selection is very necessary.

[0005] However, many designs now sacrifice noise coefficient by designing too many components to meet linearity requirements. At the same time, too many components also increase the overall area and increase production costs. Summary of the invention

[0006] In view of the above deficiencies in the prior art, the present invention proposes a common-input low-noise amplifier and a radio frequency chip to solve the problems of poor radio frequency performance and high production cost of the existing common-input low-noise amplifier.

[0007] In order to solve the above technical problems, the present invention adopts the following technical solutions:

[0008] In a first aspect, an embodiment of the present invention provides a common input low noise amplifier, comprising a common input port selection module, a first amplifier module, a second amplifier module, a first input switch module, a second input switch module, a first output matching module and a second output matching module;

[0009] The input end of the common input port selection module is used to receive a control signal, and the output end of the common input port selection module is used to control the input end of the first amplifier module or the second amplifier module to select and output a signal, thereby realizing different gain adjustment controls on the output signal;

[0010] The first output end of the first amplifier module is connected to the input end of the first output matching module, and the output end of the first output matching module is used to connect to a load; the first output end of the second amplifier module is connected to the input end of the second output matching module, and the output end of the second output matching module is used to connect to a load; the input end of the first input switch module is used to access a first input signal, and the output end of the first input switch module is used to connect to the input end of the first amplifier module; the input end of the second input switch module is used to connect to a second input signal, and the output end of the second input switch module is used to connect to the input end of the second amplifier module;

[0011] The common input port selection module includes a control switch, a first switch, a second switch, a first capacitor, a second capacitor, a first resistor, a second resistor, a first MOS transistor, a second MOS transistor, a common source gate voltage selection circuit, and a common gate voltage selection circuit;

[0012] The first end of the first capacitor is used as the input end of the common input port selection module, the second end of the first capacitor is respectively connected to the output end of the common source gate voltage selection circuit, the gate of the first MOS transistor and the first end of the second capacitor, the source of the first MOS transistor is respectively connected to the second end of the second capacitor and the control end of the control switch, the output end of the control switch is connected to the second output end of the first amplifier module or the second output end of the second amplifier module; the drain of the first MOS transistor is connected to the source of the second MOS transistor; the first input end of the common source gate voltage selection circuit is connected to the input end of the first amplifier module; the second input end of the common source gate voltage selection circuit is connected to the input end of the second amplifier module; the first input end of the common gate voltage selection circuit is connected to the input end of the first amplifier module, and the second input end of the common gate voltage selection circuit is connected to the input end of the second amplifier module;

[0013] The output end of the common-gate gate voltage selection circuit is connected to the first end of the second resistor, the second end of the second resistor is connected to the gate of the second MOS tube, the drain of the second MOS tube is respectively connected to the output end of the first switch and the output end of the second switch, the control end of the first switch and the control end of the second switch are respectively used as the output end of the common input port selection module; the control end of the first switch is connected to the output end of the first amplifier module, and the control end of the second switch is connected to the output end of the second amplifier module.

[0014] Preferably, the common-source gate voltage selection circuit includes a first selection unit and a second selection unit, the input end of the first selection unit serves as the first input end of the common-source gate voltage selection circuit, the input end of the second selection unit serves as the second input end of the common-source gate voltage selection circuit, and the output end of the first selection unit is connected to the output end of the second selection unit and together serves as the output end of the common-source gate voltage selection circuit.

[0015] Preferably, the first selection unit and the second selection unit have the same structure;

[0016] The first selection unit includes a first transmission gate, a first inverter and a second inverter; the input end of the first inverter serves as the input end of the first selection unit, the output end of the first inverter is connected to the input end of the second inverter, and the output end of the first inverter and the output end of the second inverter respectively output gate control signals to control the output of the first transmission gate.

[0017] Preferably, the common-gate voltage selection circuit includes a third selection unit and a fourth selection unit, the input end of the third selection unit serves as the first input end of the common-gate voltage selection circuit, the input end of the fourth selection unit serves as the second input end of the common-gate voltage selection circuit, and the output end of the third selection unit is connected to the output end of the fourth selection unit and together serves as the output end of the common-gate voltage selection circuit.

[0018] Preferably, the third selection unit and the fourth selection unit have the same structure;

[0019] The third selection unit includes a second transmission gate, a third inverter and a fourth inverter; the input end of the third inverter serves as the input end of the third selection unit, the output end of the third inverter is connected to the input end of the fourth inverter, and the output end of the third inverter and the output end of the fourth inverter respectively output gate control signals to control the output of the second transmission gate.

[0020] Preferably, the first amplifier module includes a first bias circuit, a third resistor, a fourth resistor, a third MOS transistor, a fourth MOS transistor, a third capacitor, a fourth capacitor and a first inductor;

[0021] The input end of the first bias circuit is used to connect to a power supply, the first output end of the first bias circuit is respectively connected to the first input end of the common-source gate voltage selection circuit and the first end of the third resistor, the gate of the third MOS tube is connected to the input end of the first amplifier module, the second end of the third resistor and the first end of the third capacitor are respectively connected to the gate of the third MOS tube; the second end of the third capacitor is respectively connected to the source of the third MOS tube and the first end of the first inductor, and the second end of the first inductor is grounded; the first end of the first inductor also serves as the second output end of the first amplifier module;

[0022] The second output end of the first bias circuit is respectively connected to the first end of the fourth resistor and the first input end of the common-gate voltage selection circuit; the second end of the fourth resistor is respectively connected to the first end of the fourth capacitor and the gate of the fourth MOS tube, and the second end of the fourth capacitor is grounded; the drain of the third MOS tube is connected to the source of the fourth MOS tube, and the drain of the fourth MOS tube serves as the output end of the first amplifier module.

[0023] Preferably, the second amplifier module includes a second bias circuit, a fifth resistor, a sixth resistor, a fifth MOS transistor, a sixth MOS transistor, a fifth capacitor, a sixth capacitor and a second inductor;

[0024] The input end of the second bias circuit is used to connect to the power supply, the first output end of the second bias circuit is respectively connected to the second input end of the common source gate voltage selection circuit and the first end of the fifth resistor, the gate of the fifth MOS tube is connected to the input end of the second amplifier module, the second end of the fifth resistor and the first end of the fifth capacitor are respectively connected to the gate of the fifth MOS tube; the second end of the fifth capacitor is respectively connected to the source of the fifth MOS tube and the first end of the second inductor, and the second end of the second inductor is grounded; the first end of the second inductor also serves as the second output end of the second amplifier module;

[0025] The second output end of the second bias circuit is respectively connected to the first end of the sixth resistor and the second input end of the common-gate voltage selection circuit; the second end of the sixth resistor is respectively connected to the first end of the sixth capacitor and the gate of the sixth MOS tube, and the second end of the sixth capacitor is grounded; the drain of the fifth MOS tube is connected to the source of the sixth MOS tube, and the drain of the sixth MOS tube serves as the output end of the second amplifier module.

[0026] Preferably, the circuit of the first input switch module is the same as that of the second input switch module;

[0027] The first input switch module comprises a plurality of switch units, the input end of the switch unit serves as the input end of the first input switch module, and the output end of the switch unit serves as the output end of the first input switch module;

[0028] Each of the switch units includes a third switch, a fourth switch and a seventh capacitor; the control end of the third switch is connected to the control end of the fourth switch and serves as the input end of the switch unit together, the output end of the third switch is used to connect or disconnect with the ground, the output end of the fourth switch is connected to connect or disconnect with the first end of the seventh capacitor, and the second end of the seventh capacitor serves as the output end of the switch unit.

[0029] Preferably, the first output matching module comprises a third inductor and a first output matching circuit, the input end of the first output matching circuit is connected to the first end of the third inductor and serves as the input end of the first output matching module, the second end of the third inductor is used to connect to a power supply, and the output end of the first output matching circuit serves as the output end of the first output matching module;

[0030] The second output matching module includes a fourth inductor and a second output matching circuit, the input end of the second output matching circuit is connected to the first end of the fourth inductor and serves as the input end of the second output matching module, the second end of the fourth inductor is used to connect the power supply, and the output end of the second output matching circuit serves as the output end of the second output matching module.

[0031] In a second aspect, an embodiment of the present invention provides a radio frequency chip, comprising a low noise amplifier with a common input as described above.

[0032] Compared with the related art, in the embodiment of the present invention, the input end of the common input port selection module is used to receive a control signal, and the output end of the common input port selection module is used to control the input end of the first amplifier module or the second amplifier module to select and output the signal, so as to realize different gain adjustment control of the output signal; the common source gate voltage selection circuit and the common gate gate voltage selection circuit of the common input port are used to switch different amplifier module paths, and the common input port selection module adopts the design of an independent amplifier tube, which can meet the full utilization of the spectrum of the RF LNA in the CA situation and the non-CA situation, and realize good isolation between the input ports. By considering the layout and routing of the common port connecting the various LNAs in advance and adding a tuning circuit, good RF performance can be achieved, so that both the RF performance of the input port inside the LNA itself and the common port can meet the performance indicators of the operator in different application environments; at the same time, the provision of a small number of components can also reduce the production cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] The present invention will be described in detail below in conjunction with the accompanying drawings. The above and other aspects of the present invention will become clearer and easier to understand through the detailed description made in conjunction with the following drawings. In the accompanying drawings:

[0034] Figure 1 A circuit structure block diagram of a common input low noise amplifier provided in an embodiment of the present invention;

[0035] Figure 2 for Figure 1 A partial enlargement of the part shown in A Figure 1 ;

[0036] Figure 3 for Figure 1 A partial enlargement of the portion shown in B Figure 2 ;

[0037] Figure 4 for Figure 1 A partial enlargement of the portion shown in C Figure 3 ;

[0038] Figure 5 A circuit diagram of a common-source gate voltage selection circuit for a common-input low-noise amplifier provided by an embodiment of the present invention;

[0039] Figure 6 A circuit diagram of a common-gate voltage selection circuit for a common-input low-noise amplifier provided in an embodiment of the present invention.

[0040] Among them, 100, a low noise amplifier with a common input, 1, a common input port selection module, 11, a common source gate voltage selection circuit, 111, a first selection unit, 1111, a first transmission gate, 1112, a first inverter, 1113, a second inverter, 112, a second selection unit, 12, a common gate voltage selection circuit, 121, a third selection unit, 1211, a second transmission gate, 1212, a third inverter, 1213, a fourth inverter, 122, a fourth selection unit, 2, a first amplifier module, 21, a first bias circuit, 3, a second amplifier module, 31, a second bias circuit, 4, a first input switch module, 41, a switch unit, 5, a second input switch module, 6, a first output matching module, 61, a first output matching circuit, 7, a second output matching module, 71, a second output matching circuit. DETAILED DESCRIPTION

[0041] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by technicians in the technical field of the present application; the terms used in the specification of the application herein are only for the purpose of describing specific embodiments and are not intended to limit the present application; the terms "including" and "having" and any variations thereof in the specification and claims of the present application and the above-mentioned drawings are intended to cover non-exclusive inclusions. The terms "first", "second", etc. in the specification and claims of the present application or the above-mentioned drawings are used to distinguish different objects, not to describe a specific order.

[0042] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0043] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0044] Embodiment 1

[0045] See also Figure 1-Figure 4 As shown, an embodiment of the present invention provides a common input low noise amplifier 100, including a common input port selection module 1, a first amplifier module 2, a second amplifier module 3, a first input switch module 4, a second input switch module 5, a first output matching module 6 and a second output matching module 7.

[0046] The input end of the common input port selection module 1 is used to receive a control signal (LNA12 IN3 ), the output end of the common input port selection module 1 is used to control the input end of the first amplifier module 2 or the second amplifier module 3 to select and output the signal, thereby realizing different gain adjustment controls on the output signal.

[0047] The first output end of the first amplifier module 2 is connected to the input end of the first output matching module 6, and the output end of the first output matching module 6 is used to connect to the load; the first output end of the second amplifier module 3 is connected to the input end of the second output matching module 7, and the output end of the second output matching module 7 is used to connect to the load; the input end of the first input switch module 4 is used to access the first input signal (LNA1 IN1 ), the output end of the first input switch module 4 is used to connect the input end of the first amplifier module 2; the input end of the second input switch module 5 is used to connect the second input signal (LNA2 IN1 ), the output end of the second input switch module 5 is used to connect the input end of the second amplifier module 3. The first input signal and the second input signal are used to input radio frequency signals of different frequency bands, and different amplifier modules are selected for amplification through radio frequency signals of different frequency bands.

[0048] Specifically, the common input port selection module 1 receives the radio frequency signal for selecting the output to the first output matching module 6 or the second output matching module 7, and the first output matching module 6 or the second output matching module 7 performs matching signal processing respectively. The first input switch module 4 and the second input switch module 5 perform selection of the conventional input port.

[0049] The common input port selection module 1 includes a control switch SPDT, a first switch SW1, a second switch SW2, a first capacitor C1, a second capacitor C2, a first resistor R1, a second resistor R2, a first MOS transistor M1, a second MOS transistor M2, a common source gate voltage selection circuit 11 and a common gate voltage selection circuit 12. The second capacitor C2 is an adjustable capacitor.

[0050] The first end of the first capacitor C1 serves as the input end of the common input port selection module 1, the second end of the first capacitor C1 is respectively connected to the output end of the common source gate voltage selection circuit 11, the gate of the first MOS tube M1 and the first end of the second capacitor C2, the source of the first MOS tube M1 is respectively connected to the second end of the second capacitor C2 and the control end of the control switch SPDT, the output end of the control switch SPDT is connected to the second output end of the first amplifier module 2 or the second output end of the second amplifier module 3; the drain of the first MOS tube M1 is connected to the source of the second MOS tube M2; the first input end (VGCS1) of the common source gate voltage selection circuit 11 is connected to the input end of the first amplifier module 2; the second input end (VGCS2) of the common source gate voltage selection circuit 11 is connected to the input end of the second amplifier module 3; the first input end (VGCG1) of the common gate voltage selection circuit 12 is connected to the input end of the first amplifier module 2, and the second input end (VGCG1) of the common gate voltage selection circuit 12 is connected to the input end of the second amplifier module 3.

[0051] The output end of the common-gate gate voltage selection circuit 12 is connected to the first end of the second resistor R2, the second end of the second resistor R2 is connected to the gate of the second MOS transistor M2, the drain of the second MOS transistor M2 is respectively connected to the output end of the first switch SW1 and the output end of the second switch SW2, the control end of the first switch SW1 and the control end of the second switch SW2 are respectively used as the output end of the common input port selection module 1; the control end of the first switch SW1 is connected to the output end of the first amplifier module 2, and the control end of the second switch SW2 is connected to the output end of the second amplifier module 3.

[0052] Specifically, the input end of the common input port selection module 1 is used to receive a control signal, and the output end of the common input port selection module 1 is used to control the input end of the first amplifier module 2 or the second amplifier module 3 to select and output a signal, thereby realizing different gain adjustment controls of the output signal; the common source gate voltage selection circuit 11 and the common gate voltage selection circuit 12 of the common input port are used to switch different amplifier module paths, and the common input port selection module 1 adopts an independent amplifier tube design, which can meet the full utilization of the spectrum of the RF LNA in the CA situation and the non-CA situation, and realize good isolation between the input ports. By considering the layout routing of the common port connecting each LNA in advance and adding a tuning circuit, good RF performance can be achieved, so that both the input port inside the LNA itself and the RF performance of the common port can meet the performance indicators of the operator in different application environments; at the same time, the provision of a small number of components can also reduce production costs.

[0053] In this embodiment, Figure 5 As shown, the common source gate voltage selection circuit 11 includes a first selection unit 111 and a second selection unit 112, the input end (VGCS1) of the first selection unit 111 serves as the first input end of the common source gate voltage selection circuit 11, the input end (VGCS2) of the second selection unit 112 serves as the second input end of the common source gate voltage selection circuit 11, and the output end of the first selection unit 111 is connected to the output end of the second selection unit 112 and serves as the output end of the common source gate voltage selection circuit 11. The first selection unit 111 and the second selection unit 112 respectively select different amplifier modules for input, thereby achieving the output effect of the common source gate voltage.

[0054] In this embodiment, the first selection unit 111 and the second selection unit 112 have the same structure; the first selection unit 111 includes a first transmission gate 1111, a first inverter 1112 and a second inverter 1113; the input end of the first inverter 1112 is used as the input end of the first selection unit 111, the output end of the first inverter 1112 is connected to the input end of the second inverter 1113, and the output end of the first inverter 1112 and the output end of the second inverter 1113 respectively output gate control signals to control the output of the first transmission gate 1111. Control signals, such as control signals 1 and 0, are inputted through the first selection unit 111 and the second selection unit 112, 1 indicates conduction, and 0 indicates disconnection, and the first selection unit 111 and the second selection unit 112 can only conduct one path. The first selection unit 111 is turned on so that the first inverter 1112 outputs a signal ENN to the second inverter 1113 and the ENN interface of the first transmission gate 1111. The second inverter 1113 processes the signal ENN and outputs a signal ENP to the ENP interface of the first transmission gate 1111, thereby controlling the input and output of the first transmission gate 1111.

[0055] In this embodiment, Figure 6 As shown, the common-gate voltage selection circuit 12 includes a third selection unit 121 and a fourth selection unit 122, the input end (VGCG1) of the third selection unit 121 serves as the first input end of the common-gate voltage selection circuit 12, the input end (VGCG2) of the fourth selection unit 122 serves as the second input end of the common-gate voltage selection circuit 12, and the output end of the third selection unit 121 is connected to the output end of the fourth selection unit 122 and serves together as the output end of the common-gate voltage selection circuit 12.

[0056] In this embodiment, the third selection unit 121 and the fourth selection unit 122 have the same structure; the third selection unit 121 includes a second transmission gate 1211, a third inverter 1212 and a fourth inverter 1213; the input end of the third inverter 1212 is used as the input end of the third selection unit 121, the output end of the third inverter 1212 is connected to the input end of the fourth inverter 1213, and the output end of the third inverter 1212 and the output end of the fourth inverter 1213 respectively output gate control signals to control the output of the second transmission gate 1211. Control signals such as control signals 1 and 0 are respectively input through the third selection unit 121 and the fourth selection unit 122, 1 represents conduction, and 0 represents disconnection, and the third selection unit 121 and the fourth selection unit 122 can only conduct one path. The third selection unit 121 is turned on so that the third inverter 1212 outputs a signal ENN to the fourth inverter 1213 and the ENN interface of the second transmission gate 1211. The fourth inverter 1213 processes the signal ENN and outputs a signal ENP to the ENP interface of the second transmission gate 1211, thereby controlling the input and output of the second transmission gate 1211.

[0057] In this embodiment, Figure 3 As shown, the first amplifier module 2 includes a first bias circuit 21, a third resistor R3, a fourth resistor R4, a third MOS transistor M3, a fourth MOS transistor M4, a third capacitor C3, a fourth capacitor C4 and a first inductor L1;

[0058] The input end of the first bias circuit 21 is used to connect to the power supply VDD, the first output end (VGCS1) of the first bias circuit 21 is respectively connected to the first input end of the common-source gate voltage selection circuit 11 and the first end (VGCS1) of the third resistor R3, the gate of the third MOS tube M3 is connected to the input end of the first amplifier module 2, the second end of the third resistor R3 and the first end of the third capacitor C3 are respectively connected to the gate of the third MOS tube M3; the second end of the third capacitor C3 is respectively connected to the source of the third MOS tube M3 and the first end of the first inductor L1, and the second end of the first inductor L1 is grounded; the first end of the first inductor L1 also serves as the second output end of the first amplifier module 2. The second output end (VGCG1) of the first bias circuit 21 is respectively connected to the first end (VGCG1) of the fourth resistor R4 and the first input end of the common gate voltage selection circuit 12; the second end of the fourth resistor R4 is respectively connected to the first end of the fourth capacitor C4 and the gate of the fourth MOS tube M4, and the second end of the fourth capacitor C4 is grounded; the drain of the third MOS tube M3 is connected to the source of the fourth MOS tube M4, and the drain of the fourth MOS tube M4 serves as the output end of the first amplifier module 2.

[0059] Specifically, the bias voltage is provided to the first input end of the common source gate voltage selection circuit 11 and the first input end of the common gate voltage selection circuit 12 through the first bias circuit 21, and the common source gate voltage selection circuit 11 is connected to the first resistor R1 and output to the gate of the first MOS tube M1. The first bias circuit 21 divides the voltage and supplies power to the third MOS tube M3 and the fourth MOS tube M4 through the third resistor R3 and the fourth resistor R4, respectively, and the third MOS tube M3 and the fourth MOS tube M4 are used to amplify the RF signal, and the fourth MOS tube M4 is output to the first output matching module 6 for matching output. The first inductor L1 is an adjustable source degeneration inductor, which is used to adjust the input impedance and linearity.

[0060] In this embodiment, Figure 4 As shown, the second amplifier module 3 includes a second bias circuit 31, a fifth resistor R5, a sixth resistor R6, a fifth MOS transistor M5, a sixth MOS transistor M6, a fifth capacitor C5, a sixth capacitor C6 and a second inductor L2;

[0061] The input end of the second bias circuit 31 is used to connect to the power supply VDD, the first output end (VGCS2) of the second bias circuit 31 is respectively connected to the second input end of the common source gate voltage selection circuit 11 and the first end (VGCS2) of the fifth resistor R5, the gate of the fifth MOS tube M5 is connected to the input end of the second amplifier module 3, the second end of the fifth resistor R5 and the first end of the fifth capacitor C5 are respectively connected to the gate of the fifth MOS tube M5; the second end of the fifth capacitor C5 is respectively connected to the source of the fifth MOS tube M5 and the first end of the second inductor L2, and the second end of the second inductor L2 is grounded; the first end of the second inductor L2 also serves as the second output end of the second amplifier module 3. The second output end (VGCG2) of the second bias circuit 31 is respectively connected to the first end (VGCG2) of the sixth resistor R6 and the second input end of the common gate voltage selection circuit 12; the second end of the sixth resistor R6 is respectively connected to the first end of the sixth capacitor C6 and the gate of the sixth MOS tube M6, and the second end of the sixth capacitor C6 is grounded; the drain of the fifth MOS tube M5 is connected to the source of the sixth MOS tube M6, and the drain of the sixth MOS tube M6 serves as the output end of the second amplifier module 3.

[0062] Specifically, the bias voltage is provided to the second input end of the common source gate voltage selection circuit 11 and the second input end of the common gate voltage selection circuit 12 through the second bias circuit 31, and the common source gate voltage selection circuit 11 is connected to the first resistor R1 and output to the gate of the first MOS tube M1. The second bias circuit 31 is used to divide the voltage and supply power to the fifth MOS tube M5 and the sixth MOS tube M6 through the fifth resistor R5 and the sixth resistor, respectively, and the fifth MOS tube M5 and the sixth MOS tube M6 are used to amplify the RF signal, and the sixth MOS tube M6 is output to the second output matching module 7 for matching output. The second inductor L2 is an adjustable source degeneration inductor, which is used to adjust the input impedance and linearity.

[0063] In this embodiment, the third capacitor C3 and the fifth capacitor C5 are both adjustable capacitors.

[0064] In this embodiment, Figure 3 As shown, the circuits of the first input switch module 4 and the second input switch module 5 are the same; the first input switch module 4 includes a plurality of switch units 41, the input end of the switch unit 41 serves as the input end of the first input switch module 4, and the output end of the switch unit 41 serves as the output end of the first input switch module 4; each of the switch units 41 includes a third switch SW3, a fourth switch SW4, and a seventh capacitor C7; the control end of the third switch SW3 is connected to the control end of the fourth switch SW4 and serves together as the input end of the switch unit 41, the output end of the third switch SW3 is used to connect or disconnect with the ground, the output end of the fourth switch SW4 is used to connect or disconnect with the first end of the seventh capacitor C7, and the second end of the seventh capacitor C7 serves as the output end of the switch unit 41. The selection of the conventional input port is switched by the third switch SW3 and the fourth switch SW4 of the switch unit 41, and the DC isolation function is realized by the seventh capacitor C7.

[0065] In this embodiment, Figure 1-Figure 4 As shown, the first output matching module 6 includes a third inductor L3 and a first output matching circuit 61, the input end of the first output matching circuit 61 is connected to the first end of the third inductor L3 and serves as the input end of the first output matching module 6, the second end of the third inductor L3 is used to connect to the power supply VDD, and the output end of the first output matching circuit 61 serves as the output end of the first output matching module 6; the third inductor L3 and the first output matching circuit 61 are used to adjust the output matching of the low noise amplifier 100 with a common input.

[0066] The second output matching module 7 includes a fourth inductor L4 and a second output matching circuit 71. The input end of the second output matching circuit 71 is connected to the first end of the fourth inductor L4 and serves as the input end of the second output matching module 7. The second end of the fourth inductor L4 is used to connect the power supply VDD. The output end of the second output matching circuit 71 serves as the output end of the second output matching module 7. The fourth inductor L4 and the second output matching circuit 71 are used to adjust the output matching of the common input low noise amplifier 100.

[0067] Embodiment 2

[0068] An embodiment of the present invention provides a radio frequency chip, including the common input low noise amplifier 100 as described above. The technical effect produced by the radio frequency chip is the same as that of the common input low noise amplifier 100 as described above, and will not be described here.

[0069] It should be noted that the various embodiments described above with reference to the accompanying drawings are only used to illustrate the present invention rather than to limit the scope of the present invention. Those skilled in the art should understand that any modification or equivalent substitution of the present invention without departing from the spirit and scope of the present invention should be included within the scope of the present invention. In addition, unless otherwise indicated by the context, words appearing in the singular include the plural form, and vice versa. In addition, unless otherwise specified, all or part of any embodiment may be used in combination with all or part of any other embodiment.

Claims

1. A common input low noise amplifier, characterized in that: It includes a common input port selection module, a first amplifier module, a second amplifier module, a first input switch module, a second input switch module, a first output matching module and a second output matching module; The input end of the common input port selection module is used to receive a control signal, and the output end of the common input port selection module is used to control the input end of the first amplifier module or the second amplifier module to select and output a signal, thereby realizing different gain adjustment controls on the output signal; The first output end of the first amplifier module is connected to the input end of the first output matching module, and the output end of the first output matching module is used to connect to a load; the first output end of the second amplifier module is connected to the input end of the second output matching module, and the output end of the second output matching module is used to connect to a load; the input end of the first input switch module is used to access a first input signal, and the output end of the first input switch module is used to connect to the input end of the first amplifier module; the input end of the second input switch module is used to connect to a second input signal, and the output end of the second input switch module is used to connect to the input end of the second amplifier module; The common input port selection module includes a control switch, a first switch, a second switch, a first capacitor, a second capacitor, a first resistor, a second resistor, a first MOS transistor, a second MOS transistor, a common source gate voltage selection circuit, and a common gate voltage selection circuit; The first end of the first capacitor is used as the input end of the common input port selection module, the second end of the first capacitor is respectively connected to the output end of the common source gate voltage selection circuit, the gate of the first MOS transistor and the first end of the second capacitor, the source of the first MOS transistor is respectively connected to the second end of the second capacitor and the control end of the control switch, the output end of the control switch is connected to the second output end of the first amplifier module or the second output end of the second amplifier module; the drain of the first MOS transistor is connected to the source of the second MOS transistor; the first input end of the common source gate voltage selection circuit is connected to the input end of the first amplifier module; the second input end of the common source gate voltage selection circuit is connected to the input end of the second amplifier module; the first input end of the common gate voltage selection circuit is connected to the input end of the first amplifier module, and the second input end of the common gate voltage selection circuit is connected to the input end of the second amplifier module; The output end of the common-gate gate voltage selection circuit is connected to the first end of the second resistor, the second end of the second resistor is connected to the gate of the second MOS tube, the drain of the second MOS tube is respectively connected to the output end of the first switch and the output end of the second switch, the control end of the first switch and the control end of the second switch are respectively used as the output end of the common input port selection module; the control end of the first switch is connected to the output end of the first amplifier module, and the control end of the second switch is connected to the output end of the second amplifier module.

2. The common input low noise amplifier according to claim 1, characterized in that: The common source gate voltage selection circuit includes a first selection unit and a second selection unit, the input end of the first selection unit serves as the first input end of the common source gate voltage selection circuit, the input end of the second selection unit serves as the second input end of the common source gate voltage selection circuit, and the output end of the first selection unit is connected to the output end of the second selection unit and serves together as the output end of the common source gate voltage selection circuit.

3. The common input low noise amplifier according to claim 2, characterized in that: The first selection unit and the second selection unit have the same structure; The first selection unit includes a first transmission gate, a first inverter and a second inverter; the input end of the first inverter serves as the input end of the first selection unit, the output end of the first inverter is connected to the input end of the second inverter, and the output end of the first inverter and the output end of the second inverter respectively output gate control signals to control the output of the first transmission gate.

4. The common input low noise amplifier according to claim 1, characterized in that: The common-gate voltage selection circuit includes a third selection unit and a fourth selection unit, the input end of the third selection unit serves as the first input end of the common-gate voltage selection circuit, the input end of the fourth selection unit serves as the second input end of the common-gate voltage selection circuit, and the output end of the third selection unit is connected to the output end of the fourth selection unit and serves together as the output end of the common-gate voltage selection circuit.

5. The common input low noise amplifier according to claim 4, characterized in that: The third selection unit and the fourth selection unit have the same structure; The third selection unit includes a second transmission gate, a third inverter and a fourth inverter; the input end of the third inverter serves as the input end of the third selection unit, the output end of the third inverter is connected to the input end of the fourth inverter, and the output end of the third inverter and the output end of the fourth inverter respectively output gate control signals to control the output of the second transmission gate.

6. The common input low noise amplifier according to claim 1, characterized in that: The first amplifier module includes a first bias circuit, a third resistor, a fourth resistor, a third MOS transistor, a fourth MOS transistor, a third capacitor, a fourth capacitor and a first inductor; The input end of the first bias circuit is used to connect to a power supply, the first output end of the first bias circuit is respectively connected to the first input end of the common-source gate voltage selection circuit and the first end of the third resistor, the gate of the third MOS tube is connected to the input end of the first amplifier module, the second end of the third resistor and the first end of the third capacitor are respectively connected to the gate of the third MOS tube; the second end of the third capacitor is respectively connected to the source of the third MOS tube and the first end of the first inductor, and the second end of the first inductor is grounded; the first end of the first inductor also serves as the second output end of the first amplifier module; The second output end of the first bias circuit is respectively connected to the first end of the fourth resistor and the first input end of the common-gate voltage selection circuit; the second end of the fourth resistor is respectively connected to the first end of the fourth capacitor and the gate of the fourth MOS tube, and the second end of the fourth capacitor is grounded; the drain of the third MOS tube is connected to the source of the fourth MOS tube, and the drain of the fourth MOS tube serves as the output end of the first amplifier module.

7. The common input low noise amplifier according to claim 1, characterized in that: The second amplifier module includes a second bias circuit, a fifth resistor, a sixth resistor, a fifth MOS transistor, a sixth MOS transistor, a fifth capacitor, a sixth capacitor and a second inductor; The input end of the second bias circuit is used to connect to the power supply, the first output end of the second bias circuit is respectively connected to the second input end of the common source gate voltage selection circuit and the first end of the fifth resistor, the gate of the fifth MOS tube is connected to the input end of the second amplifier module, the second end of the fifth resistor and the first end of the fifth capacitor are respectively connected to the gate of the fifth MOS tube; the second end of the fifth capacitor is respectively connected to the source of the fifth MOS tube and the first end of the second inductor, and the second end of the second inductor is grounded; the first end of the second inductor also serves as the second output end of the second amplifier module; The second output end of the second bias circuit is respectively connected to the first end of the sixth resistor and the second input end of the common-gate voltage selection circuit; the second end of the sixth resistor is respectively connected to the first end of the sixth capacitor and the gate of the sixth MOS tube, and the second end of the sixth capacitor is grounded; the drain of the fifth MOS tube is connected to the source of the sixth MOS tube, and the drain of the sixth MOS tube serves as the output end of the second amplifier module.

8. The common input low noise amplifier according to claim 1, characterized in that: The circuit of the first input switch module is the same as that of the second input switch module; The first input switch module comprises a plurality of switch units, the input end of the switch unit serves as the input end of the first input switch module, and the output end of the switch unit serves as the output end of the first input switch module; Each of the switch units includes a third switch, a fourth switch and a seventh capacitor; the control end of the third switch is connected to the control end of the fourth switch and serves as the input end of the switch unit together, the output end of the third switch is used to connect or disconnect with the ground, the output end of the fourth switch is connected to connect or disconnect with the first end of the seventh capacitor, and the second end of the seventh capacitor serves as the output end of the switch unit.

9. The common input low noise amplifier according to claim 1, characterized in that: The first output matching module includes a third inductor and a first output matching circuit, the input end of the first output matching circuit is connected to the first end of the third inductor and serves as the input end of the first output matching module, the second end of the third inductor is used to connect to a power supply, and the output end of the first output matching circuit serves as the output end of the first output matching module; The second output matching module includes a fourth inductor and a second output matching circuit, the input end of the second output matching circuit is connected to the first end of the fourth inductor and serves as the input end of the second output matching module, the second end of the fourth inductor is used to connect the power supply, and the output end of the second output matching circuit serves as the output end of the second output matching module.

10. A radio frequency chip, characterized in that: A low noise amplifier comprising a common input as claimed in any one of claims 1 to 9.

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