Low noise amplifier and RF chip
By designing a low-noise amplifier using a common port input selection module and a tuning circuit, the problems of poor RF performance and small application range in the prior art are solved, and good RF performance and wide application under different carrier aggregation conditions are achieved.
Patent Information
- Application Number
- CN202411677186.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-22
- Publication Date
- 2025-03-07
- Estimated Expiration
- 2044-11-22
AI Technical Summary
Existing low-noise amplifiers have shortcomings in RF performance and application range, especially in the case of carrier aggregation, which makes it difficult to meet the system's needs for gain, linearity and noise.
A low-noise amplifier is designed, using a combination of a common port input selection module, an amplifier module, an input switch module and an output matching module. The RF performance is optimized through tuning circuits and adjustable capacitors, and different gain adjustments and good isolation are achieved.
It realizes good performance of RF low-noise amplifiers in carrier aggregation and non-carrier aggregation, meets the system's needs for gain, linearity and noise, and expands the application range.
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Figure CN119182368B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of wireless communication technology, and in particular to a low noise amplifier and a radio frequency chip. Background Art
[0002] With the updating and iteration of electronic devices, their performance is constantly improving. In 4G and 5G networks, data transmission is completed through carrier channels. In the 5G era, due to the increase in spectrum resources and more advanced technology, carrier aggregation (CA) has become one of the key technologies to achieve high-speed data transmission.
[0003] As the first-level active device of the RF front-end system, the RF low noise amplifier (LNA) provides a channel for carrier aggregation. In order to meet the carrier aggregation combination requirements between RF low noise amplifiers, multiple RF low noise amplifiers need to meet the same channel input, and when carrier aggregation is not performed, the input and output isolation between different LNAs must be guaranteed. Therefore, it is necessary to design an LNA that ensures no mutual interference in CA and non-CA situations and that the gain, linearity and noise meet the system requirements.
[0004] The currently designed common input LNA has excellent performance in the ideal simulation circuit. However, after layout, the gain performance, standing wave ratio and linearity of the common port will deteriorate due to routing problems. Therefore, it is necessary to estimate the parasitic inductance and parasitic resistance in advance according to the layout and wiring and tune them.
[0005] However, many designs now sacrifice noise figure by designing too many components to meet linearity requirements, and have poor tuning effects on parasitic inductance and parasitic resistance, resulting in poor RF performance of the low-noise amplifier and a small application range. Summary of the invention
[0006] In view of the above deficiencies in the prior art, the present invention proposes a low noise amplifier and a radio frequency chip to solve the problems of poor radio frequency performance and small application range of the existing low noise amplifier.
[0007] In order to solve the above technical problems, the present invention adopts the following technical solutions:
[0008] In a first aspect, an embodiment of the present invention provides a low noise amplifier, including a common port input selection module, a first amplifier module, a second amplifier module, a first input switch module, a second input switch module, a first output matching module, and a second output matching module;
[0009] The input end of the common port input selection module is used to receive a radio frequency signal, and the output end of the common port input selection module is used to control the selective output of the signal by the first amplifier module and / or the second amplifier module, so as to realize different gain adjustment controls on the output signal;
[0010] The first output end of the first amplifier module is connected to the input end of the first output matching module, and the output end of the first output matching module is used to connect to a load; the first output end of the second amplifier module is connected to the input end of the second output matching module, and the output end of the second output matching module is used to connect to a load; the input end of the first input switch module is used to access a first input signal, and the output end of the first input switch module is used to connect to the first input end of the first amplifier module; the input end of the second input switch module is used to access a second input signal, and the output end of the second input switch module is used to connect to the first input end of the second amplifier module;
[0011] The common port input selection module includes a first switch, a first tuning circuit, a second tuning circuit, a first capacitor, a second capacitor, a first MOS tube, a first resistor, a second switch, a third tuning circuit and a fourth tuning circuit;
[0012] The first end of the first capacitor serves as the input end of the common port input selection module, the second end of the first capacitor is respectively connected to the first end of the second capacitor, the gate of the first MOS tube and the first end of the first resistor, and the second end of the second capacitor is connected to the source of the first MOS tube; the control end of the first switch is connected to the source of the first MOS tube, and the output end of the first switch is used to connect the input end of the first tuning circuit or the input end of the second tuning circuit; the output end of the first tuning circuit is connected to the second output end of the first amplifier module and grounded, and the output end of the second tuning circuit is connected to the second output end of the second amplifier module and grounded; the drain of the first MOS tube is connected to the control end of the second switch, and the output of the second switch is used to connect the input end of the third tuning circuit or the input end of the fourth tuning circuit; the output end of the third tuning circuit is connected to the second input end of the first amplifier module, and the output end of the fourth tuning circuit is connected to the second input end of the second amplifier module; the second end of the first resistor is respectively connected to the first input end of the first amplifier module and the first input end of the second amplifier module.
[0013] Preferably, the first tuning circuit comprises a third capacitor and a first wiring inductor, a first end of the third capacitor is connected to a first end of the first wiring inductor and serves as an input end of the first tuning circuit; a second end of the third capacitor is connected to a second end of the first wiring inductor and serves as an output end of the first tuning circuit;
[0014] The second tuning circuit includes a fourth capacitor and a second routing inductor, wherein a first end of the fourth capacitor is connected to a first end of the second routing inductor and serves as an input end of the second tuning circuit; a second end of the fourth capacitor is connected to a second end of the second routing inductor and serves as an output end of the second tuning circuit.
[0015] Preferably, the third tuning circuit includes a third routing inductor, a fifth capacitor and a sixth capacitor; a first end of the sixth capacitor is connected to the first end of the third routing inductor and serves as an input end of the third tuning circuit, and a second end of the sixth capacitor is grounded; a first end of the fifth capacitor is connected to the second end of the third routing inductor and serves as an output end of the third tuning circuit, and a second end of the fifth capacitor is grounded;
[0016] The fourth tuning circuit includes a fourth routing inductor, a seventh capacitor and an eighth capacitor; a first end of the seventh capacitor is connected to the first end of the fourth routing inductor and serves as an input end of the fourth tuning circuit, and a second end of the seventh capacitor is grounded; a first end of the eighth capacitor is connected to the second end of the fourth routing inductor and serves as an output end of the fourth tuning circuit, and a second end of the eighth capacitor is grounded.
[0017] Preferably, the second capacitor, the third capacitor, the fourth capacitor, the fifth capacitor, the sixth capacitor, the seventh capacitor and the eighth capacitor are all adjustable capacitors.
[0018] Preferably, the circuit of the first amplifier module is the same as that of the second amplifier module;
[0019] The first amplifier circuit module includes a bias circuit, a second resistor, a third resistor, a ninth capacitor, a second MOS transistor, a third MOS transistor and a first inductor;
[0020] The drain of the second MOS tube is connected to the source of the third MOS tube and serves as the second input end of the first amplifier module; the gate of the second MOS tube serves as the first input end of the first amplifier module and is respectively connected to the first end of the second resistor, the first end of the ninth capacitor and the output end of the first input switch circuit; the source of the second MOS tube serves as the second output end of the first amplifier module and is respectively connected to the second end of the ninth capacitor and the first end of the first inductor, and the second end of the first inductor is grounded; the second end of the second resistor is connected to the first output end of the bias circuit, and the second end of the first resistor is connected to the first input end of the first amplifier module after being connected in series with the second resistor; the second output end of the bias circuit is connected to the gate of the third MOS tube after being connected in series with the third resistor, and the drain of the third MOS tube serves as the first output end of the first amplifier module; the first output end of the bias circuit in the first amplifier module is connected to the first output end of the bias circuit in the second amplifier module.
[0021] Preferably, the first input switch circuit is the same as the second input switch circuit;
[0022] The first input switch circuit comprises a plurality of switch units, the input ends of the plurality of switch units are commonly used as the input end of the first input switch circuit, and the output ends of the plurality of switch units are connected and used as the output end of the first input switch circuit;
[0023] Each of the switch units includes a third switch, a fourth switch and a tenth capacitor; the control end of the third switch is connected to the control end of the fourth switch and serves as the input end of the switch unit, the output end of the third switch is used for grounding or disconnection, the output end of the fourth switch is used for connecting to or disconnecting from the first end of the tenth capacitor, and the second end of the tenth capacitor serves as the output end of the switch unit.
[0024] Preferably, the ninth capacitor is an adjustable capacitor.
[0025] Preferably, the circuit structure of the first output matching module is the same as that of the second output matching module;
[0026] The first output matching module includes a second inductor and an output matching circuit, the input end of the output matching circuit is connected to the first end of the second inductor and serves as the input end of the first output matching module, the second end of the second inductor is used to connect to a power supply, and the output end of the output matching circuit serves as the output end of the first output matching module.
[0027] In a second aspect, an embodiment of the present invention provides a radio frequency chip, comprising the low noise amplifier as described above.
[0028] Compared with the related art, in the embodiment of the present invention, different gain adjustment functions are realized by using the input end of the common port input selection module to receive the radio frequency signal, and the output end of the common port input selection module to connect the input end of the first amplifier module or the input end of the second amplifier module; the output end of the first switch of the common port input selection module is used to connect the input end of the first tuning circuit or the input end of the second tuning circuit, the input end of the first tuning circuit is connected to the first amplifier module and grounded, and the output end of the second tuning circuit is connected to the second amplifier module and grounded; the drain of the first MOS tube is connected to the control end of the second switch, and the output of the second switch is used to connect the input end of the third tuning circuit or the input end of the second tuning circuit. The input end of the fourth tuning circuit is connected to the input end of the first amplifier module; the output end of the fourth tuning circuit is connected to the input end of the second amplifier module; the second end of the first resistor is respectively connected to the first amplifier module and the second amplifier module; the spectrum is fully utilized by the RF LNA in the CA case and the non-CA case, and good isolation between the input ports is achieved. By considering the layout routing of the common port connecting the various LNAs in advance and adding tuning circuits, good RF performance can be achieved, so that both the first input end of the LNA itself and the RF performance of the common port can meet the performance indicators of operators in different application environments. BRIEF DESCRIPTION OF THE DRAWINGS
[0029] The present invention will be described in detail below in conjunction with the accompanying drawings. The above and other aspects of the present invention will become clearer and easier to understand through the detailed description made in conjunction with the following drawings. In the accompanying drawings:
[0030] Figure 1 A circuit structure block diagram of a low noise amplifier provided in an embodiment of the present invention;
[0031] Figure 2 for Figure 1 A partial enlargement of the part shown in Figure 1 ;
[0032] Figure 3 for Figure 1 A partial enlargement of the portion shown in B Figure 2 ;
[0033] Figure 4 for Figure 1 A partial enlargement of the portion shown in C Figure 3 .
[0034] Among them, 100, low noise amplifier, 1, common port input selection module, 11, first tuning circuit, 12, second tuning circuit, 13, third tuning circuit, 14, fourth tuning circuit, 2, first amplifier module, 21, bias circuit, 3, second amplifier module, 4, first input switch module, 41, switch unit, 5, second input switch module, 6, first output matching module, 61, output matching circuit, 7, second output matching module. DETAILED DESCRIPTION
[0035] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by technicians in the technical field of the present application; the terms used in the specification of the application herein are only for the purpose of describing specific embodiments and are not intended to limit the present application; the terms "including" and "having" and any variations thereof in the specification and claims of the present application and the above-mentioned drawings are intended to cover non-exclusive inclusions. The terms "first", "second", etc. in the specification and claims of the present application or the above-mentioned drawings are used to distinguish different objects, not to describe a specific order.
[0036] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.
[0037] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.
[0038] Embodiment 1
[0039] See also Figure 1-Figure 4 As shown, an embodiment of the present invention provides a low noise amplifier 100, including a common port input selection module 1, a first amplifier module 2, a second amplifier module 3, a first input switch module 4, a second input switch module 5, a first output matching module 6 and a second output matching module 7.
[0040] The input end of the common port input selection module 1 is used to receive a radio frequency signal (LNA12 IN3), the output end of the common port input selection module 1 is used to control the selective output of the signal by the first amplifier module 2 and / or the second amplifier module 3, so as to realize different gain adjustment control of the output signal.
[0041] The first output end of the first amplifier module 2 is connected to the input end of the first output matching module 6, and the output end of the first output matching module 6 is used to connect to the load; the first output end of the second amplifier module 3 is connected to the input end of the second output matching module 7, and the output end of the second output matching module 7 is used to connect to the load. The input end of the first input switch module 4 is used to connect the first input signal (LNA1 IN1 ), the output end of the first input switch module 4 is used for the first input end of the first amplifier module 2; the input end of the second input switch module 5 is used for receiving the second input signal (LNA2 IN1 ), the output end of the second input switch module 5 is used to connect the first input end of the second amplifier module 3. The first input signal and the second input signal are used to input radio frequency signals of different frequency bands, and the radio frequency inputs of different amplifier modules are adjusted by radio frequency signals of different frequency bands.
[0042] Specifically, the common port input selection module 1 receives the RF signal for selecting the output to the first amplifier module 2 or the second amplifier module 3, respectively processes the signal through the first amplifier module 2 and the second amplifier module 3, and respectively outputs the amplified signal to the first output matching module 6 and the second output matching module 7 to achieve output matching for connecting the load. The first input switch module 4 and the second input switch module 5 are used to select the conventional input port.
[0043] In this embodiment, the common port input selection module 1 includes a first switch SPDT1, a first tuning circuit 11, a second tuning circuit 12, a first capacitor C1, a second capacitor C2, a first MOS tube M1, a first resistor R1, a second switch SPDT2, a third tuning circuit 13 and a fourth tuning circuit 14.
[0044] The first end of the first capacitor C1 serves as the input end of the common port input selection module 1, the second end of the first capacitor C1 is respectively connected to the first end of the second capacitor C2, the gate of the first MOS tube M1 and the first end of the first resistor R1, and the second end of the second capacitor C2 is connected to the source of the first MOS tube M1; the control end of the first switch SPDT1 is connected to the source of the first MOS tube M1, and the output end of the first switch SPDT1 is used to connect to the input end of the first tuning circuit 11 or the input end of the second tuning circuit 12. The output end of the first tuning circuit 11 is connected to the second input end of the first amplifier module 2 and grounded, and the output end of the second tuning circuit 12 is connected to the second input end of the second amplifier module 3 and grounded; the drain of the first MOS tube M1 is connected to the control end of the second switch SPDT2, and the output of the second switch SPDT2 is used to connect the input end of the third tuning circuit 13 or the input end of the fourth tuning circuit 14; the input end of the third tuning circuit 13 is connected to the second input end of the first amplifier module 2, and the output end of the fourth tuning circuit 14 is connected to the second input end of the second amplifier module 3; the second end of the first resistor R1 is respectively connected to the first input end of the first amplifier module 2 and the first input end of the second amplifier module 3.
[0045] Specifically, the input RF signal is DC-isolated by the first capacitor C1, and the first MOS tube M1 is connected to the first tuning circuit 11 and the second tuning circuit 12 respectively through the first switch SPDT1, so that the control signal is output to the first tuning circuit 11 or the second tuning circuit 12 through the first switch SPDT1, so as to realize the function of input port switching. At the same time, the second switch SPDT2 is connected to the drain of the first MOS tube M1, which is used to switch the first amplifier module 2 and the second amplifier module 3 respectively, so as to realize the signal input switching effect of the amplifier module. The first tuning circuit 11 and the second tuning circuit 12 can reduce the gain deterioration and return loss deterioration caused by the routing. The third tuning circuit 13 and the fourth tuning circuit 14 can respectively optimize the input return loss (S11) and improve the linearity of the first amplifier module 2 and the second amplifier module 3.
[0046] In this embodiment, the first tuning circuit 11 includes a third capacitor C3 and a first wiring inductor Line1, a first end of the third capacitor C3 is connected to a first end of the first wiring inductor Line1 and serves as an input end of the first tuning circuit 11; a second end of the third capacitor C3 is connected to a second end of the first wiring inductor Line1 and serves as an output end of the first tuning circuit 11. By connecting the first wiring in parallel with the adjustable third capacitor C3, gain deterioration and return loss deterioration caused by the first wiring inductor Line1 can be reduced.
[0047] The second tuning circuit 12 includes a fourth capacitor C4 and a second wiring inductor Line2, wherein a first end of the fourth capacitor C4 is connected to a first end of the second wiring inductor Line2 and serves as an input end of the second tuning circuit 12; a second end of the fourth capacitor C4 is connected to a second end of the second wiring inductor Line2 and serves as an output end of the second tuning circuit 12. By connecting the second wiring in parallel with the adjustable fourth capacitor C4, gain deterioration and return loss deterioration caused by the second wiring inductor Line2 can be reduced.
[0048] In this embodiment, the third tuning circuit 13 includes a third routing inductor Line3, a fifth capacitor C5 and a sixth capacitor C6; the first end of the sixth capacitor C6 is connected to the first end of the third routing inductor Line3 and serves as the input end of the third tuning circuit 13, and the second end of the sixth capacitor C6 is grounded; the first end of the fifth capacitor C5 is connected to the second end of the third routing inductor Line3 and serves as the output end of the third tuning circuit 13, and the second end of the fifth capacitor C5 is grounded. By placing the fifth capacitor C5 and the sixth capacitor C6 in different parts of the third routing inductor Line3 and adjusting the capacitance value, the effect of the inductance can be weakened to optimize the return loss and linearity.
[0049] The fourth tuning circuit 14 includes a fourth routing inductor Line4, a seventh capacitor C7 and an eighth capacitor C8; the first end of the seventh capacitor C7 is connected to the first end of the fourth routing inductor Line4 and serves as the input end of the fourth tuning circuit 14, and the second end of the seventh capacitor C7 is grounded; the first end of the eighth capacitor C8 is connected to the second end of the fourth routing inductor Line4 and serves as the output end of the fourth tuning circuit 14, and the second end of the eighth capacitor C8 is grounded. By placing the seventh capacitor C7 and the eighth capacitor C8 in different parts of the fourth routing inductor Line4 and adjusting the capacitance value, the effect of the inductance can be weakened to optimize the return loss and linearity.
[0050] In this embodiment, the second capacitor C2, the third capacitor C3, the fourth capacitor C4, the fifth capacitor C5, the sixth capacitor C6, the seventh capacitor C7 and the eighth capacitor C8 are all adjustable capacitors.
[0051] In this embodiment, the circuits of the first amplifier module 2 and the second amplifier module 3 are the same.
[0052] The first amplifier circuit module includes a bias circuit 21, a second resistor R2, a third resistor R3, a ninth capacitor C9, a second MOS transistor M2, a third MOS transistor M3 and a first inductor LS1.
[0053] The drain of the second MOS tube M2 is connected to the source of the third MOS tube M3 and serves as the second input terminal of the first amplifier module 2; the gate of the second MOS tube M2 serves as the first input terminal of the first amplifier module, and is respectively connected to the first end of the second resistor R2, the first end of the ninth capacitor C9 and the output terminal of the first input switch circuit. The source of the second MOS tube M2 serves as the second output terminal of the first amplifier module, and is respectively connected to the second end of the ninth capacitor C9 and the first end of the first inductor LS1, and the second end of the first inductor LS1 is grounded; the second end of the second resistor R2 is connected to the first output terminal of the bias circuit 21, and the second end of the first resistor R1 is connected to the first input terminal of the first amplifier module after being connected in series with the second resistor R2; the second output terminal of the bias circuit 21 is connected to the gate of the third MOS tube M3 after being connected in series with the third resistor, and the drain of the third MOS tube M3 serves as the first output terminal of the first amplifier module 2, and the first output terminal of the bias circuit in the first amplifier module is connected to the first output terminal of the bias circuit in the second amplifier module.
[0054] Specifically, the first wiring inductor Line1 is used to ensure that the source of the first MOS tube M1 is connected to the source of the second MOS tube M2 and the first inductor LS1. Due to the layout problem, the equivalent value of the first inductor LS1 becomes larger, which leads to the deterioration of the gain. Therefore, this section of the first wiring inductor Line1 is connected in parallel with the third capacitor C3, which can reduce the gain deterioration and return loss deterioration caused by the first wiring inductor Line1.
[0055] Similarly, the second routing inductor Line2 is used to ensure that the source of the first MOS tube M1 is connected to the source of the MOS tube M21 of the second amplifier module 3 and the inductor LS2. Due to the layout problem, the equivalent value of the inductor LS2 becomes larger, resulting in gain deterioration. Therefore, this section of the second routing inductor Line2 is connected in parallel with the fourth capacitor C4, which can reduce the gain deterioration and return loss deterioration caused by the second routing inductor Line2.
[0056] Specifically, the third routing inductor Line3 is used to characterize the drain of the first MOS tube M1 and the drain of the second MOS tube M2 connected on the layout. The third routing inductor Line3 can be equivalent to a routing inductor with parasitic resistance, which will lead to the deterioration of return loss and linearity performance. By placing the fifth capacitor C5 and the sixth capacitor C6 at different positions of the third routing inductor Line3 and adjusting the capacitance value, the effect of the inductance can be weakened to optimize the return loss and linearity.
[0057] Similarly, the fourth routing inductor Line4 is used to characterize the drain of the first MOS tube M1 and the drain of the MOS tube M21 connected on the layout. The fourth routing inductor Line4 can be equivalent to a routing inductor with parasitic resistance, which will lead to the deterioration of return loss and linearity performance. By placing the seventh capacitor C7 and the eighth capacitor C8 at different parts of the fourth routing inductor Line4 and adjusting the capacitance value, the effect of the inductor can be weakened to optimize the return loss and linearity.
[0058] In this embodiment, the circuit of the first input switch circuit is the same as that of the second input switch circuit; the first input switch circuit includes a plurality of switch units 41, the input ends of the plurality of switch units 41 collectively serve as the input end of the first input switch circuit, and the output ends of the plurality of switch units 41 collectively serve as the output end of the first input switch circuit.
[0059] Each of the switch units 41 includes a third switch SW1, a fourth switch SW2 and a tenth capacitor C10; the control end of the third switch SW1 is connected to the control end of the fourth switch SW2 and serves as an input end of the switch unit 41, the output end of the third switch SW1 is used for grounding or disconnection, the output end of the fourth switch SW2 is used for connecting to or disconnecting from the first end connected to the tenth capacitor C10, and the second end of the tenth capacitor C10 serves as the output end of the switch unit 41.
[0060] Specifically, the selection of the normal input port is switched through the third switch SW1 and the fourth switch SW2 of the switch unit 41, and the DC isolation function is implemented through the tenth capacitor C10.
[0061] In this embodiment, the ninth capacitor C9 is an adjustable capacitor.
[0062] In this embodiment, the circuit structures of the first output matching module 6 and the second output matching module 7 are the same; the first output matching module 6 and the second output matching module 7 are respectively used to adjust the output matching of the low noise amplifier 100. The first output matching module 6 includes a second inductor L01 and an output matching circuit 61, the input end of the output matching circuit 61 is connected to the first end of the second inductor L01 and serves as the input end of the first output matching module 6, the second end of the second inductor L01 is used to connect to the power supply VDD, and the output end of the output matching circuit 61 serves as the output end of the first output matching module 6.
[0063] Embodiment 2
[0064] An embodiment of the present invention provides a radio frequency chip, including the low noise amplifier 100 as described above. The technical effect produced by the radio frequency chip is the same as that of the low noise amplifier 100 described above, and will not be described here.
[0065] It should be noted that the various embodiments described above with reference to the accompanying drawings are only used to illustrate the present invention rather than to limit the scope of the present invention. Those skilled in the art should understand that any modification or equivalent substitution of the present invention without departing from the spirit and scope of the present invention should be included within the scope of the present invention. In addition, unless otherwise indicated by the context, words appearing in the singular include the plural form, and vice versa. In addition, unless otherwise specified, all or part of any embodiment may be used in combination with all or part of any other embodiment.
Claims
1. A low noise amplifier, characterized in that: It includes a common port input selection module, a first amplifier module, a second amplifier module, a first input switch module, a second input switch module, a first output matching module and a second output matching module; The input end of the common port input selection module is used to receive a radio frequency signal, and the output end of the common port input selection module is used to control the selective output of the signal by the first amplifier module and / or the second amplifier module, so as to realize different gain adjustment controls on the output signal; The first output end of the first amplifier module is connected to the input end of the first output matching module, and the output end of the first output matching module is used to connect to a load; the first output end of the second amplifier module is connected to the input end of the second output matching module, and the output end of the second output matching module is used to connect to a load; the input end of the first input switch module is used to access a first input signal, and the output end of the first input switch module is used to connect to the first input end of the first amplifier module; the input end of the second input switch module is used to access a second input signal, and the output end of the second input switch module is used to connect to the first input end of the second amplifier module; The common port input selection module includes a first switch, a first tuning circuit, a second tuning circuit, a first capacitor, a second capacitor, a first MOS tube, a first resistor, a second switch, a third tuning circuit and a fourth tuning circuit; The first end of the first capacitor is used as the input end of the common port input selection module, the second end of the first capacitor is respectively connected to the first end of the second capacitor, the gate of the first MOS tube and the first end of the first resistor, and the second end of the second capacitor is connected to the source of the first MOS tube; The control end of the first switch is connected to the source of the first MOS tube, and the output end of the first switch is used to connect to the input end of the first tuning circuit or the input end of the second tuning circuit; the output end of the first tuning circuit is connected to the second output end of the first amplifier module and grounded, and the output end of the second tuning circuit is connected to the second output end of the second amplifier module and grounded; the drain of the first MOS tube is connected to the control end of the second switch, and the output of the second switch is used to connect to the input end of the third tuning circuit or the input end of the fourth tuning circuit; the output end of the third tuning circuit is connected to the second input end of the first amplifier module, and the output end of the fourth tuning circuit is connected to the second input end of the second amplifier module; the second end of the first resistor is respectively connected to the first input end of the first amplifier module and the first input end of the second amplifier module.
2. The low noise amplifier according to claim 1, characterized in that: The first tuning circuit includes a third capacitor and a first wiring inductor, wherein a first end of the third capacitor is connected to a first end of the first wiring inductor and serves as an input end of the first tuning circuit; a second end of the third capacitor is connected to a second end of the first wiring inductor and serves as an output end of the first tuning circuit; The second tuning circuit includes a fourth capacitor and a second routing inductor, wherein a first end of the fourth capacitor is connected to a first end of the second routing inductor and serves as an input end of the second tuning circuit; a second end of the fourth capacitor is connected to a second end of the second routing inductor and serves as an output end of the second tuning circuit.
3. The low noise amplifier according to claim 2, characterized in that: The third tuning circuit includes a third routing inductor, a fifth capacitor and a sixth capacitor; a first end of the sixth capacitor is connected to the first end of the third routing inductor and serves as an input end of the third tuning circuit, and a second end of the sixth capacitor is grounded; a first end of the fifth capacitor is connected to the second end of the third routing inductor and serves as an output end of the third tuning circuit, and a second end of the fifth capacitor is grounded; The fourth tuning circuit includes a fourth routing inductor, a seventh capacitor and an eighth capacitor; a first end of the seventh capacitor is connected to the first end of the fourth routing inductor and serves as an input end of the fourth tuning circuit, and a second end of the seventh capacitor is grounded; a first end of the eighth capacitor is connected to the second end of the fourth routing inductor and serves as an output end of the fourth tuning circuit, and a second end of the eighth capacitor is grounded.
4. The low noise amplifier according to claim 3, characterized in that: The second capacitor, the third capacitor, the fourth capacitor, the fifth capacitor, the sixth capacitor, the seventh capacitor and the eighth capacitor are all adjustable capacitors.
5. The low noise amplifier according to claim 1, characterized in that: The circuit of the first amplifier module is the same as that of the second amplifier module; The first amplifier circuit module includes a bias circuit, a second resistor, a third resistor, a ninth capacitor, a second MOS transistor, a third MOS transistor and a first inductor; The drain of the second MOS transistor is connected to the source of the third MOS transistor and serves as the second input end of the first amplifier module; the gate of the second MOS transistor serves as the first input end of the first amplifier module and is respectively connected to the first end of the second resistor, the first end of the ninth capacitor and the output end of the first input switch circuit; the source of the second MOS transistor serves as the second output end of the first amplifier module and is respectively connected to the second end of the ninth capacitor and the first end of the first inductor, and the second end of the first inductor is grounded; the second end of the second resistor is connected to the first output end of the bias circuit, and the second end of the first resistor is connected to the first input end of the first amplifier module after being connected in series with the second resistor; the second output end of the bias circuit is connected to the gate of the third MOS transistor after being connected in series with the third resistor, and the drain of the third MOS transistor serves as the first output end of the first amplifier module; the first output end of the bias circuit in the first amplifier module is connected to the first output end of the bias circuit in the second amplifier module.
6. The low noise amplifier according to claim 5, characterized in that: The first input switch circuit is the same as the second input switch circuit; The first input switch circuit comprises a plurality of switch units, the input ends of the plurality of switch units are commonly used as the input end of the first input switch circuit, and the output ends of the plurality of switch units are connected and used as the output end of the first input switch circuit; Each of the switch units includes a third switch, a fourth switch and a tenth capacitor; the control end of the third switch is connected to the control end of the fourth switch and serves as the input end of the switch unit, the output end of the third switch is used for grounding or disconnection, the output end of the fourth switch is used for connecting to or disconnecting from the first end of the tenth capacitor, and the second end of the tenth capacitor serves as the output end of the switch unit.
7. The low noise amplifier according to claim 5, characterized in that: The ninth capacitor is an adjustable capacitor.
8. The low noise amplifier according to claim 1, characterized in that: The circuit structure of the first output matching module is the same as that of the second output matching module; The first output matching module includes a second inductor and an output matching circuit, the input end of the output matching circuit is connected to the first end of the second inductor and serves as the input end of the first output matching module, the second end of the second inductor is used to connect to a power supply, and the output end of the output matching circuit serves as the output end of the first output matching module.
9. A radio frequency chip, characterized in that: Comprising a low noise amplifier as described in any one of claims 1-8.
Citation Information
Patent Citations
Low noise amplifier and radio frequency chip
CN115441838A
Linear low noise amplifier with adjustable gain
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