Methods and apparatus for scheduling multi-channel data encoding, and multi-core encoding system

By using a collaborative approach among encoding computation units in a multi-core encoding system and batch processing encoding tasks using register configuration parameters, the problem of low scheduling efficiency in multi-channel data encoding is solved, achieving more efficient allocation and scheduling of computing resources.

CN119172448BActive Publication Date: 2025-10-31ALLWINNER TECH CO LTD
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Patent Information

Application Number
CN202310731705.X
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-06-19
Publication Date
2025-10-31
Estimated Expiration
2043-06-19

AI Technical Summary

Technical Problem

Existing multi-channel data encoding and scheduling schemes suffer from low video encoding and scheduling efficiency due to the high frequency of software and hardware interactions.

Method used

The system adopts a collaborative approach among encoding computation units in a multi-core encoding system. By pre-loading the register configuration parameters of the encoding channel group into the register's internal cache, encoding tasks are executed sequentially, reducing software and hardware interaction and improving efficiency through batch processing.

Benefits of technology

It improves the efficiency of multi-channel encoding scheduling, reduces the frequency of software and hardware interaction, and achieves a more reasonable and efficient allocation of computing resources.

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Abstract

This invention discloses a method and apparatus for scheduling multi-channel data encoding, and a multi-core encoding system. When the method receives an encoding task sent by the software, the encoding calculation unit, i.e. the hardware, executes the corresponding encoding task for each encoding channel sequentially based on the loaded register configuration data. That is, it adopts a collaborative approach between software and hardware to process the encoding task in batch mode, making full use of the advantages of both software and hardware, making the scheduling of multi-channel encoding more reasonable and efficient, reducing the frequency of software and hardware interaction, and improving the efficiency of multi-channel encoding scheduling.
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Description

Technical Field

[0001] This invention relates to the field of communication technology, and in particular to a method and apparatus for scheduling multi-channel data encoding, and a multi-core encoding system. Background Technology

[0002] With the rapid development of integrated circuit technology and multimedia audio and video technology, video images have become an important and indispensable information transmission medium in people's daily life and work. Electronic products with functions such as video image acquisition, compression, transmission, decompression, and display have been widely used in various industries, such as dashcams, action cameras, security building monitoring, network TV set-top boxes, and tablet computers.

[0003] Because video image compression and decompression algorithms are complex and require significant computing resources, dedicated video encoding digital integrated circuits are typically used for image encoding and decoding. In vehicle control systems and security monitoring scenarios, there are generally six or more encoding channels; however, the hardware computing units for encoding usually only have one or two. Therefore, how to evenly allocate the resources of these one or two computing units to the processing of each encoding channel becomes a crucial technical problem that must be addressed.

[0004] To address the aforementioned technical challenges, existing multi-channel data encoding scheduling solutions in the industry employ the following methods: on the software side, scheduling of encoding hardware computing units is achieved by pre-setting the priority of each encoding channel, polling and traversing the task requirements of each channel, and calculating the target computing power of each channel; or, on the hardware side, scheduling of encoding hardware computing units is achieved by using a two-dimensional array priority mapping method.

[0005] However, in practice, it has been found that existing commonly used multi-channel data encoding scheduling schemes suffer from low efficiency because the hardware requires a complete hardware-software interaction for each encoding calculation task. This high frequency and long processing time of hardware-software interaction leads to a lack of efficiency. Therefore, proposing a technical solution to improve the efficiency of multi-channel encoding scheduling is particularly important. Summary of the Invention

[0006] The technical problem to be solved by the present invention is to provide a method and apparatus for scheduling multi-channel data encoding, and a multi-core encoding system, which can improve the scheduling efficiency of multi-channel encoding.

[0007] To address the aforementioned technical problems, the first aspect of this invention discloses a method for scheduling multi-channel data encoding. The method is applied in a multi-core encoding system, which includes a hardware component. The hardware component includes multiple encoding calculation units, each of which is independent of the others. Each encoding calculation unit has a corresponding encoding channel group, and the encoding channel groups corresponding to each encoding calculation unit are different from each other. Each encoding channel group is composed of register configuration parameters of each of the multiple encoding channels.

[0008] For any of the aforementioned encoding calculation units, the method includes:

[0009] When a target encoding task is received from the software, the encoding calculation unit loads the register configuration parameters of the encoding channel group corresponding to the encoding calculation unit into the register internal cache from the storage unit according to the target encoding task and a predetermined parameter loading method. The storage unit is used to store the register configuration parameters of all initial encoding channels written by the software, and all initial encoding channels include all encoding channels corresponding to the encoding calculation unit.

[0010] The encoding calculation unit executes the target encoding task sequentially on each encoding channel in the encoding channel group according to the register configuration parameters loaded into the encoding channel group, until all encoding channels in the encoding channel group have completed the target encoding task.

[0011] As an optional implementation, in a first aspect of the present invention, the encoding calculation unit executes the target encoding task sequentially on each encoding channel in the encoding channel group according to the register configuration parameters loaded into the encoding channel group, until all encoding channels in the encoding channel group have completed the target encoding task, including:

[0012] The encoding calculation unit determines the data source address of the target data to be encoded for each encoding channel in sequence according to the register configuration parameters loaded into the encoding channel group, and obtains the target data corresponding to each encoding channel according to the data source address corresponding to each encoding channel.

[0013] The encoding calculation unit sequentially executes the target encoding task on the target data corresponding to each encoding channel in the encoding channel group until all encoding channels in the encoding channel group have completed the target encoding task.

[0014] As an optional implementation, in the first aspect of the present invention, the parameter loading method is used to indicate that a preset number of register configuration parameters of all the encoding channels in the encoding channel group corresponding to the encoding calculation unit are loaded into the register internal cache at one time from the storage unit, wherein the preset number is greater than 1 and less than the number of all encoding channel groups in the encoding channel group, or only the register configuration parameters of one encoding channel are loaded into the register internal cache at a time, and when the target encoding task of the encoding channel is completed, the register configuration parameters of the next encoding channel are loaded into the register internal cache to execute the corresponding target encoding task.

[0015] As an optional implementation, in the first aspect of the present invention, the multi-core encoding system further includes the software component, and the method further includes:

[0016] The software creates a corresponding parameter calculation thread for each of the encoding channels that need to perform encoding tasks.

[0017] For any of the encoding channels, the software obtains the scene parameters of the encoding channel from the application layer of the software based on the parameter calculation thread corresponding to the encoding channel, calculates the obtained scene parameters based on the parameter calculation thread to obtain the register configuration parameters of the encoding channel, and sets the calculated register configuration parameters to a pre-created parameter management thread.

[0018] The software manages the register configuration parameters of all the encoding channels obtained based on the parameter management thread in a pre-determined queue manner, so that the register configuration parameters of all the encoding channels are stored in a pre-determined storage container.

[0019] The software obtains the register configuration parameters of all the encoding channels from the storage container based on a pre-created computing unit scheduling thread, and uses the computing unit scheduling thread to dynamically calculate the priority of each encoding channel based on the obtained register configuration parameters of each encoding channel.

[0020] The software obtains the remaining computing power of each encoding computing unit based on the computing unit scheduling thread, and uses the computing unit scheduling thread to allocate encoding tasks to each encoding computing unit based on the priority of all encoding channels and the remaining computing power of each encoding computing unit. All encoding tasks include the target encoding task.

[0021] As an optional implementation, in the first aspect of the present invention, the software uses the computing unit to schedule threads and dynamically calculates the priority of each encoding channel based on the obtained register configuration parameters of each encoding channel, including:

[0022] The software uses the computing unit to schedule threads and obtains the resource status parameters of each encoding channel based on the obtained register configuration parameters of each encoding channel. The resource status parameters of each encoding channel include one or more of the following: data cache status, data frame rate, and interval time since the last encoding. The data cache status of each encoding channel is used to indicate the amount of data to be processed in the encoding channel.

[0023] The software uses the computing unit to schedule threads and dynamically calculates the resource status parameters of each encoding channel to obtain the priority of each encoding channel.

[0024] As an optional implementation, in the first aspect of the present invention, the method further includes:

[0025] The software uses the parameter management thread to calculate the computing power of the scene parameters for each encoding channel to obtain the target computing power required for that encoding channel. The larger the value of the scene parameters of the encoding channel, the more data needs to be processed and the greater the target computing power required.

[0026] The software uses the computing unit scheduling thread to obtain the target computing power required for each encoding channel from the parameter management thread;

[0027] The software uses the computing unit scheduling thread to allocate encoding tasks to each encoding computing unit based on the priority of all encoding channels and the remaining computing power of each encoding computing unit, including:

[0028] The software compares the target computing power required for each encoding channel with the remaining computing power of all encoding computing units based on the computing unit scheduling thread, obtains the comparison result, and uses the computing unit scheduling thread to allocate encoding tasks to each encoding computing unit based on the priority of all encoding channels and the comparison result.

[0029] As an optional implementation, in a first aspect of the present invention, the software uses the computing unit scheduling thread to allocate encoding tasks to each encoding computing unit based on the priority of all the encoding channels and the comparison results, including:

[0030] When the analysis result indicates that the sum of the target computing power required by all the encoding channels is less than or equal to the sum of the remaining computing power of all the encoding computing units, the software uses the computing unit scheduling thread to allocate the corresponding encoding tasks to each encoding computing unit on an average basis according to the priority of all the encoding channels, the sum of the target computing power required by all the encoding channels, and the load of each encoding computing unit.

[0031] When the analysis result indicates that the target computing power of all the encoding channels is greater than the sum of the remaining computing power of all the encoding computing units, the software uses the computing unit scheduling thread to allocate a corresponding encoding task to each encoding computing unit according to the priority of each encoding channel.

[0032] As an optional implementation, in the first aspect of the present invention, after all the encoding channels in the encoding channel group have completed the encoding task, the method further includes:

[0033] The encoding calculation unit generates an interrupt signal and sends the generated interrupt signal to the software to trigger the software to respond to the interrupt signal based on a pre-created interrupt listening thread, and distribute the target interrupt signal to the target processing thread so that the target processing thread updates its own state.

[0034] The target processing thread includes one or more of the parameter calculation thread, the parameter management thread, and the computing unit scheduling thread.

[0035] The second aspect of this invention discloses an apparatus for scheduling multi-channel data encoding. The apparatus is applied in a multi-core encoding system. The multi-core encoding system includes a hardware terminal, which includes multiple encoding calculation units. Each encoding calculation unit is independent of each other, and each encoding calculation unit has a corresponding encoding channel group. The encoding channel groups corresponding to each encoding calculation unit are different from each other, and each encoding channel group is composed of register configuration parameters of each encoding channel in multiple encoding channels.

[0036] For any one of the encoding calculation units, the encoding calculation unit includes:

[0037] The loading module is used to load the register configuration parameters of the encoding channel group corresponding to the encoding calculation unit into the register internal cache from the storage unit according to the target encoding task and a predetermined parameter loading method when the target encoding task is received from the software. The storage unit is used to store the register configuration parameters of all initial encoding channels written by the software. All initial encoding channels include the encoding channels corresponding to all encoding calculation units.

[0038] The encoding module is used to execute the target encoding task sequentially on each encoding channel in the encoding channel group according to the register configuration parameters loaded into the encoding channel group, until all encoding channels in the encoding channel group have completed the target encoding task.

[0039] As an optional implementation, in a second aspect of the present invention, the encoding module executes the target encoding task sequentially on each encoding channel in the encoding channel group according to the register configuration parameters loaded into the encoding channel group, until all encoding channels in the encoding channel group have completed the target encoding task. The specific method includes:

[0040] The encoding calculation unit determines the data source address of the target data to be encoded for each encoding channel in sequence according to the register configuration parameters loaded into the encoding channel group, and obtains the target data corresponding to each encoding channel according to the data source address corresponding to each encoding channel.

[0041] The encoding calculation unit sequentially executes the target encoding task on the target data corresponding to each encoding channel in the encoding channel group until all encoding channels in the encoding channel group have completed the target encoding task.

[0042] As an optional implementation, in the second aspect of the present invention, the parameter loading method is used to indicate that a preset number of register configuration parameters of all the encoding channels in the encoding channel group corresponding to the encoding calculation unit are loaded into the register internal cache at one time from the storage unit, wherein the preset number is greater than 1 and less than the number of all encoding channel groups in the encoding channel group, or only the register configuration parameters of one encoding channel are loaded into the register internal cache at a time, and when the target encoding task of the encoding channel is completed, the register configuration parameters of the next encoding channel are loaded into the register internal cache to execute the corresponding target encoding task.

[0043] As an optional implementation, in a second aspect of the present invention, the multi-core coding system further includes the software component, which includes:

[0044] The thread creation module is used to create a corresponding parameter calculation thread for each of the encoding channels that need to perform encoding tasks. For any encoding channel, based on the parameter calculation thread corresponding to the encoding channel, the scene parameters of the encoding channel are obtained from the application layer of the software side, and the obtained scene parameters are calculated based on the parameter calculation thread to obtain the register configuration parameters of the encoding channel, and the calculated register configuration parameters are set to the pre-created parameter management thread.

[0045] The scheduling main thread module is used to manage threads based on the parameters, and manage the register configuration parameters of all the encoding channels obtained in a pre-determined queue manner, so that the register configuration parameters of all the encoding channels are stored in a pre-determined storage container.

[0046] The priority calculation module is used to obtain the register configuration parameters of all the encoding channels from the storage container based on the pre-created computing unit scheduling thread, and to use the computing unit scheduling thread to dynamically calculate the priority of each encoding channel based on the obtained register configuration parameters of each encoding channel.

[0047] The computing power calculation module is used to obtain the remaining computing power of each encoding computing unit based on the scheduling thread of the computing unit;

[0048] The computing unit scheduling module is used to allocate encoding tasks to each encoding computing unit based on the priority of all the encoding channels and the remaining computing power of each encoding computing unit using the computing unit scheduling thread. All the encoding tasks include the target encoding task.

[0049] As an optional implementation, in a second aspect of the present invention, the priority calculation module uses the computing unit to schedule threads and dynamically calculates the priority of each encoding channel based on the obtained register configuration parameters of each encoding channel. The specific method includes:

[0050] The computing unit schedules threads and, based on the obtained register configuration parameters of each encoding channel, obtains the resource status parameters of that encoding channel. The resource status parameters of each encoding channel include one or more of the following: data buffer status, data frame rate, and interval duration since the last encoding. The data buffer status of each encoding channel is used to indicate the amount of data to be processed in that encoding channel.

[0051] The computing unit schedules threads to dynamically calculate the resource status parameters of each encoding channel to obtain the priority of each encoding channel.

[0052] As an optional implementation, in the second aspect of the present invention, the computing power calculation module is further configured to use the parameter management thread to perform computing power calculation on the scene parameters of each encoding channel to obtain the target computing power required for the encoding channel, wherein the larger the value of the scene parameters of the encoding channel, the more data needs to be processed and the larger the target computing power required.

[0053] The computing power calculation module is also used to obtain the target computing power required for each encoding channel from the parameter management thread using the computing unit scheduling thread;

[0054] The specific method by which the computing unit scheduling module allocates encoding tasks to each encoding computing unit based on the priority of all encoding channels and the remaining computing power of each encoding computing unit includes:

[0055] The computing unit scheduling thread compares the target computing power required for each encoding channel with the remaining computing power of all encoding computing units to obtain the comparison result. Based on the priority of all encoding channels and the comparison result, the computing unit scheduling thread allocates encoding tasks to each encoding computing unit.

[0056] As an optional implementation, in a second aspect of the present invention, the specific method by which the computing unit scheduling module allocates encoding tasks to each encoding computing unit based on the priority of all the encoding channels and the comparison result using the computing unit scheduling thread includes:

[0057] When the analysis result indicates that the sum of the target computing power required by all the encoding channels is less than or equal to the sum of the remaining computing power of all the encoding computing units, the computing unit scheduling thread uses the computing unit scheduling thread to allocate the corresponding encoding task to each encoding computing unit on an average basis according to the priority of all the encoding channels, the sum of the target computing power required by all the encoding channels, and the load of each encoding computing unit.

[0058] When the analysis result indicates that the target computing power of all the encoding channels is greater than the sum of the remaining computing power of all the encoding computing units, the computing unit scheduling thread allocates a corresponding encoding task to each encoding computing unit according to the priority of each encoding channel.

[0059] As an optional implementation, in a second aspect of the present invention, the encoding calculation unit further includes:

[0060] The signal processing module is used to generate an interrupt signal after all the encoding channels in the encoding channel group have completed the encoding task, and send the generated interrupt signal to the software to trigger the software to respond to the interrupt signal based on a pre-created interrupt listening thread, and distribute the target interrupt signal to the target processing thread so that the target processing thread updates its own state.

[0061] The target processing thread includes one or more of the parameter calculation thread, the parameter management thread, and the computing unit scheduling thread.

[0062] A third aspect of the present invention discloses another apparatus for scheduling multi-channel data encoding, the apparatus being applied in a multi-core encoding system, the multi-core encoding system including a hardware terminal, the hardware terminal including multiple encoding calculation units, and for any one of the encoding calculation units, the encoding calculation unit includes:

[0063] Memory containing executable program code;

[0064] A processor coupled to the memory;

[0065] The processor calls the executable program code stored in the memory to execute the method for scheduling multi-channel data encoding disclosed in the first aspect of the present invention.

[0066] The fourth aspect of the present invention discloses a computer storage medium storing computer instructions, which, when invoked, are used to execute the method for scheduling multi-channel data encoding disclosed in the first aspect of the present invention.

[0067] Compared with the prior art, the embodiments of the present invention have the following beneficial effects:

[0068] This invention discloses a method and apparatus for scheduling multi-channel data encoding, and a multi-core encoding system. The method is applied to a multi-core encoding system, which includes a hardware component comprising multiple encoding computation units. Each encoding computation unit is independent and has a corresponding encoding channel group. The encoding channel groups corresponding to each encoding computation unit are different from each other, and each encoding channel group consists of register configuration parameters for each encoding channel among multiple encoding channels. For any encoding computation unit, the method includes: when a target encoding task is received from the software component, the encoding computation unit loads the register configuration parameters of the encoding channel group corresponding to the encoding computation unit into the register cache from a storage unit according to the target encoding task and a pre-determined parameter loading method. The storage unit stores the register configuration parameters of all initial encoding channels written by the software component, including the encoding channels corresponding to all encoding computation units. The method also includes executing the target encoding task sequentially on each encoding channel in the encoding channel group according to the loaded register configuration parameters of the encoding channel group, until all encoding channels in the encoding channel group have completed the target encoding task. As can be seen, when the encoding task sent by the software is received in the embodiment of the present invention, the encoding calculation unit, i.e. the hardware, executes the corresponding encoding task for each encoding channel in sequence based on the loaded register configuration data. That is, the encoding task is processed in batch mode by the cooperation of software and hardware, which makes full use of the advantages of software and hardware, making the scheduling of multi-channel encoding more reasonable and efficient, reducing the frequency of software and hardware interaction, and improving the efficiency of multi-channel encoding scheduling. Attached Figure Description

[0069] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0070] Figure 1 This is a flowchart illustrating a method for scheduling multi-channel data encoding disclosed in an embodiment of the present invention;

[0071] Figure 2 This is a schematic diagram of the structure of a device for scheduling multi-channel data encoding disclosed in an embodiment of the present invention;

[0072] Figure 3 This is a schematic diagram of another device for scheduling multi-channel data encoding disclosed in an embodiment of the present invention;

[0073] Figure 4This is a schematic diagram of the structure of another device for scheduling multi-channel data encoding disclosed in an embodiment of the present invention;

[0074] Figure 5 This is a schematic diagram of the structure of another device for scheduling multi-channel data encoding disclosed in an embodiment of the present invention;

[0075] Figure 6 This is a schematic diagram of the structure of a multi-core coding computing unit disclosed in an embodiment of the present invention;

[0076] Figure 7 This is a schematic diagram illustrating the principle of a hardware-based batch encoding task for scheduling multi-channel data encoding, as disclosed in an embodiment of the present invention.

[0077] Figure 8 This is a schematic diagram of a software-side encoding scheduling architecture for multi-channel encoded data disclosed in an embodiment of the present invention;

[0078] Figure 9 This is a schematic diagram of a multi-threaded design principle for multi-channel encoding task scheduling disclosed in an embodiment of the present invention. Detailed Implementation

[0079] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0080] The terms "first," "second," etc., used in the specification, claims, and accompanying drawings of this invention are used to distinguish different objects, not to describe a specific order. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, apparatus, product, or device that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to these processes, methods, products, or devices.

[0081] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of the invention. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0082] This invention discloses a method and apparatus for scheduling multi-channel data encoding, and a multi-core encoding system. When an encoding task is received from the software, the encoding calculation unit (i.e., the hardware) executes the corresponding encoding task for each encoding channel sequentially based on the loaded register configuration data. This employs a collaborative approach between software and hardware, using batch processing to handle encoding tasks. This fully utilizes the advantages of both the software and hardware, making multi-channel encoding scheduling more rational and efficient, reducing the frequency of software and hardware interactions, and improving the efficiency of multi-channel encoding scheduling. Detailed explanations follow.

[0083] Example 1

[0084] Please see Figure 1 , Figure 1 This is a flowchart illustrating a method for scheduling multi-channel data encoding according to an embodiment of the present invention. This method can be applied to devices such as in-vehicle multimedia devices, building security monitoring central control devices, and network set-top devices that require multi-channel encoding and are equipped with a multi-core encoding system. The multi-core encoding system can be any system among Android, Linux, and iOS, and includes a hardware component comprising multiple encoding calculation units. Each encoding calculation unit is independent and has a corresponding encoding channel group. The encoding channel groups corresponding to each encoding calculation unit are different from each other, and each encoding channel group consists of register configuration parameters for each encoding channel among multiple encoding channels. For any encoding calculation unit, such as... Figure 1 As shown, the method for scheduling multi-channel data encoding may include the following operations:

[0085] 101. When the target encoding task is received from the software, the encoding calculation unit loads the register configuration parameters of the encoding channel group corresponding to the encoding calculation unit into the register cache from the storage unit according to the target encoding task and the predetermined parameter loading method.

[0086] In this embodiment of the invention, the multiple encoding computation units included in the hardware of the multi-core encoding system can be as follows: Figure 6 As shown, Figure 6 This is a schematic diagram of the structure of a multi-core coding computing unit disclosed in an embodiment of the present invention, as shown below. Figure 6 As shown, the hardware consists of encoding calculation unit 1, encoding calculation unit 2, ..., encoding calculation unit n.

[0087] In this embodiment of the invention, the storage unit (such as DDR) is used to store the register configuration parameters of all initial encoding channels written by the software, and all initial encoding channels include the encoding channels corresponding to all encoding calculation units.

[0088] 102. Based on the register configuration parameters of the loaded encoding channel group, execute the target encoding task for each encoding channel in the encoding channel group in sequence until all encoding channels in the encoding channel group have completed the target encoding task.

[0089] In this embodiment of the invention, the parameter loading method is used to indicate that a preset number (e.g., 3) of the register configuration parameters of all encoding channels in the encoding channel group corresponding to the encoding calculation unit are loaded from the storage unit into the register internal cache at one time. The preset number is greater than 1 and less than the number of all encoding channel groups in the encoding channel group. Alternatively, only the register configuration parameters of one encoding channel are loaded into the register internal cache at a time. After the target encoding task of the encoding channel is completed, the register configuration parameters of the next encoding channel are loaded into the register internal cache to execute the corresponding target encoding task.

[0090] In this embodiment of the invention, the software (specifically the software driver) merges the register configuration parameters of multiple initial encoding channels into multiple encoding channel groups. The number of encoding channels in each encoding channel group can be flexibly configured by the software, and each encoding channel group has a corresponding maximum allowed number of encoding channels, such as 32 encoding channels.

[0091] In this embodiment of the invention, optionally, when multiple encoding computing units receive a target encoding task, each encoding computing unit can concurrently process the corresponding target encoding task, which can provide sufficiently high computing power for multi-channel encoding scheduling and improve the flexibility of computing resource allocation.

[0092] It is evident that implementation Figure 1 The described method, when receiving an encoding task from the software, has the encoding calculation unit (i.e., the hardware) execute the corresponding encoding task for each encoding channel sequentially based on the loaded register configuration data. This method employs a collaborative approach between software and hardware to process encoding tasks in batch mode, fully utilizing the advantages of both the software and hardware. This makes the scheduling of multi-channel encoding more reasonable and efficient, reduces the frequency of software and hardware interactions, and improves the efficiency of multi-channel encoding scheduling.

[0093] In an optional embodiment, the encoding calculation unit may, according to the register configuration parameters of the loaded encoding channel group, sequentially execute the target encoding task for each encoding channel in the encoding channel group until all encoding channels in the encoding channel group have completed the target encoding task, including:

[0094] Based on the register configuration parameters of the loaded encoding channel group, the data source address of the target data to be encoded for each encoding channel is determined in sequence, and the target data corresponding to the encoding channel is obtained according to the data source address corresponding to each encoding channel.

[0095] The target encoding task is executed sequentially on the target data corresponding to each encoding channel in the encoding channel group until all encoding channels in the encoding channel group have completed the target encoding task.

[0096] like Figure 7 As shown, Figure 7 This is a schematic diagram illustrating the principle of a hardware-based batch encoding task for scheduling multi-channel data encoding, as disclosed in an embodiment of the present invention. Figure 7 As shown, the encoding channel group contains register configuration parameters for three encoding channels: reg0, reg1, and reg2. Each encoding channel (reg0, reg1, reg2) has corresponding data frames (frame0, frame1, frame2). The encoding parameter set control module loads the register configuration parameters of the corresponding encoding channel into the internal register cache and passes them to the calculation unit. The calculation unit obtains the data frame of that encoding channel based on the data source address in the register configuration parameters, performs encoding processing, and forms a data stream for storage. Specifically, after processing the encoding of reg0 (channel 0), the encoding of reg1 (channel 1) is immediately loaded and processed, followed by the encoding of reg2 (channel 2). There is almost no time gap between the processing of reg0, reg1, and reg2 by the encoding calculation unit, improving the utilization rate of the encoding calculation unit. Furthermore, no interaction with the software is required, improving the scheduling efficiency of multiple encoding channels. The system can either load the register configuration parameters of three encoding channels (reg0, reg1, and reg2) into the register buffer at once, and then perform encoding processing on the data of each encoding channel sequentially based on the register configuration parameters of each of the three encoding channels (reg0, reg1, and reg2), or load the register configuration parameters of only one encoding channel at a time (e.g., in the order of reg0, reg1, and reg2) into the register buffer, perform the encoding task on the data of that encoding channel based on the register configuration parameters of that encoding channel, and then continue to load the register configuration parameters of the next encoding channel into the register buffer and perform the encoding task, until the encoding tasks of all three encoding channels (reg0, reg1, and reg2) are completed.

[0097] As can be seen, this optional embodiment determines the corresponding data source address by sequentially determining the corresponding data through the register configuration parameters of each encoded channel, obtains the corresponding data, and then executes the encoding task, thereby realizing batch encoding tasks, improving encoding efficiency, and thus improving the efficiency of multi-channel encoding scheduling.

[0098] In another alternative embodiment, the multi-core coding system further includes a software component, and the method may further include the following steps:

[0099] On the software side, a corresponding parameter calculation thread is created for each encoding channel among all encoding channels that need to perform encoding tasks;

[0100] For any encoding channel, the software obtains the scene parameters of the encoding channel from the application layer based on the parameter calculation thread corresponding to the encoding channel, and calculates the obtained scene parameters based on the parameter calculation thread to obtain the register configuration parameters of the encoding channel, and sets the calculated register configuration parameters to the pre-created parameter management thread.

[0101] The software manages the acquired register configuration parameters of the encoding channels using a pre-determined queue method based on a parameter management thread, so that the register configuration parameters of all encoding channels are stored in a pre-determined storage container.

[0102] The software obtains the register configuration parameters of all encoding channels from the storage container based on the pre-created computing unit scheduling thread, and uses the computing unit scheduling thread to dynamically calculate the priority of each encoding channel based on the obtained register configuration parameters of each encoding channel.

[0103] The software obtains the remaining computing power of each encoding computing unit based on the computing unit scheduling thread, and uses the computing unit scheduling thread to allocate encoding tasks to each encoding computing unit based on the priority of all encoding channels and the remaining computing power of each encoding computing unit. All encoding tasks include the target encoding task.

[0104] In this optional embodiment, the scene parameters for each encoding channel include, but are not limited to, one or more of the following: resolution, frame rate, and bit rate.

[0105] In this optional embodiment, after the encoding task is assigned, the computing unit scheduling thread is set to a sleep state to wait for the encoding computing unit on the hardware side to generate an interrupt signal.

[0106] In this optional embodiment, such as Figure 8 As shown, Figure 8 This is a schematic diagram of a software-side encoding scheduling architecture for multi-channel encoded data disclosed in an embodiment of the present invention, as shown below. Figure 8As shown, the software side comprises an application layer, a driver layer, and a hardware layer. The main logic is implemented in the driver layer. The driver layer creates a corresponding parameter calculation thread for each encoding channel that needs to perform the encoding task. This parameter calculation thread is responsible for interacting with the application layer regarding parameters, status, and data flow. For example, based on the parameter calculation thread corresponding to the encoding channel, the software side obtains the scene parameters of the encoding channel from the application layer, calculates the obtained scene parameters based on the parameter calculation thread to obtain the register configuration parameters of the encoding channel, and sets the calculated register configuration parameters to a pre-created parameter management thread (also known as the scheduling main processing thread). This allows the parameter management thread to manage the register configuration parameters of each encoding path using a queue, and to manage the priority calculation module and computing power in an orderly manner. The system comprises a calculation module and a calculation unit scheduling module. The priority calculation module obtains the register configuration parameters of all encoding channels from the storage container based on a pre-created calculation unit scheduling thread, and uses the calculation unit scheduling thread to dynamically calculate the priority of each encoding channel based on the obtained register configuration parameters of each encoding channel. The computing power calculation module obtains the remaining computing power of each encoding calculation unit based on the calculation unit scheduling thread. The calculation unit scheduling module uses the calculation unit scheduling thread to allocate encoding tasks to each encoding calculation unit based on the priority of all encoding channels and the remaining computing power of each encoding calculation unit. The calculation unit scheduling module interacts with the encoding calculation units on the hardware side through virtual encoding calculation units (0 and 1) at the hardware layer, and the virtual encoding calculation units (0 and 1) correspond to the encoding calculation units on the hardware side.

[0107] In this optional embodiment, the queue method is used to indicate that register configuration parameters are stored in the storage container on a first-come, first-served basis. When a new register configuration parameter is received, it is stored at the end of the queue, i.e., the end of the storage container.

[0108] In this optional embodiment, the priority is determined based on the amount of data cached and to be processed in the encoding channel, the resolution, the frame rate, and the interval between the current time and the last encoding time. Specifically, the more data cached and to be processed in the encoding channel, the higher the priority of the encoding channel; the higher the resolution of the encoding channel, the higher the priority of the encoding channel; the higher the frame rate of the encoding channel (e.g., 60fps), the higher the priority of the encoding channel; and the longer the interval between the current time and the last encoding time, the higher the priority of the encoding channel.

[0109] As can be seen, this optional embodiment improves the accuracy and orderliness of register configuration parameter management by creating a parameter calculation thread for each encoding channel and setting it to the parameter management thread for orderly management in a queue. Furthermore, it uses a computing unit scheduling thread to dynamically calculate the priority of each encoding channel in real time based on the resource status of each channel, without relying on upper-layer applications to set the priority of each encoding channel, thus improving the accuracy of priority calculation. Based on the accurately calculated priorities, encoding task allocation achieves accuracy and reliability in allocation, thereby improving the accuracy and timeliness of scheduling. Finally, multi-threaded processing based on the parameter calculation thread, parameter management thread, and computing unit scheduling thread improves the real-time performance of scheduling.

[0110] In another optional embodiment, the software uses a computing unit to schedule threads and dynamically calculates the priority of each encoding channel based on the acquired register configuration parameters of each encoding channel, including:

[0111] The software uses a computing unit to schedule threads and obtains the resource status parameters of each encoding channel based on the register configuration parameters of each encoding channel. The resource status parameters of each encoding channel include one or more of the following: data buffer status, data frame rate, and interval since the last encoding. The data buffer status of each encoding channel is used to indicate the amount of data to be processed in that encoding channel.

[0112] The software uses a computing unit to schedule threads and dynamically calculates the resource status parameters of each encoding channel to obtain the priority of each encoding channel.

[0113] As can be seen, this optional embodiment uses a computing unit scheduling thread to obtain resource status parameters from the register configuration parameters of the encoding channel and perform priority calculation, which improves the accuracy and reliability of the priority calculation of the encoding channel, thereby improving the accuracy of the allocation of encoding tasks and thus improving the scheduling accuracy of multiple encoding channels.

[0114] In yet another optional embodiment, the method may further include the following steps:

[0115] The software uses a parameter management thread to calculate the computing power of the scene parameters for each encoding channel to obtain the target computing power required for that encoding channel. The larger the value of the scene parameters of the encoding channel, the more data needs to be processed and the greater the target computing power required.

[0116] The software uses a computing unit scheduling thread to obtain the target computing power required for each encoding channel from the parameter management thread;

[0117] The software uses a computing unit scheduling thread to allocate encoding tasks to each encoding computing unit based on the priority of all encoding channels and the remaining computing power of each encoding computing unit, including:

[0118] The software compares the target computing power required for each encoding channel with the remaining computing power of all encoding computing units based on the computing unit scheduling thread, obtains the comparison results, and uses the computing unit scheduling thread to allocate encoding tasks to each encoding computing unit based on the priority of all encoding channels and the comparison results.

[0119] In this optional embodiment, optionally, the software uses a computing unit scheduling thread to allocate encoding tasks to each encoding computing unit based on the priority of all encoding channels and the comparison results, including:

[0120] When the analysis results indicate that the sum of the target computing power required by all encoding channels is less than or equal to the sum of the remaining computing power of all encoding computing units, the software uses the computing unit scheduling thread to allocate the corresponding encoding tasks to each encoding computing unit on an average basis according to the priority of all encoding channels, the sum of the target computing power required by all encoding channels, and the load of each encoding computing unit.

[0121] When the analysis results indicate that the target computing power of all encoding channels is greater than the sum of the remaining computing power of all encoding computing units, the software uses the computing unit scheduling thread to assign corresponding encoding tasks to each encoding computing unit according to the priority of each encoding channel.

[0122] As can be seen, this optional embodiment allocates corresponding encoding tasks to the encoding computing units based on the computing power required by the encoding channels, their priority, and the remaining computing power of the encoding computing units, which can improve the accuracy of encoding task allocation; and selects the corresponding encoding task allocation method to perform balanced allocation of encoding tasks according to the size between the sum of the computing power required by all encoding channels and the sum of the remaining computing power of all encoding computing units, which can improve the accuracy and reliability of encoding task allocation, improve the utilization rate of each encoding computing unit, and further improve the scheduling accuracy of multi-channel encoding.

[0123] In yet another optional embodiment, after all encoding channels in the encoding channel group have completed their encoding tasks, the method may further include the following steps:

[0124] The encoding and computing unit generates an interrupt signal and sends the generated interrupt signal to the software side to trigger the software side to respond to the interrupt signal based on the pre-created interrupt listening thread, and distribute the target interrupt signal to the target processing thread so that the target processing thread updates its own state.

[0125] The target processing thread includes one or more of the following: parameter calculation thread, parameter management thread, and computation unit scheduling thread. When the target processing thread is a parameter calculation thread, its own state is used to represent the software state of the encoding channel.

[0126] As can be seen, in this optional embodiment, after the encoding task is completed, the software updates the state of each thread based on the interrupt signal sent by the hardware so that the register configuration parameters of each encoding channel can be updated, thereby allocating subsequent encoding tasks. That is, the interaction of encoding tasks is carried out by real-time setting and interrupt callback, which replaces the traversal and polling method and improves the real-time performance of encoding task processing and scheduling.

[0127] To enable those skilled in the art to more intuitively and clearly understand the technical solution of the present invention, the following is combined with... Figure 9 The disclosed multi-threaded design principle diagram for multi-channel encoding task scheduling illustrates this technical solution: (e.g.) Figure 9 As shown, taking a 2-channel encoding setup as an example, the software will create 5 processing threads: parameter calculation thread 0, parameter calculation thread 1, parameter management thread, computing unit scheduling thread, and interrupt listening thread. Parameter calculation threads 0 and 1 are responsible for calculating the register configuration parameters for their respective encoding channels, setting these parameters in the parameter management thread, waiting for the interrupt signal sent by the encoding computing unit after completing its encoding task, and updating the register configuration parameters accordingly. The parameter management thread manages the register configuration parameters for each encoding channel using a queue. When a new register configuration parameter is received, it is placed at the end of the queue, and the target computing power for all waiting encoding channels is recalculated. The computing unit scheduling thread is responsible for calculating the priority of all encoding channels in the register configuration parameter queue, obtaining the remaining computing power of each encoding computing unit, and scheduling the data according to priority. The remaining computing power of the high and low encoding calculation units and the target computing power required by the encoding channel are used to allocate the encoding task to each encoding calculation unit. Then, the threads are put into a sleep state, waiting for the encoding calculation unit to generate an interrupt signal. The interrupt listening thread is responsible for listening in real time to see if the encoding calculation unit has generated an interrupt signal (when the encoding calculation unit finishes batch processing a set of register configuration parameters, it will immediately generate an interrupt signal). When an interrupt signal is detected, it will immediately distribute the interrupt signal to the parameter calculation thread, parameter management thread and calculation unit scheduling thread. When the parameter calculation thread, parameter management thread and calculation unit scheduling thread receive the interrupt signal, they will update the state of their respective threads to realize multi-threaded processing and improve the real-time performance and efficiency of encoding scheduling.

[0128] Example 2

[0129] Please see Figure 2 , Figure 2This is a schematic diagram of a device for scheduling multi-channel data encoding, disclosed in an embodiment of the present invention. This device can be applied to devices such as in-vehicle multimedia devices, building security monitoring central control devices, and network set-top devices that require multi-channel encoding and are equipped with a multi-core encoding system. The multi-core encoding system can be any system among Android, Linux, and iOS, and includes a hardware component comprising multiple encoding calculation units. Each encoding calculation unit is independent and has a corresponding encoding channel group. The encoding channel groups corresponding to each encoding calculation unit are different, and each encoding channel group consists of register configuration parameters for each encoding channel among multiple encoding channels. Figure 2 As shown, for any coding calculation unit, the coding calculation unit may include:

[0130] The loading module 201 is used to load the register configuration parameters of the encoding channel group corresponding to the encoding calculation unit into the register internal cache from the storage unit according to the target encoding task and a predetermined parameter loading method when the target encoding task is received from the software. The storage unit (such as DDR) is used to store the register configuration parameters of all initial encoding channels written by the software. All initial encoding channels include the encoding channels corresponding to all encoding calculation units.

[0131] The encoding module 202 is used to execute the target encoding task for each encoding channel in the encoding channel group in sequence according to the register configuration parameters of the loaded encoding channel group, until all encoding channels in the encoding channel group have completed the target encoding task.

[0132] In this embodiment of the invention, the parameter loading method is used to indicate that a preset number of register configuration parameters of all encoding channels in the encoding channel group corresponding to the encoding calculation unit are loaded into the register internal cache at one time from the storage unit. The preset number is greater than 1 and less than the number of all encoding channel groups in the encoding channel group. Alternatively, only the register configuration parameters of one encoding channel are loaded into the register internal cache at a time. After the target encoding task of the encoding channel is completed, the register configuration parameters of the next encoding channel are loaded into the register internal cache to execute the corresponding target encoding task.

[0133] It is evident that implementation Figure 2The described device for scheduling multi-channel data encoding, when receiving an encoding task sent by the software, the encoding calculation unit, i.e. the hardware, executes the corresponding encoding task for each encoding channel sequentially based on the loaded register configuration data. That is, it uses a collaborative approach of software and hardware to process encoding tasks in batch mode, making full use of the advantages of both software and hardware, making the scheduling of multi-channel encoding more reasonable and efficient, reducing the frequency of software and hardware interaction, and improving the efficiency of multi-channel encoding scheduling.

[0134] In an optional implementation, the encoding module 202 executes the target encoding task sequentially on each encoding channel in the encoding channel group according to the register configuration parameters of the loaded encoding channel group, until all encoding channels in the encoding channel group have completed the target encoding task. The specific methods include:

[0135] Based on the register configuration parameters of the loaded encoding channel group, the data source address of the target data to be encoded for each encoding channel is determined in sequence, and the target data corresponding to the encoding channel is obtained according to the data source address corresponding to each encoding channel.

[0136] The target encoding task is executed sequentially on the target data corresponding to each encoding channel in the encoding channel group until all encoding channels in the encoding channel group have completed the target encoding task.

[0137] As can be seen, this optional implementation method determines the corresponding data source address by sequentially determining the corresponding data through the register configuration parameters of each encoded channel, obtains the corresponding data, and then executes the encoding task, thereby realizing batch encoding tasks, improving encoding efficiency, and thus improving the efficiency of multi-channel encoding scheduling.

[0138] In another alternative implementation, such as Figure 3 As shown, the multi-core coding system also includes a software component, which includes:

[0139] The thread creation module 203 is used to create a corresponding parameter calculation thread for each encoding channel among all encoding channels that need to perform encoding tasks. For any encoding channel, based on the parameter calculation thread corresponding to the encoding channel, the scene parameters of the encoding channel are obtained from the application layer on the software side, and the obtained scene parameters are calculated based on the parameter calculation thread to obtain the register configuration parameters of the encoding channel, and the calculated register configuration parameters are set to the pre-created parameter management thread.

[0140] The scheduling main thread module 204 is used to manage the parameter-based thread and manage the acquired register configuration parameters of the encoding channels in a pre-determined queue manner, so that the register configuration parameters of all encoding channels are stored in a pre-determined storage container.

[0141] The priority calculation module 205 is used to obtain the register configuration parameters of all encoding channels from the storage container based on the pre-created computing unit scheduling thread, and to dynamically calculate the priority of each encoding channel based on the obtained register configuration parameters of each encoding channel using the computing unit scheduling thread.

[0142] The computing power calculation module 206 is used to obtain the remaining computing power of each encoding computing unit based on the scheduling thread of the computing unit;

[0143] The computing unit scheduling module 207 is used to use the computing unit scheduling thread to allocate encoding tasks to each encoding computing unit based on the priority of all encoding channels and the remaining computing power of each encoding computing unit. All encoding tasks include the target encoding task.

[0144] As can be seen, this optional implementation improves the accuracy and orderliness of register configuration parameter management by creating a parameter calculation thread for each encoding channel and setting it to the parameter management thread for orderly management in a queue. Furthermore, it uses a computing unit scheduling thread to dynamically calculate the priority of each encoding channel in real time based on the resource status of each channel, without relying on upper-layer applications to set the priority of each encoding channel, thus improving the accuracy of priority calculation. Based on the accurately calculated priorities, encoding task allocation achieves accuracy and reliability in allocation, thereby improving the accuracy and timeliness of scheduling. Finally, multi-threaded processing based on the parameter calculation thread, parameter management thread, and computing unit scheduling thread improves the real-time performance of scheduling.

[0145] In another optional embodiment, the priority calculation module 205 uses a computing unit to schedule threads and dynamically calculates the priority of each encoding channel based on the acquired register configuration parameters of each encoding channel. The specific method for this includes:

[0146] The computing unit schedules threads and obtains the resource status parameters of each encoding channel based on the register configuration parameters of each encoding channel. The resource status parameters of each encoding channel include one or more of the following: data buffer status, data frame rate, and interval since the last encoding. The data buffer status of each encoding channel is used to indicate the amount of data to be processed in the encoding channel.

[0147] The computing unit schedules threads to dynamically calculate the resource status parameters of each encoding channel to obtain the priority of each encoding channel.

[0148] It is evident that implementation Figure 3The described device for scheduling multi-channel data encoding uses a computing unit to schedule threads, obtains resource status parameters from the register configuration parameters of the encoding channels, and performs priority calculations. This improves the accuracy and reliability of priority calculation for encoding channels, thereby improving the accuracy of encoding task allocation and, consequently, the scheduling accuracy of multiple encoding channels.

[0149] In yet another alternative embodiment, such as Figure 3 As shown, the computing power calculation module 206 is also used to use the parameter management thread to perform computing power calculation on the scene parameters of each encoding channel to obtain the target computing power required for that encoding channel. The larger the value of the scene parameters of the encoding channel, the more data needs to be processed and the larger the target computing power required.

[0150] The computing power calculation module 206 is also used to obtain the target computing power required for each encoding channel from the parameter management thread using the computing unit scheduling thread;

[0151] The specific method by which the computing unit scheduling module 207, based on the priority of all encoding channels and the remaining computing power of each encoding computing unit, allocates encoding tasks to each encoding computing unit includes:

[0152] The computing unit scheduling thread compares the target computing power required for each encoding channel with the remaining computing power of all encoding computing units to obtain the comparison results. Based on the priority of all encoding channels and the comparison results, the computing unit scheduling thread allocates encoding tasks to each encoding computing unit.

[0153] In this optional embodiment, the computing unit scheduling module 207 uses the computing unit scheduling thread to allocate encoding tasks to each encoding computing unit based on the priority of all encoding channels and the comparison results. The specific method for this allocation includes:

[0154] When the analysis results indicate that the sum of the target computing power required by all encoding channels is less than or equal to the sum of the remaining computing power of all encoding computing units, the software uses the computing unit scheduling thread to allocate the corresponding encoding tasks to each encoding computing unit on an average basis according to the priority of all encoding channels, the sum of the target computing power required by all encoding channels, and the load of each encoding computing unit.

[0155] When the analysis results indicate that the target computing power of all encoding channels is greater than the sum of the remaining computing power of all encoding computing units, the software uses the computing unit scheduling thread to assign corresponding encoding tasks to each encoding computing unit according to the priority of each encoding channel.

[0156] It is evident that implementation Figure 3The described device for scheduling multi-channel data encoding allocates corresponding encoding tasks to encoding computing units based on the computing power required by the encoding channels, their priority, and the remaining computing power of the encoding computing units, thereby improving the accuracy of encoding task allocation. Furthermore, it selects a corresponding encoding task allocation method to achieve balanced allocation of encoding tasks based on the difference between the sum of the computing power required by all encoding channels and the sum of the remaining computing power of all encoding computing units. This not only improves the accuracy and reliability of encoding task allocation but also increases the utilization rate of each encoding computing unit, further enhancing the scheduling accuracy of multi-channel encoding.

[0157] In yet another alternative embodiment, such as Figure 3 As shown, the encoding calculation unit also includes:

[0158] The signal processing module 208 is used to generate an interrupt signal after all encoding channels in the encoding channel group have completed their encoding tasks, and send the generated interrupt signal to the software side to trigger the software side to respond to the interrupt signal based on the pre-created interrupt listening thread, and distribute the target interrupt signal to the target processing thread so that the target processing thread updates its own state.

[0159] The target processing thread includes one or more of the following: parameter calculation thread, parameter management thread, and computation unit scheduling thread. When the target processing thread is a parameter calculation thread, its own state is used to represent the software state of the encoding channel.

[0160] In this optional embodiment, after the encoding module 202 has completed the above-mentioned operation of executing the target encoding task sequentially on each encoding channel in the encoding channel group according to the loaded register configuration parameters of the encoding channel group, until all encoding channels in the encoding channel group have completed the target encoding task, the signal processing module 208 can be triggered to execute the above-mentioned operation of generating an interrupt signal after all encoding channels in the encoding channel group have completed the encoding task, and sending the generated interrupt signal to the software.

[0161] It is evident that implementation Figure 3 The described device for scheduling multi-channel data encoding updates the state of each thread on the software side based on the interrupt signal sent by the hardware side after the encoding task is completed. This updates the register configuration parameters of each encoding channel, thereby enabling the allocation of subsequent encoding tasks. In other words, it uses real-time setting and interrupt callback to interact with the encoding tasks, replacing the traversal polling method, thus improving the real-time performance of encoding task processing and scheduling.

[0162] Example 3

[0163] Please see Figure 4 , Figure 4This is a schematic diagram of another device for scheduling multi-channel data encoding disclosed in an embodiment of the present invention. This device can be applied to devices such as in-vehicle multimedia devices, building security monitoring central control devices, and network set-top devices that require multi-channel encoding and are equipped with a multi-core encoding system. The multi-core encoding system can be any system among Android, Linux, and iOS, and includes a hardware component comprising multiple encoding calculation units. Figure 4 As shown, the plurality of encoding calculation units may include:

[0164] Memory 301 storing executable program code;

[0165] Processor 302 coupled to memory 301;

[0166] Furthermore, it may also include an input interface 303 and an output interface 304 coupled to the processor 302;

[0167] The processor 302 calls the executable program code stored in the memory 301 to execute the steps performed by the encoding calculation unit in the method for scheduling multi-channel data encoding described in Embodiment 1.

[0168] Example 4

[0169] Please see Figure 5 , Figure 5 This is a schematic diagram of another device for scheduling multi-channel data encoding disclosed in an embodiment of the present invention. This device can be applied to devices such as in-vehicle multimedia devices, building security monitoring central control devices, and network set-top devices that require multi-channel encoding and are equipped with a multi-core encoding system. The multi-core encoding system can be any system among Android, Linux, and iOS, and includes a hardware component comprising multiple encoding calculation units. Figure 5 As shown, the plurality of encoding calculation units may include:

[0170] Memory 401 storing executable program code;

[0171] Processor 402 coupled to memory 401;

[0172] Furthermore, it may also include an input interface 403 and an output interface 404 coupled to the processor 402;

[0173] The processor 402 calls the executable program code stored in the memory 401 to execute the steps performed by the software in the method for scheduling multi-channel data encoding described in Embodiment 1.

[0174] Example 5

[0175] This invention discloses a computer read storage medium that stores a computer program for electronic data interchange, wherein the computer program causes a computer to execute the steps performed by the encoding calculation unit in the method for scheduling multi-channel data encoding described in Embodiment 1.

[0176] Example 6

[0177] This invention discloses a computer read storage medium that stores a computer program for electronic data interchange, wherein the computer program causes a computer to execute the steps performed by the software in the method for scheduling multi-channel data encoding described in Embodiment 1.

[0178] Example 7

[0179] This invention discloses a computer program product, which includes a non-transitory computer-readable storage medium storing a computer program, and the computer program is operable to cause a computer to perform the steps executed by the encoding calculation unit in the method for scheduling multi-channel data encoding described in Embodiment 1.

[0180] Example 8

[0181] This invention discloses a computer program product, which includes a non-transitory computer-readable storage medium storing a computer program, and the computer program is operable to cause a computer to perform the steps executed by the software in the method for scheduling multi-channel data encoding described in Embodiment 1.

[0182] Example 9

[0183] This invention discloses a multi-core encoding system, wherein the multi-core encoding system is used to execute the steps performed by the hardware and software in the method for scheduling multi-channel data encoding described in Embodiment 1.

[0184] The device embodiments described above are merely illustrative. The modules described as separate components may or may not be physically separate. The components shown as modules may or may not be physical modules; that is, they may be located in one place or distributed across multiple network modules. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. Those skilled in the art can understand and implement this without any creative effort.

[0185] Through the detailed description of the above embodiments, those skilled in the art can clearly understand that each implementation method can be implemented by means of software plus necessary general-purpose hardware platforms, and of course, it can also be implemented by hardware. Based on this understanding, the above technical solutions, in essence or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, including read-only memory (ROM), random access memory (RAM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), one-time programmable read-only memory (OTPROM), electrically erasable programmable read-only memory (EEPROM), compact disc read-only memory (CD-ROM) or other optical disc storage, disk storage, magnetic tape storage, or any other computer-readable medium that can be used to carry or store data.

[0186] Finally, it should be noted that the method and apparatus for scheduling multi-channel data encoding and the multi-core encoding system disclosed in the embodiments of the present invention are merely preferred embodiments of the present invention and are only used to illustrate the technical solutions of the present invention, not to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for scheduling multi-channel data encoding, characterized in that, The method is applied in a multi-core encoding system, which includes a hardware terminal, which includes multiple encoding calculation units. Each encoding calculation unit is independent of each other, and each encoding calculation unit has a corresponding encoding channel group. The encoding channel groups corresponding to each encoding calculation unit are different from each other, and each encoding channel group is composed of register configuration parameters of each encoding channel among multiple encoding channels. For any of the aforementioned encoding calculation units, the method includes: When a target encoding task is received from the software, the encoding calculation unit loads the register configuration parameters of the encoding channel group corresponding to the encoding calculation unit into the register internal cache from the storage unit according to the target encoding task and a predetermined parameter loading method. The storage unit is used to store the register configuration parameters of all initial encoding channels written by the software, and all initial encoding channels include all encoding channels corresponding to the encoding calculation unit. The encoding calculation unit executes the target encoding task sequentially on each encoding channel in the encoding channel group according to the register configuration parameters loaded into the encoding channel group, until all encoding channels in the encoding channel group have completed the target encoding task; The multi-core encoding system also includes the software side, and the method further includes: The software creates a corresponding parameter calculation thread for each of the encoding channels that need to perform encoding tasks. For any of the encoding channels, the software obtains the scene parameters of the encoding channel from the application layer of the software based on the parameter calculation thread corresponding to the encoding channel, calculates the obtained scene parameters based on the parameter calculation thread to obtain the register configuration parameters of the encoding channel, and sets the calculated register configuration parameters to a pre-created parameter management thread. The software manages the register configuration parameters of all the encoding channels obtained based on the parameter management thread in a pre-determined queue manner, so that the register configuration parameters of all the encoding channels are stored in a pre-determined storage container. The software obtains the register configuration parameters of all the encoding channels from the storage container based on a pre-created computing unit scheduling thread, and uses the computing unit scheduling thread to dynamically calculate the priority of each encoding channel based on the obtained register configuration parameters of each encoding channel. The software obtains the remaining computing power of each encoding computing unit based on the computing unit scheduling thread, and uses the computing unit scheduling thread to allocate encoding tasks to each encoding computing unit based on the priority of all encoding channels and the remaining computing power of each encoding computing unit. All encoding tasks include the target encoding task.

2. The method for scheduling multi-channel data encoding according to claim 1, characterized in that, The encoding calculation unit executes the target encoding task sequentially on each encoding channel in the encoding channel group according to the register configuration parameters loaded into the encoding channel group, until all encoding channels in the encoding channel group have completed the target encoding task, including: The encoding calculation unit determines the data source address of the target data to be encoded for each encoding channel in sequence according to the register configuration parameters loaded into the encoding channel group, and obtains the target data corresponding to each encoding channel according to the data source address corresponding to each encoding channel. The encoding calculation unit sequentially executes the target encoding task on the target data corresponding to each encoding channel in the encoding channel group until all encoding channels in the encoding channel group have completed the target encoding task.

3. The method for scheduling multi-channel data encoding according to claim 2, characterized in that, The parameter loading method is used to indicate that a preset number of register configuration parameters of all the encoding channels in the encoding channel group corresponding to the encoding calculation unit are loaded into the register internal cache at one time from the storage unit. The preset number is greater than 1 and less than the number of all encoding channel groups in the encoding channel group. Alternatively, only the register configuration parameters of one encoding channel are loaded into the register internal cache at a time. After the target encoding task of the encoding channel is completed, the register configuration parameters of the next encoding channel are loaded into the register internal cache to execute the corresponding target encoding task.

4. The method for scheduling multi-channel data encoding according to any one of claims 1-3, characterized in that, The software uses the computing unit to schedule threads and dynamically calculates the priority of each encoding channel based on the acquired register configuration parameters of each encoding channel, including: The software uses the computing unit to schedule threads and obtains the resource status parameters of each encoding channel based on the obtained register configuration parameters of each encoding channel. The resource status parameters of each encoding channel include one or more of the following: data cache status, data frame rate, and interval time since the last encoding. The data cache status of each encoding channel is used to indicate the amount of data to be processed in the encoding channel. The software uses the computing unit to schedule threads and dynamically calculates the resource status parameters of each encoding channel to obtain the priority of each encoding channel.

5. The method for scheduling multi-channel data encoding according to any one of claims 1-3, characterized in that, The method further includes: The software uses the parameter management thread to calculate the computing power of the scene parameters for each encoding channel to obtain the target computing power required for that encoding channel. The larger the value of the scene parameters of the encoding channel, the more data needs to be processed and the greater the target computing power required. The software uses the computing unit scheduling thread to obtain the target computing power required for each encoding channel from the parameter management thread; The software uses the computing unit scheduling thread to allocate encoding tasks to each encoding computing unit based on the priority of all encoding channels and the remaining computing power of each encoding computing unit, including: The software compares the target computing power required for each encoding channel with the remaining computing power of all encoding computing units based on the computing unit scheduling thread, obtains the comparison result, and uses the computing unit scheduling thread to allocate encoding tasks to each encoding computing unit based on the priority of all encoding channels and the comparison result.

6. The method for scheduling multi-channel data encoding according to claim 5, characterized in that, The software uses the computing unit scheduling thread to allocate encoding tasks to each encoding computing unit based on the priority of all encoding channels and the comparison results, including: When the comparison result indicates that the sum of the target computing power required by all the encoding channels is less than or equal to the sum of the remaining computing power of all the encoding computing units, the software uses the computing unit scheduling thread to allocate the corresponding encoding task to each encoding computing unit on an average basis according to the priority of all the encoding channels, the sum of the target computing power required by all the encoding channels, and the load of each encoding computing unit. When the comparison result indicates that the target computing power of all the encoding channels is greater than the sum of the remaining computing power of all the encoding computing units, the software uses the computing unit scheduling thread to allocate a corresponding encoding task to each encoding computing unit according to the priority of each encoding channel.

7. The method for scheduling multi-channel data encoding according to any one of claims 1-3 and 6, characterized in that, After all the encoding channels in the encoding channel group have completed the encoding task, the method further includes: The encoding calculation unit generates an interrupt signal and sends the generated interrupt signal to the software to trigger the software to respond to the interrupt signal based on a pre-created interrupt listening thread, and distribute the interrupt signal to the target processing thread so that the target processing thread updates its own state. The target processing thread includes one or more of the parameter calculation thread, the parameter management thread, and the computing unit scheduling thread.

8. An apparatus for scheduling multi-channel data encoding, characterized in that, The apparatus is used to perform the method for scheduling multi-channel data encoding as described in any one of claims 1-7, and the apparatus is applied in a multi-core encoding system. The multi-core encoding system includes a hardware terminal, which includes multiple encoding calculation units. Each encoding calculation unit is independent of each other, and each encoding calculation unit has a corresponding encoding channel group. The encoding channel groups corresponding to each encoding calculation unit are different from each other, and each encoding channel group is composed of register configuration parameters of each encoding channel in multiple encoding channels. For any one of the encoding calculation units, the encoding calculation unit includes: The loading module is used to load the register configuration parameters of the encoding channel group corresponding to the encoding calculation unit into the register internal cache from the storage unit according to the target encoding task and a predetermined parameter loading method when the target encoding task is received from the software. The storage unit is used to store the register configuration parameters of all initial encoding channels written by the software. All initial encoding channels include the encoding channels corresponding to all encoding calculation units. The encoding module is used to execute the target encoding task sequentially on each encoding channel in the encoding channel group according to the register configuration parameters loaded into the encoding channel group, until all encoding channels in the encoding channel group have completed the target encoding task.

9. A multi-core coding system, characterized in that, The multi-core encoding system is used to perform the method for scheduling multi-channel data encoding as described in any one of claims 1-7.

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