Film layer structure, preparation method of film layer structure and display substrate

Abstract

The invention provides a film layer structure, a preparation method of the film layer structure and a display substrate, and relates to the technical field of semiconductors, and the film layer structure comprises a PLN layer; the first ITO layer is located on the PLN layer, the first ITO layer comprises N layers of first ITO sub-layers, the film materials of the N layers of first ITO sub-layers are different from one another, and N is larger than 1; the metal layer is located on the first ITO layer; the second ITO layer is located on the metal layer, the second ITO layer comprises M second ITO sub-layers, the M second ITO sub-layers are different in film quality, and M is larger than 1. Based on the scheme, the probability that impurities inside or outside the film layer structure are in contact with the metal layer through pinholes of the ITO layer can be further reduced, so that the protection capability of the ITO layer on the metal layer is further improved, and dark spots are prevented from existing in a display picture applying the film layer structure.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and more specifically, to a film layer structure, a method for preparing the film layer structure, and a display substrate. Background Art

[0002] At present, in display substrates using organic light-emitting diodes (OLEDs) as light-emitting devices, OLEDs mostly adopt a top emission structure, in which the film layer structure of the OLED anode is a composite structure in which an indium tin oxide (ITO) layer, a silver (Ag) layer, and an ITO layer are stacked in sequence.

[0003] However, in the preparation process of the above-mentioned film structure, ITO crystallization treatment is required, which usually causes some holes, or pin holes, in the ITO layer of the film structure. Due to the existence of the ITO layer holes, impurities outside the film structure of the OLED anode enter the film structure and react with the Ag layer, causing abnormalities in the anode, and ultimately resulting in dark spots on the display screen. Summary of the invention

[0004] The present application provides a film layer structure, a method for preparing the film layer structure, and a display substrate, which can further reduce the probability of impurities inside or outside the film layer structure contacting the metal layer through the pinholes of the ITO layer, so as to further increase the protection ability of the ITO layer to the metal layer, thereby avoiding the presence of dark spots on the display screen using the film layer structure.

[0005] In a first aspect, a film layer structure is provided, which includes: a planarization layer (PLN) layer; a first ITO layer, the first ITO layer is located on the PLN layer, the first ITO layer includes N first ITO sub-layers, the film qualities of the N first ITO sub-layers are different from each other, and N is greater than 1; a metal layer, the metal layer is located on the first ITO layer; a second ITO layer, the second ITO layer is located on the metal layer, the second ITO layer includes M second ITO sub-layers, the film qualities of the M second ITO sub-layers are different from each other, and M is greater than 1.

[0006] In combination with the first aspect, in certain implementations of the first aspect, the first ITO layer also includes: a first barrier layer, the first barrier layer is located between two first ITO sub-layers, or is located above N first ITO sub-layers, or is located below N first ITO sub-layers; and / or, the second ITO layer also includes: a second barrier layer, the second barrier layer is located between two second ITO sub-layers, or is located above M second ITO sub-layers, or is located below M second ITO sub-layers.

[0007] In combination with the first aspect, in certain implementations of the first aspect, the material of the metal layer is Ag, the material of the first barrier layer and / or the second barrier layer is Ag, molybdenum (Mo) or aluminum (Al), and the thickness of the first barrier layer and the second barrier layer is less than or equal to 10 nm.

[0008] In combination with the first aspect, in certain implementations of the first aspect, the above N is equal to 2, the above M is equal to 2, and the thickness of the first ITO sub-layer and the second ITO sub-layer is within [1nm, 4.5nm].

[0009] In a second aspect, a method for preparing a film layer structure is provided, the method comprising: depositing a PLN layer; depositing a first ITO layer on the PLN, the first ITO layer comprising N first ITO sublayers, the film qualities of the N first ITO sublayers being different from each other, and N being greater than 1; depositing a metal layer on the first ITO layer; depositing a second ITO layer on the metal layer, the second ITO layer comprising M second ITO sublayers, the film qualities of the M second ITO sublayers being different from each other, and M being greater than 1.

[0010] In combination with the second aspect, in certain implementations of the second aspect, at least N first ITO sublayers are deposited on the PLN layer, and the process parameters corresponding to the N first ITO sublayers are different from each other; at least M second ITO sublayers are deposited on the metal layer, and the process parameters corresponding to the M second ITO sublayers are different from each other.

[0011] In combination with the second aspect, in certain implementations of the second aspect, a first barrier layer is deposited on the PLN layer, or a first barrier layer is deposited on the first ITO sublayer of the Ni layer, i is greater than or equal to 0 and less than N; and / or a second barrier layer is deposited on the metal layer, or a second barrier layer is deposited on the second ITO sublayer of the Mj layer, j is greater than or equal to 0 and less than M.

[0012] In combination with the second aspect, in some implementations of the second aspect, the material of the metal layer is Ag, the material of the first barrier layer or the second barrier layer is Ag, Mo or Al, and the thickness of the first barrier layer and the second barrier layer is less than or equal to 10 nm.

[0013] In combination with the second aspect, in certain implementations of the second aspect, the above N is equal to 2, the above M is equal to 2, and the thickness of the first ITO sub-layer and the second ITO sub-layer is within [1nm, 4.5nm].

[0014] In combination with the second aspect, in certain implementations of the second aspect, when the operation of depositing a second ITO layer on the metal layer is completed, a first film layer structure is obtained, and a photoresist is coated on the first film layer structure; the first film layer structure is etched; the photoresist remaining on the first film layer structure is removed; and the first film layer structure is subjected to ITO crystallization treatment to obtain a second film layer structure.

[0015] In a third aspect, a display substrate is provided, comprising a light-emitting device, wherein the light-emitting device comprises a film layer structure in any possible implementation of the film layer structure design of the first aspect.

[0016] In combination with the third aspect, in some implementations of the third aspect, the light-emitting device is an OLED.

[0017] In a fourth aspect, a device for preparing a film layer structure is provided, comprising a processor and a memory, wherein the processor and the memory are connected, wherein the memory is used to store program code, and the processor is used to call the program code to execute a method in any possible implementation mode of the method design of the second aspect mentioned above.

[0018] In a fifth aspect, a computer-readable storage medium is provided, storing a computer program, wherein the computer program is executed by a processor to implement a method in any possible implementation manner of the method design of the second aspect above.

[0019] In a sixth aspect, a computer program product is provided, comprising instructions, which, when executed by a processor, enable a computer to execute a method in any possible implementation of the method design of the second aspect above. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 is a schematic diagram of a film structure 100 of an OLED anode at present;

[0021] Figure 2 This is a schematic diagram of the pinhole position distribution generated when two ITO layers of the same film are crystallized;

[0022] Figure 3 is a structural schematic diagram of a membrane layer structure 300 proposed in an embodiment of the present application;

[0023] Figure 4 is a structural schematic diagram of another membrane layer structure 300 proposed in an embodiment of the present application;

[0024] Figure 5 is a structural schematic diagram of another membrane layer structure 300 proposed in an embodiment of the present application;

[0025] Figure 6 is a structural schematic diagram of a membrane layer structure 400 proposed in an embodiment of the present application;

[0026] Figure 7 is a schematic flow chart of a method 700 for preparing a membrane structure proposed in an embodiment of the present application;

[0027] Figure 8 It is a schematic flow chart of a method 800 for preparing a membrane structure proposed in an embodiment of the present application. DETAILED DESCRIPTION

[0028] The technical solution in this application will be described below in conjunction with the accompanying drawings.

[0029] The embodiments of the present application will present various aspects, embodiments or features around a system including multiple devices, components, modules, etc. It should be understood and appreciated that each system may include additional devices, components, modules, etc., and / or may not include all devices, components, modules, etc. discussed in conjunction with the figures. In addition, combinations of these schemes may also be used.

[0030] In addition, in the embodiments of the present application, words such as "exemplary" and "for example" are used to indicate examples, illustrations or explanations. Any embodiment or design described as "exemplary" in the embodiments of the present application should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of the word "exemplary" is intended to present concepts in a concrete way.

[0031] The business scenarios described in the embodiments of the present application are intended to more clearly illustrate the technical solutions of the embodiments of the present application, and do not constitute a limitation on the technical solutions provided in the embodiments of the present application. Ordinary technicians in this field can know that with the evolution of technology and the emergence of new business scenarios, the technical solutions provided in the embodiments of the present application are also applicable to similar technical problems.

[0032] References to "one embodiment" or "some embodiments" etc. described in this specification mean that a particular feature, structure or characteristic described in conjunction with the embodiment is included in one or more embodiments of the present application. Thus, the phrases "in one embodiment", "in some embodiments", "in some other embodiments", "in some other embodiments", etc. that appear at different places in this specification do not necessarily refer to the same embodiment, but mean "one or more but not all embodiments", unless otherwise specifically emphasized in other ways. The terms "including", "comprising", "having" and their variations all mean "including but not limited to", unless otherwise specifically emphasized in other ways.

[0033] In the embodiments of the present application, "at least one" refers to one or more, and "plurality" refers to two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can be represented by: including the existence of A alone, the existence of A and B at the same time, and the existence of B alone, where A and B can be singular or plural. The character " / " generally indicates that the previous and subsequent associated objects are in an "or" relationship. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single or plural items. For example, at least one of a, b, or c can be represented by: a, b, c, ab, ac, bc, or abc, where a, b, c can be single or multiple.

[0034] In the description of the embodiments of the present application, the directions or positional relationships indicated by terms such as "up", "down", "left", "right", "inside", "outside", "vertical" and "horizontal" are defined relative to the directions or positions of the components schematically placed in the drawings. It should be understood that these directional terms are relative concepts. They are used for relative description and clarification, rather than indicating or implying that the device or component referred to must have a specific direction, or be constructed and operated in a specific direction. They may change accordingly according to changes in the directions of the components placed in the drawings, and therefore cannot be understood as limitations on the present application.

[0035] In the embodiments of the present application, the same reference numerals are used to represent the same components or parts. For the same parts in the embodiments of the present application, only one of the parts or parts may be marked with a reference numeral in the figure. It should be understood that the reference numerals are also applicable to other identical parts or parts. In addition, the various parts in the drawings are not drawn to scale, and the sizes and dimensions of the parts shown in the drawings are only exemplary and should not be understood as limiting the present application.

[0036] ITO film is a transparent conductive film composed of indium tin oxide, which has excellent conductivity, light transmittance and chemical stability. The main components include indium oxide (In2O3) and tin oxide (SnO2). By adjusting the ratio of oxides, ITO film can have good conductivity and light transmittance. Therefore, ITO film can be used in light-emitting devices of displays, and can also be used as a protective layer for metal layers (such as Ag layers) in light-emitting devices (such as OLEDs). Since ITO itself has good conductivity, it not only helps to reduce the oxidation or corrosion of the metal layer during use, but also keeps the conductivity of the entire anode film layer from being significantly affected.

[0037] Figure 1 It is a schematic diagram of a film structure 100 of an OLED anode at present.

[0038] refer to Figure 1 As shown, the film structure 100 includes: a PLN layer 110, a first ITO layer 120, an Ag layer 130 and a second ITO layer 140; wherein, the first ITO layer 120 is located on the PLN layer 110, the Ag layer 130 is located on the first ITO layer 120, and the second ITO layer 140 is located on the Ag layer 130.

[0039] Among them, because the first ITO layer 120 is located in the lower layer of the film layer structure 100, or below the Ag layer, the first ITO layer 120 can also be called the bottom ITO (bottom ITO, B-ITO); similarly, because the second ITO layer 140 is located in the upper layer of the film layer structure 100, or above the Ag layer, the second ITO layer 140 can also be called the top ITO (top ITO, T-ITO).

[0040] However, in the above-mentioned film structure 100, although the first ITO layer 120 and the second ITO layer 140 can protect the Ag layer 130 from oxidation or corrosion to a certain extent, during the preparation process of the film structure 100, the film structure 100 needs to be subjected to an ITO crystallization treatment, which usually causes some holes, or pinholes, to appear in the ITO layer. This is because during the crystallization process of the first ITO layer 120 and the second ITO layer 140, certain stress will be generated inside the film layer, resulting in the appearance of pinholes in the first ITO layer 120 and the second ITO layer 140. Of course, factors such as defects in the composition of the ITO material, the cleanliness of the film layer during the preparation process, and the preparation environment may all lead to the appearance of pinholes in the first ITO layer 120 and the second ITO layer 140, and some pinholes may penetrate the film layer.

[0041] Therefore, after the film structure 100 is put into use, impurities such as oxygen in the upper layer of the external air of the film structure 100 can pass through some pinholes, penetrate the second ITO layer 140, and react with the Ag layer to generate silver oxide (Ag x O); in addition, impurities such as water in the film layers such as the PLN layer 110 of the film structure 100 may pass through some pinholes, through the first ITO layer 120, and react with the Ag layer, thereby causing anomalies in the Ag layer.

[0042] Both of the above situations will cause the anode of the light-emitting device including the above film layer structure 100 to be abnormal, and eventually cause dark spots to appear on the screen of the display.

[0043] In view of this, an embodiment of the present application proposes a novel film layer structure, which can further protect the metal layer in the film layer structure from being oxidized or corroded by external impurities, thereby avoiding dark spots on the display screen as much as possible.

[0044] Figure 2 This is a schematic diagram of the distribution of pinhole positions generated when two ITO layers of the same film quality are crystallized.

[0045] refer to Figure 2 As shown, when the preparation parameters of the ITO crystallization process are fixed, after the two ITO layers of the same film quality are crystallized, the positions of the pinholes formed on the two ITO layers are the same or similar. Based on this characteristic, the following film layer structure is proposed in the embodiment of the present application.

[0046] Figure 3 It is a structural schematic diagram of a membrane layer structure 300 proposed in an embodiment of the present application.

[0047] refer to Figure 3 As shown, the film structure 300 includes:

[0048] PLN layer 310;

[0049] A first ITO layer 320, the first ITO layer 320 is located on the PLN layer 310, the first ITO layer includes N first ITO sub-layers 321, and the film properties of the N first ITO sub-layers 321 are different from each other, and N is greater than 1;

[0050] A metal layer 330 , wherein the metal layer 330 is located on the first ITO layer 320 ;

[0051] The second ITO layer 340 is located on the metal layer 330 . The second ITO layer 340 includes M second ITO sub-layers 341 . The film properties of the M second ITO sub-layers 341 are different from each other, and M is greater than 1.

[0052] In some possible embodiments, in a display substrate, the above-mentioned PLN layer 310 is a thin film layer for flattening the surface of the display substrate. The PLN layer 310 can fill the uneven parts of the surface of the display substrate, so that subsequent layers (such as the first ITO layer 320, the metal layer 330 and the second ITO layer 340, etc.) can be deposited on a flat basis, thereby improving the performance of the semiconductor device.

[0053] In some possible embodiments, the PLN layer 310 may include spin-on glass (SOG), organic planarization materials (such as polymers and resins), etc. These materials have good fluidity and filling ability, and can fill in tiny depressions and undulations on the surface of the wafer, thereby achieving planarization.

[0054] In some possible embodiments, the metal layer 330 may be made of a metal with strong conductivity, such as Ag.

[0055] In some possible embodiments, the film quality of the above-mentioned ITO layer refers to the physical properties, chemical properties and electrical properties of the ITO layer, including: material density, purity, density, thickness, surface roughness, conductivity, dielectric constant, etc. In the embodiments of the present application, the density of the material is the main film quality factor affecting the pinhole distribution of the ITO layer.

[0056] In some possible embodiments, reference Figure 3 As shown, the above N can be equal to 2, and the above M can be equal to 2.

[0057] It should be understood that, based on the above description, after the crystallization process is performed on two ITO layers of the same film quality, the positions of the pinholes formed on the two ITO layers are the same or similar. However, the first ITO layer 320 in the film layer structure 300 includes N first ITO sub-layers 341, and the film quality of the N first ITO sub-layers 321 is different from each other, so the positions of the pinholes distributed on the N first ITO sub-layers 321 should not be completely the same. Figure 3 Taking the structure of the film structure 300 as an example, the first ITO layer 320 includes two first ITO sub-layers 321. Since the two first ITO sub-layers 321 have different film qualities, the pinhole positions distributed on the two first ITO sub-layers are usually staggered in the projection position in the reference direction (for example, the direction perpendicular to the film structure), so it can effectively block the impurities under or outside the film structure 300 from contacting the metal layer 330. The protection principle of the second ITO layer 340 on the metal layer is the same, and it will not be repeated here.

[0058] In some possible embodiments, the thickness of the first ITO sublayer 321 and the second ITO sublayer 341 is within [1nm, 4.5nm]. For example, the thickness of the first ITO sublayer 321 and the second ITO sublayer 341 can be prepared to be 3.5nm. It should be understood that the above thickness range can also be adaptively adjusted for different scenarios in which the film structure 300 is applied.

[0059] In some possible embodiments, the thicknesses of the N-layer first ITO sub-layers 321 may be the same or different; the thicknesses of the M-layer second ITO sub-layers 341 may be the same or different.

[0060] It should be understood that, taking the N-layer first ITO sub-layer 321 as an example, since the materials of the N-layer first ITO sub-layer are the same, no additional film layers of other materials will be added during the preparation of the above-mentioned film structure 300. Figure 1Based on the basic preparation process (including masking, etching, etc.) of the film layer structure 100 shown, the preparation of the film layer structure 300 proposed in the embodiment of the present application can be achieved by adjusting the process parameters for preparing each first ITO sublayer, thereby ensuring that the complexity of the preparation process is not significantly increased as much as possible.

[0061] Based on the above technical solution, at least two ITO sub-layers with different film qualities are stacked to form an ITO layer in a film structure. For one ITO layer, since the film qualities of the multiple ITO sub-layers are different, after the film structure is subjected to ITO crystallization, the positions of the pinholes distributed on the multiple ITO sub-layers are usually different, thereby greatly reducing the probability that foreign substances in the film structure contact the metal layer through the pinholes of the ITO layer, thereby increasing the protection ability of the ITO layer to the metal layer, and further protecting the metal layer in the film structure from being oxidized or corroded by impurities inside or outside the film structure, thereby avoiding dark spots on the display screen as much as possible. Moreover, the complexity of the preparation process of the film structure will not be significantly increased.

[0062] It should be understood that the first ITO layer 320 and the second ITO layer 340 of the film structure 300 include two ITO sub-layers respectively. Considering that after the two ITO layers of different film qualities are crystallized, there may still be a small number of pinholes in the two ITO layers with the same or similar distribution positions on the two ITO layers, so there is still a certain probability that impurities can pass through the ITO layers.

[0063] In view of this, in order to further enhance the protection capability of the first ITO layer 320 and the second ITO layer 340 in the film layer structure 300 to the metal layer 330 , the embodiment of the present application proposes another film layer structure as shown in the following figure.

[0064] Figure 4 It is a structural schematic diagram of another membrane layer structure 300 proposed in an embodiment of the present application.

[0065] Compared to Figure 3 The film structure 300 shown, Figure 4 The first ITO layer 320 in the film structure 300 shown includes three first ITO sub-layers 321, and the second ITO layer 340 includes three second ITO sub-layers 341, that is, the above-mentioned N=M=3. After the film structure 300 is subjected to ITO crystallization, the probability of the existence of pinholes with the same or similar distribution positions on the three first ITO sub-layers 321 will be further reduced, and the probability of the existence of pinholes with the same or similar distribution positions on the three second ITO sub-layers 341 will be further reduced, thereby further enhancing the protection capability of the first ITO layer 320 and the second ITO layer 340 in the film structure 300 to the metal layer 330.

[0066] In some possible embodiments, the above M and N may be equal or unequal. According to different application scenarios of the film structure 300, the number of sub-layers included in the first ITO layer 320 and the second ITO layer 340 may be adaptively adjusted.

[0067] Based on the above technical solution, the probability of impurities inside or outside the film structure contacting the metal layer through the pinholes of the ITO layer can be further reduced, so as to further increase the protection capability of the ITO layer to the metal layer.

[0068] In addition, in order to further enhance the protective capability of the first ITO layer 320 and the second ITO layer 340 in the film layer structure 300 for the metal layer 330, the embodiment of the present application also makes the following improvements to the film layer composition of the first ITO layer 321 and / or the second ITO layer 341 in the film layer structure 300.

[0069] Figure 5 It is a structural schematic diagram of another membrane layer structure 300 proposed in an embodiment of the present application.

[0070] In the film structure 300, the first ITO layer 320 also includes: a first barrier layer 322, the first barrier layer 322 is located between two first ITO sub-layers 321, or is located above the N-layer first ITO sub-layer 321, or is located below the N-layer first ITO sub-layer 321; and / or, the second ITO layer 340 also includes: a second barrier layer 342, the second barrier layer 342 is located between two second ITO sub-layers 341, or is located above the M-layer second ITO sub-layer 341, or is located below the M-layer second ITO sub-layer 341.

[0071] It should be noted that, taking the first barrier layer 322 as an example, the embodiment of the present application describes the first barrier layer 322 as a part of the first ITO layer 320. However, the embodiment of the present application does not limit the relationship between the first barrier layer 322 and the first ITO layer 320. The first barrier layer 322 may not be a part of the first ITO layer 320, but an independent film layer in the film layer structure 300 (the overall structure of the film layer structure 300 will not be changed). These are what those skilled in the art can think of on the basis of obtaining the technical solutions mentioned in the embodiment of the present application. Therefore, the structural form of the first barrier layer 322 as an independent film layer in the film layer structure 300 also falls within the protection scope of the embodiment of the present disclosure. The second barrier layer 342 is the same.

[0072] For ease of understanding, Figure 5 Taking N=M=2 as an example, the film layer structure 300 is shown. Figure 5As shown in (a), the first barrier layer 322 included in the first ITO layer 320 is located between two first ITO sub-layers 321, and the second barrier layer 342 included in the second ITO layer 320 is located between two second ITO sub-layers 341;

[0073] refer to Figure 5 As shown in (b), the first barrier layer 322 included in the first ITO layer 320 is located above the two first ITO sub-layers 321, and the second barrier layer 342 included in the second ITO layer 320 is located below the two second ITO sub-layers 341;

[0074] refer to Figure 5 As shown in (c), the first barrier layer 322 included in the first ITO layer 320 is located on the two first ITO sub-layers 321, and the second barrier layer 342 included in the second ITO layer 320 is located on the two second ITO sub-layers 341;

[0075] refer to Figure 5 As shown in (d), the first barrier layer 322 included in the first ITO layer 320 is located below the two first ITO sub-layers 321, and the second barrier layer 342 included in the second ITO layer 320 is located below the two second ITO sub-layers 341;

[0076] refer to Figure 5 As shown in (e), the first ITO layer 320 includes a first barrier layer 322, and the second ITO layer 320 does not include a second barrier layer 342; Figure 5 As shown in (f) of FIG. 1 , the first ITO layer 320 does not include the first barrier layer 322, and the second ITO layer 320 includes the second barrier layer 342. As for the distribution position of the first barrier layer 322 or the second barrier layer 342, it can be Figure 5 The first barrier layer 322 or the second barrier layer 342 shown in (a) to (d) can be distributed at any position, which will not be listed here.

[0077] In some possible embodiments, the material of the first barrier layer 322 and / or the second barrier layer 342 may be a material that can be used for etching the ITO material and the metal layer material. For example, when the material of the metal layer 330 is Ag, the material of the first barrier layer 322 and / or the second barrier layer 342 may be Ag, molybdenum (Mo) or aluminum (Al). Based on this, when the film layer structure 300 is etched, the film layer structure 300 may be etched by the same chemical solution, which can reduce the complexity of the preparation process of the film layer structure 300.

[0078] In some possible embodiments, the thickness of the first barrier layer 322 and the second barrier layer 342 may be the same or different. However, the thickness of the first barrier layer 322 and the second barrier layer 342 must be less than or equal to 10 nm (i.e., a thickness threshold). It should be understood that the thickness threshold may be adaptively adjusted for different application scenarios of the film structure 300.

[0079] Based on the above technical solution, the probability of impurities inside or outside the film structure contacting the metal layer through the pinholes of the ITO layer can be further reduced, so as to further increase the protection ability of the ITO layer to the metal layer without significantly increasing the complexity of the preparation process of the film structure.

[0080] Figure 6 It is a structural schematic diagram of a membrane layer structure 400 proposed in an embodiment of the present application.

[0081] refer to Figure 6 As shown, the film structure 400 is compared with Figure 1 The film structure 100 shown in the figure has a third barrier layer 121 and / or a fourth barrier layer 141. The third barrier layer 121 is located on the PLN layer 110, or between the first ITO layer 120 and the metal layer 130 (for example, Figure 1 the fourth barrier layer 141 is located on the metal layer 130, or, is located between the second ITO layer 140 and the metal layer 130.

[0082] Based on the above technical solution, due to the barrier of the third barrier layer 121 and / or the fourth barrier layer 141, the probability of impurities inside or outside the film structure contacting the metal layer 130 through the pinholes of the ITO layer (120, 140) can be effectively reduced.

[0083] Correspondingly, the embodiments of the present application further provide a display substrate, which includes a light-emitting device, and the light-emitting device includes any one of the film layer structures 300 or the film layer structure 400 provided in the embodiments of the present application.

[0084] In some possible embodiments, the light-emitting device may be an OLED.

[0085] The embodiments of the present application also provide a method for preparing a film layer structure, for example, for preparing any film layer structure 300 provided in the embodiments of the present application.

[0086] Figure 7 It is a schematic flow chart of a method 700 for preparing a membrane structure proposed in an embodiment of the present application.

[0087] S710: depositing a PLN layer.

[0088] S720: depositing a first ITO layer on the PLN, the first ITO layer including N first ITO sub-layers, the film qualities of the N first ITO sub-layers are different from each other, and N is greater than 1.

[0089] S730: depositing a metal layer on the first ITO layer.

[0090] S740: depositing a second ITO layer on the metal layer, the second ITO layer including M second ITO sub-layers, the film properties of the M second ITO sub-layers are different from each other, and M is greater than 1.

[0091] It should be noted that for the relevant extended description of the PLN layer, the first ITO layer, the first ITO sub-layer, the metal layer, the second ITO layer and the second ITO sub-layer, please refer to the aforementioned relevant embodiments of the film layer structure 300, which will not be repeated here.

[0092] It should be understood that the above-mentioned film deposition operation can also be referred to as a coating operation.

[0093] In some possible embodiments, the above-mentioned process of depositing each material layer may include at least one of the following: physical vapor deposition (PVD), chemical vapor deposition (CVD), electroplating, solution deposition and spraying.

[0094] In some possible embodiments, the first ITO layer may be deposited in the following manner: N first ITO sub-layers are deposited on the PLN layer, and the process parameters corresponding to the N first ITO sub-layers are different from each other.

[0095] In some possible embodiments, the N first ITO sub-layers may be deposited in different chambers respectively, and the process parameters of each chamber are different, so that the process parameters corresponding to the N first ITO sub-layers finally obtained are different.

[0096] In some possible embodiments, the second ITO layer may be obtained by deposition in the following manner: M second ITO sub-layers are deposited on the metal layer, and the process parameters corresponding to the M second ITO sub-layers are different from each other.

[0097] In some possible embodiments, the N first ITO sub-layers can be deposited in different chambers, and the process parameters of each chamber are different, so that the process parameters corresponding to the N first ITO sub-layers finally obtained are different. The same is true for the M second ITO sub-layers.

[0098] In some possible embodiments, in order to further reduce the probability that foreign matter in the film structure contacts the metal layer through the pinholes of the ITO layer, the following operations may be further performed in the above method 700:

[0099] S725: Depositing at least N first ITO sublayers on the PLN layer includes: depositing a first barrier layer on the PLN layer, or depositing a first barrier layer on the first ITO sublayer of the Ni layer, i is greater than or equal to 0 and less than N.

[0100] And / or, S745: depositing a second barrier layer on the metal layer, or depositing a second barrier layer on the Mj-th second ITO sub-layer, where j is greater than or equal to 0 and less than M.

[0101] It should be understood that the above-mentioned deposition of the first barrier layer on the first ITO sub-layer of the Ni layer means: after depositing the first ITO sub-layer of the Ni layer, the remaining first ITO sub-layer is not deposited, but the first barrier layer is directly deposited, and then after depositing the first barrier layer, the remaining first ITO sub-layer is deposited on the first barrier layer.

[0102] In addition, the above-mentioned depositing of the second barrier layer on the second ITO sub-layer of the Mj layer means: after depositing the second ITO sub-layer of the Mj layer, the remaining second ITO sub-layer is not deposited, but the second barrier layer is directly deposited, and then after depositing the second barrier layer, the remaining second ITO sub-layer is deposited on the second barrier layer.

[0103] In some possible embodiments, the above i and j may be the same or different.

[0104] In some possible embodiments, after the deposition of the second ITO layer is completed, or after the deposition of the second ITO layer and the second barrier layer is completed, a first film layer structure is obtained, and the following preparation process may be further performed at this time:

[0105] S750: coating a photoresist on the first film layer structure.

[0106] It should be understood that the purpose of coating the photoresist on the first film layer structure is to protect the first film layer structure in the subsequent photolithography process, allowing light to selectively irradiate a specific area on the upper surface of the first film layer structure.

[0107] S760: Etching the first film layer structure.

[0108] In some possible embodiments, the first film layer structure may be etched by wet etching, and the etching solution may simultaneously etch the first ITO layer, the metal layer, the second ITO layer, the first barrier layer and the second barrier layer, thereby reducing the complexity of etching.

[0109] Of course, the etching method mentioned in the embodiment of the present application may also adopt other etching methods.

[0110] S770: removing the photoresist remaining on the first film layer structure.

[0111] S780: performing ITO crystallization treatment on the first film layer structure to obtain a second film layer structure.

[0112] It should be understood that the second film layer structure mentioned above is the film layer structure 300 proposed in the embodiment of the present application.

[0113] Based on the above technical solution, the film structure prepared by a specific preparation process greatly reduces the probability of foreign substances in the film structure contacting the metal layer through the pinholes of the ITO layer, thereby increasing the protection ability of the ITO layer to the metal layer, and further protecting the metal layer in the film structure from oxidation or corrosion by impurities inside or outside the film structure, thereby avoiding dark spots on the display screen as much as possible. Moreover, the preparation process does not significantly increase the preparation complexity and is easy to implement.

[0114] Figure 8 1 is a schematic flow chart of a method 800 for preparing a membrane structure according to an embodiment of the present application. The method 800 is used to prepare any of the above-mentioned membrane structures 400.

[0115] S810: depositing a PLN layer.

[0116] S820: depositing a first ITO layer on the PLN, and depositing a third barrier layer on the first ITO layer; or, depositing a third barrier layer on the PLN, and depositing the first ITO layer on the third barrier layer.

[0117] S830: when the third barrier layer is located on the first ITO layer, depositing a metal layer on the third barrier layer; or when the first ITO layer is located on the third barrier layer, depositing a metal layer on the first ITO layer.

[0118] S840: depositing a second ITO layer on the metal layer, and depositing a fourth barrier layer on the second ITO layer; or, depositing a fourth barrier layer on the metal layer, and depositing a second ITO layer on the fourth barrier layer, to obtain a third film layer structure.

[0119] S850: coating a photoresist on the third film layer structure.

[0120] S860: Etching the third film layer structure.

[0121] S870: removing the photoresist remaining on the third film layer structure.

[0122] S880: performing ITO crystallization treatment on the third film layer structure to obtain a fourth film layer structure.

[0123] It should be understood that the fourth film layer structure mentioned above is the film layer structure 400 proposed in the embodiment of the present application.

[0124] Based on the above technical solution, the film structure prepared by a specific preparation process greatly reduces the probability of foreign substances in the film structure contacting the metal layer through the pinholes of the ITO layer, thereby increasing the protection ability of the ITO layer to the metal layer, and further protecting the metal layer in the film structure from oxidation or corrosion by impurities inside or outside the film structure, thereby avoiding dark spots on the display screen as much as possible. Moreover, the preparation process does not significantly increase the preparation complexity and is easy to implement.

[0125] Correspondingly, an embodiment of the present application also proposes a device for preparing a film layer structure, including a processor and a memory, wherein the processor and the memory are connected, wherein the memory is used to store program codes, and the processor is used to call the program codes to execute any of the above-mentioned methods for preparing the film layer structure.

[0126] Those of ordinary skill in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0127] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0128] In the several embodiments provided in the present application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0129] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0130] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0131] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application can be essentially or partly embodied in the form of a software product that contributes to the prior art. The computer software product is stored in a storage medium and includes several instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods described in each embodiment of the present application. The aforementioned storage medium includes: various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.

[0132] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A film structure, characterized in that: include: A flat PLN layer (310); a first indium tin oxide (ITO) layer (320), the first ITO layer (320) being located on the PLN layer (310), the first ITO layer (320) comprising N first ITO sub-layers (321), the film properties of the N first ITO sub-layers (321) being different from each other, and N being greater than 1; A metal layer (330), the metal layer (330) being located on the first ITO layer (320); A second ITO layer (340), the second ITO layer (340) is located on the metal layer (330), the second ITO layer (340) comprises M layers of second ITO sub-layers (341), the film properties of the M layers of second ITO sub-layers (341) are different from each other, and M is greater than 1.

2. The film structure according to claim 1, characterized in that: The first ITO layer (320) further comprises: a first barrier layer (322), the first barrier layer (322) being located between two layers of the first ITO sub-layers (321), or being located above the N layers of the first ITO sub-layers (321), or being located below the N layers of the first ITO sub-layers (321); and / or, The second ITO layer (340) further comprises: a second barrier layer (342), wherein the second barrier layer (342) is located between two layers of the second ITO sub-layers (341), or is located above the M-layer second ITO sub-layer (341), or is located below the M-layer second ITO sub-layer (341).

3. The film structure according to claim 2, characterized in that: The material of the metal layer (330) is silver (Ag), the material of the first barrier layer (322) and / or the second barrier layer (342) is Ag, molybdenum (Mo) or aluminum (Al), and the thickness of the first barrier layer (322) and the second barrier layer (342) is less than or equal to 10 nm.

4. The film structure according to any one of claims 1 to 3, characterized in that: The N is equal to 2, the M is equal to 2, and the thickness of the first ITO sub-layer (321) and the second ITO sub-layer (341) is within [1 nm, 4.5 nm].

5. A method for preparing a film structure, characterized in that: The method comprises: Depositing a flat PLN layer; Depositing a first indium tin oxide (ITO) layer on the PLN, wherein the first ITO layer includes N first ITO sub-layers, the film properties of the N first ITO sub-layers are different from each other, and N is greater than 1; depositing a metal layer on the first ITO layer; A second ITO layer is deposited on the metal layer, wherein the second ITO layer includes M second ITO sub-layers, the film properties of the M second ITO sub-layers are different from each other, and M is greater than 1.

6. The method according to claim 5, characterized in that Depositing the first ITO layer on the PLN includes: depositing at least the N first ITO sub-layers on the PLN layer, the process parameters corresponding to the N first ITO sub-layers being different from each other; Depositing the second ITO layer on the metal layer includes: depositing at least the M-layer second ITO sub-layer on the metal layer, and the process parameters corresponding to the M-layer second ITO sub-layer are different from each other.

7. The method according to claim 6, characterized in that Depositing at least the N-layer first ITO sublayer on the PLN layer includes: depositing a first barrier layer on the PLN layer, or depositing the first barrier layer on the (Ni)-layer first ITO sublayer, wherein i is greater than or equal to 0 and less than N; and / or, Depositing at least the M second ITO sublayers on the metal layer includes: depositing a second barrier layer on the metal layer, or depositing the second barrier layer on the (Mj)th second ITO sublayer, where j is greater than or equal to 0 and less than M.

8. The method according to claim 7, characterized in that The material of the metal layer is silver (Ag), the material of the first barrier layer or the second barrier layer is Ag, molybdenum (Mo) or aluminum (Al), and the thickness of the first barrier layer and the second barrier layer is less than or equal to 10 nm.

9. The method according to any one of claims 5 to 8, characterized in that The N is equal to 2, the M is equal to 2, and the thickness of the first ITO sub-layer and the second ITO sub-layer is within [1 nm, 4.5 nm].

10. The method according to any one of claims 5 to 9, characterized in that When the operation of depositing the second ITO layer on the metal layer is completed, a first film layer structure is obtained, and the method further includes: coating a photoresist on the first film layer structure; Etching the first film layer structure; removing the photoresist remaining on the first film layer structure; The first film layer structure is subjected to ITO crystallization treatment to obtain a second film layer structure.

11. A display substrate, characterized in that: A light emitting device is provided, wherein the light emitting device comprises the film layer structure according to any one of claims 1 to 4.

12. The display substrate according to claim 11, characterized in that: The light emitting device is an organic light emitting diode (OLED).

13. A device for preparing a membrane structure, characterized in that: The system comprises a processor and a memory, wherein the processor and the memory are connected, wherein the memory is used to store program codes, and the processor is used to call the program codes to execute the method as claimed in any one of claims 5 to 10.

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