Digital pre-distortion circuit, digital pre-distortion method and device

Abstract

The embodiment of the invention provides a digital pre-distortion circuit, method and device, the digital pre-distortion circuit comprises a digital pre-distortion module and a power amplifier, the digital pre-distortion module is used for obtaining a first feature of a first input signal and a second feature of the first input signal; determining a first coefficient according to a first feature of the first input signal and determining a second coefficient according to a second feature; generating a second signal according to the first input signal and a first coefficient; the digital pre-processor generates a first output signal according to the second signal and a second coefficient; inputting the first output signal to a power amplifier; and the power amplifier is used for amplifying the first output signal to generate a second output signal. According to the digital pre-distortion circuit provided by the embodiment of the invention, signal distortion generated after the input signal passes through the power amplifier can be avoided.

Description

A digital predistortion circuit, a digital predistortion method and a device

[0001] This application claims priority to the Russian Federation patent application filed with the Russian Federal Patent Office on May 27, 2022, with application number 2022114387 and application name “A digital predistortion circuit, digital predistortion method and device”, the entire content of which is incorporated by reference into this application. Technical Field

[0002] The embodiments of the present application relate to the field of electronic equipment, and more specifically to a digital predistortion circuit, a digital predistortion method, and a device. Background Art

[0003] In communication systems, digital pre-distortion (DPD) is used to prevent signal nonlinearity and memory distortion caused by power amplifiers (PAs) operating in nonlinear regions. As PAs develop toward higher efficiency, wider bandwidth, lower power consumption, and higher integration, current DPD systems are no longer able to meet these demands.

[0004] Summary of the Invention

[0005] Embodiments of the present application provide a digital predistortion circuit, a digital predistortion method, and an apparatus, which can determine a DPD coefficient and an index coefficient based on a first feature and a second feature of an input signal, thereby performing digital predistortion processing to avoid obtaining a nonlinear output signal after passing through a power amplifier.

[0006] According to a first aspect, a digital predistortion circuit is provided. The digital predistortion circuit includes: a digital predistortion module and a power amplifier. The digital predistortion module is configured to obtain a first characteristic of a first input signal and a second characteristic of the first input signal, wherein the first characteristic of the first input signal includes at least one of the following: an amplitude of the first input signal, an in-phase component of the first input signal, and a quadrature component of the first input signal; and the second characteristic includes at least one of the following: a bandwidth of the first input signal, a temperature of the digital predistortion circuit when processing the first input signal, a frequency of the first input signal, a modulation format of the first input signal, and a standing wave generated by the digital predistortion circuit when processing the first input signal. The digital predistortion module is configured to determine a first coefficient based on the first characteristic, determine a second coefficient based on the second characteristic, generate a second signal based on the first input signal and the first coefficient, generate a first output signal based on the second signal and the second coefficient, and input the first output signal to the power amplifier.

[0007] The power amplifier is used to amplify the first output signal to generate a second output signal.

[0008] In the digital pre-distortion circuit provided in the embodiment of the present application, the DPD module can determine the first coefficient and the second coefficient based on the first feature and the second feature of the first input signal, and use the first coefficient and the second coefficient to perform digital pre-distortion processing on the first input signal. Then, the first output signal after the digital pre-distortion processing is input into the power amplifier, so as to obtain a linear and non-distorted second output signal.

[0009] In combination with the first aspect, in some implementations of the first aspect, the digital predistortion circuit further includes a coefficient module, the coefficient module storing a correspondence between the first feature and the first coefficient and a correspondence between the second feature and the second coefficient, and the digital predistortion module is specifically configured to extract the first coefficient from the coefficient module based on the first feature and extract the second coefficient from the coefficient module based on the second feature. First Feature Second Feature

[0010] In combination with the first aspect, in certain implementations of the first aspect, the digital pre-distortion module includes N digital pre-distortion sub-modules and a synthesis module, the N digital pre-distortion sub-modules being configured to determine N first sub-coefficients based on the first feature, and determine N second sub-coefficients based on the second feature, where N ≥ 1 and is an integer, and the N first sub-coefficients are different; generate N second sub-signals based on the first input signal and the N first sub-coefficients; generate N first output sub-signals based on the N second sub-signals and the N second sub-coefficients; and the synthesis module being configured to generate the first output signal based on the N first output sub-signals.

[0011] In combination with the first aspect, in certain implementations of the first aspect, the first feature also includes the data carried by the first input signal and / or the signal amplitude of the second input signal and / or the data carried by the second input signal, wherein the second input signal is an input signal that differs from the first input signal by a certain time interval.

[0012] In combination with the first aspect, in some implementations of the first aspect, the digital pre-distortion circuit further includes a digital-to-analog converter, wherein the digital-to-analog converter is used to obtain the first output signal from the digital pre-distortion circuit, perform digital-to-analog conversion on the first output signal, and input the first output signal after the digital-to-analog conversion into the power amplifier.

[0013] In combination with the first aspect, in certain implementations of the first aspect, the digital predistortion circuit further includes a preprocessing module and a solving module, wherein the solving module is pre-installed with an algorithm for solving coefficients, wherein the first input signal and the second output signal are input into the preprocessing module, and when the adjacent channel leakage ratio of the first input signal and the second output signal exceeds a first threshold and / or the error vector amplitude exceeds a second threshold, the preprocessing module is used to preprocess the first input signal and the second output signal to align the first input signal and the second output signal; input the preprocessed first input signal and the preprocessed second output signal into the solving module; the solving module is used to process the preprocessed first input signal and the preprocessed second output signal according to the algorithm to generate a third coefficient and a fourth coefficient; the digital predistortion module is further used to generate a third signal based on the first input signal and the third coefficient; generate a third output signal based on the third signal and the fourth coefficient; input the third output signal into the power amplifier; and the power amplifier is used to amplify the third output signal.

[0014] In an embodiment of the present application, when the ACLR of the first input signal and the second output signal exceeds the first threshold or the EVM exceeds the second threshold, the digital pre-distortion circuit can recalculate new coefficients based on the first input signal and the second output signal, so that the digital pre-distortion circuit can generate a third output signal based on the third coefficient and the fourth coefficient, and then input the third output signal into the power amplifier, thereby obtaining a distortion-free fourth output signal.

[0015] In a second aspect, a digital predistortion method is provided, which includes: obtaining a first characteristic of a first input signal and a second characteristic of the first input signal, wherein the first characteristic of the first input signal includes at least one of the following: the amplitude of the first input signal, the in-phase component of the first input signal, and the quadrature component of the first input signal, and the second characteristic includes at least one of the following: the bandwidth of the first input signal, the temperature of the digital predistortion circuit when processing the first input signal, the frequency of the first input signal, the modulation format of the first input signal, and the standing wave generated by the digital predistortion circuit when processing the first input signal; determining a first coefficient based on the first characteristic, and determining a second coefficient based on the second characteristic; generating a second signal based on the first input signal and the first coefficient; generating a first output signal based on the second signal and the second coefficient; and performing power amplification processing on the first output signal to generate a second output signal.

[0016] In combination with the second aspect, in certain implementations of the second aspect, the determining of the first coefficient and the second coefficient based on the first feature and the second feature of the first input signal includes: determining N first sub-coefficients based on the first feature, and determining N second sub-coefficients based on the second feature, and the N first sub-coefficients are different; the generating of the second signal based on the first input signal and the first coefficient includes: generating N second sub-signals based on the first input signal and the N first sub-coefficients; the generating of the first output signal based on the second signal and the second coefficient includes: generating N first output sub-signals based on the N second sub-signals and the N second sub-coefficients; and generating a first output signal based on the N first output sub-signals.

[0017] In combination with the second aspect, in certain implementations of the second aspect, when the adjacent channel leakage ratio of the first input signal and the second output signal exceeds a first threshold and / or the error vector amplitude exceeds a second threshold, the method further includes: preprocessing the first input signal and the second output signal to align the first input signal and the second output signal; processing the preprocessed first input signal and the preprocessed second output signal to generate a third coefficient and a fourth coefficient; generating a third signal based on the first input signal and the third coefficient; generating a third output signal based on the third signal and the fourth coefficient; and power amplifying the third output signal to generate a fourth output signal.

[0018] In combination with the second aspect, in certain implementations of the second aspect, the first feature also includes the data carried by the first input signal and / or the signal amplitude of the second input signal and / or the data carried by the second input signal, wherein the second input signal is an input signal that differs from the first input signal by a certain time interval.

[0019] According to a third aspect, a transmitting device is provided, which includes a transceiver unit, a digital predistortion unit, and a power amplification unit, wherein the transceiver unit is used to receive a first input signal; the digital predistortion unit is used to obtain a first feature of the first input signal and a second feature of the first input signal, wherein the first feature of the first input signal includes at least one of the following: the amplitude of the first input signal, the in-phase component of the first input signal, and the quadrature component of the first input signal; the second feature includes at least one of the following: the bandwidth of the first input signal, the temperature of the digital predistortion circuit when processing the first input signal, the frequency of the first input signal, the modulation format of the first input signal, and the standing wave generated by the digital predistortion circuit when processing the first input signal; a first coefficient is determined according to the first feature, and a second coefficient is determined according to the second feature; a second signal is generated according to the first input signal and the first coefficient; a first output signal is generated according to the second signal and the second coefficient; the first output signal is input to the power amplification unit; the power amplification unit is used to amplify the first output signal to generate a second output signal; and the transceiver unit is further used to send the second output signal.

[0020] In combination with the third aspect, in certain implementations of the third aspect, the transmitting device also includes a coefficient unit, which stores the correspondence between the first feature and the first coefficient and the correspondence between the second feature and the second coefficient; the digital pre-distortion unit is specifically used to extract the first coefficient from the coefficient unit according to the first feature and extract the second coefficient from the coefficient unit according to the second feature.

[0021] In combination with the third aspect, in certain implementations of the third aspect, the digital preprocessing unit is specifically used to: determine N first sub-coefficients based on the first feature and determine N second sub-coefficients based on the second feature, and the N first sub-coefficients are different; generate N second sub-signals based on the first input signal and the N first coefficients; generate N first output sub-signals based on the N second sub-signals and the N second sub-coefficients; and generate the first output signal based on the N first output sub-signals.

[0022] In combination with the third aspect, in certain implementations of the third aspect, the transmitting device further includes a preprocessing unit and a solving unit, the solving unit being pre-installed with an algorithm for solving coefficients, wherein the first input signal and the second output signal are input into the preprocessing unit, and when the adjacent channel leakage ratio of the first input signal and the second output signal exceeds a first threshold or the error vector amplitude exceeds a second threshold, the preprocessing unit is configured to preprocess the first input signal and the second output signal to align the first input signal and the second output signal; the preprocessing unit is further configured to input the preprocessed first input signal and the preprocessed second output signal into the solving unit; the solving unit is configured to process the preprocessed first input signal and the preprocessed second output signal according to the algorithm to generate a third coefficient and a fourth coefficient; the digital predistortion unit is further configured to generate a third signal based on the first input signal and the third coefficient; generate a third output signal based on the third signal and the fourth coefficient; input the third output signal into the power amplification unit; the power amplification unit is further configured to amplify the third output signal; and the transceiver unit is further configured to transmit the amplified third output signal.

[0023] In combination with the third aspect, in certain implementations of the third aspect, the first feature also includes the data carried by the first input signal and / or the signal amplitude of the second input signal and / or the data carried by the second input signal, wherein the second input signal is an input signal that differs from the first input signal by a certain time interval.

[0024] In a fourth aspect, a transmitting device is provided, which includes the first aspect and any possible digital predistortion circuit of the first aspect, or includes the third aspect and any possible transmitting device of the third aspect.

[0025] In a fifth aspect, a transmitting device is provided, comprising one or more processors; one or more memories; one or more transceivers; the one or more memories storing one or more computer programs, the one or more computer programs comprising instructions, which, when executed by the one or more processors, enable the technical solutions of the above-mentioned second aspect and any possible design of the second aspect to be executed.

[0026] In the sixth aspect, a chip is provided, which is coupled to a memory in an electronic device and is used to call a computer program stored in the memory and execute the technical solution of the second aspect of the embodiment of the present application and any possible design of the second aspect thereof; in the embodiment of the present application, "coupling" means that two components are directly or indirectly combined with each other.

[0027] In the seventh aspect, a computer-readable storage medium is provided, which includes a computer program. When the computer program runs on a communication device, the electronic device executes the technical solution of the above-mentioned second aspect and any possible design of the second aspect.

[0028] In an eighth aspect, a computer program product is provided, which includes a computer program. When the computer program is run, the computer executes the technical solution of the second aspect and any possible design of the second aspect.

[0029] Among them, for the beneficial effects of the second to eighth aspects, please refer to the beneficial effects of the first aspect and will not be repeated. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] FIG1 is a schematic flow chart of a linearization scheme for digital predistortion.

[0031] FIG2 is a structural diagram of a digital predistortion circuit provided in an embodiment of the present application.

[0032] FIG3 is a schematic diagram of determining a first coefficient by a digital predistortion module according to an embodiment of the present application.

[0033] FIG4 is a schematic diagram of another digital predistortion module determining a first coefficient according to an embodiment of the present application.

[0034] FIG5 is a schematic structural diagram of a digital predistortion module provided in an embodiment of the present application.

[0035] FIG6 is a schematic structural diagram of a digital predistortion submodule provided in an embodiment of the present application.

[0036] FIG7 is a schematic diagram of the structure of the coefficient module provided in an embodiment of the present application.

[0037] FIG8 is a structural diagram of a digital predistortion circuit provided in an embodiment of the present application.

[0038] FIG9 is a structural diagram of a digital predistortion circuit provided in an embodiment of the present application.

[0039] FIG10 is a structural diagram of a digital predistortion circuit provided in an embodiment of the present application.

[0040] FIG11 is a schematic flowchart of a digital predistortion method provided in an embodiment of the present application.

[0041] FIG12 is a schematic flowchart of a digital predistortion method according to an embodiment of the present application.

[0042] FIG13 is a schematic flowchart of a digital predistortion method according to an embodiment of the present application.

[0043] FIG14 is a transmitting device provided in an embodiment of the present application.

[0044] FIG15 is a communication device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0045] The technical solution in this application will be described below with reference to the accompanying drawings.

[0046] The technical solutions of the embodiments of the present application can be applied to various communication systems, such as: Global System of Mobile communication (GSM) system, Code Division Multiple Access (CDMA) system, Wideband Code Division Multiple Access (WCDMA) system, General Packet Radio Service (GPRS), Long Term Evolution (LTE) system, LTE Frequency Division Duplex (FDD) system, LTE Time Division Duplex (TDD), Universal Mobile Telecommunication System (UMTS), Worldwide Interoperability for Microwave Access (WiMAX) communication system, 5th Generation (5G) system or New Radio (NR), and future evolved communication systems. Furthermore, the technical solutions provided in the embodiments of the present application can also be applied to other communication systems that need to implement digital predistortion processing. In a communication system, the device to which the technical solutions provided in the embodiments of the present application are applied is a transmitting device, which can be a network device or a terminal device. The transmitting device may also be referred to as a sending device.

[0047] A terminal device is a device with wireless transceiver capabilities, which can be deployed on land, including indoors or outdoors, handheld, wearable or vehicle-mounted; it can also be deployed on water (such as ships, etc.); it can also be deployed in the air (such as airplanes, balloons and satellites, etc.). The terminal device can communicate with the core network via the radio access network (RAN) and exchange voice and / or data with the RAN. The terminal device can be a mobile phone, a tablet computer (Pad), a computer with wireless transceiver capabilities, a mobile internet device (MID), a wearable device, a virtual reality (VR) terminal device, an augmented reality (AR) terminal device, a wireless terminal in industrial control, a wireless terminal in self-driving, a wireless terminal in remote medical, a wireless terminal in smart grid, a wireless terminal in transportation safety, a wireless terminal in smart home, a drone, a drone controller, etc. The embodiments of the present application do not limit the application scenarios. The terminal device is sometimes also referred to as a user equipment (UE). The embodiments of the present application do not limit the specific technology, device form and name adopted by the terminal equipment.

[0048] The network devices involved in the embodiments of the present application include base stations (BS), network controllers, mobile switching centers or other access network devices or core network devices. Among them, base stations include various forms of macro base stations, micro base stations, relay stations, access points, etc. For example, the base station can be a base station in GSM or CDMA: a base transceiver station (BTS); it can also be a base station in WCDMA: NodeB; it can also be an evolved base station in LTE: eNB or e-NodeB; it can also be a base station in a 5G system, and the base station in a 5G system can be called a transmission reception point (TRP) or a next-generation Node B (gNB); further, the base station can also be a base station in a future network, which is not limited in this application.

[0049] The technical solution provided in the embodiments of the present application can be applied to a transmitting device, and further, can be applied to a transmitting apparatus of the transmitting device.

[0050] PA is a nonlinear component. In order to prevent distortion during signal amplification, PA needs to be linearized. Currently, the DPD solution can be used for linearization of PA. Figure 1 is a schematic flow chart of a linearization solution using digital pre-distortion. As shown in Figure 1, assuming that the input signal x(n) is not processed by the DPD processing unit 101 and is directly input to PA102, when the input signal x(n) passes through PA102, due to the nonlinear characteristics of PA102, it will cause signal distortion and output a nonlinear distorted signal, which will affect the signal quality and communication efficiency. The DPD processing unit 101 is used to pre-process the input signal x(n) in the opposite direction to the characteristics of PA102 before the input signal x(n) is input to PA102. In Figure 2, in the coordinate diagram on the DPD processing unit 101, the horizontal axis P 输入 The vertical axis represents the signal input to the DPD processing unit 101. 输出 Figure 1 represents the signal output by DPD processing unit 101. The dashed line represents the undistorted input signal x(n) input to DPD processing unit 101. Due to the nonlinear characteristics of the PA, DPD processing unit 101 needs to perform processing opposite to the nonlinear characteristics of PA 102. That is, the solid line represents the actual signal characteristics output from DPD processing unit 101. In the graph on PA 102, the dashed line represents the undistorted input signal to PA 102. Due to the nonlinear characteristics of PA 102, the solid line represents the output signal of the undistorted input signal to PA 102. It can be seen that due to the nonlinear characteristics of PA 102, the signal output from PA 102 is distorted. Therefore, processing opposite to the nonlinear characteristics of PA 102 is required in DPD processing unit 101. By providing feedback circuit unit 103, a portion of the signal output from the PA is transmitted to DPD processing unit 101 after passing through feedback circuit unit 103. DPD processing unit 101 processes this portion of the signal to determine the nonlinear characteristics of PA 102. This allows DPD processing unit 101 to pre-process the signal in the opposite direction of PA 102's nonlinear characteristics. The processed signal is then input to PA 102, ultimately allowing PA 102 to output a linear, undistorted signal. In the graph to the right of PA 102, the solid line represents the signal output by PA 102. This shows that, after pre-distortion processing by DPD processing unit 101, the signal output by PA 102 is free of distortion.

[0051] The nonlinear distortion characteristics of PA can be expressed using polynomials, so polynomials can be used to model PA. Common PA models include the Volterra model, the memory polynomial (MP) model, the generalized memory polynomial (GMP) model, the Wiener model, and the Hammerstein model. The mathematical expression of the memory polynomial model is shown in formula (1):

[0052]

[0053] Wherein, x(n) represents the input signal, z(n) represents the output signal of the DPD processing unit, K represents the polynomial order, Q represents the memory depth, and a represents the DPD coefficient.

[0054] In order to perform pre-distortion processing using formula (1), it is necessary to calculate the DPD coefficient a. There are many methods for calculating the DPD coefficient a, which is not limited in the embodiments of the present application.

[0055] Currently, the feedback circuit unit requires real-time iteration when calculating the DPD coefficient, which increases additional power consumption. Furthermore, as the second characteristic (e.g., bandwidth, temperature, frequency, etc.) changes, the feedback circuit unit cannot quickly calculate the DPD coefficient, resulting in a decrease in communication quality. Based on this, embodiments of the present application provide a digital predistortion circuit and device that can reduce power consumption and improve communication quality.

[0056] FIG2 shows a schematic diagram of the structure of a digital predistortion circuit provided by an embodiment of the present application. As shown in FIG2 , the digital predistortion circuit 200 includes: a DPD module 210 and a PA 220, wherein:

[0057] The DPD module 210 is configured to obtain a first feature of the first input signal and a second feature of the first input signal.

[0058] The DPD module 210 is configured to determine a first coefficient according to a first feature of the first input signal, and determine a second coefficient of a second feature according to a second feature.

[0059] The DPD module 210 is further configured to generate a second signal according to the first input signal and the first coefficient.

[0060] The DPD module 210 is further configured to generate a first output signal according to the second signal and the second coefficient.

[0061] The DPD module 210 is further configured to input the first output signal into a power amplifier.

[0062] PA220 is used to amplify the first output signal.

[0063] In the embodiment of the present application, the first output signal that has undergone power amplification may be referred to as the second output signal.

[0064] In the digital pre-distortion circuit provided in the embodiment of the present application, the DPD module can determine the first coefficient and the second coefficient based on the first feature and the second feature of the first input signal, and use the first coefficient and the second coefficient to perform digital pre-distortion processing on the first input signal. Then, the first output signal after digital pre-distortion processing is input into the PA220, thereby obtaining a linear non-distorted second output signal.

[0065] The digital predistortion circuit provided in the embodiments of the present application will be described in detail below.

[0066] After the first input signal is input to the DPD module 210 , the DPD module 210 may obtain a first feature and a second feature of the first input signal, and then determine a first coefficient according to the first feature and determine a second coefficient according to the second feature.

[0067] The embodiment of the present application does not limit the type of the first input signal. The first input signal can be a modulated signal, such as an LTE signal, a 5G signal, etc., or a continuous wave (CW) signal.

[0068] Optionally, the first characteristic of the first input signal may be a signal amplitude.

[0069] Optionally, the first characteristic of the first input signal may further include data carried by the first input signal and / or the signal amplitude of the second input signal and / or the data carried by the second input signal. The data carried by the first input signal may be the in-phase component and the quadrature component of the first input signal, wherein the second input signal may be an input signal that differs from the first input signal by a certain time interval. For example, if the first input signal is x(n) and the second input signal may be x(nk), then the characteristic of the first input signal may further be the amplitude of the second input signal, i.e., |x(nk)|.

[0070] The DPD module 210 may determine the first coefficient in the following ways.

[0071] In one possible implementation, the DPD module 210 stores a lookup table (LUT). The lookup table can be understood as a mapping relationship that indicates the correspondence between multiple first-category features and multiple coefficients. That is, pre-calculated coefficients are stored in a table. The DPD module 210 can then calculate the address in the LUT based on the first feature of the first input signal, thereby determining the first coefficient. The first coefficient can be understood as the coefficient corresponding to the first feature in the mapping relationship. The first-category features include at least one of amplitude, in-phase component, and orthogonal component.

[0072] For example, taking the amplitude of the first input signal as the first feature, as shown in FIG3 , the DPD module 210 can determine the absolute value of the first input signal x(n) input to the DPD module 210 as |x(n)| using the absolute value unit. The absolute value of the first input signal |x(n)| indicates the signal amplitude of the first input signal. After the DPD module 210 determines the absolute value |x(n)| of the first input signal, it can adjust the delay unit to obtain at least one index value. As shown in FIG3 , the DPD module 210 can obtain the index value |x(n-m1)| with a memory depth of m1, the index value |x(n-m2)| with a memory depth of m2, and the index value |x(n-m3)| with a memory depth of m3. Based on the index value, the LUT corresponding to the index value can be determined, that is, three LUTs can be determined, and then the corresponding coefficients can be searched in the corresponding LUT based on the signal amplitude of the first input signal. In the present embodiment, the coefficients determined by the LUT are referred to as DPD coefficients. In other words, the DPD coefficients of different memory terms in the memory polynomial can be determined by the signal amplitude of the first input signal.

[0073] It should be noted that the memory depth is related to the memory polynomial. The embodiment of the present application takes the DPD module 210 obtaining the index values ​​of three memory depths through the delay unit as an example, but the embodiment of the present application is not limited to this.

[0074] In one possible implementation, the digital pre-distortion circuit 200 further includes a coefficient module 230, which stores a LUT. The lookup table can be understood as a mapping relationship, which is used to indicate the correspondence between multiple first-category features and multiple coefficients, that is, the pre-calculated coefficients are stored in a table, and then the DPD module 210 can calculate the address in the LUT based on the first feature of the first input signal to determine the first coefficient.

[0075] For example, as shown in FIG4 , the absolute value |x(n)| of the first input signal can be obtained after passing through the absolute value unit. The absolute value of the first input signal is input into the coefficient module 230. The coefficient module 230 can adjust the memory depth m1 by the delay unit to obtain the index value |x(n-m1)|, the index value |x(n-m2)|, and the index value |x(n-m3)| of the memory depth m3. Then, the LUT corresponding to the index value can be determined according to the index value, that is, three LUTs can be determined, and then the corresponding coefficients can be searched in the corresponding LUTs according to the signal amplitude of the first input signal. When the corresponding coefficients are searched in the corresponding LUTs according to the signal amplitude of the first input signal, the DPD coefficients of different memory items can be determined. For details, please refer to the following text.

[0076] Optionally, the second characteristic of the first input signal includes at least one of the following: the bandwidth of the first input signal, the temperature of the digital pre-distortion circuit when processing the first input signal, the frequency of the first input signal, the modulation format of the first input signal, and the standing wave generated by the digital pre-distortion circuit when processing the first input signal.

[0077] In the embodiment of the present application, the DPD module can determine the second coefficient in the following ways.

[0078] In one possible implementation, the DPD module 210 stores an index table. This index table can be understood as a mapping relationship that indicates the correspondence between multiple second-category features and multiple coefficients. The DPD module 210 can find the corresponding second coefficient in the index table based on the second feature of the first input signal. The second coefficient can be understood as the coefficient corresponding to the second feature in this mapping relationship. The second-category features include at least one of bandwidth, temperature, frequency, signal modulation format, and standing wave.

[0079] In one possible implementation, the digital predistortion circuit 200 further includes a coefficient module 230, which stores an index table. The DPD module 210 may determine the second coefficient in the coefficient module 230 according to the second feature of the first input signal.

[0080] It can be understood that when the first input signal includes multiple second features, the DPD module 210 or the coefficient module 230 also stores multiple index tables.

[0081] Exemplarily, when the first input signal includes M second features, the DPD module can determine M second sub-coefficients based on the M second features of the first input signal, that is, the second coefficient can include the M second sub-coefficients. For example, if the second features are bandwidth and temperature, the DPD module 210 or the coefficient module 230 can store a first index table and a second index table, wherein the first index table corresponds to bandwidth and the second index table corresponds to temperature, so that the corresponding coefficients can be determined in the first index table and the second index table according to bandwidth and temperature, respectively. In this embodiment of the present application, the set of coefficients determined based on different second features of the first input signal can be referred to as second coefficients, that is, the second coefficients can include multiple coefficients determined based on different second features of the first input signal. Taking the above as an example, the second coefficients include coefficients determined based on bandwidth and coefficients determined based on temperature.

[0082] The above describes that the DPD module 210 determines the first coefficient and the second coefficient according to the first feature and the second feature of the first input signal. The following describes in detail how the DPD module 210 generates the second signal according to the first coefficient and the first input signal, and generates the first output signal according to the second signal and the second coefficient.

[0083] After the DPD module 210 determines a first coefficient based on the first feature of the first input signal, the first coefficient may include a single DPD coefficient or DPD coefficients of multiple different memory items. The DPD module 210 may multiply the first input signal by the first coefficient, i.e., multiply the first input signal by the single DPD coefficient or the DPD coefficients of multiple different memory items to obtain a second signal. After generating the second signal, the second signal may be multiplied by the second coefficient to obtain a first output signal.

[0084] Optionally, in some embodiments, the DPD module 210 may include N DPD sub-modules and a synthesis module, where N is greater than or equal to 1 and is an integer.

[0085] FIG5 is a schematic diagram of the structure of the DPD module 210. As shown in FIG5 , the DPD module 210 includes N DPD submodules and a synthesis module. The N DPD submodules can determine N first subcoefficients based on a first characteristic of a first input signal x(n) and N second subcoefficients based on a second characteristic of the first input signal, where N ≥ 1 and is an integer. Each of the N first subcoefficients can include one DPD coefficient or multiple DPD coefficients. The inclusion of multiple DPD coefficients in a first subcoefficient can be understood as including DPD coefficients with different memory items. It is understood that the N first subcoefficients can constitute a first coefficient, i.e., the first coefficient can include the N first subcoefficients. Similarly, the second coefficient can include the N second subcoefficients. The N DPD submodules can generate N second subsignals based on the N first subcoefficients and the first input signal, and then generate N first output subsignals based on the N second subsignals and the N second subcoefficients.

[0086] It should be noted that the selection of N is a trade-off between the final output performance and computing resources.

[0087] Optionally, in some embodiments, N=1, and the second coefficient is a constant.

[0088] Optionally, in some embodiments, N=2.

[0089] FIG6 is a schematic diagram of the structure of the DPD submodule. As shown in FIG6 , the DPD submodule may include a digital predistortion processor and a multiplier. A first input signal x(n) is input to the DPD submodule. The predistortion processor may determine a first sub-coefficient and a second coefficient based on the first input signal. The predistortion processor may then multiply the first input signal by the first sub-coefficient, i.e., multiply the first input signal by the DPD coefficient or the DPD coefficients of multiple different memory items to generate a second sub-signal. The second sub-signal is then multiplied by the second coefficient by the multiplier to generate a first output sub-signal. It is understood that N first output sub-signals can be obtained through the N DPD submodules, and then the synthesis module may obtain the first output signal through formula (2).

[0090]

[0091] It should be noted that the embodiment of the present application does not limit the architecture of the digital pre-distortion processor. For example, the architecture of the digital pre-distortion processor may be an architecture based on memory polynomials.

[0092] The DPD submodule may determine the first sub-coefficient and the second sub-coefficient in the following ways.

[0093] In one possible implementation, each DPD submodule stores a LUT and index table corresponding to the DPD submodule. The LUT table corresponding to each DPD submodule may include LUTs for different memory items. The DPD submodule may determine the first sub-coefficient and the second coefficient based on the first feature and the second feature of the first input signal.

[0094] It should be understood that the description of the LUT and index table corresponding to the DPD sub-module stored in the DPD sub-module can be found above, and for the sake of brevity, it will not be repeated here.

[0095] In a possible implementation, the DPD submodule may determine the first sub-coefficient and the second coefficient corresponding to the first input signal through the coefficient module 230 .

[0096] Exemplarily, the coefficient module 230 stores a LUT and index table corresponding to each DPD submodule. The LUT corresponding to each DPD submodule may include sub-LUTs with different memory items. For example, Figure 7 illustrates the structure of the coefficient module storing the LUT and index table. As shown in Figure 7, each of the N DPD submodules has one or more sub-LUTs and one or more environment index tables corresponding to it in the coefficient module 230. The number of sub-LUT tables is related to the memory depth. For example, when the MP model has a memory depth of 3, there are 3 sub-LUT tables; when the GMP model has a memory depth of 3 and 5, there are 15 sub-LUT tables. The memory depth and memory items in different DPD submodules can be the same or different. The number of environment index tables is related to the second feature. For example, when the second feature includes M environment sub-features, each of the N DPD submodules includes M environment index tables. When a first input signal is input to the DPD submodule, each DPD submodule can determine the first sub-coefficient and the second sub-coefficient from the corresponding LUT and environment index table, thereby generating a first output sub-signal.

[0097] It should be noted that the first sub-coefficient and the second sub-coefficient determined by each of the N DPD sub-modules according to the first feature and the second feature of the first input signal may be the same or different.

[0098] After the DPD module 210 generates the first output signal, the first output signal may be input into the PA 220 , and the PA 220 may generate a second output signal based on the first output signal.

[0099] In the digital pre-distortion circuit provided in the embodiment of the present application, the DPD module 210 can determine the first coefficient and the second coefficient based on the first feature and the second feature of the first input signal, and use the first coefficient and the second coefficient to perform digital pre-distortion processing on the first input signal. Then, the first output signal after digital pre-distortion processing is input into the PA 220, thereby obtaining a linear and non-distorted second output signal.

[0100] Optionally, in some embodiments, as shown in FIG8 , the digital pre-distortion circuit 200 further includes a coefficient module 230 , and the coefficient module 230 stores a LUT and an index table.

[0101] It should be understood that the description of the coefficient module 230 can be found above, and for the sake of brevity, it will not be repeated here.

[0102] Optionally, in some embodiments, the PA can be a digital PA or an analog PA. As shown in FIG9 , the digital predistortion circuit 200 further includes a digital-to-analog converter (DAC) 240. The DAC 240 is configured to convert the first output signal of the DPD module 210 into an analog signal and input the analog signal into the PA 220.

[0103] Furthermore, in some embodiments, the digital pre-distortion circuit 200 further includes passive components such as a filter and a mixer between the DAC and the PA 220 .

[0104] It should be noted that the embodiments of the present application do not limit the types of passive components.

[0105] The coefficients in the LUT and the coefficients in the index table stored in the DPD module 210 or the coefficient module 230 mentioned above may be pre-calculated.

[0106] For example, taking the second feature being bandwidth as an example, when solving the coefficients in the LUT and the coefficients in the index table, the input signal of the DPD and the output signal of the PA under different bandwidths can be collected, so that the DPD coefficient and the index coefficient can be obtained through the solving algorithm.

[0107] Exemplarily, when the second characteristic includes multiple factors, for example, when the second characteristic includes bandwidth and temperature, when solving the coefficients in the LUT and the coefficients in the index table, the input signal of the DPD and the output signal of the PA at different bandwidths and temperatures can be collected for solving, so that two index tables can be obtained, corresponding to the two second characteristics of bandwidth and temperature respectively.

[0108] It can be understood that in the embodiment of the present application, when solving the input signal and the output signal, the decoupling of the second feature and the first feature of the input signal is achieved, so that the DPD coefficient corresponding to the first feature and the coefficient corresponding to the second feature can be obtained. Then, when the second feature is added or the numerical range of a second feature is changed, only the index table corresponding to the second feature can be added or adjusted without changing the LUT of the DPD, thereby reducing the number of LUTs and reducing the storage pressure of the memory.

[0109] It should be noted that, when performing the solution, the first coefficient and the second coefficient can be determined by a solution algorithm according to a preset nonlinear model. For example, the nonlinear model can be a memory polynomial model as shown in formula (1), or other models, which are not limited in this application. In addition, the solution method in the embodiments of the present application is not limited. For example, the least squares (LS) algorithm and its variations, the least mean square (LMS) algorithm and its variations, etc. can be adopted.

[0110] Optionally, in some embodiments, as shown in FIG10 , the digital predistortion circuit 200 further includes a preprocessing module 250 and a solving module 260 , and the solving module 260 may be pre-installed with the method for solving the coefficients described above, wherein

[0111] The first input signal and the second output signal are input to the pre-processing module 250 , and the input signal of the pre-processing module 250 is input to the solving module 260 .

[0112] When an adjacent channel leakage ratio (ACLR) of the first input signal and the second output signal exceeds a first threshold and / or an error vector magnitude (EVM) exceeds a second threshold,

[0113] The pre-processing module 250 is configured to pre-process the first input signal and the second output signal to align the first input signal and the second output signal.

[0114] In the embodiment of the present application, there is no limitation on the preprocessing method adopted by the preprocessing module 250. For example, the preprocessing module 250 can adopt preprocessing methods such as gain alignment, delay alignment, and frequency and phase offset correction.

[0115] The preprocessing module 250 is further configured to input the preprocessed first input signal and the second output signal into the solving module 260 .

[0116] The solving module 260 is configured to process the pre-processed first input signal and the second output signal according to an algorithm to generate a third coefficient and a fourth coefficient.

[0117] Optionally, the solving module 260 is further configured to send the third coefficient and the fourth coefficient to the coefficient module 230 .

[0118] The DPD module 210 is further configured to generate a third signal according to the first input signal and the third coefficient.

[0119] The DPD module 210 is further configured to generate a third output signal according to the third signal and the fourth coefficient.

[0120] The DPD module 210 is further configured to input the third output signal to the PA 220;

[0121] PA220 is also used to amplify the third output signal.

[0122] In the embodiment of the present application, the amplified third output signal may be referred to as a fourth output signal.

[0123] Optionally, in some embodiments, the first coefficient may be replaced by the third coefficient, and the second coefficient may be replaced by the fourth coefficient.

[0124] In an embodiment of the present application, when the ACLR or EVM of the first input signal and the second output signal exceeds a threshold, the digital pre-distortion circuit can recalculate new coefficients based on the first input signal and the second output signal, so that the digital pre-distortion circuit can generate a third output signal based on the third coefficient and the fourth coefficient, and then input the third output signal into the power amplifier, thereby obtaining a distortion-free fourth output signal.

[0125] Furthermore, in some embodiments, the digital pre-distortion circuit may further include a buffer, wherein the buffer is configured to store the first input signal and the second output signal, and then input the first input signal and the second output signal into the pre-processing module.

[0126] In an embodiment of the present application, the digital pre-distortion circuit may further include a pre-processing module and a solution module. When the coefficients in the coefficient module cannot guarantee the performance of the DPD module, the coefficients in the coefficient module may be updated in real time to adapt to the input signal, thereby ensuring that the output signal of the PA is not distorted.

[0127] The digital predistortion circuit provided in the embodiment of the present application is described above. The digital predistortion method provided in the embodiment of the present application will be described below. FIG11 is a schematic flow chart of a digital predistortion method 1100 provided in the embodiment of the present application. The method is applied to a transmitting device or a transmitting device including a transmitting device. The transmitting device includes a DPD processing module, a PA, and a memory. The memory stores a LUT and an index table of DPD. As shown in FIG11, the method 1100 includes:

[0128] S1110 , obtaining a first feature of a first input signal and a second feature of the first input signal.

[0129] Specifically, the transmitting device can obtain a first input signal, which can be an LTE signal, a 5G signal, a continuous wave signal, etc., so as to obtain a first feature of the first input signal and a second feature of the first input signal.

[0130] S1120, determine a first coefficient according to a first feature of the first input signal, and determine a second coefficient according to a second feature.

[0131] Specifically, the transmitting device may determine the first coefficient according to the first feature of the first input signal and determine the second coefficient according to the second feature.

[0132] S1130 , generating a second signal according to the first input signal and the first coefficient.

[0133] Specifically, the transmitting device may generate the second signal according to the first input signal and the first coefficient.

[0134] S1140 , generate a first output signal according to the second signal and the second coefficient.

[0135] Specifically, the transmitting device may generate a first output signal according to the second signal and the second coefficient.

[0136] S1150: Perform power amplification processing on the first output signal to generate a second output signal.

[0137] Specifically, the transmitting device may process the first output signal through a power amplifier to generate a second output signal.

[0138] It should be understood that the description of S1110-S1150 can be found above, and for the sake of brevity, it will not be repeated here.

[0139] In an embodiment of the present application, the transmitting device can determine the first coefficient and the second coefficient based on the first characteristic and the second characteristic of the first input signal, and use the first coefficient and the second coefficient to perform digital pre-distortion processing on the first input signal, and then input the first output signal after digital pre-distortion processing into the power amplifier, so as to obtain a linear non-distorted second output signal.

[0140] FIG12 is a schematic flowchart of a digital predistortion method according to an embodiment of the present application. As shown in FIG12 , S1120 determines a first coefficient and a second coefficient based on a first feature and a second feature of a first input signal, including:

[0141] S1121 : Determine N first sub-coefficients and N second sub-coefficients according to the first feature and the second feature of the first input signal.

[0142] Specifically, the transmitting device may determine N first sub-coefficients and N second sub-coefficients according to the first feature and the second feature of the first input signal.

[0143] S1130, generating a second signal according to the first input signal and the first coefficient, including:

[0144] S1131 : Generate N second sub-signals according to the first input signal and N first sub-coefficients.

[0145] Specifically, the transmitting device may generate N second sub-signals according to the first input signal and N first sub-coefficients.

[0146] S1140, generating a first output signal according to the second signal and the second coefficient, including:

[0147] S1141, generating N first output sub-signals according to the N second sub-signals and the N second sub-coefficients;

[0148] S1142: Generate a first output signal according to the N first output sub-signals.

[0149] Specifically, the transmitting device may generate N first output sub-signals according to the N second sub-signals and the N second coefficients, and then sum the N first output sub-signals to obtain the first output signal.

[0150] It should be understood that the detailed description of S1121, S1131, S1141 and S1142 can be found above, and for the sake of brevity, they will not be repeated here.

[0151] Optionally, in some embodiments, when the second feature of the first input signal includes M second features, method 1100 further includes:

[0152] M second sub-coefficients are determined according to the M second features of the first input signal.

[0153] S1120, determining a second coefficient according to a second feature of the first input signal, including:

[0154] A second coefficient is determined based on the M second sub-coefficients.

[0155] Specifically, after the transmitting device determines M second sub-coefficients, the second coefficient may be determined according to the M sub-coefficients.

[0156] Exemplarily, the M second sub-coefficients may be multiplied to obtain the second coefficient.

[0157] FIG13 is a schematic flowchart of a digital predistortion method according to an embodiment of the present application. As shown in FIG13 , when the adjacent channel leakage ratio of the first input signal and the second output signal exceeds a first threshold and / or the error vector magnitude exceeds a second threshold, the method 1100 further includes:

[0158] S1160 , preprocess the first input signal and the second output signal to align the first input signal and the second output signal.

[0159] S1170, processing the preprocessed first input signal and the preprocessed second output signal to generate a third coefficient and a fourth coefficient;

[0160] S1180 , generate a third signal according to the first input signal and a third coefficient.

[0161] S1190 , generate a third output signal according to the third signal and the fourth coefficient.

[0162] S11100: Process the third output signal using a power amplifier to generate a fourth output signal. In this embodiment of the present application, when the ACLR of the first input signal and the second output signal exceeds a first threshold and / or the EVM exceeds a second threshold, the digital pre-distortion circuit can recalculate new coefficients based on the first input signal and the second output signal, so that the digital pre-distortion circuit can generate a third output signal based on the third coefficient and the fourth coefficient. The third output signal is then input into the power amplifier, thereby obtaining a distortion-free fourth output signal.

[0163] FIG14 shows a transmitting device 1400 provided in an embodiment of the present application. The transmitting device 1400 is applied to a sending device. As shown in FIG14 , the transmitting device 1400 includes a transceiver unit 1410 , a DPD unit 1420 , and a power amplification unit 1430 .

[0164] The transceiver unit 1410 is configured to receive a first input signal.

[0165] The DPD unit 1420 is configured to obtain a first feature of the first input signal and a second feature of the first input signal.

[0166] The DPD unit 1420 is configured to determine a first coefficient according to the first feature and a second coefficient according to the second feature.

[0167] The DPD unit 1420 is further configured to generate a second signal according to the first input signal and the first coefficient.

[0168] The DPD unit 1420 is further configured to generate a first output signal according to the second signal and the second coefficient.

[0169] The DPD unit 1420 is further configured to input the first output signal to the power amplification unit 1430 .

[0170] The power amplifying unit 1430 is configured to generate a second output signal according to the first output signal.

[0171] The transceiver unit 1410 is further configured to send a second output signal.

[0172] Optionally, in some embodiments, the transmitting device further includes a coefficient unit, and the coefficient unit stores a LUT and an index table.

[0173] The DPD unit 1420 is specifically configured to extract a first coefficient from the coefficient unit according to the first feature and extract a second coefficient from the coefficient unit according to the second feature.

[0174] Optionally, in some embodiments, the DPD unit 1420 is specifically configured to:

[0175] Determine N first sub-coefficients according to a first characteristic of the first input signal and determine N second sub-coefficients according to a second characteristic;

[0176] N second sub-signals are generated according to the first input signal and the N first coefficients.

[0177] N first output sub-signals are generated according to the N second sub-signals and the N second sub-coefficients.

[0178] A first output signal is generated according to the N first output sub-signals.

[0179] Optionally, in some embodiments, the second feature includes M second sub-features, and the DPD unit 1420 is specifically configured to:

[0180] Determine M second sub-coefficients according to the M second sub-features of the first input signal, where M is ≥ 1 and is an integer;

[0181] The second coefficient is determined according to the M second sub-coefficients.

[0182] Optionally, in some embodiments, the transmitting device 1400 further includes a preprocessing unit and a solving unit, wherein the solving unit may be pre-set with an algorithm for solving coefficients, wherein the first input signal and the second output signal are input into the preprocessing unit, and when the adjacent channel leakage ratio of the first input signal and the second output signal exceeds a first threshold or the error vector amplitude exceeds a second threshold, the preprocessing unit is used to preprocess the first input signal and the second output signal to align the first input signal and the second output signal.

[0183] The preprocessing unit is further configured to input the preprocessed first input signal and the preprocessed second output signal into the solving unit.

[0184] The solving unit is used to process the preprocessed first input signal and the preprocessed second output signal according to an algorithm to generate a third coefficient and a fourth coefficient.

[0185] Optionally, the solving unit is further used to input the third coefficient and the fourth coefficient into the coefficient unit.

[0186] The DPD unit 1420 is further configured to generate a third signal according to the first input signal and the third coefficient.

[0187] The DPD unit 1420 is further configured to generate a third output signal according to the third signal and a fourth coefficient.

[0188] The DPD unit 1420 is further configured to input the third output signal to the power amplification unit 1430 .

[0189] The power amplifying unit 1430 is further configured to generate a fourth output signal according to the third output signal.

[0190] The transceiver unit 1410 is further configured to send a fourth output signal.

[0191] As shown in FIG15 , an embodiment of the present application further provides a communication device (e.g., a transmitting device) 1500. The communication device 1500 includes a processor 1510, which is coupled to a memory 1520. The memory 1520 is configured to store computer programs, instructions, and / or data. The processor 1510 is configured to execute the computer programs, instructions, and / or data stored in the memory 1520, so that the method in the above method embodiment is executed.

[0192] Optionally, the communication device 1500 includes one or more processors 1510.

[0193] Optionally, the communication device 1500 may include one or more memories 1520 .

[0194] Optionally, the memory 1520 may be integrated with the processor 1510 or provided separately.

[0195] 15 , the wireless communication device 1500 may further include a transceiver 1530 , which is configured to receive and / or transmit signals. For example, the processor 1510 is configured to control the transceiver 1530 to receive and / or transmit signals.

[0196] As a solution, the communication device 1500 is used to implement the operations performed by each unit in the transmitting device in the above method embodiment.

[0197] An embodiment of the present application also provides a computer-readable storage medium on which computer instructions for implementing the method executed by the transmitting device in the above method embodiment, or the method executed by the transmitting device, are stored.

[0198] An embodiment of the present application further provides a computer program product. When the computer program is executed by a computer, the computer can implement the method performed by the transmitting device in the above method embodiment.

[0199] An embodiment of the present application further provides a communication system, which includes the communication device in the above embodiment.

[0200] The explanation and beneficial effects of the relevant contents in any of the wireless communication devices provided above may refer to the corresponding method embodiments provided above, and will not be repeated here.

[0201] In an embodiment of the present application, a communication device may include a hardware layer, an operating system layer running on the hardware layer, and an application layer running on the operating system layer. The hardware layer may include hardware such as a central processing unit (CPU), a memory management unit (MMU), and memory (also known as main memory). The operating system of the operating system layer may be any one or more computer operating systems that implement service processing through processes, such as a Linux operating system, a Unix operating system, an Android operating system, an iOS operating system, or a Windows operating system. The application layer may include applications such as a browser, an address book, a word processing software, and an instant messaging software.

[0202] The embodiments of the present application do not particularly limit the specific structure of the execution subject of the method provided in the embodiments of the present application; as long as it is capable of communicating according to the method provided in the embodiments of the present application by running a program that records the code of the method provided in the embodiments of the present application, it is sufficient. For example, the execution subject of the method provided in the embodiments of the present application may be a terminal device or a satellite, or a functional module in the terminal device or satellite that is capable of calling and executing the program.

[0203] Various aspects or features of the embodiments of the present application may be implemented as methods, apparatus, or articles of manufacture using standard programming and / or engineering techniques. As used herein, the term "article of manufacture" may encompass a computer program accessible from any computer-readable device, carrier, or medium. For example, a computer-readable medium may include, but is not limited to, magnetic storage devices (e.g., hard disks, floppy disks, or magnetic tapes), optical disks (e.g., compact discs (CDs), digital versatile discs (DVDs), etc.), smart cards, and flash memory devices (e.g., erasable programmable read-only memories (EPROMs), cards, sticks, or key drives, etc.).

[0204] The various storage media described herein may represent one or more devices and / or other machine-readable media for storing information. The term "machine-readable medium" may include, but is not limited to, wireless channels and various other media capable of storing, containing, and / or carrying instructions and / or data.

[0205] It should be understood that the processor mentioned in the embodiments of the present application may be a central processing unit (CPU), or may be other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field programmable gate arrays (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or any conventional processor, etc.

[0206] It should also be understood that the memory mentioned in the embodiments of the present application may be a volatile memory or a non-volatile memory, or may include both volatile and non-volatile memories. Among them, the non-volatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory may be a random access memory (RAM). For example, RAM can be used as an external cache. By way of example and not limitation, RAM may include the following forms: static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous link dynamic random access memory (SLDRAM), and direct rambus RAM (DR RAM).

[0207] It should be noted that when the processor is a general-purpose processor, DSP, ASIC, FPGA or other programmable logic device, discrete gate or transistor logic device, discrete hardware component, the memory (storage module) can be integrated into the processor.

[0208] It should also be noted that the memory described herein is intended to comprise, but not be limited to, these and any other suitable types of memory.

[0209] Those skilled in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the embodiments of this application.

[0210] Those skilled in the art will clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0211] In the several embodiments provided in the embodiments of the present application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are merely schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0212] The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of these units may be selected to achieve the purpose of this embodiment according to actual needs.

[0213] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0214] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the embodiment of the present application, or the part that contributes to the prior art or the part of the technical solution, can be embodied in the form of a software product, which is stored in a storage medium and includes a number of instructions for enabling a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.

[0215] The above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in the embodiments of the present application should be included in the scope of protection of the present application. Therefore, the scope of protection of the present application should be based on the scope of protection of the claims.

Claims

1. A digital predistortion circuit, characterized in that: The digital predistortion circuit includes: a digital predistortion module and a power amplifier, wherein: The digital pre-distortion module is configured to obtain a first characteristic of a first input signal and a second characteristic of the first input signal, wherein the first characteristic of the first input signal includes at least one of the following: an amplitude of the first input signal, an in-phase component of the first input signal, and a quadrature component of the first input signal; and the second characteristic includes at least one of the following: a bandwidth of the first input signal, a temperature of the digital pre-distortion circuit when processing the first input signal, a frequency of the first input signal, a modulation format of the first input signal, and a standing wave generated by the digital pre-distortion circuit when processing the first input signal; and is configured to determine a first coefficient based on the first characteristic, determine a second coefficient based on the second characteristic, generate a second signal based on the first input signal and the first coefficient, generate a first output signal based on the second signal and the second coefficient, and input the first output signal into the power amplifier; The power amplifier is used to amplify the first output signal to generate a second output signal.

2. The digital predistortion circuit according to claim 1, wherein: The digital pre-distortion circuit also includes a coefficient module, which stores a correspondence between the first feature and the first coefficient and a correspondence between the second feature and the second coefficient. The digital pre-distortion module is specifically configured to extract the first coefficient from the coefficient module according to the first feature and to extract the second coefficient from the coefficient module according to the second feature.

3. The digital predistortion circuit according to claim 1 or 2, characterized in that: The digital predistortion module includes N digital predistortion submodules and a synthesis module, wherein the N digital predistortion submodules are configured to determine N first subcoefficients according to the first feature and determine N second subcoefficients according to the second feature, where N is an integer and is greater than or equal to 1, and the N first subcoefficients are different. generating N second sub-signals according to the first input signal and the N first sub-coefficients; generating N first output sub-signals according to the N second sub-signals and the N second sub-coefficients; The synthesis module is configured to generate the first output signal according to the N first output sub-signals.

4. The digital predistortion circuit according to any one of claims 1 to 3, characterized in that: The digital predistortion circuit further includes a preprocessing module and a solving module, wherein the solving module is pre-installed with an algorithm for solving coefficients, wherein the first input signal and the second output signal are input into the preprocessing module, and when the adjacent channel leakage ratio of the first input signal and the second output signal exceeds a first threshold and / or the error vector magnitude exceeds a second threshold, the preprocessing module is configured to preprocess the first input signal and the second output signal to align the first input signal and the second output signal; Inputting the preprocessed first input signal and the preprocessed second output signal into a solving module; The solving module is used to process the preprocessed first input signal and the preprocessed second output signal according to the algorithm to generate a third coefficient and a fourth coefficient; The digital predistortion module is further configured to generate a third signal according to the first input signal and the third coefficient; generating a third output signal according to the third signal and the fourth coefficient; inputting the third output signal into the power amplifier; The power amplifier is used to amplify the third output signal.

5. The digital predistortion circuit according to any one of claims 1 to 4, characterized in that: The digital predistortion circuit further includes a digital-to-analog converter, wherein The digital-to-analog converter is used to obtain the first output signal from the digital predistortion circuit, perform digital-to-analog conversion on the first output signal, and input the first output signal after the digital-to-analog conversion into the power amplifier.

6. A digital predistortion method, characterized in that: The method comprises: Obtaining a first characteristic of a first input signal and a second characteristic of the first input signal, wherein the first characteristic of the first input signal includes at least one of the following: an amplitude of the first input signal, an in-phase component of the first input signal, and a quadrature component of the first input signal, and the second characteristic includes at least one of the following: a bandwidth of the first input signal, a temperature of the digital predistortion circuit when processing the first input signal, a frequency of the first input signal, a modulation format of the first input signal, and a standing wave generated by the digital predistortion circuit when processing the first input signal; determining a first coefficient according to the first feature, and determining a second coefficient according to the second feature; generating a second signal according to the first input signal and the first coefficient; generating a first output signal according to the second signal and the second coefficient; The first output signal is power amplified to generate a second output signal.

7. The method according to claim 6, characterized in that The determining of the first coefficient according to the first feature of the first input signal and the determining of the second coefficient according to the second feature include: determining N first sub-coefficients according to the first feature, and determining N second sub-coefficients according to the second feature, wherein the N first sub-coefficients are different; Generating a second signal according to the first input signal and the first coefficient includes: generating N second sub-signals according to the first input signal and the N first sub-coefficients; Generating a first output signal according to the second signal and the second coefficient includes: generating N first output sub-signals according to the N second sub-signals and the N second sub-coefficients; A first output signal is generated according to the N first output sub-signals.

8. The method according to claim 6 or 7, characterized in that When an adjacent channel leakage ratio of the first input signal and the second output signal exceeds a first threshold and / or an error vector magnitude exceeds a second threshold, the method further includes: preprocessing the first input signal and the second output signal to align the first input signal and the second output signal; Processing the preprocessed first input signal and the preprocessed second output signal to generate a third coefficient and a fourth coefficient; generating a third signal according to the first input signal and the third coefficient; generating a third output signal according to the third signal and the fourth coefficient; The third output signal is power amplified to generate a fourth output signal.

9. A launching device, characterized in that: The transmitting device includes a transceiver unit, a digital predistortion unit, and a power amplification unit, wherein: The transceiver unit is configured to receive a first input signal; The digital pre-distortion unit is configured to obtain a first characteristic of the first input signal and a second characteristic of the first input signal, wherein the first characteristic of the first input signal includes at least one of the following: an amplitude of the first input signal, an in-phase component of the first input signal, and a quadrature component of the first input signal; and the second characteristic includes at least one of the following: a bandwidth of the first input signal, a temperature of the digital pre-distortion circuit when processing the first input signal, a frequency of the first input signal, a modulation format of the first input signal, and a standing wave generated by the digital pre-distortion circuit when processing the first input signal; determining a first coefficient according to the first feature, and determining a second coefficient according to the second feature; generating a second signal according to the first input signal and the first coefficient; generating a first output signal according to the second signal and the second coefficient; inputting the first output signal into the power amplification unit; The power amplifying unit is configured to amplify the first output signal to generate a second output signal; The transceiver unit is also used for the second output signal.

10. The launching device according to claim 9, characterized in that The transmitting device further includes a coefficient unit, wherein the coefficient unit stores a correspondence between the first feature and the first coefficient and a correspondence between the second feature and the second coefficient; The digital predistortion unit is specifically configured to extract the first coefficient from the coefficient unit according to the first feature and extract the second coefficient from the coefficient unit according to the second feature.

11. The launching device according to claim 9 or 10, characterized in that: The digital preprocessing unit is specifically used for: determining N first sub-coefficients according to the first feature and determining N second sub-coefficients according to the second feature, the N first sub-coefficients being different; generating N second sub-signals according to the first input signal and the N first coefficients; generating N first output sub-signals according to the N second sub-signals and the N second sub-coefficients; The first output signal is generated according to the N first output sub-signals.

12. The transmitting device according to any one of claims 9 to 11, characterized in that The transmitting device further includes a preprocessing unit and a solving unit, wherein the solving unit is pre-installed with an algorithm for solving coefficients, wherein the first input signal and the second output signal are input into the preprocessing unit, and when the adjacent channel leakage ratio of the first input signal and the second output signal exceeds a first threshold or the error vector magnitude exceeds a second threshold, the preprocessing unit is configured to preprocess the first input signal and the second output signal to align the first input signal and the second output signal; The preprocessing unit is further configured to input the preprocessed first input signal and the preprocessed second output signal into the solving unit; The solving unit is configured to process the preprocessed first input signal and the preprocessed second output signal according to the algorithm to generate a third coefficient and a fourth coefficient; The digital predistortion unit is further configured to generate a third signal according to the first input signal and the third coefficient; generating a third output signal according to the third signal and the fourth coefficient; inputting the third output signal into the power amplification unit; The power amplifying unit is further configured to amplify the third output signal; The transceiver unit is further configured to send the amplified third output signal.

13. A transmitting device, characterized in that: The transmitting device includes the digital predistortion circuit according to any one of claims 1 to 5, or the transmitting device includes the transmitting apparatus according to any one of claims 9 to 12.

14. A transmitting device, characterized in that: The device comprises one or more processors; one or more memories; one or more transceivers; the one or more memories storing one or more computer programs, the one or more computer programs comprising instructions, which, when executed by the one or more processors, cause the method according to any one of claims 6 to 8 to be executed.

15. A computer-readable storage medium, characterized in that A computer program or instructions is stored, wherein the computer program or instructions are used to implement the method according to any one of claims 6 to 8. 16 . A computer program product comprising a computer program, which, when executed, causes a computer to perform the method according to claim 6 .

17. A chip, characterized in that: The chip includes a processor and a communication interface, wherein the communication interface is configured to receive a signal and transmit the signal to the processor, and the processor processes the signal so that the method according to any one of claims 6 to 8 is executed.

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