Quantum circuit parameter optimization method and system, electronic device and storage medium

Abstract

The present application provides a parameter optimization method and system for a quantum circuit, an electronic device, and a storage medium, and relates to the technical field of quantum computing. The parameter optimization method includes: optimizing the quantum circuit parameters by a preset optimization method based on a first preset parameter of a single-bit gate to obtain a first optimization parameter; optimizing the quantum circuit parameters by a preset optimization method based on a second preset parameter of the single-bit gate to obtain a second optimization parameter; determining an Nth preset parameter of the single-bit gate based on the first optimization parameter and the second optimization parameter; wherein the Nth preset parameter is related to the Nth optimization parameter corresponding to the Nth preset parameter and the Nth optimization parameter corresponding to the Nth preset parameter, and N is a positive integer greater than or equal to 3; optimizing the quantum circuit parameters by a preset optimization method based on the Nth preset parameter of the single-bit gate to obtain a target optimization parameter.

Description

Technical Field

[0001] The present application relates to the technical field of quantum computing, and in particular to a parameter optimization method and system for quantum circuits, an electronic device, and a storage medium. Background Art

[0002] Quantum computing is a new computing model based on the principles of quantum mechanics that uses quantum bits (qubits) to process information and perform calculations. Unlike traditional binary classical computers, quantum computers are able to achieve extraordinary parallel computing capabilities and enormous information capacity through phenomena such as quantum superposition and quantum entanglement.

[0003] Quantum circuits are the core component of quantum computing. Quantum circuits operate on quantum bits through quantum logic gates and can implement various quantum algorithms.

[0004] Hardware-Efficient Ansatz (HEA) is a superconducting quantum circuit commonly used in quantum computing to optimize parameterized circuit design. When solving problems, HEA can improve hardware computational efficiency by reducing the overhead of optimizing the parameters of single-bit gates.

[0005] The inventors of this application discovered that the optimization process of single-bit gate parameter optimization is the main time-consuming part of quantum circuit measurement. If the initial parameters of the single-bit gate can be optimized, the number of iterations of the initial parameters can be reduced to reduce the number of measurements of the quantum circuit, thereby reducing the overall time consumption of quantum computing and improving the computational efficiency of quantum computing. Summary of the Invention

[0006] According to one aspect of the present application, the present application provides a parameter optimization method for a quantum circuit, including: optimizing the quantum circuit parameters through a preset optimization method based on a first preset parameter of a single-bit gate to obtain a first optimized parameter; optimizing the quantum circuit parameters through a preset optimization method based on a second preset parameter of the single-bit gate to obtain a second optimized parameter; determining an Nth preset parameter of the single-bit gate based on the first optimization parameter and the second optimization parameter; wherein the Nth preset parameter is related to the N-1th optimization parameter corresponding to the N-1th preset parameter and the N-2th optimization parameter corresponding to the N-2th preset parameter, and N is a positive integer greater than or equal to 3; optimizing the quantum circuit parameters through a preset optimization method based on the Nth preset parameter of the single-bit gate to obtain a target optimized parameter.

[0007] According to some embodiments of the present application, determining the Nth preset parameter of the single-bit gate based on the first optimization parameter and the second optimization parameter includes: when N is less than or equal to 4, the calculation formula of the Nth preset parameter is: N =-2*Pscf,N-1 -P scf,N-2 Among them, P N is the Nth preset parameter, P scf,N-1 For the N-1th optimization parameter, P scf,N-2 Optimize parameters for the N-2th step.

[0008] According to some embodiments of the present application, determining the Nth preset parameter of the single-bit gate based on the first optimization parameter and the second optimization parameter includes: when N is greater than 4, the calculation formula of the Nth preset parameter is: P N =P N-1 -P N-2 +P scf,N-1 Among them, P N-1 is the N-1th preset parameter, P N-2 Preset parameters for the N-2th time.

[0009] According to some embodiments of the present application, the preset optimization method is to optimize quantum circuit parameters using a constrained optimization algorithm.

[0010] According to another aspect of the present application, the present application provides a parameter optimization system for a quantum circuit, comprising a parameter optimization module and a parameter configuration module. The parameter optimization module optimizes the quantum circuit parameters based on a first preset parameter of a single-bit gate through a preset optimization method to obtain a first optimization parameter, and optimizes the quantum circuit parameters based on a second preset parameter of the single-bit gate through a preset optimization method to obtain a second optimization parameter; the parameter configuration module determines an Nth preset parameter of the single-bit gate based on the first optimization parameter and the second optimization parameter; wherein the Nth preset parameter is related to the N-1th optimization parameter corresponding to the N-1th preset parameter and the N-2th optimization parameter corresponding to the N-2th preset parameter, where N is a positive integer greater than or equal to 3; the parameter optimization module optimizes the quantum circuit parameters based on the Nth preset parameter of the single-bit gate through a preset optimization method to obtain a target optimization parameter.

[0011] According to some embodiments of the present application, when N is less than or equal to 4, the parameter configuration module determines the Nth preset parameter according to the following formula: N =-2*P scf,N-1 -P scf,N-2 Among them, P N is the Nth preset parameter, P scf,N-1 For the N-1th optimization parameter, P scf,N-2 Optimize parameters for the N-2th step.

[0012] According to some embodiments of the present application, when N is greater than 4, the parameter configuration module determines the Nth preset parameter according to the following formula: N =P N-1 -P N-2 +P scf,N-1Among them, P N-1 is the N-1th preset parameter, P N-2 Preset parameters for the N-2th time.

[0013] According to some embodiments of the present application, the preset optimization method is to optimize quantum circuit parameters using a constrained optimization algorithm.

[0014] According to another aspect of the present application, an electronic device is provided. The electronic device includes: one or more processors; and a storage device for storing one or more programs, which, when executed by the one or more processors, enables the one or more processors to implement the parameter optimization method described above.

[0015] According to another aspect of the present application, a non-volatile computer-readable storage medium is provided, wherein a computer program is stored on the storage medium, and when the computer program is executed by a processor, the parameter optimization method described above can be implemented.

[0016] The present application obtains a first optimization parameter by setting a first preset parameter, obtains a second optimization parameter by setting a second preset parameter, and obtains an Nth preset parameter based on the first optimization parameter and the second optimization parameter. The present application can quickly optimize the initial parameters of the quantum circuit by calculating the correlation between the N-1th optimization parameter and the N-2th optimization parameter and the Nth preset parameter, obtaining initial parameters that are closer to the ideal value. This allows the quantum circuit to quickly obtain the optimal parameters based on fewer iterations, reduces the time consumed in quantum circuit parameter iteration, and significantly improves the computational efficiency of the quantum circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0018] Figure 1 A flow chart showing a parameter optimization method according to an embodiment of the present application;

[0019] Figure 2 A schematic diagram showing a parameter optimization method according to an embodiment of the present application;

[0020] Figure 3 A schematic diagram showing a comparison of parameter optimization in an embodiment of the present application is shown;

[0021] Figure 4 A schematic diagram showing a comparison of the number of line iterations in an embodiment of the present application is shown;

[0022] Figure 5 A schematic structural diagram of a parameter optimization system according to an embodiment of the present application is shown.

[0023] Description of reference numerals:

[0024] Parameter optimization system 1; parameter optimization module 10; parameter configuration module 20. DETAILED DESCRIPTION

[0025] Example embodiments will now be described more fully with reference to the accompanying drawings. However, example embodiments can be embodied in many forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete and will fully convey the concepts of the example embodiments to those skilled in the art. Like reference numerals in the drawings represent like or similar parts, and thus repetitive description thereof will be omitted.

[0026] The described features, structures or characteristics may be combined in any suitable manner in one or more embodiments. In the following description, many specific details are provided to provide a full understanding of the embodiments of the present disclosure. However, those skilled in the art will appreciate that the technical solutions of the present disclosure may be practiced without one or more of these specific details, or other methods, components, materials, devices, etc. may be employed. In these cases, well-known structures, methods, devices, implementations, materials or operations will not be shown or described in detail.

[0027] Furthermore, the terms "include," "comprise," and "have," and any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, product, or apparatus comprising a series of steps or elements is not limited to the listed steps or elements, but may optionally include steps or elements not listed, or may optionally include other steps or elements inherent to the process, method, product, or apparatus.

[0028] The terms "first", "second" and the like in the specification, claims and drawings of this application are used to distinguish different objects rather than to describe a specific order.

[0029] The following is a clear and complete description of the technical solution of this application in conjunction with the drawings in the embodiments of this application. Obviously, the embodiments described are part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without making any creative efforts are within the scope of protection of this application.

[0030] According to one aspect of the present application, the present application provides a method for optimizing parameters of a quantum circuit. Figure 1 Flowchart showing the parameter optimization method of the embodiment of the present application. Figure 1As shown, the parameter optimization method may include steps S100-S400.

[0031] Exemplarily, the parameter optimization method may be executed by a parameter optimization system for a quantum circuit.

[0032] According to example embodiments, the quantum circuit described in this application may be a superconducting quantum circuit, such as a hardware-efficient simulated circuit. The following description uses the hardware-efficient simulated circuit as an example.

[0033] In step S100, the parameter optimization system optimizes the quantum circuit parameters based on the first preset parameters of the single-bit gate by a preset optimization method to obtain first optimized parameters.

[0034] For example, the parameter optimization system responds to the user's setting instruction, sets the first preset parameter P1 of the single-bit gate, and uses microwave devices to make the phase modulation of the single-bit gate in the hardware efficient simulated circuit be -2*P1. Then the parameter optimization system iterates the parameters in the hardware efficient simulated circuit through the preset optimization method to obtain the first optimized parameter P scf，1 .

[0035] Exemplarily, the microwave device may be an electronic device operating in the microwave frequency band (frequency range of 300 MHz to 300 GHz). For example, the microwave device may include an arbitrary waveform generator (AWG), an IQ (In-phase / Quadrature) mixer, a filter and a synthesizer, etc., which are not limited in the present application.

[0036] Optionally, the preset optimization method is to optimize the quantum circuit parameters using a constrained optimization algorithm.

[0037] For example, the constrained optimization algorithm is the COBYLA (Constrained Optimization by Linear Approximation) algorithm. COBYLA is an algorithm for solving constrained nonlinear optimization problems. The COBYLA algorithm gradually approaches the optimal solution by constructing linear approximations of the objective function and constraints. It performs linear interpolation at N+1 points to form approximations of the objective function and constraints, and then optimizes these approximations within a trust region.

[0038] For example, the preset optimization method may also adopt SPSA (Simultaneous Perturbation Stochastic Approximation, synchronous perturbation stochastic approximation algorithm) or SLSQP (Sequential Least Squares Programming, an algorithm for solving nonlinear constrained optimization problems), and this application does not impose any restrictions on this.

[0039] In step S200, the parameter optimization system optimizes the quantum circuit parameters based on the second preset parameters of the single-bit gate by a preset optimization method to obtain second optimized parameters.

[0040] For example, the parameter optimization system responds to the user's setting instruction, sets the second preset parameter P2 of the single-bit gate, and uses microwave devices to make the phase modulation of the single-bit gate in the hardware efficient simulated circuit be -2*P2. ​​Then the parameter optimization system iterates the parameters in the hardware efficient simulated circuit through the preset optimization method to obtain the second optimized parameter P scf，2 .

[0041] In step S300, the parameter optimization system determines an Nth preset parameter of the single-bit gate based on the first optimization parameter and the second optimization parameter. The Nth preset parameter is associated with an N-1th optimization parameter corresponding to the N-1th preset parameter and an N-2th optimization parameter corresponding to the N-2th preset parameter, where N is a positive integer greater than or equal to 3.

[0042] For example, the parameter optimization system responds to the user's setting instruction and optimizes the system according to the first optimization parameter P scf，1 and the second optimization parameter P scf，2 Determine the third preset parameter P3. Then use the microwave device to make the phase modulation of the single-bit gate in the hardware efficient proposed circuit be -2*P3. Then the parameter optimization system iterates the parameters in the hardware efficient proposed circuit through the preset optimization method to obtain the third optimized parameter P scf，3 .

[0043] For another example, the parameter optimization system responds to the user's setting instruction and optimizes the system according to the second optimization parameter P scf，2 and the third optimization parameter P scf，3 The fourth preset parameter P4 is determined. Then, the microwave device is used to make the phase modulation of the single-bit gate in the hardware efficient proposed circuit be -2*P4. Then, the parameter optimization system iterates the parameters in the hardware efficient proposed circuit through the preset optimization method to obtain the third optimized parameter P scf，4 .

[0044] By analogy, the parameter optimization system optimizes the parameter P according to the N-1th scf,N-1 and the N-2th optimization parameter P scf,N-2 The Nth preset parameter P is determined N When N is large enough, the calculation of the Nth preset parameter is stopped. For example, the value range of N can be 10 4 -10 8 .

[0045] Figure 2 Schematic diagram showing the parameter optimization method of the embodiment of the present application. Figure 2As shown, the Nth preset parameter can be obtained through the N-1th optimization parameter and the N-2th optimization parameter.

[0046] Optionally, in step S300, when N is less than or equal to 4, the calculation formula of the Nth preset parameter is: N =-2*P scf,N-1 -P scf,N-2 .P N is the Nth preset parameter, P scf,N-1 For the N-1th optimization parameter, P scf,N-2 Optimize parameters for the N-2th step.

[0047] For example, when N=3, P3=-2*P scf,2 -P scf,1 , at this time the third optimization parameter corresponding to P3 is P scf,3 .

[0048] When N=4, P4=-2*P scf,3 -P scf,2 , at this time the fourth optimization parameter corresponding to P4 is P scf,4 .

[0049] Optionally, in step S300, when N is greater than 4, the calculation formula of the Nth preset parameter is: N =P N-1 -P N-2 +P scf,N-1 .P N-1 is the N-1th preset parameter, P N-2 Preset parameters for the N-2th time.

[0050] For example, when N=5, P5=P4-P3+P scf,4 , at this time the fifth optimization parameter corresponding to P5 is P scf,5 .

[0051] For example, when N=6, P6=P5-P4+P scf,5 , at this time the sixth optimization parameter corresponding to P6 is P scf,6 .

[0052] By analogy, the parameter optimization system determines the Nth preset parameter P N When N is large enough, the calculation of the Nth preset parameter is stopped. For example, the value range of N can be 10 4 -10 8 .

[0053] In step S400, the parameter optimization system optimizes the quantum circuit parameters based on the Nth preset parameters of the single-bit gate through a preset optimization method to obtain target optimization parameters.

[0054] For example, the parameter optimization system responds to the user's setting instruction and sets the Nth preset parameter P of the single-bit gate. N , and use microwave devices to make the hardware efficient. The phase modulation of the single-bit gate in the proposed circuit is -2*P N After that, the parameter optimization system uses the preset optimization method to make the hardware efficiently iterate the parameters in the proposed circuit to obtain the target optimization parameter P scf，N .

[0055] Figure 3 Schematic diagram showing the comparison of parameter optimization in the embodiment of the present application. Figure 3 As shown, the point domain on the black line is the ideal optimal solution parameter. Figure 3 The upper and lower points farther from the black line are the initial parameters. Figure 3 The points on the black line or very close to the black line are the initial parameters after optimization by the above parameter optimization method.

[0056] like Figure 3 It can be seen that the initial parameters optimized by the above parameter optimization method are very close to the optimal solution parameters.

[0057] Figure 4 Schematic diagram showing the comparison of the number of line iterations in the embodiment of the present application. Figure 4 As shown, the horizontal axis is the number of initial parameters (directly related to the number of layers), the vertical axis is the number of iterations of the quantum circuit, L1 is the number of iterations of the quantum circuit in the prior art, and L2 is the number of iterations of the quantum circuit after being optimized using the parameter optimization method of this application. Figure 4 It can be seen that the number of iterations of the quantum circuit after optimization by the parameter optimization method of the present application is significantly reduced. Especially in the process of increasing the number of layers (such as Figure 4 5-9 layers shown in ), the number of iterations of the quantum circuit after optimization by the parameter optimization method of the present application is reduced more significantly.

[0058] Through the above embodiment, the present application obtains a first optimization parameter by setting a first preset parameter, obtains a second optimization parameter by setting a second preset parameter, and obtains an Nth preset parameter based on the first optimization parameter and the second optimization parameter. The present application can quickly optimize the initial parameters of the quantum circuit by calculating the correlation between the N-1th optimization parameter and the N-2th optimization parameter and the Nth preset parameter, obtaining initial parameters that are closer to the ideal value. This allows the quantum circuit to quickly obtain the optimal parameters based on fewer iterations, reducing the time consumed in quantum circuit parameter iteration and significantly improving the computational efficiency of the quantum circuit.

[0059] According to another aspect of the present application, the present application provides a parameter optimization system for a quantum circuit. Figure 5A schematic structural diagram of a parameter optimization system according to an embodiment of the present application is shown.

[0060] According to an example embodiment, Figure 5 As shown, the parameter optimization system 1 may include a parameter optimization module 10 and a parameter configuration module 20 .

[0061] According to example embodiments, the quantum circuit described in this application may be a superconducting quantum circuit, such as a hardware-efficient simulated circuit. The following description uses the hardware-efficient simulated circuit as an example.

[0062] The parameter optimization module 10 optimizes the quantum circuit parameters based on the first preset parameters of the single-bit gate through a preset optimization method to obtain first optimized parameters.

[0063] For example, the parameter optimization module 10 responds to the user's setting instruction, sets the first preset parameter P1 of the single-bit gate, and uses microwave devices to make the phase modulation of the single-bit gate in the hardware efficient simulated circuit be -2*P1. Then, the parameter optimization module 10 iterates the parameters in the hardware efficient simulated circuit through the preset optimization method to obtain the first optimized parameter P scf，1 .

[0064] Exemplarily, the microwave device may be an electronic device operating in the microwave frequency band (frequency range of 300 MHz to 300 GHz). For example, the microwave device may include an arbitrary waveform generator (AWG), an IQ (In-phase / Quadrature) mixer, a filter and a synthesizer, etc., which are not limited in the present application.

[0065] Optionally, the preset optimization method is to optimize the quantum circuit parameters using a constrained optimization algorithm.

[0066] For example, the constrained optimization algorithm is the COBYLA (Constrained Optimization by Linear Approximation) algorithm. COBYLA is an algorithm for solving constrained nonlinear optimization problems. The COBYLA algorithm gradually approaches the optimal solution by constructing linear approximations of the objective function and constraints. It performs linear interpolation at N+1 points to form approximations of the objective function and constraints, and then optimizes these approximations within a trust region.

[0067] For example, the preset optimization method may also adopt SPSA (Simultaneous Perturbation Stochastic Approximation, synchronous perturbation stochastic approximation algorithm) or SLSQP (Sequential Least Squares Programming, an algorithm for solving nonlinear constrained optimization problems), and this application does not impose any restrictions on this.

[0068] According to an example embodiment, the parameter optimization module 10 optimizes the quantum circuit parameters based on the second preset parameters of the single-bit gate by a preset optimization method to obtain the second optimized parameters.

[0069] For example, the parameter optimization module 10 responds to the user's setting instruction, sets the second preset parameter P2 of the single-bit gate, and uses microwave devices to make the phase modulation of the single-bit gate in the hardware efficient simulated circuit be -2*P2. ​​Then, the parameter optimization module 10 iterates the parameters in the hardware efficient simulated circuit through the preset optimization method to obtain the second optimized parameter P scf，2 .

[0070] According to an example embodiment, the parameter configuration module 20 determines an Nth preset parameter of the single-bit gate based on the first optimization parameter and the second optimization parameter. The Nth preset parameter is associated with an N-1th optimization parameter corresponding to the N-1th preset parameter and an N-2th optimization parameter corresponding to the N-2th preset parameter, where N is a positive integer greater than or equal to 3.

[0071] For example, the parameter configuration module 20 responds to the user's setting instruction and optimizes the first parameter P scf，1 and the second optimization parameter P scf，2 The third preset parameter P3 is determined. Then the parameter optimization module 10 uses microwave devices to make the phase modulation of the single-bit gate in the hardware efficient proposed circuit be -2*P3. Then the parameter optimization module 10 iterates the parameters in the hardware efficient proposed circuit through the preset optimization method to obtain the third optimized parameter P scf，3 .

[0072] For another example, the parameter configuration module 20 responds to the user's setting instruction and optimizes the second parameter P scf，2 and the third optimization parameter P scf，3 The fourth preset parameter P4 is determined. Then the parameter optimization module 10 uses microwave devices to make the phase modulation of the single-bit gate in the hardware efficient proposed circuit be -2*P4. Then the parameter optimization module 10 iterates the parameters in the hardware efficient proposed circuit through the preset optimization method to obtain the third optimized parameter P scf，4 .

[0073] Similarly, the parameter configuration module 20 optimizes the parameter P according to the N-1th scf,N-1 and the N-2th optimization parameter P scf,N-2 The Nth preset parameter P is determined N When N is large enough, the calculation of the Nth preset parameter is stopped. For example, the value range of N can be 10 4 -10 8 .

[0074] Optionally, when N is less than or equal to 4, the parameter configuration module 20 determines the Nth preset parameter according to the following formula:

[0075] P N =-2*P scf,N-1 -P scf,N-2

[0076] Among them, P N is the Nth preset parameter, P scf,N-1 For the N-1th optimization parameter, P scf,N-2 Optimize parameters for the N-2th step.

[0077] For example, when N=3, P3=-2*P scf,2 -P scf,1 , at this time the third optimization parameter corresponding to P3 is P scf,3 .

[0078] When N=4, P4=-2*P scf,3 -P scf,2 , at this time the fourth optimization parameter corresponding to P4 is P scf,4 .

[0079] Optionally, when N is greater than 4, the parameter configuration module 20 determines the Nth preset parameter according to the following formula:

[0080] P N =P N-1 -P N-2 +P scf,N-1

[0081] Among them, P N-1 is the N-1th preset parameter, P N-2 Preset parameters for the N-2th time.

[0082] For example, when N=5, P5=P4-P3+P scf,4 , at this time the fifth optimization parameter corresponding to P5 is P scf,5 .

[0083] For example, when N=6, P6=P5-P4+P scf,5 , at this time the sixth optimization parameter corresponding to P6 is P scf,6 .

[0084] Similarly, the parameter configuration module 20 determines the Nth preset parameter P N When N is large enough, the calculation of the Nth preset parameter is stopped. For example, the value range of N can be 10 4 -10 8 .

[0085] According to an example embodiment, the parameter optimization module 10 optimizes the quantum circuit parameters based on the Nth preset parameter of the single-bit gate through a preset optimization method to obtain target optimized parameters.

[0086] For example, the parameter configuration module 20 responds to the user's setting instruction and sets the Nth preset parameter P of the single-bit gate. N , and use microwave devices to make the hardware efficient. The phase modulation of the single-bit gate in the proposed circuit is -2*P N Then the parameter optimization module 10 uses the preset optimization method to iterate the parameters in the hardware efficient proposed circuit to obtain the target optimization parameter P scf，N .

[0087] According to the exemplary embodiment, the initial parameters optimized by the above parameter optimization method are very close to the optimal solution parameters.

[0088] Through the above embodiment, the present application obtains a first optimization parameter by setting a first preset parameter, obtains a second optimization parameter by setting a second preset parameter, and obtains an Nth preset parameter based on the first optimization parameter and the second optimization parameter. The present application can quickly optimize the initial parameters of the quantum circuit by calculating the correlation between the N-1th optimization parameter and the N-2th optimization parameter and the Nth preset parameter, obtaining initial parameters that are closer to the ideal value. This allows the quantum circuit to quickly obtain the optimal parameters based on fewer iterations, reducing the time consumed in quantum circuit parameter iteration and significantly improving the computational efficiency of the quantum circuit.

[0089] According to another aspect of the present application, an electronic device is provided. The electronic device includes: one or more processors; and a storage device for storing one or more programs, which, when executed by the one or more processors, enables the one or more processors to implement the parameter optimization method described above.

[0090] According to another aspect of the present application, a non-volatile computer-readable storage medium is provided, wherein a computer program is stored on the storage medium, and when the computer program is executed by a processor, the parameter optimization method described above can be implemented.

[0091] Finally, it should be noted that the above description is merely a preferred embodiment of the present application and is not intended to limit the present application. Although the present application is described in detail with reference to the aforementioned embodiments, those skilled in the art will be able to modify the technical solutions of the aforementioned embodiments or replace some of the technical features therein with equivalents. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present application shall be included within the scope of protection of the present application.

Claims

1. A method for optimizing parameters of a quantum circuit, characterized in that: include: Optimizing the quantum circuit parameters based on the first preset parameters of the single-bit gate using a preset optimization method to obtain first optimized parameters; Optimizing the quantum circuit parameters based on the second preset parameters of the single-bit gate using a preset optimization method to obtain second optimized parameters; Determining an Nth preset parameter of the single-bit gate based on the first optimization parameter and the second optimization parameter; The Nth preset parameter is related to the N-1th optimization parameter corresponding to the N-1th preset parameter and the N-2th optimization parameter corresponding to the N-2th preset parameter, and N is a positive integer greater than or equal to 3; Optimizing the quantum circuit parameters based on the Nth preset parameter of the single-bit gate by a preset optimization method to obtain target optimized parameters; Determining the Nth preset parameter of the single-bit gate based on the first optimization parameter and the second optimization parameter includes: When N is less than or equal to 4, the calculation formula of the Nth preset parameter is: P N =-2*P scf,N-1 -P scf,N-2 Among them, P N is the Nth preset parameter, P scf,N-1 is the N-1th optimization parameter, P scf,N-2 Optimizing parameters for the N-2th step; Determining the Nth preset parameter of the single-bit gate based on the first optimization parameter and the second optimization parameter includes: When N is greater than 4, the calculation formula of the Nth preset parameter is: P N =P N-1 -P N-2 +P scf,N-1 Among them, P N-1 is the N-1th preset parameter, P N-2 The N-2th preset parameter.

2. The parameter optimization method according to claim 1, characterized in that The preset optimization method is to optimize the quantum circuit parameters using a constrained optimization algorithm.

3. A quantum circuit parameter optimization system, characterized in that: include: a parameter optimization module, which optimizes the quantum circuit parameters based on the first preset parameters of the single-bit gate using a preset optimization method to obtain a first optimized parameter, and optimizes the quantum circuit parameters based on the second preset parameters of the single-bit gate using a preset optimization method to obtain a second optimized parameter; a parameter configuration module for determining an Nth preset parameter of the single-bit gate based on the first optimization parameter and the second optimization parameter; wherein the Nth preset parameter is related to an N-1th optimization parameter corresponding to the N-1th preset parameter and an N-2th optimization parameter corresponding to the N-2th preset parameter, where N is a positive integer greater than or equal to 3; The parameter optimization module optimizes the quantum circuit parameters based on the Nth preset parameter of the single-bit gate by a preset optimization method to obtain target optimization parameters; When N is less than or equal to 4, the parameter configuration module determines the Nth preset parameter according to the following formula: P N =-2*P scf,N-1 -P scf,N-2 Among them, P N is the Nth preset parameter, P scf,N-1 is the N-1th optimization parameter, P scf,N-2 Optimizing parameters for the N-2th step; When N is greater than 4, the parameter configuration module determines the Nth preset parameter according to the following formula: P N =P N-1 -P N-2 +P scf,N-1 Among them, P N-1 is the N-1th preset parameter, P N-2 The N-2th preset parameter.

4. The parameter optimization system according to claim 3, characterized in that: The preset optimization method is to optimize the quantum circuit parameters using a constrained optimization algorithm.

5. An electronic device, characterized in that: include: one or more processors; a storage device for storing one or more programs; When the one or more programs are executed by the one or more processors, the one or more processors implement the parameter optimization method according to any one of claims 1-2.

6. A non-volatile computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the parameter optimization method according to any one of claims 1 to 2 is implemented.

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