Driving circuit
By introducing flicker prevention, pulse amplitude modulation and pulse width modulation units into the driving circuit, capacitive coupling and transistor state control, the problems of zero gray scale flicker and complexity in the prior art are solved, and uniform luminescence is achieved Effects and reduces the complexity of the drive circuit.
Patent Information
- Application Number
- CN202411559714.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2024-07-09
- Filing Date
- 2024-11-04
- Publication Date
- 2024-12-24
AI Technical Summary
The driving circuit of existing micro-light emitting diode displays has increased complexity and flickering when realizing zero-gray-scale all-black screens, and the span pressure is large, which affects the display effect.
A driving circuit including a flicker prevention unit, a pulse amplitude modulation unit and a pulse width modulation unit is designed. Through capacitive coupling and transistor state control, the light emitting diode does not flash at zero gray scale and has a gray scale. Provides a uniform luminous state, reducing the complexity of the driving circuit.
Avoiding flickering at zero grayscale conditions provides a better viewing experience, and ensuring uniformity of the LEDs when there is grayscale, reducing the complexity and cross-voltage of the drive circuit.
Smart Images
Figure CN119181330A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to a driving circuit. Background Art
[0002] The existing micro-LED display drive circuit can provide high brightness and uniform splicing display. However, this drive circuit has a large overall voltage crossover because there are four thin-film transistors in the light path, and because in order to achieve a zero grayscale black screen, an additional set of misaligned signals is required, which increases the complexity of the drive circuit and an additional set of gate drive circuits. Summary of the invention
[0003] A technical aspect of the present disclosure is a driving circuit.
[0004] According to one embodiment of the present disclosure, a driving circuit includes a flicker prevention unit, a pulse amplitude modulation unit, and a pulse width modulation unit. The flicker prevention unit has a first end and a second end, and includes a first transistor, wherein the first transistor has a first end, a second end, and a third end. The pulse amplitude modulation unit is electrically connected to the first end and the second end of the flicker prevention unit, has a first end, and includes a driving transistor, a first capacitor, and a light emitting diode, wherein the driving transistor has a first end, a second end, and a third end, the first capacitor has a first end and a second end, the second end of the first capacitor is electrically connected to the third end of the driving transistor through the first end, the first end of the first transistor is electrically connected to the first end of the first capacitor through the second end, and the second end of the first transistor is electrically connected to the second end of the first capacitor. The pulse width modulation unit is electrically connected to the first end of the pulse amplitude modulation unit, and includes a control transistor, wherein in the presence of a grayscale condition, the first transistor is in a closed state so that the current of the light emitting diode during the light emitting stage is independent of the threshold voltages of all transistors of the driving circuit, and in the light emitting stage of a zero grayscale condition, the first transistor is in an open state so that the driving transistor is in a closed state.
[0005] In one embodiment of the present disclosure, the flicker prevention unit further includes a second capacitor, a second transistor, and a third transistor. The second capacitor has a first end and a second end. The second transistor has a first end, a second end, and a first stable signal end, wherein the second end of the second transistor is electrically connected to the second end of the first capacitor through a third end. The third transistor has a first end, a second end, and a second stable signal end, wherein the first end of the third transistor is electrically connected to the second end of the first capacitor through the third end.
[0006] In one embodiment of the present disclosure, in the light emitting stage of the zero grayscale condition, the light emitting diode does not emit light.
[0007] In one embodiment of the present disclosure, in the light emitting stage with a gray scale condition, the second transistor and the third transistor are in a turned-off state.
[0008] In one embodiment of the present disclosure, the pulse amplitude modulation unit further includes a fourth transistor and a fifth transistor. The fourth transistor has a first end, a second end, and a first stable signal end, wherein the first end of the fourth transistor is electrically connected to the second end of the first capacitor. The fifth transistor has a first end, a second end, and a first light-emitting signal end, wherein the second end of the fifth transistor is electrically connected to the first end of the driving transistor, and the first end of the fifth transistor is electrically connected to the light-emitting diode.
[0009] In one embodiment of the present disclosure, in the first half of the light emitting phase with a grayscale condition, the driving transistor and the fifth transistor are turned on so that the light emitting diode emits light.
[0010] In one embodiment of the present disclosure, the pulse width modulation unit further includes a sixth transistor, a seventh transistor, an eighth transistor, a ninth transistor and a third capacitor. The sixth transistor has a first end, a second end and a third end, wherein the first end of the sixth transistor is electrically connected to the second end of the driving transistor. The seventh transistor has a first end, a second end and a first light-emitting signal end, wherein the first end of the seventh transistor is electrically connected to the third end of the sixth transistor through a fourth end, and the second end of the seventh transistor is electrically connected to the second end of the control transistor. The eighth transistor has a first end, a second end and a second stable signal end, wherein the second end of the eighth transistor is electrically connected to the first end of the control transistor through a fifth end. The ninth transistor has a first end, a second end and a first light-emitting signal end, wherein the first end of the ninth transistor is electrically connected to the first end of the control transistor through the fifth end. The third capacitor has a first end and a scan signal end, wherein the first end of the third capacitor is electrically connected to the third end of the control transistor through the sixth end.
[0011] In one embodiment of the present disclosure, in the second half of the light emitting stage with grayscale conditions, the seventh transistor and the ninth transistor are turned on so that the sixth transistor is turned off so that the light emitting diode does not emit light.
[0012] In one embodiment of the present disclosure, during the second half of the light emitting phase with a gray scale condition, the third capacitor generates capacitive coupling so that the control transistor is in an on state.
[0013] In one embodiment of the present disclosure, in the second half of the light emitting stage under the zero grayscale condition, the seventh transistor and the ninth transistor are turned on so that the sixth transistor is turned off so that the light emitting diode does not emit light.
[0014] In the above-mentioned embodiment of the present disclosure, since the capacitive coupling of the first capacitor causes the driving transistor to turn on during the light-emitting stage with grayscale conditions, the current of the light-emitting diode during the light-emitting stage is independent of the threshold voltages of all transistors of the driving circuit, and the driving transistor and the control transistor can compensate for their own threshold voltages by themselves, so that the light-emitting diode can provide a uniform light-emitting state. And since the first transistor is in the turned-on state during the light-emitting stage with zero grayscale conditions, the driving transistor is in the turned-off state, so that the light-emitting diode can be prevented from flickering when the zero grayscale full black screen is displayed without using an additional set of signals to turn off the light-emitting diode signal line in advance, thereby providing a better viewing experience. BRIEF DESCRIPTION OF THE DRAWINGS
[0015] When read together with the accompanying drawings, the aspects of the present disclosure can be best understood from the following embodiments. Note that according to standard practice in this industry, various features are not drawn to scale. In fact, the size of various features may be arbitrarily increased or reduced for clarity of discussion.
[0016] Figure 1 A circuit diagram of a driving circuit according to an embodiment of the present disclosure is shown.
[0017] Figure 2 Draw Figure 1 Voltage diagram of the driving circuit in the presence of grayscale.
[0018] Figure 3 Draw Figure 1 Current diagram of the driving circuit in the reset phase with gray scale.
[0019] Figure 4 Draw Figure 1 Voltage diagram of the driving circuit in the presence of grayscale.
[0020] Figure 5 Draw Figure 1 Current diagram of the driving circuit in the compensation stage with grayscale.
[0021] Figure 6 Draw Figure 1 Voltage diagram of the driving circuit in the presence of grayscale.
[0022] Figure 7 Draw Figure 1 Current diagram of the driving circuit in the stable stage with gray scale.
[0023] Figure 8 Draw Figure 1 Voltage diagram of the driving circuit in the presence of grayscale.
[0024] Fig. 9 Draw Figure 1Current diagram of the driving circuit in the first half of the light-emitting stage with gray scale.
[0025] Fig.10 Draw Figure 1 Voltage diagram of the driving circuit in the presence of grayscale.
[0026] Fig.11 Draw Figure 1 Current diagram of the driving circuit in the second half of the light-emitting stage in a grayscale situation.
[0027] Fig.12 Draw Figure 1 Voltage diagram of the driving circuit in the presence of grayscale.
[0028] Fig.13 Draw Figure 1 Current diagram of the driving circuit in the stable stage with gray scale.
[0029] Fig.14 Draw Figure 1 Voltage diagram of the driving circuit in the presence of grayscale.
[0030] Fig.15 Draw Figure 1 Current diagram of the driving circuit in the first half of the light-emitting stage with gray scale.
[0031] Fig.16 Draw Figure 1 Voltage diagram of the driving circuit in the presence of grayscale.
[0032] Fig.17 Draw Figure 1 Current diagram of the driving circuit in the second half of the light-emitting stage in a grayscale situation.
[0033] Fig.18 Draw Figure 1 Voltage diagram of the driving circuit in the presence of grayscale.
[0034] Fig.19 Draw Figure 1 Current diagram of the driving circuit in the off phase with gray scale.
[0035] Fig. 20 Draw Figure 1 Voltage diagram of the driving circuit in the zero grayscale case.
[0036] Fig.21 Draw Figure 1 Current diagram of the driving circuit in the reset phase of zero grayscale case.
[0037] Fig. 22 Draw Figure 1 Voltage diagram of the driving circuit in the zero grayscale case.
[0038] Fig.23 Draw Figure 1 Current diagram of the driving circuit in the compensation stage of zero grayscale case.
[0039] Fig.24 Draw Figure 1 Voltage diagram of the driving circuit in the zero grayscale case.
[0040] Fig.25 Draw Figure 1 Current diagram of the driving circuit in the stable stage of zero gray scale case.
[0041] Fig.26 Draw Figure 1 Voltage diagram of the driving circuit in the zero grayscale case.
[0042] Fig. 27 Draw Figure 1 Current diagram of the driving circuit in the first half of the light-emitting stage in the zero grayscale case.
[0043] Fig.28 Draw Figure 1 Voltage diagram of the driving circuit in the zero grayscale case.
[0044] Fig.29 Draw Figure 1 Current diagram of the driving circuit in the second half of the light-emitting stage in the zero grayscale case.
[0045] Fig.30 Draw Figure 1 Voltage diagram of the driving circuit in the zero grayscale case.
[0046] Fig.31 Draw Figure 1 Current diagram of the driving circuit in the off phase of zero grayscale case.
[0047] Fig.32 Draw Figure 1 A current versus time graph of the driving circuit.
[0048] Fig.33 Draw Figure 1 Current versus time diagram for different grayscale numbers of the driving circuit.
[0049] Fig.34 Draw Figure 1 A current versus time diagram of a driving circuit as the threshold voltage of a driving transistor changes.
[0050] Fig.35 Draw Figure 1 A current versus time graph of the driving circuit's control transistor's threshold voltage variation.
[0051] Fig.36 Draw Fig.35 A partial enlarged view of box G.
[0052] Fig.37 Draw Figure 1 Current versus time diagram for different grayscale numbers of the driving circuit.
[0053] Wherein, the reference numerals are:
[0054] 100: driving circuit
[0055] 110: Flicker prevention unit
[0056] 120: Pulse amplitude modulation unit
[0057] 130: Pulse Width Modulation Unit
[0058] 10: First End
[0059] 20: Second End
[0060] 30: First End
[0061] A: The third endpoint
[0062] B: Second endpoint
[0063] C: First endpoint
[0064] D: Fourth endpoint
[0065] E: Sixth endpoint
[0066] F: Fifth endpoint
[0067] G: Frame
[0068] C1: Second capacitor
[0069] C2: The fourth capacitor
[0070] C3: First capacitor
[0071] C4: The fifth capacitor
[0072] C5: The third capacitor
[0073] T1: Second transistor
[0074] T2: The third transistor
[0075] T3: The tenth transistor
[0076] T4: First transistor
[0077] T5: Eleventh transistor
[0078] T6: The fourth transistor
[0079] T7: 12th transistor
[0080] T8: The thirteenth transistor
[0081] T9: The sixth transistor
[0082] T10: driving transistor
[0083] T11: The fifth transistor
[0084] T12: The fourteenth transistor
[0085] T13: The fifteenth transistor
[0086] T14: The eighth transistor
[0087] T15: Control transistor
[0088] T16: The ninth transistor
[0089] T17: The sixteenth transistor
[0090] T18: The seventeenth transistor
[0091] T19: The seventh transistor
[0092] LED: Light Emitting Diode
[0093] S[n-1]: first stable signal terminal
[0094] S[n]: Second stable signal terminal
[0095] mEM1: first luminous signal terminal
[0096] mEM2: second luminous signal terminal
[0097] V SWEEP : Scan signal end
[0098] VDD,V1,V2,V3,V data ,V data2 ,VSS: voltage
[0099] e1: first end
[0100] e2: second end
[0101] e3: The third end
[0102] P1: Reset phase
[0103] P2: Compensation phase
[0104] P3: Stabilization phase
[0105] P4: First half of the time
[0106] P5: The second half
[0107] P6: Stable phase, closing phase
[0108] P7: First half of the time
[0109] P8: The second half
[0110] P9: Closing phase DETAILED DESCRIPTION
[0111] The following disclosed embodiments provide many different embodiments, or examples, for implementing the different features of the provided subject matter. Specific examples of components and arrangements are described below to simplify the present invention. Of course, these examples are only examples and are not intended to be limiting. In addition, the present invention may repeat element symbols and / or letters in each example. This repetition is for the purpose of simplicity and clarity, and does not itself specify the relationship between the various embodiments and / or configurations discussed.
[0112] Spatially relative terms such as "below", "beneath", "lower", "above", "upper", etc. may be used herein for descriptive purposes to describe the relationship of one element or feature to another element or feature as illustrated in the accompanying drawings. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation illustrated in the accompanying drawings. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein should likewise be interpreted accordingly.
[0113] Figure 1 FIG. 1 is a circuit diagram of a driving circuit 100 according to an embodiment of the present disclosure. Figure 1, the driving circuit 100 includes a flicker prevention unit 110, a pulse amplitude modulation unit 120 and a pulse width modulation unit 130. The flicker prevention unit 110 has a first end 10 and a second end 20, and includes a first transistor T4, wherein the first transistor T4 has a first end e1, a second end e2 and a third end e3. The "first end" of the element described herein is the upper end point, the "second end" is the lower end point, and the "third end" is the end point on both sides. If the element is placed horizontally, the "first end" is the left end point, the "second end" is the right end point, and the "third end" is the upper and lower end points, which are described first. The pulse amplitude modulation unit 120 is electrically connected to the first end 10 and the second end 20 of the flicker prevention unit 110, has a first end 30, and includes a driving transistor T10, a first capacitor C3 and a light emitting diode LED, wherein the driving transistor T10 has a first end e1, a second end e2 and a third end e3, the first capacitor C3 has a first end e1 and a second end e2, the second end e2 of the first capacitor C3 is electrically connected to the third end e3 of the driving transistor T10 through the first end C, the first end e1 of the first transistor T4 is electrically connected to the first end e1 of the first capacitor C3 through the second end B, and the second end e2 of the first transistor T4 is electrically connected to the second end e2 of the first capacitor C3. The pulse width modulation unit 130 is electrically connected to the first end 30 of the pulse amplitude modulation unit 120, and includes a control transistor T15, wherein in a grayscale condition, the first transistor T4 is in a closed state so that the current of the light emitting diode LED during the light emitting stage is independent of the threshold voltages of all transistors of the driving circuit 100, and in a zero grayscale condition during the light emitting stage, the first transistor T4 is in an open state so that the driving transistor T10 is in a closed state.
[0114] Since the capacitive coupling of the first capacitor C3 causes the driving transistor T10 to turn on during the light-emitting stage with grayscale conditions, the current of the light-emitting diode LED during the light-emitting stage is independent of the threshold voltages of all transistors of the driving circuit 100, and the driving transistor T10 and the control transistor T15 can compensate for their own threshold voltages, so that the light-emitting diode LED can provide a uniform light-emitting state. And since the first transistor T4 is in the on state during the light-emitting stage with zero grayscale conditions, the driving transistor T10 is in the off state, and the light-emitting diode LED can be prevented from flickering when the zero grayscale full black screen is displayed without using an additional set of signals to close the light-emitting diode LED signal line in advance, providing a better viewing experience.
[0115] Continue to refer to Figure 1The flicker prevention unit 110 further includes a second capacitor C1, a second transistor T1, and a third transistor T2. The second capacitor C1 has a first end e1 and a second end e2. The second transistor T1 has a first end e1, a second end e2, and a first stable signal end S[n-1], wherein the second end e2 of the second transistor T1 is electrically connected to the second end e2 of the second capacitor C1 through a third end A. The third transistor T2 has a first end e1, a second end e2, and a second stable signal end S[n], wherein the first end e1 of the third transistor T2 is electrically connected to the second end e2 of the second capacitor C1 through a third end A.
[0116] The pulse amplitude modulation unit 120 further includes a fourth transistor T6, a fifth transistor T11, a tenth transistor T3, an eleventh transistor T5, a twelfth transistor T7, a thirteenth transistor T8, a fourteenth transistor T12 and a fourth capacitor C2. The fourth transistor T6 has a first end e1, a second end e2 and a first stable signal end S[n-1], wherein the first end e1 of the fourth transistor T6 is electrically connected to the second end e2 of the first capacitor C3. The fifth transistor T11 has a first end e1, a second end e2 and a first light-emitting signal end mEM1, wherein the second end e2 of the fifth transistor T11 is electrically connected to the first end e1 of the driving transistor T10, and the first end e1 of the fifth transistor T11 is electrically connected to the light-emitting diode LED. The tenth transistor T3 has a first end e1, a second end e2 and a first stable signal end S[n-1], and the second end e2 of the tenth transistor T3 is electrically connected to the first end e1 of the first transistor T4. The eleventh transistor T5 has a first end e1, a second end e2 and a second stable signal end S[n], and the second end e2 of the eleventh transistor T5 is electrically connected to the first end e1 of the first capacitor C3 through the second end B. The twelfth transistor T7 has a first end e1, a second end e2 and a first light-emitting signal end mEM1, and the first end e1 of the twelfth transistor T7 is electrically connected to the first end e1 of the first capacitor C3 and the second end e2 of the eleventh transistor T5 through the second end B. The second end e2 of the twelfth transistor T7 is electrically connected to the first end e1 of the driving transistor T10 and the second end e2 of the fifth transistor T11. The thirteenth transistor T8 has a first end e1, a second end e2 and a second stable signal end S[n], and the first end e1 of the thirteenth transistor T8 is electrically connected to the third end e3 of the driving transistor T10 through the first end C. The second end e2 of the thirteenth transistor T8 is electrically connected to the second end e2 of the driving transistor T10. The fourteenth transistor T12 has a first end e1 , a second end e2 , and a second stable signal end S[n], and the first end e1 of the fourteenth transistor T12 is electrically connected to the first end e1 of the driving transistor T10 .
[0117] The pulse width modulation unit 130 further includes a sixth transistor T9, a seventh transistor T19, an eighth transistor T14, a ninth transistor T16, a fifteenth transistor T13, a sixteenth transistor T17, a seventeenth transistor T18, a third capacitor C5, and a fifth capacitor C4. The sixth transistor T9 has a first end e1, a second end e2, and a third end e3, wherein the first end e1 of the sixth transistor T9 is electrically connected to the second end e2 of the driving transistor T10. The seventh transistor T19 has a first end e1, a second end e2, and a first light-emitting signal end mEM1, wherein the first end e1 of the seventh transistor T19 is electrically connected to the third end e3 of the sixth transistor T9 through a fourth end D, and the second end e2 of the seventh transistor T19 is electrically connected to the second end e2 of the control transistor T15. The eighth transistor T14 has a first end e1, a second end e2, and a second stable signal end S[n], wherein the second end e2 of the eighth transistor T14 is electrically connected to the first end e1 of the control transistor T15 through a fifth end F. The ninth transistor T16 has a first terminal e1, a second terminal e2 and a first light emitting signal terminal mEM1, wherein the first terminal e1 of the ninth transistor T16 is electrically connected to the first terminal e1 of the control transistor T15 through a fifth terminal F. The fifteenth transistor T13 has a first terminal e1, a second terminal e2 and a second light emitting signal terminal mEM2, and the second terminal e2 of the fifteenth transistor T13 is electrically connected to the third terminal e3 of the sixth transistor T9 and the first terminal e1 of the seventh transistor T19 through a fourth terminal D. The sixteenth transistor T17 has a first terminal e1, a second terminal e2 and a second stable signal terminal S[n], and the first terminal e1 of the sixteenth transistor T17 is electrically connected to the third terminal e3 of the control transistor T15 through a sixth terminal E. The seventeenth transistor T18 has a first terminal e1, a second terminal e2 and a first stable signal terminal S[n-1], and the second terminal e2 of the seventeenth transistor T18 is electrically connected to the third terminal e3 of the control transistor T15 and the first terminal e1 of the sixteenth transistor T17 through a sixth terminal E. The third capacitor C5 has a first terminal e1 and a scanning signal terminal V SWEEP , wherein the first end e1 of the third capacitor C5 is electrically connected to the third end e3 of the control transistor T15, the first end e1 of the sixteenth transistor T17, and the second end e2 of the seventeenth transistor T18 through the sixth end E. The fifth capacitor C4 has a first end e1 and a second end e2, wherein the first end e1 of the fifth capacitor C4 is electrically connected to the third end e3 of the sixth transistor T9, the first end e1 of the seventh transistor T19, and the second end e2 of the fifteenth transistor T13 through the fourth end D.
[0118] In the following description, the operation method of the driving circuit 100 in the case of gray scale will be described.
[0119] Figure 2 Draw Figure 1A voltage diagram of the driving circuit 100 in the presence of gray scale. Figure 3 Draw Figure 1 The current diagram of the driving circuit 100 in the reset phase P1 with grayscale. Figure 2 and Figure 3 , in the reset phase P1, except for the first stable signal terminal S[n-1] which is in a low potential state, all other signals are in a high potential state, so only the second transistor T1, the fourth transistor T6, the tenth transistor T3 and the seventeenth transistor T18 have current flowing through them, and the driving transistor T10 and the control transistor T15 are in an on state. At this time, the voltage of the first terminal C is V3, the voltage of the second terminal B is V2, and the voltage of the third terminal A is V2. The voltage of the fourth terminal D is V1, the voltage of the fifth terminal F is V1, and the voltage of the sixth terminal E is V3. In addition, the above voltages comply with the following relationship:
[0120] VDD>V1>V2>V data2 >VSS>V3
[0121] Wherein VDD is the power supply voltage of the driving circuit 100, VSS is the ground voltage of the driving circuit 100, V data2 is the data voltage of the pulse amplitude modulation unit 120 of the driving circuit 100. In addition, V data is the data voltage of the pulse width modulation unit 130 of the driving circuit 100. In the whole grayscale process, the first transistor T4 will be completely turned off, so it will not affect the compensation of the driving transistor T10, and will not cause a voltage drop in the power supply voltage LED. Here and below, the so-called "compensation" means that during the light-emitting process of the light-emitting diode LED, its light-emitting current and the threshold voltage (V TH ) is irrelevant, so it is better to explain it first.
[0122] Figure 4 Draw Figure 1 A voltage diagram of the driving circuit 100 in the presence of gray scale. Figure 5 Draw Figure 1 The current diagram of the driving circuit 100 in the compensation phase P2 with grayscale. Figure 4 and Figure 5 In the compensation phase P2, since all signals except the second stable signal terminal S[n] are in a low potential state, the third transistor T2, the eleventh transistor T5, the thirteenth transistor T8, the driving transistor T10, the fourteenth transistor T12, the eighth transistor T14, the control transistor T15 and the sixteenth transistor T17 are turned on and current flows. At this time, the voltage of the first terminal C is V data2 -|V TH_T10|, the voltage of the second terminal B is V2, and the voltage of the third terminal A is V data The voltage of the fourth terminal D is V1, and the voltage of the fifth terminal F is V data , the voltage of the sixth terminal E is V data -|V TH_T1 |. Where |V TH_T10 | is the threshold voltage of the driving transistor T10, |V TH_T15 | is the threshold voltage of the control transistor T15.
[0123] Figure 6 Draw Figure 1 A voltage diagram of the driving circuit 100 in the presence of gray scale. Figure 7 Draw Figure 1 The current diagram of the driving circuit 100 in the stable phase P3 with grayscale. Figure 6 and Figure 7 In the stable stage P3, except for the second light emitting signal terminal mEM2 which is in a low potential state, all other signals are in a high potential state, so only the fifteenth transistor T13 is in an on state and current flows through it. And the sixth transistor T9 is in an on state. Since the first capacitor C3 and the third capacitor C5 are charged in the previous stage, the driving transistor T10 and the control transistor T15 are in an off state. At this time, the voltage of the first terminal C is V data2 -|V TH_T1 |, the voltage of the second terminal B is V2, and the voltage of the third terminal A is V data The voltage of the fourth terminal D is V3, and the voltage of the fifth terminal F is V data , the voltage of the sixth terminal E is V data -|V TH_T15 |.
[0124] Figure 8 Draw Figure 1 A voltage diagram of the driving circuit 100 in the presence of gray scale. Fig. 9 Draw Figure 1 The current diagram of the driving circuit 100 in the first half of the light-emitting phase P4 with grayscale conditions. Figure 8 and Fig. 9 In the first half of the light-emitting phase, during the time P4, since the first light-emitting signal terminal mEM1 is at a low potential and the scanning signal terminal V SWEEPThe potential of the capacitor begins to drop, so the fifth transistor T11, the sixth transistor T9, the seventh transistor T19, the ninth transistor T16 and the twelfth transistor T7 are turned on. The other transistors, for example, the second transistor T1 and the third transistor T2 are turned off. At the same time, capacitive coupling occurs between the first capacitor C3 and the third capacitor C5. Here and below, the so-called "capacitive coupling" means that when there is a DC bias source at one end of the capacitor, but the other end is not charged to directly discharge the DC bias. Let's explain it first. The capacitive coupling of the first capacitor C3 will cause the driving transistor T10 to be turned on. At this time, the voltage of the first terminal C is The voltage of the second terminal B is VDD-V LED , the voltage at the third terminal A is V data The voltage of the fourth terminal D is V3, the voltage of the fifth terminal F is V1, and the voltage of the sixth terminal E is Where ΔV sweep For scanning signal terminal V SWEEP At this time, the three transistors (fifth transistor T11, sixth transistor T9, driving transistor T10) in the light emitting diode LED signal line are all turned on, so the current will flow through the light emitting diode LED to make it emit light. LED As shown in formula 1:
[0125]
[0126] Because the light-emitting diode LED's luminous current I LED The supply voltage VDD and the threshold voltage V TH And the voltage V of the light-emitting diode LED itself LED Therefore, all transistors compensate for the voltage drop during the light-emitting phase.
[0127] Fig.10 Draw Figure 1 A voltage diagram of the driving circuit 100 in the presence of gray scale. Fig.11 Draw Figure 1 The current diagram of the driving circuit 100 in the second half of the light-emitting phase P5 with grayscale conditions. Fig.10 and Fig.11 Since the first light-emitting signal terminal mEM1 is at a low potential and the scanning signal terminal V SWEEPThe potential of the transistor T10 continues to drop, so the driving transistor T10, the control transistor T15, the seventh transistor T19, the ninth transistor T16 and the twelfth transistor T7 will be turned on. And a current will flow through the control transistor T15, the seventh transistor T19 and the ninth transistor T16, causing the sixth transistor T9 to be turned off, so that the light-emitting diode LED does not emit light at this stage. In addition, the third capacitor C5 will have capacitive coupling so that the control transistor T15 is turned on. At this time, the voltage of the first terminal C is The voltage of the second terminal B is VDD-V LED , the voltage at the third terminal A is V data The voltage of the fourth terminal D is V1, the voltage of the fifth terminal F is V1, and the voltage of the sixth terminal E is In addition, for the control transistor T15, due to:
[0128]
[0129] Where V SG_T15 To control the source and gate voltage of transistor T15, the value on the left side of the equal sign must be greater than zero in order for the control transistor T15 to operate.
[0130] ΔV sweep >V data -V1…Formula 3
[0131] From equation 3, we can know that the turn-on condition of the control transistor T15 at this stage is related to its threshold voltage The turning on of the control transistor T15 will cause the current to flow to the sixth transistor T9 to turn it off, so that the light emitting diode LED does not emit light.
[0132] Fig.12 Draw Figure 1 A voltage diagram of the driving circuit 100 in the presence of gray scale. Fig.13 Draw Figure 1 The current diagram of the driving circuit 100 in the stable phase P6 with grayscale. Fig.12 and Fig.13 In the stable stage P6, except for the second light emitting signal terminal mEM2 which is in a low potential state, all other signals are in a high potential state, so only the fifteenth transistor T13 is in an on state and current flows through it. And the sixth transistor T9 is in an on state. At this time, the voltage of the first terminal C is The voltage of the second terminal B is VDD-V LED , the voltage at the third terminal A is V data The voltage of the fourth terminal D is V3, and the voltage of the fifth terminal F is V data , the voltage of the sixth terminal E is Vdata -|V TH_T15 |.
[0133] Fig.14 Draw Figure 1 A voltage diagram of the driving circuit 100 in the presence of gray scale. Fig.15 Draw Figure 1 The current diagram of the driving circuit 100 in the first half of the light-emitting phase P7 with grayscale conditions. Fig.16 and Fig.17 This is roughly the same as the first half of the light-emitting stage P4, so it will not be repeated. The light-emitting current I of the light-emitting diode LED in this stage LED It is still independent of the threshold voltage of any transistor, and therefore each transistor (especially the driving transistor T10 ) can compensate its own threshold voltage.
[0134] Fig.16 Draw Figure 1 A voltage diagram of the driving circuit 100 in the presence of gray scale. Fig.17 Draw Figure 1 The current diagram of the driving circuit 100 in the second half of the light-emitting stage P8 with grayscale is shown. This is roughly the same as the second half of the light-emitting stage P5 described above, so it will not be repeated. At this time, the light-emitting diode LED does not emit light because the sixth transistor T9 is turned off.
[0135] Fig.18 Draw Figure 1 A voltage diagram of the driving circuit 100 in the presence of gray scale. Fig.19 Draw Figure 1 The current diagram of the driving circuit 100 in the off phase P9 with gray scale. Fig.18 and Fig.19 In the off phase P9, since all signals are at high potential, all transistors are turned off. At this time, the voltage of the first terminal C is The voltage of the second terminal B is VDD-V LED , the voltage at the third terminal A is V data The voltage of the fourth terminal D is V1, the voltage of the fifth terminal F is V1, and the voltage of the sixth terminal E is V data -|V TH_T15 |.
[0136] In the following description, the operation method of the driving circuit 100 under the zero grayscale condition will be described.
[0137] Fig. 20 Draw Figure 1 A voltage diagram of the driving circuit 100 in the zero gray scale case. Fig.21 Draw Figure 1The current diagram of the driving circuit 100 in the reset phase P1 of the zero grayscale condition. Fig. 20 and Fig.21 , in the reset phase P1, except for the first stable signal terminal S[n-1] which is in a low potential state, all other signals are in a high potential state, so only the second transistor T1, the fourth transistor T6, the tenth transistor T3 and the seventeenth transistor T18 have current flowing through them, and the driving transistor T10 and the control transistor T15 are in an on state. At this time, the voltage of the first terminal C is V3, the voltage of the second terminal B is V2, and the voltage of the third terminal A is V2. The voltage of the fourth terminal D is V1, the voltage of the fifth terminal F is V1, and the voltage of the sixth terminal E is V3. In addition, the above voltages comply with the following relationship:
[0138] VDD>V1>V2>V data2 >VSS>V3
[0139] Fig. 22 Draw Figure 1 A voltage diagram of the driving circuit 100 in the zero gray scale case. Fig.23 Draw Figure 1 The current diagram of the driving circuit 100 in the compensation phase P2 of the zero grayscale condition. Fig. 22 and Fig.23 In the compensation stage P2, since all signals except the second stable signal terminal S[n] are in a low potential state, the third transistor T2, the eleventh transistor T5, the thirteenth transistor T8, the fourteenth transistor T12, the eighth transistor T14, the control transistor T15 and the sixteenth transistor T17 are turned on and current flows through. In addition, in the case of zero grayscale, starting from the compensation stage P2, the first transistor T4 is turned on and charges the first capacitor C3, so that the voltage across the first capacitor C3 is zero. At this time, the voltage of the first terminal C is V2, the voltage of the second terminal B is V2, and the voltage of the third terminal A is V data The voltage of the fourth terminal D is V1, and the voltage of the fifth terminal F is V data , the voltage of the sixth terminal E is V data -|V TH_T1 |.
[0140] Fig.24 Draw Figure 1 A voltage diagram of the driving circuit 100 in the zero gray scale case. Fig.25 Draw Figure 1 The current diagram of the driving circuit 100 in the stable phase P3 of the zero gray scale condition. Fig.24 and Fig.25In the stable phase P3, except for the second light emitting signal terminal mEM2 which is in a low potential state, all other signals are in a high potential state, so only the fifteenth transistor T13 is in an on state and current flows through it. In addition, the first transistor T4 is still in an on state. At this time, the voltage of the first terminal C is V2, the voltage of the second terminal B is V2, and the voltage of the third terminal A is V data The voltage of the fourth terminal D is V3, and the voltage of the fifth terminal F is V data , the voltage of the sixth terminal E is V data -|V TH_T1 Moreover, the sixth transistor T9 is also in an on state because the gate bias voltage is too small (VSS>V3).
[0141] Fig.26 Draw Figure 1 A voltage diagram of the driving circuit 100 in the zero gray scale case. Fig. 27 Draw Figure 1 The current diagram of the driving circuit 100 in the first half of the light-emitting phase P4 in the zero grayscale condition. Fig.26 and Fig. 27 In the first half of the light-emitting phase, during the time P4, since the first light-emitting signal terminal mEM1 is at a low potential and the scanning signal terminal V SWEEP The potential of the first terminal C is V2, the voltage of the second terminal B is V2, and the voltage of the third terminal A is V data The voltage of the fourth terminal D is V3, the voltage of the fifth terminal F is V1, and the voltage of the sixth terminal E is V data -|V TH_T15 |-ΔV sweep .
[0142] Fig.28 Draw Figure 1 A voltage diagram of the driving circuit 100 in the zero gray scale case. Fig.29 Draw Figure 1 The current diagram of the driving circuit 100 in the second half of the light-emitting phase P5 in the zero grayscale condition. Fig.28 and Fig.29 Since the first light-emitting signal terminal mEM1 is at a low potential and the scanning signal terminal V SWEEPThe potential of the control transistor T15, the seventh transistor T19, the ninth transistor T16 and the twelfth transistor T7 will be turned on. In addition, the first transistor T4 will also continue to be turned on, so that the driving transistor T10 will be turned off. At this time, due to the capacitive coupling of the third capacitor C5, the control transistor T15 will be turned on. The condition for its turning on is shown in the following formula 4:
[0143]
[0144] Where V SG_T15 To control the source and gate voltage of transistor T15, the value on the left side of the equal sign must be greater than zero in order for the control transistor T15 to operate.
[0145] ΔV sweep >V data -V1…Formula 5
[0146] From equation 5, we can know that the turn-on condition of the control transistor T15 at this stage is related to its threshold voltage The control transistor T15 is turned on, which causes the current to flow to the sixth transistor T9, making it turn off, so that the light-emitting diode LED does not emit light. At this time, the voltage of the first terminal C is V2, the voltage of the second terminal B is V2, and the voltage of the third terminal A is V data The voltage of the fourth terminal D is V1, the voltage of the fifth terminal F is V1, and the voltage of the sixth terminal E is V data -|V TH_T15 |-ΔV sweep .
[0147] Fig.30 Draw Figure 1 A voltage diagram of the driving circuit 100 in the zero gray scale case. Fig.31 Draw Figure 1 The current diagram of the driving circuit 100 in the off phase P6 of the zero gray scale condition. Fig.30 and Fig.31 In the closing phase P6, since all signals are at a high potential, only the first transistor T4 and the control transistor T15 are turned on. The control transistor T15 is turned on due to the capacitive coupling of the third capacitor C5. At this time, the voltage of the first terminal C is V2, the voltage of the second terminal B is V2, and the voltage of the third terminal A is V data The voltage of the fourth terminal D is V1, the voltage of the fifth terminal F is V1, and the voltage of the sixth terminal E is V data -|V TH_T15 |.
[0148] Fig.32 Draw Figure 1FIG. 1 is a current versus time diagram of the driving circuit 100. Fig.32 The thin line in the bottom figure represents the signal of the first light-emitting signal terminal mEM1, and the thick line represents the signal of the scanning signal terminal V SWEEP The three figures above show different grayscale numbers and different V data The current versus time diagram of the light-emitting diode LED. The top diagram represents 255 grayscale and V data The second graph represents 127 grayscale and V data The third graph represents 32 gray levels and V data The current is 7.7 volts. It can be seen from the figure that the pulse width modulation unit 130 has an excellent grayscale modulation effect, and can still achieve a good modulation effect at a high grayscale number (255 grayscales) (that is, the grayscale can reach zero from the highest grayscale without losing the grayscale).
[0149] Fig.33 Draw Figure 1 The current versus time diagram of the driving circuit 100 with different gray scale numbers. Fig.33 ,exist Fig.33 The left line represents the zero grayscale condition (V data In this embodiment, in the zero gray scale condition, there is no more current after the current reaches zero, verifying the anti-flicker effect of the driving circuit 100 in the zero gray scale condition.
[0150] Fig.34 Draw Figure 1 FIG. 1 is a current versus time diagram of a threshold voltage change of the driving transistor T10 of the driving circuit 100. Fig.34 ,exist Fig.34 The middle line represents the current graph when the threshold voltage changes by +0.3 volts, and the lower line represents the current graph when the threshold voltage changes by -0.3 volts. The threshold voltage change, supply voltage change, LED current, and current error of the three lines are shown in Table 1.
[0151]
[0152] Table 1
[0153] It can be seen from Table 1 that in this embodiment, the current error rate between the middle line and the lower line and the upper line does not exceed 1.5%, and the change of the power supply voltage VDD does not exceed 0.5 volts, indicating the effect of the driving circuit 100 compensating the threshold voltage of the driving transistor T10 and the power supply voltage VDD.
[0154] Fig.35 Draw Figure 1FIG. 1 is a graph showing a current versus time when a threshold voltage of the control transistor T15 of the driving circuit 100 changes. Fig.36 Draw Fig.35 The enlarged view of the part at frame G, also refer to Fig.35 and Fig.36 ,exist Fig.36 In the example, the change in the threshold voltage only causes a light-emitting time error of 0.34 microseconds, indicating the effect of the compensation control transistor T15 by the display driving circuit 100.
[0155] Fig.37 Draw Figure 1 The current versus time diagram of the driving circuit 100 with different gray scale numbers. Fig.37 ,exist Fig.37 In the figure, the three figures show different grayscale numbers and different V data The current versus time diagram of the light-emitting diode LED. The top diagram represents 255 grayscale and V data The second graph represents 127 grayscale and V data The third graph represents 32 gray levels and V data The current is 7.7 volts. Fig.36 It can be seen that under different grayscale numbers, the falling time of the current of the light emitting diode LED is less than 6 microseconds, indicating that the current can drop quickly when the pulse width modulation unit 130 modulates, and proving the anti-flicker effect.
[0156] The foregoing summarizes the features of several embodiments so that those skilled in the art can better understand the aspects of the present disclosure. Those skilled in the art will appreciate that they can easily use the present disclosure as a basis for designing or modifying other processes and structures to achieve the same purposes and / or achieve the same advantages as the embodiments described herein. Those skilled in the art will also appreciate that such equivalent constructions do not depart from the spirit and scope of the present disclosure, and that they may make various changes, substitutions, and modifications herein without departing from the spirit and scope of the present disclosure.
Claims
1. A driving circuit, characterized in that: Include: A flicker prevention unit has a first end and a second end, and includes a first transistor, wherein the first transistor has a first end, a second end and a third end; a pulse amplitude modulation unit, electrically connected to the first end and the second end of the flicker prevention unit, having a first end, and comprising a driving transistor, a first capacitor and a light emitting diode, wherein the driving transistor has a first end, a second end and a third end, the first capacitor has a first end and a second end, the second end of the first capacitor is electrically connected to the third end of the driving transistor through a first end point, the first end of the first transistor is electrically connected to the first end of the first capacitor through a second end point, and the second end of the first transistor is electrically connected to the second end of the first capacitor; and A pulse width modulation unit is electrically connected to the first end of the pulse amplitude modulation unit and includes a control transistor, wherein in a grayscale condition, the first transistor is in a closed state so that a current of the light-emitting diode in a light-emitting stage is independent of the threshold voltages of all transistors of the driving circuit, and in a light-emitting stage in a zero grayscale condition, the first transistor is in an open state so that the driving transistor is in a closed state.
2. The driving circuit according to claim 1, characterized in that: The flicker prevention unit further comprises: A second capacitor having a first terminal and a second terminal; a second transistor having a first end, a second end and a first stable signal end, wherein the second end of the second transistor is electrically connected to the second end of the first capacitor through a third end; and A third transistor has a first end, a second end and a second stable signal end, wherein the first end of the third transistor is electrically connected to the second end of the first capacitor through the third end.
3. The driving circuit according to claim 2, characterized in that: In the light-emitting stage of the zero grayscale condition, the light-emitting diode does not emit light.
4. The driving circuit according to claim 2, characterized in that: In a light emitting stage with the grayscale condition, the second transistor and the third transistor are in a turned-off state.
5. The driving circuit according to claim 1, characterized in that: The pulse amplitude modulation unit further comprises: a fourth transistor having a first end, a second end and a first stable signal end, wherein the first end of the fourth transistor is electrically connected to the second end of the first capacitor; and A fifth transistor has a first end, a second end and a first light-emitting signal end, wherein the second end of the fifth transistor is electrically connected to the first end of the driving transistor, and the first end of the fifth transistor is electrically connected to the light-emitting diode.
6. The driving circuit according to claim 5, characterized in that: During a first half of a light emitting phase in the grayscale condition, the driving transistor and the fifth transistor are turned on to enable the light emitting diode to emit light.
7. The driving circuit according to claim 1, characterized in that: The pulse width modulation unit further comprises: a sixth transistor having a first end, a second end and a third end, wherein the first end of the sixth transistor is electrically connected to the second end of the driving transistor; a seventh transistor having a first terminal, a second terminal and a first light-emitting signal terminal, wherein the first terminal of the seventh transistor is electrically connected to the third terminal of the sixth transistor through a fourth terminal, and the second terminal of the seventh transistor is electrically connected to the second terminal of the control transistor; an eighth transistor having a first terminal, a second terminal and a second stable signal terminal, wherein the second terminal of the eighth transistor is electrically connected to the first terminal of the control transistor through a fifth terminal; a ninth transistor having a first terminal, a second terminal and a first light-emitting signal terminal, wherein the first terminal of the ninth transistor is electrically connected to the first terminal of the control transistor through the fifth terminal; and A third capacitor has a first end and a scan signal end, wherein the first end of the third capacitor is electrically connected to the third end of the control transistor through a sixth end.
8. The driving circuit according to claim 7, characterized in that: In the latter half of a light emitting phase with the grayscale condition, the seventh transistor and the ninth transistor are turned on so that the sixth transistor is turned off so that the light emitting diode does not emit light.
9. The driving circuit according to claim 8, characterized in that: During the second half of the light emitting phase with the grayscale condition, the third capacitor undergoes capacitive coupling so that the control transistor is in an on state.
10. The driving circuit according to claim 7, characterized in that: During the second half of the light-emitting phase in the zero grayscale condition, the seventh transistor and the ninth transistor are turned on, so that the sixth transistor is turned off and the light-emitting diode does not emit light.