Semiconductor device and manufacturing method thereof, display substrate and display device

Abstract

The invention relates to a semiconductor device and a manufacturing method thereof, a display substrate and a display device, and the semiconductor device comprises a glass substrate, and an active layer, a gate insulating layer, a gate interlayer insulating layer and a source and drain electrode layer which are stacked on the glass substrate. The gate insulation layer is configured to be formed through a composition process after a gate metal layer is deposited on an oxygen injection layer, and the oxygen injection layer is configured to be formed through ion injection, hydrogen explosion and dry etching processes in sequence on a silicon wafer substrate; and the orthographic projection of the gate insulating layer on the glass substrate is completely overlapped with the orthographic projection of the active layer on the glass substrate.

Description

Technical Field

[0001] The present invention relates to the technical field of display product manufacturing, and in particular to a semiconductor device and a manufacturing method thereof, a display substrate and a display device. Background Art

[0002] Silicon-based semiconductors have a high mobility of ~1000cm2 / V·S, but their manufacturing requires temperatures of thousands of degrees Celsius, far exceeding the strain point of the glass substrate, and they cannot be scaled up, so they have not been used in glass-based displays. Summary of the invention

[0003] In order to solve the above technical problems, the present invention provides a semiconductor device and a manufacturing method thereof, a display substrate and a display device, which solve the defect problem caused by hydrogen explosion when transferring a single crystal silicon film to a glass substrate.

[0004] In order to achieve the above-mentioned purpose, the technical solution adopted in the embodiment of the present invention is: a semiconductor device, comprising a glass substrate, an active layer, a gate insulating layer, a gate interlayer insulating layer and a source-drain electrode layer stacked on the glass substrate, the gate insulating layer is configured to be formed by a patterning process after a gate metal layer is deposited on an oxygen-implanted layer, and the oxygen-implanted layer is configured to be formed by sequentially performing ion implantation, hydrogen explosion and dry etching processes on a silicon wafer substrate;

[0005] The orthographic projection of the gate insulating layer on the glass substrate completely overlaps with the orthographic projection of the active layer on the glass substrate.

[0006] Optionally, the surface roughness of the active layer is Ra<2um.

[0007] Optionally, the active layer, the gate insulating layer and the gate are configured to be formed by a single patterning process.

[0008] An embodiment of the present invention further provides a display substrate, comprising the above-mentioned semiconductor device, and further comprising a planar layer formed on the source and drain electrode layer, an electrode layer formed on the planar layer, and a light-emitting device bonded to the electrode layer.

[0009] An embodiment of the present invention also provides a display substrate, comprising the above-mentioned semiconductor device, and also comprising a planar layer formed on the source and drain layer, and a first electrode layer, a pixel definition layer, a light-emitting layer, a second electrode layer and a packaging structure layer stacked in sequence on the planar layer.

[0010] Optionally, it further includes a touch control structure layer disposed on a side of the packaging structure layer away from the flat layer.

[0011] Optionally, it further includes a color filter structure layer disposed on a side of the touch structure layer away from the encapsulation structure layer, and the color filter structure layer includes a black matrix and a color filter layer.

[0012] An embodiment of the present invention further provides a display substrate, comprising the above-mentioned semiconductor device, and also comprising a planarization layer formed on the source and drain layer, and a third electrode layer, a passivation layer and a fourth electrode layer stacked in sequence on the planarization layer.

[0013] An embodiment of the present invention further provides a display device, comprising the above-mentioned display substrate.

[0014] A method for manufacturing a semiconductor device comprises the following steps:

[0015] Providing a silicon wafer substrate;

[0016] Growing a silicon oxide layer on the silicon wafer substrate by thermal oxidation;

[0017] Injecting oxygen ions into the silicon wafer substrate through an ion implantation process to form an oxygen implantation layer;

[0018] Injecting hydrogen ions into the silicon wafer substrate through an ion implantation process to form a hydrogen implantation layer, wherein the hydrogen implantation layer is located on a side of the oxygen implantation layer away from the silicon oxide layer to form a prefabricated silicon layer;

[0019] transferring the prefabricated silicon layer onto a glass substrate, wherein the silicon oxide layer is bonded to the glass substrate;

[0020] By means of an annealing process, a portion of the silicon wafer substrate located on a side of the hydrogen implantation layer away from the oxygen implantation layer is separated;

[0021] Removing the portion of the prefabricated silicon layer located at the oxygen implantation layer away from the glass substrate by a dry etching process;

[0022] depositing a gate metal layer on the oxygen implanted layer;

[0023] By means of a patterning process, an active layer, a gate insulating layer and a gate which are stacked and arranged on the silicon oxide layer are formed;

[0024] forming an interlayer insulating layer on the gate;

[0025] A source and drain layer is formed.

[0026] Optionally, the portion of the silicon wafer substrate between the silicon oxide layer and the oxygen-implanted layer, the oxygen-implanted layer and the gate metal layer are patterned through a single patterning process to form the active layer, the gate insulating layer and the gate that are stacked.

[0027] Optionally, the silicon oxide layer has a thickness of 10 to 60 nm.

[0028] Optionally, in the step of implanting oxygen ions into the silicon wafer substrate by an ion implantation process to form an oxygen implantation layer, the depth of the implanted oxygen ions is 40 to 160 nm, and the thickness of the formed oxygen implantation layer is 50 to 200 nm.

[0029] Optionally, in the step of injecting hydrogen ions into the silicon wafer substrate through an ion implantation process to form a hydrogen implantation layer, the depth of the injected hydrogen ions is 60 to 500 nm.

[0030] The beneficial effect of the present invention is that the gate insulating layer in the semiconductor device provided by the present invention is configured to be formed by a patterning process after a gate metal layer is deposited on the oxygen-implanted layer, and the oxygen-implanted layer is configured to be formed by sequentially performing ion implantation, hydrogen explosion, and dry etching processes on a silicon wafer substrate. That is, in the method for manufacturing a semiconductor device, a step of injecting oxygen ions to form an oxygen-implanted layer is added, and the hydrogen-implanted layer is located on the side of the oxygen-implanted layer away from the silicon oxide layer, so that after the prefabricated silicon layer is transferred to the glass substrate, in the step of annealing and separation, the oxygen-implanted layer plays a blocking role, that is, the part between the oxygen-implanted layer and the silicon oxide layer is the part used to form the active layer in the subsequent process, and this part is isolated and blocked by the oxygen-implanted layer, and is not affected by the hydrogen explosion of the hydrogen-implanted layer, thereby improving the performance of the semiconductor device, and by using the method for manufacturing a semiconductor device provided by the present invention, there is no need to use a CMP process to remove the hydrogen explosion defect layer, breaking the limitation that large-size semiconductor devices cannot be made. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 A schematic diagram showing the transfer of a silicon film onto a glass substrate in a semiconductor device manufacturing process in the related art;

[0032] Figure 2 A schematic diagram showing the separation of the hydrogen injection layer after annealing in the related art;

[0033] Figure 3 A schematic diagram showing the removal of the hydrogen explosion defect layer through the CMP process in the related art.

[0034] Figure 4 A schematic diagram showing a process of forming a silicon oxide layer on a silicon wafer substrate according to an embodiment of the present invention;

[0035] Figure 5 A schematic diagram showing an embodiment of the present invention after an oxygen injection layer is formed;

[0036] Figure 6 A schematic diagram showing a hydrogen injection layer formed in an embodiment of the present invention;

[0037] Figure 7A schematic diagram showing the transfer of a prefabricated silicon layer onto a glass substrate in an embodiment of the present invention;

[0038] Figure 8 A schematic diagram showing the separation of the hydrogen injection layer after annealing in an embodiment of the present invention;

[0039] Fig. 9 A schematic diagram showing removal of a portion of the oxygen implanted layer away from a glass substrate in an embodiment of the present invention;

[0040] Fig.10 A schematic diagram showing a gate metal layer deposited in an embodiment of the present invention;

[0041] Fig.11 A schematic diagram showing the formation of an active layer, a first insulating layer and a gate in an embodiment of the present invention;

[0042] Fig.12 A schematic diagram showing the formation of a source and drain layer in an embodiment of the present invention;

[0043] Fig.13 A schematic diagram showing a display substrate in an embodiment of the present invention;

[0044] Fig.14 A schematic diagram showing a display substrate in an embodiment of the present invention;

[0045] Fig.15 A schematic diagram showing a display substrate in an embodiment of the present invention. DETAILED DESCRIPTION

[0046] In order to make the purpose, technical solution and advantages of the embodiments of the present disclosure clearer, the technical solution of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings of the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, not all of the embodiments. Based on the described embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.

[0047] Unless otherwise defined, the technical terms or scientific terms used in the present disclosure should be understood by people with ordinary skills in the field to which the present disclosure belongs. The "first", "second" and similar words used in the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. Similarly, similar words such as "one", "one" or "the" do not indicate quantity restrictions, but indicate that there is at least one. Similar words such as "include" or "comprise" mean that the elements or objects appearing before the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. Similar words such as "connect" or "connected" are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0048] A method for manufacturing a semiconductor device in the related art includes the following steps:

[0049] Providing a silicon wafer, and forming a silicon oxide layer 2 on the silicon wafer;

[0050] Performing hydrogen ion implantation on the silicon wafer to form a hydrogen implantation layer 3;

[0051] The silicon wafer is bonded with a glass substrate 4 with the front side facing downward, that is, the oxide layer is bonded with the glass substrate 4. Figure 1 ;

[0052] Annealing occurs hydrogen explosion peeling, reference Figure 2 ;

[0053] Thinning by CMP process to remove hydrogen explosion defect layer and form silicon film, reference Figure 3 ;

[0054] The silicon film is patterned to form an active layer, and a gate insulating layer (GI), a gate metal layer (Gate), an interlayer insulating layer (ILD), and a source-drain layer (SD) are sequentially manufactured.

[0055] In order to manufacture glass-based high-mobility devices, it is considered to transfer the single-crystal silicon film to the glass substrate. However, the transferred silicon film has many defects due to hydrogen explosion, and the defective layer needs to be removed by CMP process. However, CMP is a semiconductor-level process and cannot be used for large-sized glass, which limits the use of this technology on large-sized glass-based products. Therefore, it is necessary to solve the hydrogen explosion defects and improve the quality of the silicon film transferred on the glass substrate.

[0056] Test Figure 4-Figure 15In view of the above problems, the present embodiment provides a semiconductor device, comprising a glass substrate 4, an active layer 101, a gate insulating layer 102, a gate 103, an interlayer insulating layer 10 and a source-drain electrode layer 104 stacked on the glass substrate 4, the gate insulating layer 102 being configured to be formed by a patterning process after a gate metal layer is deposited on an oxygen-implanted layer 5, and the oxygen-implanted layer 5 being configured to be formed by sequentially performing ion implantation, hydrogen explosion and dry etching processes on a silicon wafer substrate.

[0057] The gate insulating layer in the related art is formed by depositing on the active layer after the hydrogen explosion process and the CMP process and then forming the active layer through the composition process. The gate insulating layer in the present application is formed by the composition process after the gate metal layer is deposited on the oxygen injection layer, that is, the present application adds a step of forming an oxygen injection layer in the process of manufacturing semiconductor devices, and the oxygen injection layer is configured to be formed by ion implantation, hydrogen explosion, and dry etching processes on the silicon wafer substrate in sequence. The formation of the oxygen injection layer plays a blocking role in the hydrogen explosion process, that is, the part between the oxygen injection layer and the silicon oxide layer is the part used to form the active layer in the subsequent process, and this part is isolated and blocked by the oxygen injection layer, and is not affected by the hydrogen explosion of the hydrogen injection layer, thereby improving the performance of the semiconductor device. In addition, the method for manufacturing a semiconductor device provided by the present invention does not need to use the CMP process to remove the hydrogen explosion defect layer, breaking the limitation that large-size semiconductor devices cannot be manufactured.

[0058] In an exemplary embodiment, the orthographic projection of the gate insulating layer 102 on the glass substrate 4 completely overlaps with the orthographic projection of the active layer 101 on the glass substrate.

[0059] In an exemplary embodiment, the active layer 101 , the gate insulating layer 102 , and the gate 103 are configured to be formed by a single patterning process.

[0060] In an exemplary embodiment, the surface roughness of the active layer is Ra<2 um.

[0061] In the related art, the active layer is formed after hydrogen explosion, CMP thinning and patterning. Even if the CMP process is used to remove the hydrogen explosion defect layer, the surface roughness Ra of the active layer is 8 to 12 nm, which is still relatively large. In this embodiment, the oxygen injection layer is provided to protect the active layer and reduce the surface roughness of the active layer.

[0062] This embodiment provides a method for manufacturing a semiconductor device, comprising the following steps:

[0063] Providing a silicon wafer substrate 1;

[0064] A silicon oxide layer 2 (SiOx) is grown on the silicon wafer substrate 1 by thermal oxidation. Figure 4 ;

[0065] Oxygen ions are implanted into the silicon wafer substrate 1 by an ion implantation process to form an oxygen implantation layer 5. Figure 5 ;

[0066] Hydrogen ions are injected into the silicon wafer substrate 1 by an ion implantation process to form a hydrogen implantation layer 3, wherein the hydrogen implantation layer 3 is located on a side of the oxygen implantation layer 5 away from the silicon oxide layer 2 to form a prefabricated silicon layer. Figure 6 ;

[0067] The prefabricated silicon layer is transferred to a glass substrate 4, wherein the silicon oxide layer 2 and the glass substrate 4 are bonded together by an anodic bonding process. Figure 7 ;

[0068] Through the annealing process, the part of the silicon wafer substrate 1 located on the side of the hydrogen injection layer 3 away from the oxygen injection layer 5 is separated. Figure 8 ;

[0069] The prefabricated silicon layer is removed by dry etching process at the portion of the oxygen injection layer 5 away from the glass substrate 4. Fig. 9 ;

[0070] A gate metal layer 6 is deposited on the oxygen implantation layer 5. Fig.10 ;

[0071] Through a patterning process, an active layer 101, a gate insulating layer 102 and a gate 103 are stacked on the silicon oxide layer 2. Fig.11 ;

[0072] forming an interlayer insulating layer 10 on the gate 103;

[0073] Form the source and drain layer 104, refer to Fig.12 .

[0074] In the method for manufacturing a semiconductor device provided in this embodiment, a process step of injecting oxygen ions to form an oxygen-implanted layer 5 is added, and the hydrogen-implanted layer 3 is located on the side of the oxygen-implanted layer 5 away from the silicon oxide layer 2. In this way, after the prefabricated silicon layer is transferred to the glass substrate 4, in the process step of annealing and separation, the oxygen-implanted layer 5 plays a blocking role, that is, the portion of the silicon wafer substrate 1 located between the oxygen-implanted layer 5 and the silicon oxide layer 2 is the portion used to form the active layer 101 in the subsequent process, and this portion is isolated and blocked by the oxygen-implanted layer 5 and is not affected by the hydrogen explosion of the hydrogen-implanted layer 3, thereby improving the performance of the semiconductor device. The blocking protection of the oxygen layer 5 eliminates the need to use a CMP process to remove the hydrogen explosion defect layer, and a defect-free channel can be obtained in subsequent processes (after forming the gate metal layer 6, the gate metal layer 6 is patterned to obtain the gate 103, and then the active layer 101 outside the coverage of the orthographic projection of the gate 103 on the active layer 101 is conductorized, so that a source connection area, a channel and a drain connection area are formed on the active layer 101, and the channel is covered by the orthographic projection of the gate 103 on the active layer 101), breaking the limitation that large-size semiconductor devices cannot be made due to the CMP process.

[0075] In an exemplary embodiment, the portion of the silicon wafer substrate 1 located between the silicon oxide layer 2 and the oxygen-implanted layer 5, the oxygen-implanted layer 5 and the gate metal layer 6 are patterned through a single composition process to form the active layer 101, the gate insulating layer 102 and the gate 103 that are stacked.

[0076] It should be noted that multiple patterning processes may also be used to form the stacked active layer 101, the gate insulating layer 102 and the gate 103. In this embodiment, a single patterning process is used to form the stacked active layer 101, the gate insulating layer 102 and the gate 103, which simplifies the process and improves efficiency.

[0077] It should be noted that, in the present embodiment, in the step of performing heating annealing to promote the separation of the hydrogen injection layer 3, the oxygen injection layer 5 can play a blocking role. In the subsequent process, the oxygen injection layer 5 can form an insulating layer located between the active layer 101 and the gate 103. In the present embodiment, the oxygen injection layer 5 is formed before the active layer 101 is formed by patterning the portion of the silicon wafer substrate 1 located between the silicon oxide layer 2 and the oxygen injection layer 5. If in the step of "removing the portion of the prefabricated silicon layer located in the oxygen injection layer 5 away from the glass substrate 4 by a dry etching process" , and then a patterning process is used to form an active layer 101, and then a gate 103 is made, which makes it easy for the gate 103 metal to directly contact the active layer 101 and cause a short circuit. Therefore, in the present application, in the step of "removing the prefabricated silicon layer located at the portion of the oxygen-implanted layer 5 away from the glass substrate 4 through a dry etching process", a gate metal layer 6 is first deposited, and then a patterning process is used to form a stacked active layer 101, a gate insulating layer 102 and a gate 103 on the silicon oxide layer 2, so as to avoid the gate 103 metal from directly contacting the active layer 101 and causing a short circuit.

[0078] In an exemplary embodiment, the thickness of the silicon oxide layer 2 is 10-60 nm.

[0079] In an exemplary embodiment, oxygen ions are implanted into the silicon wafer substrate 1 by an ion implantation process to form an oxygen implantation layer 5. The depth of the implanted oxygen ions is 40 to 160 nm, and the thickness of the formed oxygen implantation layer 5 is 50 to 200 nm.

[0080] It should be noted that the distance between the oxygen implantation layer 5 and the silicon oxide layer 2 can be set according to actual needs to meet the required thickness of the active layer 101 .

[0081] In an exemplary embodiment, in the step of implanting hydrogen ions into the silicon wafer substrate 1 through an ion implantation process to form the hydrogen implantation layer 3 , the depth of the implanted hydrogen ions is 60 to 500 nm.

[0082] In the step of depositing the gate metal layer 6 on the oxygen-implanted layer 5, a method such as magnetron sputtering, thermal evaporation or PECVD can be used to deposit a gate metal layer 6 with a certain thickness on the oxygen-implanted layer 5. The material of the gate metal layer 6 can be metal molybdenum (Mo), metal copper (Cu), metal aluminum (Al) or their alloy materials. The thickness of the gate metal layer 6 can be determined according to actual needs.

[0083] In an exemplary embodiment, in the step of forming the interlayer insulating layer 10 on the gate 103, a plurality of vias are formed on the interlayer insulating layer 10 to ensure effective contact between the active layer 101 and the source electrode, and between the active layer 101 and the drain electrode. The material of the interlayer insulating layer 10 may be silicon nitride, silicon dioxide, or an organic insulating material. The material of the interlayer insulating layer 10 and the oxygen-implanted layer 5 (after oxygen ions are injected, they react with silicon to form silicon oxide, that is, the material of the oxygen-implanted layer 5 is silicon oxide) may be the same or different, and this is not limited in the embodiment of the present invention.

[0084] In an exemplary embodiment, in the step of forming the source-drain electrode layer 104, a source-drain electrode metal material having a certain thickness can be deposited on the side of the interlayer insulating layer 10 away from the gate 103 by magnetron sputtering, thermal evaporation or PECVD, etc., to obtain a source-drain electrode metal film layer, and then the source-drain electrode metal film layer is processed by a patterning process to obtain a source-drain electrode. The source-drain electrode includes a source electrode and a drain electrode, and the source electrode and the drain electrode can be connected to the active layer 101 through vias on the interlayer insulating layer 10, respectively. The source-drain electrode metal material can be metal Mo, metal Cu, metal Al or their alloy materials. The thickness of the source-drain electrode metal film layer can be determined according to actual needs. In order to ensure effective contact between the source electrode and the drain electrode and the active layer 101, there may be a non-overlapping area between the orthographic projection of the active layer 101 on the glass substrate 4 and the orthographic projection of the gate electrode 103 on the glass substrate 4, and there may be a non-overlapping area between the orthographic projection of the active layer 101 on the glass substrate 4 and the orthographic projection of the oxygen-implanted layer 5 on the glass substrate 4, so as to form the interlayer insulating layer 10 on the side of the active layer 101 away from the glass substrate 4 above the non-overlapping area, and set vias on the interlayer insulating layer 10 and the oxygen-implanted layer 5, so that the source electrode and the drain electrode can be connected to the active layer 101 through the vias respectively.

[0085] The embodiment of the present invention further provides a display substrate, wherein the display substrate is a micro light emitting diode (MicroLight Emitting Diode) display substrate, wherein the display substrate includes a semiconductor device manufactured by the above-mentioned semiconductor device manufacturing method, and further includes a flat layer 9 formed on the source and drain electrode layer 104, an electrode layer 7 formed on the flat layer 9, and a Micro LED light emitting device 8 bonded to the electrode layer 7, with reference to Fig.13 .

[0086] Exemplarily, the display substrate also includes a signal line arranged in the same layer as the source and drain layer, and the electrode layer 7 includes a first electrode connected to the drain (corresponding to one of the N electrode and the P electrode of the Micro LED light-emitting device 8), and a second electrode connected to the signal line (DC signal line VDD) (corresponding to the other electrode of the N electrode and the P electrode of the Micro LED light-emitting device 8).

[0087] The embodiment of the present invention further provides a display substrate, the display substrate is an organic light-emitting diode (OLED) display substrate, the display substrate includes a semiconductor device manufactured by the above-mentioned semiconductor device manufacturing method, and also includes a flat layer 9 formed on the source and drain electrode layer 104, and a first electrode layer 201, a pixel definition layer 203, a light-emitting layer 202, a second electrode layer 204 and a packaging structure layer stacked in sequence on the flat layer 9, with reference to Fig.14 .

[0088] Exemplarily, the first electrode layer 201 is an anode, and the second electrode layer 204 is a cathode.

[0089] The light-emitting layer 202 includes a hole injection layer (HIL), a hole transport layer (HTL), a light-emitting device, an electron transport layer (ETL), and an electron injection layer (EIL) which are stacked in sequence.

[0090] When the display substrate is working, it provides electrical signals to the anode and cathode, so that current is formed between the anode and the cathode, driving the light-emitting device to emit light. The hole injection layer injects holes into the light-emitting device, the hole transport layer is used to transport holes and speed up the movement of holes, the electron injection layer injects electrons into the light-emitting device, and the electron transport layer is used to transport electrons and speed up the movement of electrons, so that the recombination speed of electrons and holes in the light-emitting device is increased, thereby improving the luminous efficiency.

[0091] Exemplarily, the encapsulation structure layer includes a first inorganic encapsulation layer 205, an organic encapsulation layer 206, and a second inorganic encapsulation layer 207 which are stacked in sequence. The material forming the first inorganic encapsulation layer 205 (CVD1) and the second inorganic encapsulation layer 207 (CVD2) can be any one of SiNx, SiON, SiO2, etc., and can be formed by chemical vapor deposition, physical vapor deposition, atomic force deposition, etc. The organic encapsulation layer 206 can be an ink layer (IJP) formed by inkjet printing, and its function is to flatten the encapsulation structure layer. If the encapsulation structure layer has only a single layer of inorganic encapsulation layer that is too thick, there will be stress problems, so it is necessary to add an organic encapsulation layer 206 between the inorganic encapsulation layers.

[0092] In an exemplary embodiment, the display substrate further includes a touch control structure layer disposed on a side of the encapsulation structure layer away from the planar layer 9 .

[0093] The touch structure layer includes a first touch electrode layer (Touch Metal One (TMA)), a touch dielectric layer (TLD), a second touch electrode layer (Touch Metal Two (TMB)), and a touch protection layer (TOC) which are stacked.

[0094] Exemplarily, a buffer layer (Buffer) is disposed between the packaging structure layer and the touch structure layer.

[0095] In an exemplary embodiment, the display substrate further includes a color filter structure layer disposed on a side of the touch structure layer away from the encapsulation structure layer, and the color filter structure layer includes a black matrix and a color filter layer.

[0096] refer to Fig.15 An embodiment of the present invention further provides a display substrate, which is an array substrate in a liquid crystal display (LCD) device. The display substrate includes a semiconductor device manufactured by the above-mentioned semiconductor device manufacturing method, and also includes a planar layer 9 formed on the source and drain layer 104, and a third electrode layer 301, a passivation layer 302 and a fourth electrode layer 303 stacked in sequence on the planar layer 9.

[0097] Exemplarily, the third electrode layer 301 is a pixel electrode, and the fourth electrode layer 303 is a common electrode.

[0098] An embodiment of the present invention further provides a display device, comprising the above-mentioned display substrate.

[0099] The display device may be any product or component with a display function, such as a liquid crystal television, a liquid crystal display, a digital photo frame, a mobile phone, a tablet computer, etc., wherein the display device further includes a flexible circuit board, a printed circuit board and a backplane.

[0100] There are a few points to note:

[0101] (1) The drawings of the embodiments of the present disclosure only relate to the structures related to the embodiments of the present disclosure, and other structures may refer to the general design.

[0102] (2) For the sake of clarity, in the drawings used to describe the embodiments of the present disclosure, the thickness of layers or regions is exaggerated or reduced, that is, these drawings are not drawn according to the actual scale. It is understood that when an element such as a layer, film, region or substrate is referred to as being "on" or "under" another element, the element may be "directly" "on" or "under" the other element or there may be intermediate elements.

[0103] (3) In the absence of conflict, the embodiments of the present disclosure and the features therein may be combined with each other to obtain new embodiments.

[0104] It is to be understood that the above embodiments are merely exemplary embodiments used to illustrate the principles of the present invention, but the present invention is not limited thereto. For those of ordinary skill in the art, various modifications and improvements can be made without departing from the spirit and essence of the present invention, and these modifications and improvements are also considered to be within the scope of protection of the present invention.

Claims

1. A semiconductor device, characterized in that: The invention comprises a glass substrate, an active layer, a gate insulating layer, a gate interlayer insulating layer and a source-drain electrode layer stacked on the glass substrate, wherein the gate insulating layer is configured to be formed by a patterning process after a gate metal layer is deposited on an oxygen-implanted layer, and the oxygen-implanted layer is configured to be formed by sequentially performing ion implantation, hydrogen explosion and dry etching processes on a silicon wafer substrate; The orthographic projection of the gate insulating layer on the glass substrate completely overlaps with the orthographic projection of the active layer on the glass substrate.

2. The semiconductor device according to claim 1, wherein: The surface roughness of the active layer is Ra<2um.

3. The semiconductor device according to claim 1, wherein: The active layer, the gate insulating layer and the gate are configured to be formed through a single patterning process.

4. A display substrate, characterized in that: The semiconductor device comprises any one of claims 1 to 3, further comprising a planar layer formed on the source and drain layer, an electrode layer formed on the planar layer, and a light-emitting device bonded to the electrode layer.

5. A display substrate, characterized in that: The semiconductor device comprises the semiconductor device according to any one of claims 1 to 3, further comprising a planar layer formed on the source and drain layer, and a first electrode layer, a pixel definition layer, a light-emitting layer, a second electrode layer and a packaging structure layer stacked in sequence on the planar layer.

6. The display substrate according to claim 5, characterized in that: It also includes a touch control structure layer which is arranged on a side of the packaging structure layer away from the flat layer.

7. The display substrate according to claim 6, characterized in that: It also includes a color filter structure layer which is arranged on a side of the touch structure layer away from the encapsulation structure layer, and the color filter structure layer includes a black matrix and a color filter layer.

8. A display substrate, characterized in that: The semiconductor device comprises the semiconductor device according to any one of claims 1 to 3, further comprising a planarization layer formed on the source and drain layer, and a third electrode layer, a passivation layer and a fourth electrode layer stacked in sequence on the planarization layer.

9. A display device, characterized in that: A display substrate comprising any one of claims 4 to 8.

10. A method for manufacturing a semiconductor device, used for manufacturing the semiconductor device according to any one of claims 1 to 3, characterized in that: The following steps are involved: Providing a silicon wafer substrate; Growing a silicon oxide layer on the silicon wafer substrate by thermal oxidation; Injecting oxygen ions into the silicon wafer substrate through an ion implantation process to form an oxygen implantation layer; Injecting hydrogen ions into the silicon wafer substrate through an ion implantation process to form a hydrogen implantation layer, wherein the hydrogen implantation layer is located on a side of the oxygen implantation layer away from the silicon oxide layer to form a prefabricated silicon layer; transferring the prefabricated silicon layer onto a glass substrate, wherein the silicon oxide layer is bonded to the glass substrate; By means of an annealing process, a portion of the silicon wafer substrate located on a side of the hydrogen implantation layer away from the oxygen implantation layer is separated; Removing the portion of the prefabricated silicon layer located at the oxygen implantation layer away from the glass substrate by a dry etching process; depositing a gate metal layer on the oxygen implanted layer; By means of a patterning process, an active layer, a gate insulating layer and a gate which are stacked and arranged on the silicon oxide layer are formed; forming an interlayer insulating layer on the gate; A source and drain layer is formed.

11. The method for manufacturing a semiconductor device according to claim 10, characterized in that: The portion of the silicon wafer substrate between the silicon oxide layer and the oxygen implantation layer, the oxygen implantation layer and the gate metal layer are patterned through a single patterning process to form the active layer, the gate insulating layer and the gate which are stacked.

12. The method for manufacturing a semiconductor device according to claim 10, wherein: The thickness of the silicon oxide layer is 10-60 nm.

13. The method for manufacturing a semiconductor device according to claim 10, characterized in that: In the step of injecting oxygen ions into the silicon wafer substrate by an ion implantation process to form an oxygen implantation layer, the depth of the oxygen ions implanted is 40 to 160 nm, and the thickness of the formed oxygen implantation layer is 50 to 200 nm.

14. The method for manufacturing a semiconductor device according to claim 10, characterized in that: In the step of injecting hydrogen ions into the silicon wafer substrate through an ion implantation process to form a hydrogen implantation layer, the depth of the injected hydrogen ions is 60 to 500 nm.

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