Fault detection method, device, equipment, storage medium and program product

Abstract

The embodiment of the present application discloses a fault detection method, device, equipment, storage medium and program product, and the method comprises the following steps: detecting the state of two to-be-detected ports of a physical layer by transmitting a preset bit stream between the two to-be-detected ports, wherein the preset bit stream comprises fault detection information; when it is detected that at least one port of the two to-be-detected ports is faulty, switching target traffic transmitted between the two to-be-detected ports to a target link, wherein the target link represents a link between a first port and a second port, and the first port and the second port represent other ports except the at least one port.

Description

TECHNICAL FIELD

[0001] The present application belongs to the technical field of transmission and Internet Protocol (IP), and particularly relates to a fault detection method and device, equipment, a storage medium and a program product. BACKGROUND

[0002] In the related art, for a Transmission Control Protocol (TCP) / IP network reference model, the fault of a forwarding node can be detected based on a link layer protocol, a network layer protocol, an application layer protocol and the like, and in addition, the fault detection of the forwarding node can also be implemented through a hardware Bidirectional Forwarding Detection (BFD) mechanism; however, the technical solution of the related art has the problem of a long detection time. SUMMARY

[0003] In order to solve the problem of a long detection time in the related art, the embodiments of the present application propose a fault detection method, device, equipment, a storage medium and a program product.

[0004] The embodiments of the present application provide a fault detection method, which comprises:

[0005] detecting the state of two to-be-detected ports at a physical layer by transmitting a preset bit stream between the two to-be-detected ports, wherein the preset bit stream comprises fault detection information;

[0006] when it is detected that at least one port of the two to-be-detected ports has a fault, switching target traffic transmitted between the two to-be-detected ports to a target link, the target link representing a link between a first port and a second port, the first port and the second port representing other ports except the at least one port.

[0007] In some embodiments, the detecting the state of the two to-be-detected ports at the physical layer by transmitting the preset bit stream between the two to-be-detected ports comprises: detecting the state of the two to-be-detected ports at a physical layer by transmitting the preset bit stream between the two to-be-detected ports at each fault detection period; the fault detection period representing a period of detecting a port fault.

[0008] In some embodiments, each fault detection period comprises at least a target time period for transmitting the preset bit stream; after detecting the status of the two to-be-detected ports by transmitting the preset bit stream between the two to-be-detected ports of the physical layer, the method further comprises: in response to that the at least one port does not receive the preset bit stream within the target time period, determining that the at least one port is faulty.

[0009] In some embodiments, the method further comprises: in response to that the at least one port does not receive the preset bit stream within the target time period, determining to enter a next fault detection period.

[0010] In some embodiments, the method further comprises: in response to that the receiving port in the two to-be-detected ports receives the preset bit stream within the target time period, continuing to detect the status of the two to-be-detected ports by transmitting the preset bit stream between the two to-be-detected ports in a current fault detection period.

[0011] In some embodiments, before detecting the status of the two to-be-detected ports by transmitting the preset bit stream, the method further comprises: constructing a composite bit stream by a preset encoding at a sending port of the two to-be-detected ports; replacing at least one idle code block in the composite bit stream with a fault detection code block for carrying the fault detection information, to obtain the preset bit stream.

[0012] In some embodiments, the preset encoding is 64B / 66B encoding.

[0013] In some embodiments, the fault detection information in the fault detection code block comprises at least one of the following: local device identification, local device port, opposite device identification, opposite device port, data transmission status between the two to-be-detected ports, duration of a target time period, the target time period representing a time period for transmitting the preset bit stream in each fault detection period, and fault detection period representing a period for detecting port faults.

[0014] Embodiments of the present application also provide a fault detection device, which comprises:

[0015] a first processing module configured to detect the status of the two to-be-detected ports by transmitting a preset bit stream between the two to-be-detected ports of the physical layer, wherein the preset bit stream comprises fault detection information;

[0016] The second processing module is configured to switch target traffic transmitted between the two to-be-detected ports to a target link when it is detected that at least one port of the two to-be-detected ports is faulty, the target link representing a link between a first port and a second port, the first port and the second port representing other ports except the at least one port.

[0017] The embodiments of the present application further provide an electronic device, which comprises a processor and a memory for storing a computer program capable of running on the processor; wherein the processor is configured to run the computer program to execute any of the above fault detection methods.

[0018] The embodiments of the present application further provide a computer storage medium, which stores a computer program, and the computer program is executed by a processor to implement any of the above fault detection methods.

[0019] The embodiments of the present application further provide a computer program product, which comprises a computer program, and the computer program is executed by a processor to implement any of the above fault detection methods.

[0020] It can be seen that, by constructing a bit stream at a physical layer to perform fault detection, the embodiments of the present application do not need to additionally perform fault detection through an upper layer protocol, can reduce processing delay caused by complex protocol encapsulation, and thus reduce fault detection time of a network node. BRIEF DESCRIPTION OF DRAWINGS

[0021] Figure 1 A flowchart of a fault detection method of the embodiments of the present application;

[0022] Figure 2 A schematic diagram of switching a link when a port is faulty in the embodiments of the present application;

[0023] Figure 3 A schematic diagram of four states of a fault detection period in the embodiments of the present application;

[0024] Figure 4 A flowchart of processing a data frame by a transceiver in the embodiments of the present application;

[0025] Figure 5 A schematic diagram of an encoding format of an original data frame and a 66B code block provided by the embodiments of the present application;

[0026] Figure 6 A code block structure schematic diagram of a composite bit stream and a preset bit stream in the embodiments of the present application;

[0027] Figure 7 A code block structure schematic diagram of an o code block in the embodiments of the present application;

[0028] Figure 8 A structural schematic diagram of a fault detection device according to an embodiment of the present application;

[0029] Figure 9 A structural schematic diagram of an electronic device according to an embodiment of the present application. DETAILED DESCRIPTION

[0030] With the rapid development of Artificial Intelligence Generated Content (AIGC) technology, the demand for large-scale intelligent computing power has shown explosive growth. As the infrastructure that carries large-scale computing resources, the importance of the intelligent computing center is increasingly prominent. The delay bandwidth, stability, security and other factors of the interconnected network where the intelligent computing center is located are directly related to the performance of the effective computing power of the cluster. Currently, Ethernet is gradually becoming an important development direction of the network interconnection technology of the intelligent computing center, with its strong industry ecosystem and continuously enhanced connection bandwidth capability.

[0031] The network of the intelligent computing data center needs to have high reliability to ensure the smooth progress of critical tasks. If a fault occurs during the Artificial Intelligence (AI) cluster training process, fault tolerance replacement or elastic scaling needs to be supported to handle the faulty nodes. And it should be able to support job rearrangement and scheduling to improve the overall training efficiency. In addition, to recover from faults in a timely manner, fault perception and quality degradation perception capabilities need to be enhanced, through obtaining fine-grained business flow throughput, packet loss and other information, to control the time-consuming of obstacle avoidance self-healing within seconds.

[0032] In the related art, for the TCP / IP network reference model, there are fault detection mechanisms at multiple layers; exemplarily, these fault detection mechanisms include an Ethernet Operation Administration and Maintenance (Eth-OAM) mechanism at the link layer, a Spanning Tree Protocol (STP) based mechanism, a Rapid Spanning Tree Protocol (RSTP) based mechanism, a Multiple Spanning Tree Protocol (MSTP) based mechanism, a HELLO mechanism of various network layer protocols, and a heartbeat mechanism of various application layer protocols themselves, a retransmission mechanism, etc. The Hello detection mechanism of the commonly used Open Shortest Path First (OSPF), Border Gateway Protocol (BGP) and other network protocols can achieve a fault convergence speed of seconds.

[0033] When detecting the fault of a forwarding node through upper layer protocols such as a link layer protocol, a network layer protocol, and an application layer protocol, the fault detection time is more than 1 second, and a second-level fault recovery time means that a large number of public user services will be interrupted or retransmitted. For high-speed data transmission, for example, G-bit rate level, a detection time of more than 1 second will result in a large amount of data loss, and such a fault detection time is unacceptable.

[0034] In the related art, a hardware Bidirectional Forwarding Detection (BFD) mechanism is a relatively widely used mechanism for realizing fast fault detection through hardware detection. When detecting a fault through the BFD mechanism, through linkage with an upper layer routing protocol, fast convergence of routing node detection can be realized to ensure the continuity of services. The hardware BFD mechanism can provide a detection speed of milliseconds, accelerate network convergence speed, reduce application interruption time, and improve network reliability.

[0035] Although the hardware BFD mechanism can realize millisecond-level detection, it cannot meet the fault detection requirements of the 800G port transmission scenario of the intelligent computing center high-speed interconnection; and since it is necessary to encapsulate IP header information and the like for the fault detection packet of the hardware BFD, the valuable bandwidth resources of the network will also be occupied.

[0036] In summary, the technical solutions of the related art have the problems of long detection time and high bandwidth resource occupation rate, and need to be improved so that the fault detection scheme is more easily deployed in operator networks.

[0037] To address the aforementioned technical problems, this application proposes a technical solution based on the Ethernet physical layer fault detection scheme. This scheme integrates fault detection technology with Ethernet physical layer technology to achieve fault detection with characteristics such as low overhead, low latency, and reliable transmission, thereby meeting the reliable transmission requirements of the data link layer and all upper-layer protocols.

[0038] The embodiments of this application will be further described in detail below with reference to the accompanying drawings and examples. It should be understood that the embodiments provided herein are merely illustrative of the embodiments of this application and are not intended to limit the embodiments of this application. Furthermore, the embodiments provided below are some embodiments for implementing this application, and not all embodiments for implementing this application. Unless otherwise specified, the technical solutions described in the embodiments of this application can be implemented in any combination.

[0039] It should be noted that, in the embodiments of this application, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a method or apparatus that includes a list of elements includes not only the elements expressly described, but also other elements not expressly listed, or elements inherent to implementing the method or apparatus. Without further limitations, an element defined by the phrase "comprising a..." does not exclude the presence of other related elements (e.g., steps in the method or units in the apparatus, such as portions of circuitry, processors, programs, or software, etc.) in the method or apparatus that includes that element.

[0040] The fault detection method provided in this application includes a series of steps, but the fault detection method provided in this application is not limited to the steps described. Similarly, the fault detection device provided in this application includes a series of modules, but the device provided in this application is not limited to the modules explicitly described, and may also include modules that need to be set up for obtaining relevant information or processing based on information.

[0041] Figure 1 This is a flowchart of a fault detection method according to an embodiment of this application, such as... Figure 1 As shown, the process may include:

[0042] Step 101: Detect the status of the two ports to be tested by transmitting a preset bit stream between the two ports to be tested at the physical layer, wherein the preset bit stream includes fault detection information.

[0043] In this embodiment, the fault detection information is used to detect physical layer port faults, and the fault detection information can be preset according to actual needs.

[0044] Step 102: when detecting that at least one port of the two to-be-detected ports is faulty, switching target traffic transmitted between the two to-be-detected ports to a target link, the target link representing a link between a first port and a second port, the first port and the second port representing other ports except the at least one port.

[0045] In the embodiments of the present application, when detecting that at least one port of the two to-be-detected ports is faulty, a port isolation measure can be taken, and then the target traffic is switched to the target link. Referring to Figure 2 , GSF1 represents a sending end device of the physical layer, GSP1, GSP2 and GSP3 represent three receiving end devices of the physical layer, F1P1, F1P2 and F1P3 represent three physical layer ports of GSF1, P1P1 is a physical layer port of GSP1, P2P1 is a physical layer port of GSP2, and P3P1 is a physical layer port of GSP3; when at least one of F1P1 and P1P1 is faulty, the target traffic transmitted between F1P1 and P1P1 can be switched to a target link, and the target link can be a link between F1P2 and P2P1 or a link between F1P3 and P3P1.

[0046] In actual application, steps 101 to 102 can be implemented based on a processor, and the processor can be at least one of an Application Specific Integrated Circuit (ASIC), a Digital Signal Processor (DSP), a Digital Signal Processing Device (DSPD), a Programmable Logic Device (PLD), a Field Programmable Gate Array (FPGA), a CPU, a controller, a microcontroller, and a microprocessor.

[0047] It can be seen that, by constructing a bit stream at the physical layer to detect faults, the embodiments of the present application do not need to additionally detect faults through an upper layer protocol, can reduce the processing delay caused by complex protocol encapsulation, and thus reduce the fault detection time of a network node.

[0048] In some embodiments of the present application, the process of detecting the state of two to-be-detected ports at the physical layer by transmitting a preset bit stream between the two to-be-detected ports can include:

[0049] In each fault detection period, the state of the two to-be-detected ports is detected by transmitting the preset bit stream between the two to-be-detected ports at the physical layer, and the fault detection period represents a period of detecting port faults.

[0050] Here, the fault detection period can be pre-configured according to actual needs. For example, each fault detection period includes at least a target time period for transmitting the preset bit stream.

[0051] Correspondingly, after detecting the state of the two to-be-detected ports by transmitting the preset bit stream between the two to-be-detected ports at the physical layer, the method further includes: in response to the fact that the at least one port does not receive the preset bit stream within the target time period, determining that the at least one port has a fault.

[0052] As can be seen, the embodiments of the present application can simply and easily realize detection of port faults by judging whether the preset bit stream is received within the target time period.

[0053] In some embodiments of the present application, the method further includes: in response to the fact that the at least one port does not receive the preset bit stream within the target time period, determining to enter the next fault detection period. In this way, the fault detection of the physical layer port can continue in the target time period of the next fault detection period, so as to realize continuous fault detection of the physical layer port.

[0054] In some embodiments of the present application, the method further includes: in response to the fact that the receiving port in the two to-be-detected ports receives the preset bit stream within the target time period, continuing to detect the state of the two to-be-detected ports by transmitting the preset bit stream between the two to-be-detected ports in the current fault detection period. As can be seen, when the receiving port in the two to-be-detected ports receives the preset bit stream within the target time period, it can be considered that the two to-be-detected ports do not have a fault at present. Therefore, by continuing to detect the state of the two to-be-detected ports by transmitting the preset bit stream between the two to-be-detected ports, normal data transmission between the two to-be-detected ports can be realized, and future possible faults of the ports can also be detected.

[0055] For example, the fault detection period can be denoted as PHYT, and the four time periods arranged in time sequence in each fault detection period include a time period corresponding to a first state, a time period corresponding to a second state, a time period corresponding to a third state, and a time period corresponding to a fourth state. The first state can be denoted as a PORT-FAULT state, the second state can be denoted as a PORT-START state, the third state can be denoted as a PORT-MID state, and the fourth state can be denoted as a PORT-NORMAL state. The time period corresponding to the fourth state is the target time period.

[0056] Referring to Figure 3 In the time period corresponding to the first state, both of the two to-be-detected ports transmit a preset START bit stream, and then enter a time period corresponding to a second state. In the time period corresponding to the second state, both of the two to-be-detected ports transmit a preset MID bit stream, and then enter a time period corresponding to a third state. In the time period corresponding to the third state, both of the two to-be-detected ports start to transmit a preset NORMAL bit stream, and a timer is started. After the transmission of the NORMAL bit stream within the time period of the timer, a target time period is entered, and the time of the timer is cleared. Here, the transmission of the NORMAL bit stream in the time period corresponding to the third state is conducive to the stable reception of the NORMAL bit stream in the target time period. In the target time period, the transmission of the NORMAL bit stream between the two to-be-detected ports continues, and the timer is started. If the receiving port can receive the NORMAL bit stream within the time period of the timer, the fourth state is continued, and the transmission of the NORMAL bit stream in the target time period continues. If the receiving port fails to receive the NORMAL bit stream within the time period of the timer, the next fault detection period is entered.

[0057] In some embodiments, a PhyDetect session can be established between the two to-be-detected ports, and a PhyDetect bit stream can be periodically transmitted along the path between them. The PhyDetect bit stream is the preset bit stream described above. The transmission interval of the sending end and the receiving interval of the receiving end in the two to-be-detected ports can be configured. In the time period corresponding to the first state, the time period corresponding to the second state, the time period corresponding to the third state, and the time period corresponding to the fourth state, the type of the PhyDetect session can be different types. For example, in the time period corresponding to the first state, the type of the PhyDetect session can be represented by the number 0; in the time period corresponding to the second state, the type of the PhyDetect session can be represented by the number 1; in the time period corresponding to the third state, the type of the PhyDetect session can be represented by the number 2; and in the time period corresponding to the fourth state, the type of the PhyDetect session can be represented by the number 3.

[0058] In some embodiments of the present application, before the state of detecting the two to-be-detected ports by transmitting the preset bit stream, the method further comprises: constructing, by the sending port of the two to-be-detected ports, a composite bit stream composed of a start code block, a data code block, an end code block, and an idle code block through a preset encoding; then, replacing at least one idle code block in the composite bit stream with a fault detection code block for carrying fault detection information to obtain the preset bit stream. In some embodiments, the preset encoding is 64B / 66B encoding.

[0059] In the embodiment of the application, the composite bit stream is constructed by performing 64B / 66B encoding at the physical layer, and then idle code blocks in the composite bit stream are replaced by fault detection code blocks, so as to realize transmission of fault detection information, where the fault detection code blocks can be denoted as o code blocks.

[0060] With reference to Figure 4 , the original data frame is converted into a sequence of 8-bit data bit streams at the Medium Access Control (MAC) layer of the sending end, and the converted 8-bit data bit stream sequence is transmitted through the physical layer (PHY) chip of the sending end. In the PHY chip, the physical coding sublayer (PCS) of the physical layer converts data or control characters of the interface into 66-bit blocks (i.e., 66B code blocks) according to certain rules. The encoding format of the original data frame and the 66B code blocks can be the encoding format shown in Figure 5 . With reference to Figure 5 , the original data frame includes a 7-byte preamble (PREAMBLE), a 1-byte start of frame delimiter (SFD), a 6-byte destination address (DMAC), a 6-byte source address (SMAC), a 2-byte type field, n-byte data, a 4-byte frame check sequence (FCS), and the like.

[0061] After the 66B code blocks are subjected to scrambling, Reed-Solomon forward error correction (RS-FEC), segmentation, and other physical layer processing, the 66B code blocks enter the egress port. After the receiving end receives information from the ingress port, the information is subjected to physical medium attachment (PMA) sublayer processing, and the fault detection information is extracted at the PCS layer, and then the Ethernet frame is restored.

[0062] A 66B code block contains 66-bit data. For example, the data at positions [0:1] in a 66B code block represents a synchronization header, and the data at positions [2:65] represents actual transmission information. Here, positions [0:1] represent the positions of the first bit and the second bit, and positions [2:65] represent the positions of the third bit to the sixty-sixth bit.

[0063] With reference to Figure 5 and Figure 6The 66B code block in the composite bit stream includes a start code block, a data code block, an end code block and an idle code block; wherein the start code block can be denoted as an S code block, the start code block is composed of a synchronization header "10", an 8-bit block type field and 8 7-bit control information, and the start code block indicates the beginning of a data frame. The data code block can be denoted as a D code block, the data code block is composed of a synchronization header "01" and 8 8-bit data information. The end code block can be denoted as a T code block, the end control word in the end code block can appear at any position in the 8 bytes, and the end code block is distinguished by the control code block type field, and the end code block indicates the end of a frame. The idle code block can be denoted as an I code block, the idle code block is composed of a synchronization header "10", 1E and 8 7-bit control information, and the idle code block is a code block that is not in an idle state.

[0064] According to the Institute of Electrical and Electronics Engineers (IEEE) 802.3 specification, there is an Inter Packet Gap (IPG) between adjacent Ethernet data frames, and the IPG becomes an end code block and an idle code block after being encoded by 66B.

[0065] In the embodiment of the application, the o code block can be inserted at a specific position of the IPG by replacing the idle code block. The o code block is not inserted at will in the IPG, because the insertion position of the o code block inserted at will can deviate from the expected insertion position. It is assumed that the insertion period of the o code block is τ, the first o code block is inserted on time, and when the second o code block needs to be inserted, that is, after a time τ, the expected insertion position is a data code block, not an idle code block. Therefore, the second o code block needs to wait for a time τ' before being inserted, that is, the o code block is inserted after the end code block of the Ethernet message after being encoded.

[0066] Exemplarily, the o code block carries fault detection information, the control field is 0x4B, and the o code field is 0x8. The control field and the o code field are used to indicate that the code block currently transmitted is the o code block carrying the fault detection information. Referring to Figure 7 The available information (fault detection information) of the o code block is D1 to D3, and the available information of the o code block occupies 3 bytes in total.

[0067] As can be seen, the idle code block can be replaced by the fault detection code block for carrying the fault detection information, so as to realize fault detection. That is, the embodiment of the application can use the inherent code block of the Ethernet physical layer to carry the fault detection parameter, without introducing additional bandwidth overhead, so as to realize low overhead of bandwidth resources.

[0068] In some embodiments of the present application, the fault detection information in the fault detection code block comprises at least one of the following: local device identifier, local device port, opposite device identifier, opposite device port, data transmission state between the two to be detected ports, length of a target time period, the target time period representing a time period for transmitting the preset bit stream in each fault detection period, and the fault detection period representing a period for detecting port faults. Here, the local device identifier can be an ID or other identifier, the opposite device identifier can be an ID or other identifier, the data transmission state between the two to be detected ports can be a first state, a second state, a third state, and a fourth state, and the first state, the second state, the third state, and the fourth state can be represented by a number 0, a number 1, a number 2, and a number 3, respectively.

[0069] Exemplarily, in the order of the o-code block numbers shown in Table 1, each control field in the fault detection information shown in Table 1 can be transmitted by using a plurality of o-code blocks, for example, a first o-code block is used to transmit a field for identifying the start of a combined frame, the combined frame is a data frame carrying a preset bit stream, and the code block result of the combined frame is shown in Table 1; a second o-code block is used to transmit a local device identifier, and so on until the transmission of the fault detection information shown in Table 1 is completed. Figure 6

[0070] Table 1: Control field table in fault detection information

[0071] o code block number explanation 1 for identifying the start of a combined frame 2 local device identification 3 local device port 4 peer device identification 5 peer device port 6 detecting the type of session at the physical layer 7 data transmission state between ports to be detected 8 timing duration of the timer 9-N reserved field

[0072] The embodiments of the present application can implement fault detection of the Ethernet physical layer based on a preset bit stream constructed by 64B / 66B encoding, and can be applied to scenarios such as intelligent center network and wide area network. The technical solutions of the embodiments of the present application include physical layer port fault detection, port fault processing, and physical layer fault information transmission. The physical layer fault detection is used to detect the state information of the port at the physical layer, the fault processing is the processing mode of the fault port and the corresponding traffic after the fault information is detected, and the fault information transmission is used to transmit the fault information at the physical layer.

[0073] In the embodiments of the present application, the fault detection is performed by constructing a bit stream at the physical layer, which reduces the complex protocol encapsulation overhead and processing delay, and has the advantages of low overhead, low delay, and protocol transparency. The inherent code block of the Ethernet physical layer is used to carry the fault detection parameters, without introducing additional bandwidth overhead, thereby realizing low overhead and having the advantage of high bandwidth utilization rate for bandwidth-sensitive use scenarios such as data center interconnection and enterprise park. In addition, the 64B / 66B encoding method can be compatible with all types of ports and has universality. Meanwhile, the o-code block insertion adopts in-situ replacement, which has the benefit of short delay.

[0074] ​Those skilled in the art can understand that, in the above method of the specific embodiment, the writing order of each step does not mean a strict execution order and does not constitute any limitation on the implementation process. The specific execution order of each step should be determined by its function and possible internal logic.

[0075] Figure 8 A structural schematic diagram of a fault detection device of an embodiment of the present application is shown in FIG. 1. As shown in FIG. 1, the device comprises: Figure 8

[0076] A first processing module 801 is configured to detect the status of two to-be-detected ports at the physical layer by transmitting a preset bit stream between the two to-be-detected ports, wherein the preset bit stream comprises fault detection information.

[0077] A second processing module 802 is configured to switch target traffic transmitted between the two to-be-detected ports to a target link when it is detected that at least one port of the two to-be-detected ports has a fault, wherein the target link represents a link between a first port and a second port, and the first port and the second port represent other ports except the at least one port.

[0078] In some embodiments, the first processing module 801 is configured to detect the status of the two to-be-detected ports at the physical layer by transmitting the preset bit stream between the two to-be-detected ports, comprising: detecting the status of the two to-be-detected ports by transmitting the preset bit stream between the two to-be-detected ports at each fault detection period; and the fault detection period represents a period for detecting port faults.

[0079] In some embodiments, each fault detection period comprises at least a target time period for transmitting the preset bit stream; and the first processing module 801 is further configured to, after detecting the status of the two to-be-detected ports by transmitting the preset bit stream between the two to-be-detected ports at the physical layer, determine that the at least one port has a fault in response to the at least one port not receiving the preset bit stream within the target time period.

[0080] In some embodiments, the first processing module 801 is further configured to determine to enter a next fault detection period when the at least one port does not receive the preset bit stream within the target time period.

[0081] In some embodiments, the first processing module 801 is further configured to, when a receiving port of the two to-be-detected ports receives the preset bit stream within the target time period, continue to detect the status of the two to-be-detected ports by transmitting the preset bit stream between the two to-be-detected ports at the current fault detection period.

[0082] ​In some embodiments, the first processing module 801 is further configured to, before detecting the states of the two to-be-detected ports by transmitting the preset bit stream, construct the composite bit stream by a preset encoding at a sending port of the two to-be-detected ports; replace at least one idle code block in the composite bit stream with a fault detection code block for carrying the fault detection information, to obtain the preset bit stream.

[0083] In some embodiments, the preset encoding is 64B / 66B encoding.

[0084] In some embodiments, the fault detection information in the fault detection code block includes at least one of the following: a local device identifier, a local device port, a peer device identifier, a peer device port, a data transmission state between the two to-be-detected ports, a length of a target time period, the target time period representing a time period for transmitting the preset bit stream in each fault detection period, and a fault detection period representing a period for detecting port faults.

[0085] In actual applications, the first processing module 801 and the second processing module 802 can be implemented based on a processor and a communication device.

[0086] It should be noted that the above description of the device embodiments is similar to the description of the above method embodiments, and has similar beneficial effects to the method embodiments. For technical details not disclosed in the device embodiments of the present application, please refer to the description of the method embodiments of the present application for understanding.

[0087] It should be noted that in the embodiments of the present application, if the above method is implemented in the form of a software function module and sold or used as an independent product, it can also be stored in a computer readable storage medium. Based on such understanding, the technical solutions of the embodiments of the present application can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a plurality of instructions for causing a computer device (which can be a terminal, a server, etc.) to execute all or part of the methods described in the embodiments of the present application. The foregoing storage medium includes: a U disk, a mobile hard disk, a read-only memory (ROM), a magnetic disk or an optical disk, and various media that can store program codes. Thus, the embodiments of the present application are not limited to any specific hardware and software combination.

[0088] Correspondingly, the embodiments of the present application further provide a computer program product, which includes computer executable instructions for implementing any one of the fault detection methods provided by the embodiments of the present application.

[0089] Correspondingly, the embodiment of the present application further provides a computer storage medium, which has computer executable instructions stored thereon, and the computer executable instructions are used for implementing any one of the fault detection methods provided by the above-mentioned embodiments.

[0090] The embodiment of the present application further provides an electronic device. Figure 9 A schematic diagram of a component structure of an electronic device provided by the embodiment of the present application is shown in FIG. 9, which shows that the electronic device 90 can include: Figure 9

[0091] a memory 901, configured to store executable instructions;

[0092] a processor 902, configured to execute the executable instructions stored in the memory 901, so as to implement any one of the fault detection methods.

[0093] The processor 902 can be at least one of an ASIC, a DSP, a DSPD, a PLD, an FPGA, a CPU, a controller, a microcontroller, and a microprocessor.

[0094] The computer readable storage medium and the memory 902 can be a Read Only Memory (ROM), a Programmable Read-Only Memory (PROM), an Erasable Programmable Read-Only Memory (EPROM), an Electrically Erasable Programmable Read-Only Memory (EEPROM), a Ferromagnetic Random Access Memory (FRAM), a Flash Memory, a magnetic surface memory, an optical disc, a Compact Disc Read-Only Memory (CD-ROM), or the like. In addition, the computer readable storage medium can also be various terminals including one or any combination of the above-mentioned memories, such as a mobile phone, a computer, a tablet device, a personal digital assistant, and the like.

[0095] In some embodiments, the apparatus provided by the embodiment of the present application has functions or includes modules, which can be used to execute the methods described in the above method embodiments, and the specific implementation can refer to the description of the above method embodiments. For brevity, details are not described herein.

[0096] The above description of each embodiment tends to emphasize the differences between the embodiments, and the same or similar parts can be mutually referred to. For brevity, details are not described herein.​

[0097] The methods disclosed in the various method embodiments provided in the present application can be combined arbitrarily without conflict to obtain new method embodiments.

[0098] The features disclosed in the various product embodiments provided in the present application can be combined arbitrarily without conflict to obtain new product embodiments.

[0099] The features disclosed in the various method or device embodiments provided in the present application can be combined arbitrarily without conflict to obtain new method embodiments or device embodiments.

[0100] From the above description of the embodiments, those skilled in the art can clearly understand that the above-mentioned embodiment methods can be realized by means of software and a necessary general hardware platform, and of course, can also be realized by hardware, but in many cases, the former is a better embodiment. Based on such understanding, the technical solutions of the present application can be embodied in the form of a software product in essence or in the form of a part of the prior art that makes a contribution. The computer software product is stored in a storage medium (such as a ROM / RAM, a magnetic disk, or an optical disk) and includes a plurality of instructions for causing a terminal (which can be a mobile phone, a computer, a server, an air conditioner, or a network device) to execute the methods described in the various embodiments of the present application.

[0101] The embodiments of the present application are described above in combination with the accompanying drawings, but the present application is not limited to the above-mentioned specific embodiments, and the above-mentioned specific embodiments are merely illustrative and not limiting. Those skilled in the art can make many forms without departing from the scope of the present application under the inspiration of the present application, and these are all within the protection scope of the present application.

Claims

1. A fault detection method characterized by, The method comprises: detecting the state of two to-be-detected ports at the physical layer by transmitting a preset bit stream between the two to-be-detected ports, wherein the preset bit stream comprises fault detection information; when it is detected that at least one port of the two to-be-detected ports is faulty, switching target traffic transmitted between the two to-be-detected ports to a target link, the target link representing a link between a first port and a second port, the first port and the second port representing other ports except the at least one port; the detection of the state of the two to-be-detected ports at the physical layer by transmitting the preset bit stream between the two to-be-detected ports comprises: detecting the state of the two to-be-detected ports at the physical layer by transmitting the preset bit stream between the two to-be-detected ports in each fault detection period; the fault detection period represents a period for detecting port faults; each fault detection period comprises at least a target time period for transmitting the preset bit stream; after the detection of the state of the two to-be-detected ports at the physical layer by transmitting the preset bit stream between the two to-be-detected ports, the method further comprises: in response to the at least one port not receiving the preset bit stream within the target time period, determining that the at least one port is faulty; before the detection of the state of the two to-be-detected ports by transmitting the preset bit stream, the method further comprises: constructing a composite bit stream by a preset encoding at a sending port of the two to-be-detected ports; and replacing at least one idle code block in the composite bit stream with a fault detection code block for carrying the fault detection information, to obtain the preset bit stream.

2. The method of claim 1, wherein, The method further comprises: in response to the at least one port not receiving the preset bit stream within the target time period, determining to enter a next fault detection period.

3. The method of claim 1, wherein, The method further comprises: in response to a receiving port of the two to-be-detected ports receiving the preset bit stream within the target time period, continuing to detect the state of the two to-be-detected ports by transmitting the preset bit stream between the two to-be-detected ports in a current fault detection period.

4. The method of claim 1, wherein, The preset encoding is 64B / 66B encoding.

5. The method of claim 1, wherein, The fault detection information in the fault detection code block comprises at least one of the following: a local device identifier, a local device port, a peer device identifier, a peer device port, a data transmission state between the two to-be-detected ports, a length of the target time period, the target time period representing a time period for transmitting the preset bit stream in each fault detection period, and the fault detection period representing a period for detecting port faults.

6. A fault detection apparatus characterized by comprising: The apparatus comprises: a first processing module configured to detect the state of two to-be-detected ports at the physical layer by transmitting a preset bit stream between the two to-be-detected ports, wherein the preset bit stream comprises fault detection information; The second processing module is configured to switch target traffic transmitted between the two to-be-detected ports to a target link when it is detected that at least one of the two to-be-detected ports is faulty, the target link representing a link between a first port and a second port, the first port and the second port representing other ports except the at least one port; The first processing module is configured to detect the status of the two to-be-detected ports by transmitting a preset bit stream between the two to-be-detected ports at the physical layer, including: detecting the status of the two to-be-detected ports by transmitting the preset bit stream between the two to-be-detected ports at the physical layer in each fault detection period; the fault detection period representing a period of detecting port faults; The first processing module is configured to detect the status of the two to-be-detected ports by transmitting a preset bit stream between the two to-be-detected ports at the physical layer, including: detecting the status of the two to-be-detected ports by transmitting the preset bit stream between the two to-be-detected ports at the physical layer in each fault detection period; the fault detection period representing a period of detecting port faults; The first processing module is configured to detect the status of the two to-be-detected ports by transmitting a preset bit stream between the two to-be-detected ports at the physical layer, including: detecting the status of the two to-be-detected ports by transmitting the preset bit stream between the two to-be-detected ports at the physical layer in each fault detection period; the fault detection period representing a period of detecting port faults; 7. An electronic device, comprising: The electronic device includes a processor and a memory for storing a computer program capable of running on the processor; wherein, The processor is configured to run the computer program to perform the method of any one of claims 1 to 5.

8. A computer storage medium having stored thereon a computer program, characterized in that The computer program is executed by the processor to implement the method of any one of claims 1 to 5.

9. A computer program product comprising a computer program, characterized in that, The computer program is executed by the processor to implement the method of any one of claims 1 to 5. The computer program is executed by the processor to implement the method of any one of claims 1 to 5.

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