Power amplifier chip, driving circuit and electronic equipment

Abstract

The invention discloses a power amplifier chip, a driving circuit and electronic equipment. The power amplifier chip comprises at least two groups of audio signal input pins, at least two groups of audio signal output pins, at least two power amplifiers, at least two first switch units and a control unit, wherein the at least two groups of audio signal input pins and the at least two groups of audio signal output pins are arranged in a one-to-one correspondence manner to form at least two audio transmission channels; each audio transmission channel is provided with one or more power amplifiers; wherein the input end of each power amplifier is connected with at least one group of audio signal input pins through one first switch unit, and the output end of each power amplifier is connected with at least one group of audio signal output pins; each first switch unit is connected with the control unit; wherein the control unit is used for controlling the on-off state of the first switch unit, and each power amplifier is connected with at most one group of audio signal input pins of the power amplifier chip through the first switch unit.

Description

Technical Field

[0001] The present application relates to the technical field of electronic products, and in particular to a power amplifier chip, a driving circuit and an electronic device. Background Art

[0002] With the development of electronic devices such as mobile phones and tablets, and the increase in user demand for scenarios such as audio and video entertainment, the audio output of electronic devices has gradually increased from a single speaker to stereo, or even more channels. Electronic devices with audio output functions usually use audio power amplifiers (PA) to drive passive devices such as speakers. The current PA module (or PA chip) usually supports one audio output, so in order to set up driving circuits such as dual speakers or multiple speakers on electronic devices, more PAs need to be configured to achieve this. For example, taking a dual-speaker audio system as an example, two PA modules need to be set up, and each PA module corresponds to one or two audio output channels, thereby realizing two-way audio output. This is due to the limitation of the single-channel output function of the PA module, resulting in the driving circuit in the multi-channel audio output scenario will occupy a large space, and even increase the difficulty of the layout of electronic devices. Summary of the invention

[0003] The embodiments of the present application provide a power amplifier chip, a driving circuit and an electronic device to solve the problem that the current power amplifier chip causes the driving circuit to occupy a large space in a multi-channel audio output scenario, and even increases the difficulty of layout of the electronic device.

[0004] In order to solve the above technical problems, this application is implemented as follows:

[0005] In a first aspect, an embodiment of the present application provides a power amplifier chip, comprising: at least two groups of audio signal input pins, at least two groups of audio signal output pins, at least two power amplifiers, at least two first switch units, and a control unit;

[0006] The at least two groups of audio signal input pins and the at least two groups of audio signal output pins are arranged in a one-to-one correspondence to form at least two audio transmission channels; each of the audio transmission channels is provided with one or more power amplifiers; the input end of each power amplifier is connected to at least one group of audio signal input pins through one of the first switch units, and the output end of each power amplifier is connected to at least one group of audio signal output pins;

[0007] Each of the first switch units is connected to the control unit; wherein the control unit is used to control the switch state of the first switch unit, and each of the power amplifiers is connected to at most one group of audio signal input pins of the power amplifier chip through the first switch unit.

[0008] In a second aspect, an embodiment of the present application further provides a driving circuit, comprising the power amplifier chip as described above, wherein the driving circuit further comprises: at least one speaker, and / or at least one linear motor; wherein:

[0009] Each group of audio signal input pins of the power amplifier chip is respectively connected to a speaker or a linear motor.

[0010] In a third aspect, an embodiment of the present application further provides an electronic device, comprising the driving circuit as described above.

[0011] Thus, in the above scheme of the present application, multiple groups of audio signal input pins and multiple groups of audio signal output pins are set in the power amplifier chip to form multiple groups of audio transmission channels, that is, a power amplifier chip that realizes multi-channel audio transmission. And one or more power amplifiers are set in each audio transmission channel, and the input end of each power amplifier is connected to at least one group of audio signal input pins through a first switch unit, and the output end of each power amplifier is connected to at least one group of audio signal output pins, that is, the switch state of the first switch unit is controlled by the control unit, so that each power amplifier is connected to at most one group of audio signal input pins through the first switch unit, so as to realize power amplification of the audio transmission channel where the power amplifier is located, and avoid interference. In this way, the scheme realizes that a power amplifier chip can integrate multiple audio transmission channels, so that in the multi-channel audio output scenario, the number of power amplifier chips set in the driving circuit can be reduced, the space occupied by the driving circuit can be reduced, and it is conducive to reducing the layout difficulty of electronic equipment. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 One of the schematic diagrams showing the power amplifier chip according to the embodiment of the present application;

[0013] Figure 2 A second schematic diagram showing the power amplifier chip according to an embodiment of the present application;

[0014] Figure 3 A partial schematic diagram showing a power amplifier chip according to an embodiment of the present application;

[0015] Figure 4 A second partial schematic diagram showing the power amplifier chip according to an embodiment of the present application;

[0016] Figure 5 A third partial schematic diagram showing the power amplifier chip according to an embodiment of the present application;

[0017] Figure 6 A fourth partial schematic diagram showing the power amplifier chip according to an embodiment of the present application;

[0018] Figure 7 A fifth partial schematic diagram showing the power amplifier chip according to an embodiment of the present application;

[0019] Figure 8 A schematic diagram showing the internal structure of a power amplifier according to an embodiment of the present application;

[0020] Fig. 9 One of the schematic diagrams showing the driving circuit of an embodiment of the present application;

[0021] Fig.10 A second schematic diagram showing a driving circuit according to an embodiment of the present application;

[0022] Fig.11 A third schematic diagram showing a driving circuit according to an embodiment of the present application;

[0023] Fig.12 A fourth schematic diagram showing a driving circuit according to an embodiment of the present application;

[0024] Fig.13 A fifth schematic diagram showing a driving circuit according to an embodiment of the present application. DETAILED DESCRIPTION

[0025] The exemplary embodiments of the present application will be described in more detail below with reference to the accompanying drawings. Although the exemplary embodiments of the present application are shown in the accompanying drawings, it should be understood that the present application can be implemented in various forms and should not be limited by the embodiments set forth herein. On the contrary, these embodiments are provided in order to enable a more thorough understanding of the present application and to fully convey the scope of the present application to those skilled in the art.

[0026] like Figures 1 to 3 As shown, the embodiment of the present application provides a power amplifier chip 1, including: at least two groups of audio signal input pins, at least two groups of audio signal output pins, at least two power amplifiers 10, at least two first switch units 20, and a control unit 30. For example, at least two power amplifiers 10 and at least two first switch units 20 can be arranged as follows: Figure 1 and Figure 2 The power amplifier unit 12 shown in FIG. 1 may include: a power amplifier 10 and a first switch unit 20. Optionally, the at least two power amplifiers 10 and the at least two first switch units 20 may be integrated into one power amplifier unit 12, such as Figure 1 Alternatively, the at least two power amplifiers 10 and the at least two first switch units 20 may be respectively arranged in a plurality of power amplifier units 12, such as Figure 2 As shown, the embodiments of the present application are not limited thereto.

[0027] The at least two groups of audio signal input pins are arranged in one-to-one correspondence with the at least two groups of audio signal output pins to form at least two audio transmission channels; each of the audio transmission channels is provided with one or more power amplifiers 10; wherein, Figure 3 As shown, the input end of each power amplifier 10 is connected to at least one group of audio signal input pins through one first switch unit 20, and the output end of each power amplifier 10 is connected to at least one group of audio signal output pins. For example, the at least two power amplifiers 10 and the at least two first switch units 20 can be connected in a one-to-one correspondence.

[0028] Each of the first switch units 20 is connected to the control unit 30; wherein the control unit 30 is used to control the switching state of the first switch unit 20, and each of the power amplifiers 10 is connected to at most one group of audio signal input pins of the power amplifier chip 1 through the first switch unit 20.

[0029] For example, a group of audio signal input pins and a group of audio signal output pins of the power amplifier chip 1 can constitute an audio transmission channel of the amplifier chip. For example: the input end of each of the power amplifiers 10 can be connected to only one group of audio signal input pins through the first switch unit 20, and the output end of each of the power amplifiers 10 is only connected to a group of audio signal output pins of the power amplifier chip 1, that is, different audio transmission channels of the power amplifier chip 1 can be provided with different power amplifiers 10, so that different audio transmission channels of the power amplifier chip 1 can use different power amplifiers 10 to independently perform audio transmission, thereby facilitating audio transmission control. For another example: the input end of each of the power amplifiers 10 can be connected to multiple groups of audio signal input pins through the first switch unit 20, and the output end of each of the power amplifiers 10 is connected to multiple groups of audio signal output pins, that is, the power amplifiers 10 can be reused between different audio transmission channels of the power amplifier chip 1, so that multiple power amplifiers 10 can be flexibly allocated in each audio transmission channel.

[0030] It should be noted that when the power amplifier 10 is multiplexed between different audio transmission channels of the power amplifier chip 1, for any power amplifier 10, it only works in one audio transmission channel at a certain moment. For example, the switching state of the first switch unit 20 is controlled by the control unit 30, so that each power amplifier 10 is connected to at most one group of audio signal input pins of the power amplifier chip 1 through the first switch unit 20 to avoid interference.

[0031] Optionally, the control unit 30 can be connected to the control pins CTRL1 and CTRL2 in the power amplifier chip 1 to control the hardware state of each power amplifier in the power amplifier chip 1 (i.e., which power amplifier is connected to the audio transmission channel). The control unit 30 can adopt an integrated circuit bus (Inter-Integrated Circuit, IIC) control method, or a general-purpose input / output (General-purpose input / output, GPIO) control method, and control the working state or mode of each power amplifier through the first switch unit 20 based on the high and low level distinction.

[0032] Optionally, the first switch unit 20 may include one switch device, or may also include multiple switch devices; for example: when the input end of each power amplifier 10 is connected to only one group of audio signal input pins through the first switch unit 20, the first switch unit 20 may adopt a single-pole single-throw switch; for another example: when the input end of each power amplifier 10 is connected to multiple groups of audio signal input pins through the first switch unit 20, the first switch unit 20 may adopt a single-pole multi-throw switch (for example, it can be determined according to the number of audio transmission channels), or it may also adopt multiple single-pole single-throw switches, etc. The embodiments of the present application are not limited to this.

[0033] In the above scheme, multiple groups of audio signal input pins and multiple groups of audio signal output pins are set in the power amplifier chip 1 to form multiple groups of audio transmission channels, that is, the power amplifier chip 1 that realizes multi-channel audio transmission. And one or more power amplifiers 10 are set in each audio transmission channel, and the input end of each power amplifier 10 is connected to at least one group of audio signal input pins through a first switch unit 20, and the output end of each power amplifier 10 is connected to at least one group of audio signal output pins, that is, the switch state of the first switch unit 20 is controlled by the control unit 30, so that each power amplifier 10 is connected to at most one group of audio signal input pins through the first switch unit 20, so as to realize the power amplification of the audio transmission channel where the power amplifier 10 is located, and avoid interference. In this way, the scheme realizes that a power amplifier chip 1 can integrate multiple audio transmission channels, so that in the multi-channel audio output scenario, the number of power amplifier chips set in the driving circuit can be reduced, the space occupied by the driving circuit can be reduced, and it is conducive to reducing the layout difficulty of electronic equipment.

[0034] Optionally, a group of audio signal input pins of the power amplifier chip 1 may include two input pins, see Figures 1 to 3, the first group of audio signal input pins includes pins INP1 and INN1, and the second group of audio signal input pins includes pins INP2 and INN2. Similarly, a group of audio signal output pins of the power amplifier chip 1 may include two output pins, see Figures 1 to 3 The first group of audio signal output pins includes pins VOP1 and VON1, and the second group of audio signal output pins includes pins VOP2 and VON2. Of course, the embodiment of the present application is not limited to setting two groups of audio signal input pins and two groups of audio signal output pins. For example, 3 groups or even more than 3 groups can be set.

[0035] Optionally, the power amplifier chip 1 further includes: at least two signal processing units 11; the signal processing unit 11 can convert two audio signals input from a group of audio signal input pins of the power amplifier chip 1 into one audio signal, such as Figure 3 As shown, when one input end of the power amplifier 10 is connected to two input pins of a group of audio signal input pins through the first switch unit 20, the signal processing unit 11 can convert the audio signals input from the two input pins of a group of audio signal input pins into one audio signal input to the power amplifier 10.

[0036] Specifically, the first input end of each of the signal processing units 11 is connected to one of the input pins of the group of audio signal input pins, and the second input end of each of the signal processing units 11 is connected to another input pin of the group of audio signal input pins; the input end of each of the power amplifiers 10 is connected to the output end of each of the signal processing units 11 through a first switch unit 20. The signal processing unit 11 is used to convert two audio signals input from a group of audio signal input pins of the power amplifier chip 1 into one audio signal input to the power amplifier 10.

[0037] Optionally, the signal processing unit 11 may include: a differential processor 112 and a modulator 113; the first input end of the differential processor 112 may be connected to one of the input pins of a group of the audio signal input pins, the second input end of the differential processor 112 may be connected to another input pin of the group of the audio signal input pins, the input end of the differential processor 112 may be connected to the negative input end of the modulator 113, the negative input end of the modulator 113 inputs the modulation signal, and the output end of the modulator 113 is connected to the input end of the power amplifier 10. In this way, the audio signals input from a group of the audio signal input pins are differentially processed by the differential processor 112, and one audio signal is output to the negative input end of the modulator 113. The modulator 113 modulates one audio signal on the negative input end into a square wave signal based on the modulation signal input from the positive input end (for example, the modulation signal may be a preset triangle wave signal), and inputs the square wave signal to the power amplifier 10.

[0038] Alternatively, if Figure 1 and Figure 2 As shown, the power amplifier chip 1 further includes: an input buffer (INPUT BUFFER) unit 111, a first input end of the input buffer unit 111 is connected to one of the input pins of a group of the audio signal input pins, a second input end of the input buffer unit 111 is connected to another input pin of the group of the audio signal input pins, a first output end of the input buffer unit 111 is connected to a first input end of the differential processor 112, and a second output end of the input buffer unit 111 is connected to a second input end of the differential processor 112. The input buffer unit 111 is used to receive an input audio signal and provide buffering.

[0039] Optionally, the power amplifier chip 1 further includes: a reset (RESET) unit 13 and an address configuration (Address) unit 14; wherein the reset unit 13 is connected to the reset pin RSTN of the power amplifier chip 1, and the address configuration unit 14 is connected to the address pin AD of the power amplifier chip 1, and the reset unit 13 and the address configuration unit 14 are respectively connected to the control unit 30, and the control unit 30 controls the reset unit 13 to reset the power amplifier 10, and controls the address configuration unit 14 to configure the address of IIC, and multiple power amplifiers in the power amplifier chip 1 can share an IIC address, and the register addresses corresponding to the power amplifiers in different audio transmission channels can be different. Optionally, the control unit 30 can also control the state of the register, etc., and the embodiments of the present application are not limited to this.

[0040] Optionally, when the output end of the power amplifier 10 is connected to the audio signal output pin, the output end of the power amplifier 10 can be directly connected to the audio signal output pin, for example, the first output end of the power amplifier 10 is connected to one of the output pins of a group of audio signal output pins (for example, pin VOP1), and the second output end of the power amplifier 10 is connected to another output end of a group of audio signal output pins (for example, pin VON1).

[0041] Alternatively, the output end of the power amplifier 10 may be indirectly connected to the audio signal output pin. Figure 2 As shown, the power amplifier chip 1 also includes: an electromagnetic interference (EMI) suppression unit 15, which is arranged at the output end of the power amplifier unit 12, that is, the EMI suppression unit 15 is arranged between the output end of the power amplifier and the audio signal output pin, and is used to improve the anti-interference performance of the amplifier. Specifically, the first output end of the power amplifier 10 is connected to the first input end of the EMI suppression unit 15, the second output end of the power amplifier 10 is connected to the second input end of the EMI suppression unit 15, the first output end of the EMI suppression unit 15 is connected to one of the output pins of a group of audio signal output pins (such as pin VOP1), and the second output end of the EMI suppression unit 15 is connected to another output pin of a group of audio signal output pins (such as pin VON1).

[0042] Alternatively, if Figure 4 As shown, the power amplifier chip further includes: a second switch unit 40 and a first boost unit 50 ; wherein the power supply end of each of the power amplifiers 10 is connected to the first boost unit 50 via the second switch unit 40 .

[0043] The second switch unit 40 is connected to the control unit 30 , wherein the control unit 30 is used to control the switching state of the second switch unit 40 , and the first boost unit 50 supplies power to one or more power amplifiers 10 through the second switch unit 40 .

[0044] Optionally, the first boost unit 50 may be a charge pump boost unit, which is used to provide voltage for the power amplifier and has the advantage of low cost compared to using a Boost boost unit.

[0045] For example: taking the number of power amplifiers 10 as 2, the second switch unit 40 can be a double-pole double-throw switch. By controlling the switching state of the double-pole double-throw switch, the following electrical connection relationship can exist: the first boost unit 50 is connected to one of the power amplifiers 10 and disconnected from the other power amplifier 10, then the first boost unit 50 supplies power to one of the power amplifiers 10; or, the first boost unit 50 is connected to both power amplifiers 10, then the first boost unit 50 supplies power to both power amplifiers 10; or, the first boost unit 50 is disconnected from both power amplifiers 10, then the first boost unit 50 does not provide electrical energy to the two power amplifiers 10. For example, when the first audio transmission channel (i.e., the audio transmission channel between pins INP1, INN1 and pins VOP1, VON1) is used to output audio, and the second audio transmission channel (i.e., the audio transmission channel between pins INP2, INN2 and pins VOP2, VON2) has no audio output, the switching state of the double-pole double-throw switch can be controlled to make the first boost unit 50 connected to the power amplifier 10 in the first audio transmission channel and disconnected from the power amplifier 10 in the second audio transmission channel.

[0046] For another example: continuing to take the number of power amplifiers 10 as 2, the second switch unit 40 may include two single-pole single-throw switches, the first boost unit 50 is connected to one of the power amplifiers 10 through one of the single-pole single-throw switches, and is connected to the other power amplifier 10 through the other single-pole single-throw switch. The specific control method is similar to the above embodiment and will not be repeated here.

[0047] It should be noted that the design form of the second switch unit 40 can be determined based on the number of power amplifiers 10. For example, when the number of power amplifiers 10 is 4, the second switch unit 40 can be set as a four-pole four-throw switch, or the second switch unit 40 can be set as two double-pole double-throw switches, or the second switch unit 40 can be set as four single-pole single-throw switches, etc. The embodiments of the present application are not limited to this.

[0048] Alternatively, if Figure 5 and Figure 6 As shown, taking the case where the power amplifier chip has dual inputs and dual outputs, that is, has two audio transmission channels, as an example, the at least two power amplifiers 10 include: a first power amplifier D1, a second power amplifier D2, a third power amplifier D3, and a fourth power amplifier D4. Figure 1 The power amplifier unit 12 shown in the figure is provided with 4 power amplifiers, namely Figure 2 Each power amplifier unit 12 shown is provided with two power amplifiers, so that the power amplifier chip has power regulation and distribution functions.

[0049] Among them, the input end of the first power amplifier D1 and the input end of the second power amplifier D2 are respectively connected to the first group of audio signal input pins of the power amplifier chip 1 through a first switch unit 20; the first output end of the first power amplifier D1 and the first output end of the second power amplifier D2 are both connected to one of the output pins VOP1 of the first group of audio signal output pins of the power amplifier chip 1; the second output end of the first power amplifier D1 and the second output end of the second power amplifier D2 are both connected to another output pin VON1 of the first group of audio signal output pins of the power amplifier chip 1.

[0050] The input end of the third power amplifier D3 and the input end of the fourth power amplifier D4 are respectively connected to the second group of audio signal input pins of the power amplifier chip 1 through the first switch unit 20; the first output end of the third power amplifier D3 and the first output end of the fourth power amplifier D4 are both connected to one of the output pins VOP2 of the second group of audio signal output pins of the power amplifier chip 1; the second output end of the third power amplifier D3 and the second output end of the fourth power amplifier D4 are both connected to another output pin VON2 of the second group of audio signal output pins of the power amplifier chip 1.

[0051] Specifically, when the input end of the first power amplifier D1 is connected to the first group of audio signal input pins of the power amplifier chip 1 through a first switch unit 20, and the input end of the second power amplifier D2 is connected to the first group of audio signal input pins of the power amplifier chip 1 through a first switch unit 20, a signal processing unit 11, an input buffer unit 111, etc. may be provided between the first switch unit 20 and the first group of audio signal input pins (see Figure 3 When the output terminals of the first power amplifier D1 and the second power amplifier D2 are connected to the first group of audio signal output pins of the power amplifier chip 1, the output terminals of the first power amplifier D1 and the second power amplifier D2 may be directly connected to the first group of audio signal output pins of the power amplifier chip 1, or the output terminals of the first power amplifier D1 and the second power amplifier D2 may be connected to the first group of audio signal output pins of the power amplifier chip 1 through the EMI suppression unit 15, etc. (see Figure 2 Implementation example, no further description is given here).

[0052] Similarly, when the input end of the third power amplifier D3 is connected to the second group of audio signal input pins of the power amplifier chip 1 through the first switch unit 20, and the input end of the fourth power amplifier D4 is connected to the second group of audio signal input pins of the power amplifier chip 1 through the first switch unit 20, the signal processing unit 11, the input buffer unit 111, etc. can also be set between the first switch unit 20 and the second group of audio signal input pins (see also Figure 3 When the output ends of the third power amplifier D3 and the fourth power amplifier D4 are connected to the second group of audio signal output pins of the power amplifier chip 1, the output ends of the third power amplifier D3 and the fourth power amplifier D4 may be directly connected to the second group of audio signal output pins of the power amplifier chip 1, or the output ends of the third power amplifier D3 and the fourth power amplifier D4 may be connected to the second group of audio signal output pins of the power amplifier chip 1 through the EMI suppression unit 15, etc. (see Figure 2 Implementation example, no further description is given here).

[0053] Alternatively, if Figure 1 , Figure 2 , Figure 5 and Figure 6 As shown, the power amplifier chip 1 further includes: a second boost unit 60 , a third boost unit 70 , a third switch unit 80 , and a fourth switch unit 90 .

[0054] As a way to achieve this: Figure 5 As shown, the second boost unit 60 is connected to the power supply end of the first power amplifier D1 and the power supply end of the second power amplifier D2 respectively through the third switch unit 80; the third boost unit 70 is connected to the power supply end of the third power amplifier D3 and the power supply end of the fourth power amplifier D4 respectively through the fourth switch unit 90.

[0055] Optionally, the second boost unit 60 is connected to a group of power pins CP1 and CN1 of the power amplifier chip 1, and the external power energy obtained from the power pins CP1 and CN1 is boosted to twice or multiple times thereof, and the first power amplifier D1 and / or the second power amplifier D2 are powered. Similarly, the third boost unit 70 is connected to another group of power pins CP2 and CN2 of the power amplifier chip 1, and the external power energy obtained from the power pins CP2 and CN2 is boosted to twice or multiple times thereof, and the third power amplifier D3 and the fourth power amplifier D4 are powered.

[0056] In this embodiment, by setting two power amplifiers for each audio transmission channel (i.e., the audio transmission channel corresponding to pins VOP1 and VON1, and the audio transmission channel corresponding to pins VOP2 and VON2), the number of power amplifiers connected to the audio transmission channel can be adjusted according to load requirements, thereby realizing power adjustment and allocation for each audio transmission channel.

[0057] For example, when the output power of the first group of audio transmission channels (i.e., the audio transmission channels corresponding to the pins VOP1 and VON1) is relatively small, the switch state of the third switch unit 80 can be controlled so that the second boost unit 60 is only connected to the first power amplifier D1, that is, only the first power amplifier D1 is turned on; when the output power of the first group of audio transmission channels is relatively large, the switch state of the third switch unit 80 can be controlled so that the second boost unit 60 is connected to both the first power amplifier D1 and the second power amplifier D2, that is, the first power amplifier D1 and the second power amplifier D2 are turned on at the same time. Correspondingly, the control logic for the second group of audio transmission channels (i.e., the audio transmission channels corresponding to the pins VOP2 and VON2) is similar to that, which will not be described in detail here.

[0058] Optionally, the third switch unit 80 and the fourth switch unit 90 may respectively adopt a double-pole double-throw switch, or may respectively adopt two single-pole single-throw switches, etc., but the embodiment of the present application is not limited thereto.

[0059] As another implementation method: Figure 6 As shown, the second boost unit 60 is respectively connected to the power supply end of the first power amplifier D1, the power supply end of the second power amplifier D2 and the power supply end of the third power amplifier D3 through the third switch unit 80; the third boost unit 70 is respectively connected to the power supply end of the third power amplifier D3 and the power supply end of the fourth power amplifier D4 through the fourth switch unit 90.

[0060] Optionally, the third switch unit 80 can adopt a three-pole three-throw switch, or a double-pole double-throw switch and a single-pole single-throw switch, or three single-pole single-throw switches, etc., to control the second boost unit 60 to supply power to one or more of the first power amplifier D1, the second power amplifier D2, and the third power amplifier D3; the fourth switch unit 90 can adopt a double-pole double-throw switch, or two single-pole single-throw switches, etc., to control the third boost unit 70 to supply power to one or more of the third power amplifier D3 and the fourth power amplifier D4.

[0061] For example, when the output powers of the first group of audio transmission channels (i.e., the audio transmission channels corresponding to pins VOP1 and VON1) and the second group of audio transmission channels (i.e., the audio transmission channels corresponding to pins VOP2 and VON2) are both relatively small, the third boost unit 70 can be controlled not to work, and the third switch unit 80 is controlled to use only the second boost unit 60 to power the first power amplifier D1 of the first group of audio transmission channels and the third power amplifier D3 of the second group of audio transmission channels, respectively. That is, when the output powers of the two audio transmission channels are both relatively small, only one second boost unit 60 is required to work, thereby saving the energy loss caused by the operation of the third boost unit 70 and achieving the purpose of saving power.

[0062] The above embodiments are directed to Figure 1 and Figure 2 The example of one power amplifier 10 in the power amplifier unit 12 corresponding to one audio transmission channel is used for description. The following describes how one power amplifier 10 in the power amplifier unit 12 corresponds to multiple audio transmission channels in combination with the embodiments.

[0063] Alternatively, if Figure 7 As shown, the input end of each power amplifier 10 is connected to each group of audio signal input pins of the power amplifier chip 1 through a first switch unit 20; the first output end of each power amplifier 10 is connected to one of the output pins of each group of audio signal output pins of the power amplifier chip 1; the second output end of each power amplifier 10 is connected to another output pin of each group of audio signal output pins of the power amplifier chip 1.

[0064] For example, taking four power amplifiers arranged in two audio transmission paths as an example, the first switch unit 20 may adopt a single-pole double-throw switch, or may adopt two single-pole single-throw switches, etc., but the embodiments of the present application are not limited thereto.

[0065] The input end of the first power amplifier D1 is connected to each group of audio signal input pins of the power amplifier chip 1 through a first switch unit 20, the input end of the second power amplifier D2 is connected to each group of audio signal input pins of the power amplifier chip 1 through a first switch unit 20, the input end of the third power amplifier D3 is connected to each group of audio signal input pins of the power amplifier chip 1 through a first switch unit 20, and the input end of the fourth power amplifier D4 is connected to each group of audio signal input pins of the power amplifier chip 1 through a first switch unit 20. Specifically, a signal processing unit 11, an input buffer unit 111, etc. can be set between the first switch unit 20 and each group of audio signal input pins (see Figure 3 Implementation example, no further description is given here).

[0066] The first output end of the first power amplifier D1, the first output end of the second power amplifier D2, the first output end of the third power amplifier D3, and the first output end of the fourth power amplifier D4 are all connected to one of the output pins of each group of audio signal output pins of the power amplifier chip 1; the second output end of the first power amplifier D1, the second output end of the second power amplifier D2, the second output end of the third power amplifier D3, and the second output end of the fourth power amplifier D4 are all connected to another output pin of each group of audio signal output pins of the power amplifier chip 1, which can be directly connected or indirectly connected through the EMI suppression unit 15 (see Figure 2 Implementation example, no further description is given here).

[0067] In this embodiment, by controlling the conduction state of the first switch unit 20 by the control unit 30, each power amplifier can be connected to each group of audio signal input pins, that is, the input path of the audio signal can be flexibly controlled to ensure flexible deployment of the power amplifier.

[0068] Optionally, continue to Figure 7 , the power amplifier chip 1 also includes: at least two fifth switch units 100; wherein, the output end of each of the power amplifiers 10 is connected to each group of audio signal output pins of the power amplifier chip 1 through one of the fifth switch units 100.

[0069] Each of the fifth switch units 100 is connected to the control unit 30; wherein the control unit 30 is used to control the switching state of the fifth switch unit 100, and a group of audio signal output pins of each power amplifier chip 1 is connected to at most one power amplifier 10 through the fifth switch unit 100.

[0070] In this embodiment, by controlling the conduction state of the fifth switch unit 100 by the control unit 30, each power amplifier can be connected to each group of audio signal output pins, that is, the output path of the audio signal can be flexibly controlled to ensure flexible deployment of the power amplifier.

[0071] Optionally, continue to Figure 7 Each of the fifth switch units 100 includes: a first switch device 101 and a second switch device 102 .

[0072] Among them, the first output end of each power amplifier 10 is respectively connected to one of the output pins of each group of audio signal output pins of the power amplifier chip 1 through the first switching device 101; the second output end of each power amplifier 10 is respectively connected to another output pin of each group of audio signal output pins of the power amplifier chip 1 through the second switching device 102.

[0073] Optionally, the selection of the first switching device 101 and the second switching device 102 can be set based on the number of audio transmission channels in the power amplifier chip 1. For example, when the power amplifier chip 1 has two audio transmission channels (i.e., has two groups of audio signal output pins), the first switching device 101 and the second switching device 102 can adopt single-pole double-throw switches to control the two output ends of the power amplifier 10 to be respectively connected to a group of audio signal output pins.

[0074] Optionally, the power amplifier chip 1 further includes: a fourth boost unit 110 , a fifth boost unit 120 , a sixth switch unit 130 , and a seventh switch unit 140 .

[0075] The fourth boost unit 110 is connected to the power supply terminal of each power amplifier 10 through the sixth switch unit 130 ; the fifth boost unit 120 is connected to the power supply terminal of each power amplifier 10 through the seventh switch unit 140 .

[0076] For example: taking the number of power amplifiers 10 as 4, the sixth switch unit 130 and the seventh switch unit 140 can use a four-pole four-throw switch, or two double-pole double-throw switches, or four single-pole single-throw switches, etc., but the embodiments of the present application are not limited to this.

[0077] In this embodiment, by controlling the switching states of the sixth switch unit 130 and the seventh switch unit 140 through the control unit 30, the fourth boost unit 110 and the fifth boost unit 120 can be used to power each power amplifier, that is, the power supply path of each power amplifier can be flexibly controlled to ensure flexible deployment of the power amplifier.

[0078] For example, the first group of audio transmission channels (i.e., the audio transmission channels corresponding to the pins VOP1 and VON1) and the second group of audio transmission channels (i.e., the audio transmission channels corresponding to the pins VOP2 and VON2) can be switched to each power amplifier for power amplification and then output through the first switch unit 20. This makes it easy to flexibly allocate the output power, for example, the power ratio between the first group of audio transmission channels and the second group of audio transmission channels can be: 0:4 (i.e., the first group of audio transmission channels are not connected to the power amplifier, and the second group of audio transmission channels are connected to 4 power amplifiers), or 1:3 (i.e., the first group of audio transmission channels are connected to 1 power amplifier, and the second group of audio transmission channels are connected to 3 power amplifiers); or 2:2 (i.e., the first group of audio transmission channels are connected to 2 power amplifiers, and the second group of audio transmission channels are connected to 2 power amplifiers); or 3:1 (i.e., the first group of audio transmission channels are connected to 3 power amplifiers, and the second group of audio transmission channels are connected to 1 power amplifier); or 4:0 (i.e., the first group of audio transmission channels are connected to 4 power amplifiers, and the second group of audio transmission channels are not connected to the power amplifier), etc.

[0079] For another example, when the output powers of the first group of audio transmission channels (i.e., the audio transmission channels corresponding to pins VOP1 and VON1) and the second group of audio transmission channels (i.e., the audio transmission channels corresponding to pins VOP2 and VON2) are both relatively small, the first switch unit 20 corresponding to the first power amplifier D1 can be controlled to be turned on with the first group of audio signal input pins, the first switch unit 20 corresponding to the third power amplifier D3 can be controlled to be turned on with the second group of audio signal input pins, and the fifth boost unit 120 can be controlled not to work. Instead, the sixth switch unit 130 can be controlled to use only the fourth boost unit 110 to respectively power the first power amplifier D1 of the first group of audio transmission channels and the third power amplifier D3 of the second group of audio transmission channels. That is, when the output powers of the two audio transmission channels are both relatively small, only one fourth boost unit 110 can be controlled to work to save the energy loss caused by the operation of the fifth boost unit 120, thereby achieving the purpose of saving power.

[0080] It should be noted that when the fourth boost unit 110 is connected to the power supply terminal of each power amplifier 10 through the sixth switch unit 130 as described in 7, it means that the sixth switch unit 130 is independently connected to the power supply terminal of each power amplifier 10, for example Figure 7The arrow indicating that the sixth switch unit 130 is connected to the second power amplifier D2 passes through the first power amplifier D1, which does not mean that the sixth switch unit 130 is connected to the second power amplifier D2 via the first power amplifier D1, but that the sixth switch unit 130 is independently connected to the second power amplifier D2 and the first power amplifier D1. Similarly, when the fifth boost unit 120 is connected to the power supply terminal of each power amplifier 10 via the seventh switch unit 140 as described in 7, it means that the seventh switch unit 140 is independently connected to the power supply terminal of each power amplifier 10, such as Figure 7 The arrow indicating that the seventh switch unit 140 is connected to the third power amplifier D3 passes through the fourth power amplifier D4, which does not mean that the seventh switch unit 140 is connected to the third power amplifier D3 via the fourth power amplifier D4, but that the seventh switch unit 140 is independently connected to the third power amplifier D3 and the fourth power amplifier D4. Optionally, the power amplifier 10 may adopt a Class D power amplifier, such as Figure 8 As shown in FIG. 8 , a schematic diagram of the internal structure of a power amplifier is provided, which is mainly composed of an inverter 81 and a power tube 82. Figures 5 to 7 Compared with the traditional solution (i.e., the power amplifier chip supports one audio transmission channel), the current carrying capacity of the power tube inside the power amplifier is reduced. For example, when a power amplifier realizes a 1W power amplifier, the power tube of the power amplifier needs a power carrying capacity of 1W when the traditional solution (i.e., the power amplifier chip supports one audio transmission channel) is adopted, while the power tube of the power amplifier of the embodiment of the present application needs a power carrying capacity of 1W. Figure 5 In the solution, each power amplifier only needs to support a carrying capacity of 0.5W. Figure 7 In this way, each power amplifier setting may only need to support 0.25W of carrying capacity.

[0081] The power amplifier chip in the embodiment of the present application integrates multiple audio transmission channels into one chip, so that a single chip can complete the functions of multiple PAs and achieve stereo output. In addition, multiple PAs can reuse the modules in the chip, which reduces the chip cost and the board area on the PCB. The I2C, power supply, etc. can be shared in the peripheral circuits, which reduces the space occupied and cost of the peripheral circuits, reduces the difficulty of wiring, and leaves more space for electronic devices to arrange other modules (such as batteries, sound chambers, etc.); at the same time, the power amplifier output in the chip provides a new topology structure, which can flexibly adjust the power distribution according to the load conditions, realize output power distribution, make full use of resources, and meet the different power requirements of different speakers under the same system to maximize resource utilization.

[0082] An embodiment of the present application provides a driving circuit, comprising the power amplifier chip 1 as described above.

[0083] Alternatively, if Figures 9 to 13 As shown, the driving circuit further includes: at least one speaker 2, and / or, at least one linear motor 3; wherein the audio signal input pin of the power amplifier chip 1 is connected to a speaker 2 or a linear motor 3.

[0084] For example, when a group of audio signal input pins are connected to the speaker 2, the audio transmission channel where the audio signal input pins are located mainly transmits audio signals. When a group of audio signal input pins are connected to the linear motor 3, the audio transmission channel where the audio signal input pins are located mainly transmits vibration signals.

[0085] Optionally, the driving circuit further includes a platform end 4, which is connected to the control pins CTRL1, CTRL2, the audio input pins INP1, INN1, INP2, INN2, and the reset pin RSTN of the power amplifier chip 1. The platform end 4 includes: a processor and a codec (codec), which can provide a control signal to the control unit 30 inside the power amplifier chip 1 through the control pins CTRL1, CTRL2, and input audio and / or vibration signals to the audio input pins INP1, INN1, INP2, INN2.

[0086] Optionally, the power supply pin VDD of the power amplifier chip 1 supplies power to the entire system of the power amplifier chip 1, such as being introduced from other power supplies (VBAT) on the electronic device. For example, the power supply can be a battery or other system power supply network, etc., which is not limited to the embodiments of the present application.

[0087] Optionally, the address pin AD and the ground pin GND of the power amplifier chip 1 are both grounded, and the pins PVDD1 and PVDD2 can be grounded through capacitors respectively.

[0088] Specifically, Fig. 9 As shown, the power amplifier unit 12 in the power amplifier chip 1 adopts Figure 1 and Figure 5 The scheme shown is described by taking the output power limit of each power amplifier as 0.5W, and when the music signal is currently played, the output power of the first speaker 21 is 0.4W, and the output power of the second speaker 22 is 0.8W as an example:

[0089] The two channels of audio signals are input to the power amplifier chip 1 through the first group of audio signal input pins INP1 and INN1 and the second group of audio signal input pins INP2 and INN2, respectively, enter the two input buffer units 111, and then enter the power amplifier unit 12.

[0090] The first switch unit 20 corresponding to the first power amplifier D1 is closed, and by controlling the switch state of the third switch unit 80, the second boost unit 60 supplies power to the first power amplifier D1, and the audio signal input from the first group of audio signal input pins INP1 and INN1 is amplified by the first power amplifier D1 and then output to the first speaker 21. At the same time, the first switch unit 20 corresponding to the third power amplifier D3 and the fourth power amplifier D4 is closed, and by controlling the switch state of the fourth switch unit 90, the third boost unit 70 supplies power to the third power amplifier D3 and the fourth power amplifier D4, and the audio signal input from the second group of audio signal input pins INP2 and INN2 is amplified by the third power amplifier D3 and the fourth power amplifier D4 and then output to the second speaker 22.

[0091] In this embodiment, four power amplifiers can be set in the two audio transmission channels, and the four power amplifiers can be integrated into one chip, saving chip costs, and the peripheral power supply, IIC wiring, reset line, etc. can be shared, thereby saving peripheral circuit costs and PCB layout space. In addition, by integrating the four power amplifiers into one chip, the traditional single high-power amplifier is divided into multiple small-power amplifiers, which reduces the overcurrent requirements of the power tube inside the power amplifier, or when the power of a single power amplifier is understood to be unchanged, the output power of the audio power amplifier can be increased by superimposing multiple power amplifiers. This solution can also be configured for the output power of different loads (i.e., the first speaker 21 and the second speaker 22), and the number of power amplifiers turned on can be adjusted according to the load requirements, which can reduce power consumption under load. In addition, in Fig. 9 The power amplifier chip 1 shown uses Figure 6 In the scheme shown, when the power of the two audio transmission channels is low, only one boost unit needs to be turned on to save the energy loss caused by the operation of multiple boost units and further reduce power consumption. Fig. 9 The power amplifier chip 1 shown uses Figure 7 In the scheme shown, in addition to turning on only one boost unit when the power of the two audio transmission channels is low to save the energy loss caused by the operation of multiple boost units and further reduce power consumption, the power can also be distributed. For example, the upward cavity and single-cell conditions may have smaller power requirements, and energy loss can be reduced through power consumption distribution, and it can be applied to scenarios of different proportions.

[0092] like Fig.10 The driving circuit shown above can be used Figures 5 to 7The specific working principle of the scheme of any embodiment is as follows: the processor of the platform end 4 pulls the power amplifier reset pin RSTN from high to low through the GPIO control method, and resets the power amplifiers in the two audio transmission channels at the same time. The processor of the platform end 4 realizes the register configuration of the power amplifier through the IIC pin, and controls the working state of the power amplifiers in the two audio transmission channels respectively, one is the speaker mode and the other is the linear motor mode. The audio signal enters the input buffer unit 111 from the platform end 4 through the first group of input terminals INP1 and INN1 in the first audio transmission channel, and then is amplified by the power amplifier, and passes through the EMI suppression unit 15, and outputs the signal through the first group of output terminals VOP1 and VON1 to drive the speaker 2. The vibration signal enters the input buffer unit 111 from the platform end 4 through the second group of input terminals INP2 and INN2 in the second audio transmission channel, and then is amplified by the power amplifier, and passes through the EMI suppression unit 15, and then outputs the signal through the second group of output terminals VOP2 and VON2 to drive the linear motor 3.

[0093] In this embodiment, the speaker and the linear motor share a driver chip. Due to the reuse of peripheral decoupling capacitors, IIC, reset pins, address configuration pins, etc., the number of peripheral circuit components and routing can be reduced, further reducing the PCB layout area and cost, as well as the complexity of routing. By integrating multiple PAs into one chip, the internal modules of the chip can be reused, thereby reducing the chip size and cost. In addition, the two-way boost units can be used to drive the PAs in the two audio transmission channels respectively, so as to facilitate flexible boosting, and can adapt to two different signals, audio and vibration, at the same time to ensure overall efficiency.

[0094] like Fig.11 The driving circuit shown above can be used Figures 5 to 7 The solution of any embodiment in Fig.10 The difference is that both audio transmission channels output vibration signals. The specific working principle is the same as Fig.10 The embodiment is similar and can be achieved with Fig.10 The same technical effects as those in the embodiments are not described in detail here.

[0095] The above embodiment takes the example of the power amplifier chip supporting two audio transmission channels as an example. It should be noted that the power amplifier chip of the embodiment of the present application is not limited to supporting two audio transmission channels. For example, it can also support three audio transmission channels, such as Fig.12 and Fig.13 As shown, it can even support more than three audio transmission channels, and the principles are similar to the above two audio transmission channels.

[0096] like Fig.12 The drive circuit shown in Fig. 9On the basis of the embodiment, an audio transmission channel is added, that is, a group of input terminals INP3, INN3 and a group of output terminals VOP3, VON3 are added to output audio signals, and a boost unit can also be added, that is, a group of power supply pins CP3, CN3, PVDD3, etc. are added accordingly. The embodiments of the present application are not limited to this.

[0097] like Fig.13 The drive circuit shown in Fig. 9 On the basis of the embodiment, an audio transmission channel is added, that is, a group of input terminals INP3, INN3 and a group of output terminals VOP3, VON3 are added to output vibration signals, and a boost unit can also be added, that is, a group of power supply pins CP3, CN3, PVDD3, etc. are added accordingly. The embodiments of the present application are not limited to this.

[0098] An embodiment of the present application also provides an electronic device, comprising the driving circuit as described above.

[0099] Optionally, the electronic device includes but is not limited to: a mobile phone, a tablet computer, a wearable device, etc., or other electronic devices with an audio output function, but the embodiments of the present application are not limited thereto.

[0100] The electronic device of the embodiment of the present application can implement the solutions of each driving circuit embodiment and can achieve the same technical effect. To avoid repetition, it will not be described here.

[0101] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0102] Although the preferred embodiments of the present application have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the embodiments of the present application.

[0103] Finally, it should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or terminal device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or terminal device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or terminal device including the elements.

[0104] The above is a preferred embodiment of the present application. It should be pointed out that for ordinary personnel in this technical field, several improvements and modifications can be made without departing from the principles described in the present application. These improvements and modifications are also within the scope of protection of the present application.

Claims

1. A power amplifier chip, characterized in that: include: At least two groups of audio signal input pins, at least two groups of audio signal output pins, at least two power amplifiers, at least two first switch units, and a control unit; wherein, The at least two groups of audio signal input pins and the at least two groups of audio signal output pins are arranged in a one-to-one correspondence to form at least two audio transmission channels; each of the audio transmission channels is provided with one or more power amplifiers; wherein the input end of each power amplifier is connected to at least one group of audio signal input pins through one of the first switch units, and the output end of each power amplifier is connected to at least one group of audio signal output pins; Each of the first switch units is connected to the control unit; wherein the control unit is used to control the switch state of the first switch unit, and each of the power amplifiers is connected to at most one group of audio signal input pins of the power amplifier chip through the first switch unit.

2. The power amplifier chip according to claim 1, characterized in that: Also includes: at least two signal processing units; The first input end of each of the signal processing units is connected to one of the input pins of a group of audio signal input pins of the power amplifier chip, and the second input end of each of the signal processing units is connected to another input pin of the group of audio signal input pins of the power amplifier chip; The input end of each of the power amplifiers is connected to the output end of each of the signal processing units through one of the first switch units; The signal processing unit is used to convert two audio signals input from a group of audio signal input pins of the power amplifier chip into one audio signal and input it into the power amplifier.

3. The power amplifier chip according to claim 1, characterized in that: Also includes: A second switch unit and a first boost unit; wherein, The power supply end of each power amplifier is connected to the first boost unit through the second switch unit; The second switch unit is connected to the control unit, wherein the control unit is used to control the switch state of the second switch unit, and the first boost unit supplies power to one or more power amplifiers through the second switch unit.

4. The power amplifier chip according to claim 1, characterized in that: The at least two power amplifiers include: a first power amplifier, a second power amplifier, a third power amplifier, and a fourth power amplifier; wherein, The input end of the first power amplifier and the input end of the second power amplifier are respectively connected to the first group of audio signal input pins of the power amplifier chip through a first switch unit; the first output end of the first power amplifier and the first output end of the second power amplifier are both connected to one of the output pins of the first group of audio signal output pins of the power amplifier chip; the second output end of the first power amplifier and the second output end of the second power amplifier are both connected to the other output pin of the first group of audio signal output pins of the power amplifier chip; The input end of the third power amplifier and the input end of the fourth power amplifier are respectively connected to the second group of audio signal input pins of the power amplifier chip through one of the first switching units; the first output end of the third power amplifier and the first output end of the fourth power amplifier are both connected to one of the output pins of the second group of audio signal output pins of the power amplifier chip; the second output end of the third power amplifier and the second output end of the fourth power amplifier are both connected to another output pin of the second group of audio signal output pins of the power amplifier chip.

5. The power amplifier chip according to claim 4, characterized in that: Also includes: A second boost unit, a third boost unit, a third switch unit, and a fourth switch unit; wherein, The second boost unit is connected to the power supply terminal of the first power amplifier and the power supply terminal of the second power amplifier respectively through the third switch unit; the third boost unit is connected to the power supply terminal of the third power amplifier and the power supply terminal of the fourth power amplifier respectively through the fourth switch unit; or, The second boost unit is connected to the power supply terminal of the first power amplifier, the power supply terminal of the second power amplifier and the power supply terminal of the third power amplifier respectively through the third switch unit; the third boost unit is connected to the power supply terminal of the third power amplifier and the power supply terminal of the fourth power amplifier respectively through the fourth switch unit.

6. The power amplifier chip according to claim 1, characterized in that: The input end of each power amplifier is respectively connected to each group of audio signal input pins of the power amplifier chip through one of the first switch units; The first output end of each of the power amplifiers is connected to one of the output pins of each group of audio signal output pins of the power amplifier chip; The second output end of each power amplifier is connected to another output pin of each group of audio signal output pins of the power amplifier chip.

7. The power amplifier chip according to claim 6, characterized in that: Also includes: At least two fifth switch units; wherein, The output end of each power amplifier is connected to each group of audio signal output pins of the power amplifier chip through one of the fifth switch units; Each of the fifth switch units is connected to the control unit; wherein the control unit is used to control the switch state of the fifth switch unit, and a group of audio signal output pins of each power amplifier chip is connected to at most one power amplifier through the fifth switch unit.

8. The power amplifier chip according to claim 7, characterized in that: Each of the fifth switch units includes: a first switch device and a second switch device; wherein, The first output end of each of the power amplifiers is respectively connected to one of the output pins of each group of audio signal output pins of the power amplifier chip through the first switch device; The second output end of each of the power amplifiers is respectively connected to another output pin of each group of audio signal output pins of the power amplifier chip through the second switch device.

9. The power amplifier chip according to claim 6, characterized in that: Also includes: a fourth boost unit, a fifth boost unit, a sixth switch unit, and a seventh switch unit; wherein, The fourth boost unit is connected to the power supply terminal of each power amplifier through the sixth switch unit; the fifth boost unit is connected to the power supply terminal of each power amplifier through the seventh switch unit.

10. A driving circuit, characterized in that: The power amplifier chip according to any one of claims 1 to 9, wherein the driving circuit further comprises: at least one speaker, and / or at least one linear motor; wherein: Each group of audio signal input pins of the power amplifier chip is respectively connected to a speaker or a linear motor.

11. An electronic device, characterized in that: Comprising the driving circuit as claimed in claim 10.

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