Metal coating processing method for periphery of local hard gold plating position of PCB (Printed Circuit Board)

Abstract

The invention, which belongs to the technical field of PCB processing, discloses a processing method for coating metal on the periphery of a local hard gold plating position of a PCB. The processing method for coating metal on the periphery of the local hard gold plating position of the PCB comprises the following steps: completing outer layer processing of a CS-SS layer in a pre-processing process; forming the pattern of the CS surface through light imaging and acid etching; dry films are attached to the SS surface and the CS surface, the CS surface exposes the position needing gold plating, and light imaging is carried out again; plating gold on the CS surface; removing dry films on the CS surface and the SS surface; and forming the pattern of the SS surface through optical imaging and acid etching. According to the PCB local hard gold plating position periphery gold wrapping processing method, the pattern of the CS surface is firstly produced, then the pattern of the SS surface is produced, and the non-gold-plated surface of the SS surface is connected in series with the CS surface gold electroplating network, so that the periphery gold wrapping of the local hard gold plating position can still be realized under the condition that the distance does not meet the gold plating wire design requirement.

Description

Technical Field

[0001] The invention relates to the technical field of PCB board processing, and in particular to a method for processing a PCB board with gold plating around a local hard gold-plated position. Background Art

[0002] As the industry is gradually transforming from conventional single surface treatment design to multiple surface treatment design, when the same PCB design has local hard gold plating and OSP in other positions, and gold-plated wires cannot be pulled at the gold-plated positions and gold-plated design is required all around, the basic practice in the industry is to recommend that the local hard gold-plated positions should not be gold-plated all around, or adjusted to other surface treatments, the main reason is that gold-plated wires cannot be pulled to achieve this.

[0003] The location of the local gold-plated pad is affected by the pad spacing, and the gold-plated wire cannot be pulled. If the wire cannot be designed, the gold thickness required for hard gold plating cannot be achieved. The basic practice in the industry is to recommend that the local hard gold-plated position is not gold-plated around it. Other gold-plating methods can be used to achieve hard gold plating, but it will result in insufficient hard gold thickness and the inability to gold-plated around the pad. Summary of the invention

[0004] The purpose of the present invention is to solve at least one of the technical problems existing in the prior art. To this end, the present invention proposes a method for processing gold-plated parts around a local hard gold-plated position of a PCB board, which can meet the design requirements of local hard gold plating plus OSP surface treatment and gold-plated parts around the gold-plated position.

[0005] According to the method for processing gold plating around the local hard gold-plated position of a PCB board according to an embodiment of the present invention, the top layer of the PCB board is a CS surface, the bottom layer is an SS surface, the CS surface is a gold-plated surface, and the SS surface is a non-gold-plated surface, comprising the following steps:

[0006] Step 1: The front process completes the outer layer processing of the CS-SS layer;

[0007] Step 2: Patterning of the CS surface by photoimaging and acid etching;

[0008] Step 3: Paste dry film on SS and CS surfaces, expose the position on CS surface that needs gold plating, and perform optical imaging again;

[0009] Step 4: Gold-plating the CS surface;

[0010] Step 5: Remove the dry film on the CS and SS surfaces;

[0011] Step 6: Patterning of the SS surface by photoimaging and acid etching.

[0012] The method for processing gold plating around a local hard gold-plated position of a PCB board according to an embodiment of the present invention has at least the following beneficial effects: the method for processing gold plating around a local hard gold-plated position of a PCB board first produces a CS surface pattern, and then produces an SS surface pattern on the CS surface, so that the non-gold-plated surface of the SS surface is connected in series with the CS surface electroplating gold network, thereby being able to achieve gold plating around the local hard gold-plated position even when the spacing does not meet the design requirements of the gold-plated wire.

[0013] According to some embodiments of the present invention, the front process includes pressing, drilling, resin plugging, drilling non-plugging metalized holes, and copper plating.

[0014] According to some embodiments of the present invention, conductive lines are designed for isolated pads.

[0015] According to some embodiments of the present invention, after step 6, a wire picking inspection is performed on the isolated pads.

[0016] According to some embodiments of the present invention, the process further includes performing outer layer AOI after step 6.

[0017] According to some embodiments of the present invention, solder mask imaging is performed after outer layer AOI.

[0018] According to some embodiments of the present invention, organic solderability protection layer treatment is performed after solder resist imaging.

[0019] Additional aspects and advantages of the present invention will be given in part in the following description and in part will be obvious from the following description, or will be learned through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] The present invention is further described below in conjunction with the accompanying drawings and embodiments:

[0021] Figure 1 The present invention is a flowchart of a method for processing gold plating around a local hard gold-plated position of a PCB board according to an embodiment of the present invention. DETAILED DESCRIPTION

[0022] This section will describe in detail the specific embodiments of the present invention. The preferred embodiments of the present invention are shown in the accompanying drawings. The purpose of the accompanying drawings is to supplement the description of the text part of the specification with graphics, so that people can intuitively and vividly understand each technical feature and the overall technical solution of the present invention, but it cannot be understood as a limitation on the scope of protection of the present invention.

[0023] In the description of the present invention, it should be understood that descriptions involving orientations, such as up, down, front, back, left, right, etc., and orientations or positional relationships indicated are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present invention.

[0024] In the description of the present invention, "several" means one or more, "more" means more than two, "greater than", "less than", "exceed" etc. are understood as not including the number itself, and "above", "below", "within" etc. are understood as including the number itself. If there is a description of "first" or "second", it is only used for the purpose of distinguishing the technical features, and cannot be understood as indicating or implying the relative importance or implicitly indicating the number of the indicated technical features or implicitly indicating the order of the indicated technical features.

[0025] In the description of the present invention, unless otherwise clearly defined, terms such as setting, installing, connecting, etc. should be understood in a broad sense, and technicians in the relevant technical field can reasonably determine the specific meanings of the above terms in the present invention based on the specific content of the technical solution.

[0026] refer to Figure 1 The following describes a processing method for gold plating around a local hard gold-plated position of a PCB board according to an embodiment of the present invention.

[0027] like Figure 1 As shown, the processing method of the method for gold-plating around the local hard gold-plated position of the PCB board according to the embodiment of the present invention includes:

[0028] Step 1: The front process completes the outer layer processing of the CS-SS layer;

[0029] Step 2: Patterning of the CS surface by photoimaging and acid etching;

[0030] Step 3: Paste dry film on SS and CS surfaces, expose the position on CS surface that needs gold plating, and perform optical imaging again;

[0031] Step 4: Gold-plating the CS surface;

[0032] Step 5: Remove the dry film on the CS and SS surfaces;

[0033] Step 6: Patterning of the SS surface by photoimaging and acid etching.

[0034] The existing technologies in the industry all use designs that meet the spacing requirements of gold-plated wires. If this requirement cannot be met, it is recommended that the surrounding areas of the local hard gold-plated area be left without gold, or that other surface treatments be used. Figure 1As shown, in the processing method of the local hard gold-plated position of the PCB board and the gold-plated surrounding position, for non-isolated pads, no wires are designed at the position where the pads are locally gold-plated and gold-plated surrounding positions are required, and the SS surface non-gold-plated surface is connected in series with the CS surface electroplated gold network; for isolated pads, normal wires are designed.

[0035] The previous process includes lamination, drilling, resin plugging, drilling non-plugging metalized holes, and copper plating to complete the processing flow of the CS-SS outer layer. The CS surface pattern is produced by photo imaging and acid etching, and the SS surface is not produced. The SS surface is covered with dry film, and the CS surface is covered with dry film to expose the position where gold plating is required, and photo imaging is performed again. The CS surface is gold plated, and the electroplated gold network on the CS surface is connected to the SS surface. The dry film on the CS and SS surfaces is removed, and photo imaging and acid etching are performed again to produce the SS surface pattern. The wires of isolated pads are inspected to ensure their quality and design requirements. The outer layer automatic optical inspection (AOI) is performed to detect whether there are defects in the outer layer of the circuit board. The circuit board is imaged with the solder mask layer to protect the circuit and prevent short circuits during welding. OSP surface treatment is then performed to provide an organic solderability protective layer. Cleaning and other processing steps are then performed to ensure that the circuit board meets the final production standards.

[0036] The method for processing gold plating around the local hard gold-plated position of the PCB board first produces the pattern of the CS surface, and then produces the image of the SS surface, so that the non-gold-plated surface of the SS surface is connected in series with the CS surface electroplated gold network, so that the local hard gold-plated position can still be gold-plated around when the spacing does not meet the design requirements of the gold-plated wire.

[0037] The embodiments of the present invention are described in detail above with reference to the accompanying drawings, but the present invention is not limited to the above embodiments, and various changes can be made within the knowledge scope of ordinary technicians in the technical field without departing from the purpose of the present invention.

Claims

1. A method for processing a PCB board with gold plating around a local hard gold-plated position, wherein the top layer of the PCB board is a CS surface and the bottom layer is an SS surface, the CS surface is a gold-plated surface, and the SS surface is a non-gold-plated surface, characterized in that: include: Step 1: The front process completes the outer layer processing of the CS-SS layer; Step 2: Patterning of the CS surface by photoimaging and acid etching; Step 3: Paste dry film on SS and CS surfaces, expose the position on CS surface that needs gold plating, and perform optical imaging again; Step 4: Gold-plating the CS surface; Step 5: Remove the dry film on the CS and SS surfaces; Step 6: Patterning of the SS surface by photoimaging and acid etching.

2. The method for processing PCB board with gold plating around the local hard gold plating position according to claim 1, characterized in that: The previous processes include lamination, drilling, resin plugging, drilling non-plugged metalized holes, and copper plating.

3. The method for processing a PCB board with gold plating around a local hard gold-plated position according to claim 1, characterized in that: Design wires for isolated pads.

4. The method for processing a PCB board with gold plating around a local hard gold-plated position according to claim 3, characterized in that: For isolated pads, perform wire pick inspection after step 6.

5. The method for processing a PCB board with gold plating around a local hard gold-plated position according to claim 1, characterized in that: It also includes performing outer layer AOI after step 6.

6. The method for processing the PCB board with gold plating around the local hard gold plating position according to claim 5, characterized in that: Perform solder mask imaging after outer layer AOI.

7. The method for processing a PCB board with gold plating around a local hard gold-plated position according to claim 6, characterized in that: Organic solderability preservative treatment is performed after solder mask imaging.

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