Current high-speed seamless shift measuring circuit
By setting up multiple series resistors and parallel detection circuits in the current test circuit, combining shift registers and ADC synchronization technology, seamless shifting of current test is achieved, solving the jitter problem during shifting in current test, and improving the test Speed and stability.
Patent Information
- Application Number
- CN202411402482.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-09
- Publication Date
- 2024-12-27
AI Technical Summary
During the current test, the amplitude of the test current is large, resulting in the inability to test all currents through one gear. Voltage or current jitter will inevitably occur during shifting, affecting the test speed and the stability of the device under test.
Design a high-speed seamless shift measurement circuit for current, by setting multiple series resistors and parallel detection circuits in the detection circuit, and using shift registers and ADC synchronization technology, multiple detection circuits are controlled to perform detection in sequence during one sampling period to avoid Setting a switch on the main line of the device under test can achieve seamless shift measurement of voltage and current.
It realizes seamless shifting at high sampling frequency (such as 1MHz), reduces the impact of current shifting on the device under test, improves shifting speed, and avoids voltage or current jitter. It is suitable for testing of sensitive devices.
Smart Images
Figure CN119199224A_ABST
Abstract
Description
Technical Field
[0001] The invention belongs to the technical field of electric power shift test, and in particular relates to a current high-speed seamless shift measurement circuit. Background Art
[0002] During the current test, due to the large amplitude of the test current, it is impossible to test all currents through one gear. Therefore, the gears must be distinguished and switched during the current test. For some sensitive device tests, there must be no voltage or current jitter. Secondly, the speed of gear shifting also directly affects the test speed. Therefore, requirements are put forward for seamless high-speed current shifting. The so-called seamless shifting means that when looking at the test instrument from the tested end, there is no change in impedance, and there is no fluctuation in current and voltage, and the accurate value can be measured. Summary of the invention
[0003] The purpose of the present invention is to provide a current high-speed seamless gear shifting measurement circuit, which reduces the influence of current gear shifting on the device under test and greatly improves the gear shifting speed.
[0004] To solve the above problems, the technical solution of the present invention is: A current high-speed seamless shift measurement circuit, comprising: a multi-speed current detection circuit, a data sampling circuit; The multi-speed current detection circuit is connected to a signal source and a device under test, and comprises a plurality of resistors connected in series, the resistance values of the plurality of resistors are increased step by step, corresponding to a plurality of measurement gears, and a detection circuit is connected in parallel at both ends of each resistor; The data sampling circuit includes a clock signal input source, an ADC and a shift register, wherein the clock signal input source is connected to the ADC and the shift register to trigger data sampling; The output end of the shift register is connected to a plurality of the detection circuits, and the plurality of detection circuits are controlled to perform detection in sequence during one sampling period; The output ends of the multiple detection circuits are connected to the ADC, and the data detected during each sampling period is sent to the ADC. The ADC is connected to the signal source to obtain standard data for each sampling, and the detected data is screened according to the standard data obtained for each sampling to obtain the result of this sampling, thereby realizing seamless shifting measurement of voltage and current.
[0005] According to one embodiment of the present invention, the detection circuit includes a unit gain differential circuit, the positive input end of the unit gain differential circuit is connected to a resistor of the multi-speed current detection circuit, the negative input end of the unit gain differential circuit is connected to one end of a switch, the other end of the switch is connected to the output end of the shift register, the output end of the unit gain differential circuit is connected to a multiplexer, and the output end of the multiplexer is connected to the ADC.
[0006] According to an embodiment of the present invention, a voltage regulator tube component is connected in parallel between the two ends of the resistor, and the voltage regulator tube component is connected to the detection circuit to prevent the voltage across the two ends of the resistor from exceeding the maximum receiving voltage of the ADC.
[0007] According to an embodiment of the present invention, the voltage regulator tube assembly includes two voltage regulator tubes whose positive electrodes are connected, and the negative electrodes of the two voltage regulator tubes are connected to two ends of the resistor.
[0008] According to an embodiment of the present invention, the shift register is in communication connection with the multiplexer to control the multiplexer to sequentially open corresponding switch channels during each sampling period to input analog quantities of detection data to the ADC for analog-to-digital conversion.
[0009] According to an embodiment of the present invention, the clock signal input source outputs a clock signal at a certain frequency, and the ADC samples once each time a pulse is sent, thereby achieving high-speed measurement.
[0010] According to an embodiment of the present invention, the resistance values of the plurality of resistors are increased step by step by 10 times to obtain a plurality of measurement gears; each time the ADC is triggered for sampling, there is one and only one sampling data corresponding to the current measurement gear.
[0011] According to an embodiment of the present invention, the resistance values of the plurality of resistors are increased step by step by 100 times to obtain a plurality of measurement gears; each time the ADC is triggered for sampling, there is one and only one sampling data corresponding to the current measurement gear.
[0012] Due to the adoption of the above technical solution, the present invention has the following advantages and positive effects compared with the prior art: The current high-speed seamless shift measurement circuit in one embodiment of the present invention aims at the problem that the jitter in the existing current test shift has an adverse effect on the device under test. By avoiding setting a switching switch on the power main line of the device under test, multiple test gears covering the full range of the test are set in the detection circuit. Through the shift register and ADC synchronization technology, multiple detection circuits are controlled to perform detection in sequence during one sampling period. The ADC screens the detected data according to the standard data obtained in each sampling, obtains the result of this sampling, and realizes the seamless shift measurement of voltage and current. In addition, the clock signal input source outputs a clock signal at a certain frequency. Each time a pulse is sent, the ADC samples once, which can achieve a sampling frequency of up to 1MHz, realizing high-speed seamless shift measurement. BRIEF DESCRIPTION OF THE DRAWINGS
[0013] Figure 1 This is a current high-speed seamless shift measurement circuit diagram in one embodiment of the present invention. DETAILED DESCRIPTION
[0014] The advantages and features of the present invention will become more apparent from the following description and claims.
[0015] The present embodiment provides a current high-speed seamless shift measurement circuit, including: a multi-speed current detection circuit and a data sampling circuit; wherein the multi-speed current detection circuit is connected to a signal source and a device under test, and the multi-speed current detection circuit includes a plurality of resistors connected in series, the resistance values of the plurality of resistors are gradually increased, corresponding to a plurality of measurement gears, and a detection circuit is connected in parallel at both ends of each resistor. The data sampling circuit includes a clock signal input source, an ADC and a shift register, and the clock signal input source is connected to the ADC and the shift register to trigger data sampling. The output end of the shift register is connected to a plurality of detection circuits, and the plurality of detection circuits are controlled to perform detection in sequence during a sampling period. The output ends of the plurality of detection circuits are connected to the ADC, and the data detected during each sampling period is sent to the ADC; the ADC is connected to a signal source to obtain standard data for each sampling, and the detected data is screened according to the standard data obtained for each sampling to obtain the result of the current gear sampling, thereby realizing seamless shift measurement of voltage and current.
[0016] Usually, during the current test, due to the large amplitude of the test current, it is impossible to test all currents through one gear, so it is necessary to distinguish and switch the gears. If the gear is switched through a switcher, voltage or current jitter will inevitably occur at the moment of gear switching; and when measuring some sensitive devices, it is required that there should be no voltage or current jitter. In this case, it is not applicable to switch gears through a switcher. In view of this situation, the present embodiment does not set a gear switcher on the main line connecting the signal source and the device under test, but connects multiple resistors in series on the main line, and the resistance values of the multiple resistors increase step by step, corresponding to multiple measurement gears, and a detection circuit is connected in parallel at both ends of each resistor; each time the signal source sends a signal through the main line, the voltage obtained on these resistors is different, and the voltage on each resistor is sampled. Multiple data can be obtained by sampling once, of which only one data meets the requirements. By setting reasonable data screening conditions, the data that meets the requirements is obtained. The voltage or current jitter caused by setting a switcher on the main line is avoided, and seamless gear shift measurement of voltage and current is realized.
[0017] For details, please see Figure 1The current high-speed seamless shift measurement circuit has a multi-speed current detection circuit (i.e., signal line) connected to the signal source and the device under test DUT. Multiple resistors are connected in series on the line, corresponding to multiple measurement gears. The resistance value of each resistor increases step by step, such as increasing by 10 times or 100 times, or other multiples; the number of resistors can be determined according to the actual situation, as long as it covers all gears of the current test, and each time the ADC sampling is triggered, there is always a sampling data corresponding to the current measurement gear.
[0018] A detection circuit is connected in parallel at both ends of each resistor, and the detection circuit includes a unit gain differential circuit, a positive input end of the unit gain differential circuit is connected to a resistor of the multi-speed current detection circuit, a negative input end of the unit gain differential circuit is connected to one end of a switch, the other end of the switch is connected to the output end of the shift register, the output end of the unit gain differential circuit is connected to a multiplexer, and the output end of the multiplexer is connected to an ADC.
[0019] from Figure 1 It can be seen that the detection circuits of resistors R1~R4 correspond to unit gain differential circuits U2~U5 respectively, and the positive input end of U1 is connected to the signal source, and its output end is connected to the ADC, directly passing the analog quantity of the signal output by the signal source to the ADC to obtain the standard signal. The output ends of U2~U5 are connected to the multiplexer, and the multiplexer is controlled by the shift register. The shift register is connected to the multiplexer in communication, and the multiplexer is controlled to open the corresponding switch channel in turn during each sampling period to input the analog quantity of the detection data to the ADC for analog-to-digital conversion. When working, the clock signal input source works at a certain frequency, and the output clock signal is sent to the ADC and the shift register at the same time. Every time a pulse is sent, the ADC collects once, and the multiplexer and switches K1~K4 are opened one by one. At the same time, only one switch is connected. The ADC obtains the data transmitted by the four multiplexers in turn, and only one value meets the requirements, and the other values are discarded. According to the above method, every time the current changes, a suitable data will be obtained to achieve measurement.
[0020] The operating frequency of the clock signal input source can be set, such as 1MHz, to achieve high-speed voltage and current seamless shift measurement.
[0021] Usually, the receiving voltage of ADC is limited, for example, the maximum receiving voltage is 4V, and through the unit gain differential circuit, it is required that the detection voltage of all gears does not exceed 4V. Therefore, in this embodiment, a voltage regulator tube component is connected in parallel at both ends of the resistor, and the voltage regulator tube component is connected to the detection circuit to prevent the voltage at both ends of the resistor from exceeding the maximum receiving voltage of the ADC.
[0022] The voltage regulator assembly includes two voltage regulators connected at the positive poles, and the negative poles of the two voltage regulators are connected to the two ends of the resistor. Figure 1The voltage regulator tubes X1~X8 in the resistor are used to stabilize the voltage on the resistor at 4V. In steady state, if a current suitable for gear 1 flows, the detection voltage is assumed to be 2V, which is less than 4V, then the voltage regulator tube of gear 1 does not work, and the differential voltage of U2 and U1 is output normally. At the same time, the initial voltage of gears 2, 3, and 4 will be much higher than 4V, and the corresponding voltage regulator tubes will work, and U3, U4, and U5 will output a differential voltage of 4V relative to U1. At this time, the appropriate value to be taken is the voltage value of gear 1, and the multiplexer switches to U2.
[0023] The working process of the above current high-speed seamless shift measurement circuit is as follows: The normal working state is rotation work: The input clock signal operates at a certain frequency and is sent to the ADC and shift register at the same time. Every time a pulse is sent, the ADC collects once, and the multiplexer and switches K1, K2, K3, and K4 are opened one by one. Only one switch remains open at the same time.
[0024] That is, 4 values can be obtained in 4 input signal pulses, which are 4 sets of values of gear 1, 2, 3, and 4. Among them, only the value of gear 1 can be used within a reasonable range, and the other values are discarded. When the current changes, there must be a set of suitable values in gears 1, 2, 3, and 4, and the other values are discarded.
[0025] The embodiments of the present invention are described in detail above in conjunction with the accompanying drawings, but the present invention is not limited to the above embodiments. Even if various changes are made to the present invention, if these changes fall within the scope of the claims of the present invention and their equivalents, they still fall within the protection scope of the present invention.
Claims
1. A current high-speed seamless shift measurement circuit, characterized in that: include: Multi-speed current detection circuit, data sampling circuit; The multi-speed current detection circuit is connected to a signal source and a device under test, and comprises a plurality of resistors connected in series, the resistance values of the plurality of resistors are increased step by step, corresponding to a plurality of measurement gears, and a detection circuit is connected in parallel at both ends of each resistor; The data sampling circuit includes a clock signal input source, an ADC and a shift register, wherein the clock signal input source is connected to the ADC and the shift register to trigger data sampling; The output end of the shift register is connected to a plurality of the detection circuits, and the plurality of detection circuits are controlled to perform detection in sequence during one sampling period; The output ends of the multiple detection circuits are connected to the ADC, and the data detected during each sampling period is sent to the ADC. The ADC is connected to the signal source to obtain standard data for each sampling, and the detected data is screened according to the standard data obtained for each sampling to obtain the result of this sampling, thereby realizing seamless shifting measurement of voltage and current.
2. The current high-speed seamless shift measurement circuit according to claim 1, characterized in that: The detection circuit includes a unit gain differential circuit, a positive input end of the unit gain differential circuit is connected to a resistor of the multi-speed current detection circuit, a negative input end of the unit gain differential circuit is connected to one end of a switch, the other end of the switch is connected to the output end of the shift register, the output end of the unit gain differential circuit is connected to a multiplexer, and the output end of the multiplexer is connected to the ADC.
3. The current high-speed seamless shift measurement circuit according to claim 2, characterized in that: A voltage regulator tube component is connected in parallel at both ends of the resistor, and the voltage regulator tube component is connected to the detection circuit to prevent the voltage at both ends of the resistor from exceeding the maximum receiving voltage of the ADC.
4. The current high-speed seamless shift measurement circuit according to claim 3, characterized in that: The voltage regulator tube assembly comprises two voltage regulator tubes with positive electrodes connected to each other, and the negative electrodes of the two voltage regulator tubes are connected to two ends of the resistor.
5. The current high-speed seamless shift measurement circuit according to claim 1, characterized in that: The shift register is in communication connection with the multiplexer, and controls the multiplexer to sequentially open corresponding switch channels during each sampling period to input the analog quantity of the detection data to the ADC for analog-to-digital conversion.
6. The current high-speed seamless shift measurement circuit according to claim 1, characterized in that: The clock signal input source outputs a clock signal at a certain frequency, and the ADC samples once each time a pulse is sent, thereby achieving high-speed measurement.
7. The current high-speed seamless shift measurement circuit according to claim 1, characterized in that: The resistance values of the plurality of resistors are increased step by step by 10 times to obtain a plurality of measurement gears; each time the ADC is triggered for sampling, there is one and only one sampling data corresponding to the current measurement gear.
8. The current high-speed seamless shift measurement circuit according to claim 1, characterized in that: The resistance values of the plurality of resistors are increased step by step by 100 times to obtain a plurality of measurement gears; each time the ADC is triggered for sampling, there is one and only one sampling data corresponding to the current measurement gear.