All-digital simulation verification method for airborne mission system combat software

Abstract

The invention relates to the technical field of digital simulation, and discloses an all-digital simulation verification method for airborne mission system combat software, which comprises the following steps: performing digital simulation on an FT2000-4 kernel under an X86 platform, performing digital simulation on an on-chip peripheral of the FT2000-4 kernel, developing a virtual bus and integrating the virtual bus on a DDS communication component of the X86 platform, and verifying the digital simulation of the FT2000-4 kernel under the X86 platform. A virtual communication middleware is developed between a virtual bus and an on-chip peripheral, and an airborne all-digital simulation verification platform is built on an X86 platform. An airborne full-digital simulation verification platform is built on an X86 platform, and a communication module in an actual airborne target machine is simulated in a mode of building virtual communication middleware and a virtual bus. And meanwhile, a development compiling environment which is completely consistent with the X86 platform is used, so that the development and verification work of the airborne full-digital simulation verification platform under the X86 platform is realized. The verification difference between platforms is eliminated, and meanwhile it can be guaranteed that the application algorithm verified by the airborne full-digital simulation verification platform can be directly operated on the X86 platform.

Description

Technical Field

[0001] The present application relates to the field of digital simulation technology, for example, to a fully digital simulation verification method for airborne mission system combat software. Background Art

[0002] At present, the development and verification of airborne algorithms (such as attack parameter solution, data fusion, etc.) need to be developed on the X86 platform. When verifying on the airborne platform, the airborne algorithms developed and verified on the X86 platform need to be transplanted and verified again.

[0003] In the process of implementing the above embodiments, it is found that there are at least the following problems in the related art:

[0004] Due to the differences in platforms, there are differences in the development and verification of application algorithms. Among them, the most prominent is the difference in instruction sets. The X86 platform uses the X86 instruction set, and the airborne platform uses the ARMV8 instruction set. Due to the difference in instruction sets, there may be differences in verification results between the x86 platform and the airborne platform. In addition, there are also differences such as the development and compilation environment of the application algorithm. At the same time, due to the scarcity of hardware resources, the efficiency of software verification is not high.

[0005] It should be noted that the information disclosed in the above background technology section is only used to enhance the understanding of the background of the present application, and therefore may include information that does not constitute the prior art known to ordinary technicians in the field. Summary of the invention

[0006] In order to provide a basic understanding of some aspects of the disclosed embodiments, a brief summary is given below. The summary is not an extensive review, nor is it intended to identify key / critical components or delineate the scope of protection of these embodiments, but rather serves as a prelude to the detailed description that follows.

[0007] The disclosed embodiment provides a fully digital simulation verification method for airborne mission system combat software to solve the problems raised in the above-mentioned background technology.

[0008] In some embodiments, a fully digital simulation verification method for airborne mission system combat software includes: digitally simulating the FT2000-4 core under the X86 platform; digitally simulating the on-chip peripherals of the FT2000-4 core; developing a virtual bus and integrating it into a DDS communication component of the X86 platform, defining data exchange logic in the virtual bus, and correspondingly calling the DDS interface under the X86 platform; developing a virtual communication middleware between the virtual bus and the on-chip peripherals, the virtual communication middleware reads and writes the on-chip peripherals to call the virtual bus; using the FT2000-4 core, on-chip peripherals and virtual bus to build an airborne fully digital simulation verification platform on the X86 platform; and using the airborne fully digital simulation verification platform and the X86 platform to perform closed-loop verification of the algorithm.

[0009] Optionally, the steps of digitally simulating the FT2000-4 kernel under the X86 platform include: registering the FT2000-4 kernel containing ARM instructions through the interface provided by the X86 platform; translating the image file of the FT2000-4 kernel into the ARM instruction set through the image loading interface provided by the X86 platform; converting the ARM instructions in the ARM instruction set into corresponding X86 instructions through the development tool chain of the X86 platform, thereby realizing the digital simulation of the FT2000-4 kernel under the X86 platform.

[0010] Optionally, the step of translating the image file of the FT2000-4 kernel into the ARM instruction set includes: integrating a disassembly conversion algorithm in the FT2000-4 kernel to convert the binary image file into the ARM instruction set.

[0011] Optionally, the step of converting the ARM instructions in the ARM instruction set into corresponding X86 instructions includes: converting C code corresponding to the conversion bit of each ARM instruction in the ARM instruction set to obtain the corresponding X86 instruction.

[0012] Optionally, the steps of digitally simulating the on-chip peripherals of the FT2000-4 core include: developing registers corresponding to the on-chip peripheral functions through the development tool chain of the X86 platform; simulating the on-chip peripheral functions through the development tool chain of the X86 platform to realize the internal data processing logic of each register; registering the I / O interface of each register through the interface of the X86 platform to exchange data with the FT2000-4 core.

[0013] Optionally, the steps of developing a virtual bus and integrating it into the DDS communication component of the X86 platform include: through the development tool chain of the X86 platform, corresponding the I / O interface of each register to each DDS interface of the X86 platform; through the development tool chain of the X86 platform, making the processing function of each register call each DDS interface of the X86 platform, linking the DDS communication component of the X86 platform, and generating a virtual bus.

[0014] Optionally, the steps of developing virtual communication middleware between the virtual bus and on-chip peripherals include: obtaining and calling the formal parameters of each register interface input through the development tool chain of the X86 platform to determine the write data; performing a write operation on each register through the development tool chain of the X86 platform to input the obtained function parameters into each simulated peripheral; after each simulated peripheral is processed, performing a read operation on each register through the development tool chain of the X86 platform to obtain the return value of each corresponding interface and generate a virtual DDS middleware.

[0015] Optionally, the steps of performing closed-loop verification of the algorithm using the airborne all-digital simulation verification platform and the X86 platform include: loading the APP to be verified, the DDS middleware, and the binary files running on the airborne all-digital simulation verification platform into the FT2000-4 kernel; simultaneously starting the verification tool and the airborne all-digital simulation verification platform under the X86 platform; and enabling the airborne all-digital simulation verification platform to exchange data with the verification tool through a virtual bus to verify the results.

[0016] Optionally, the binary files running on the airborne all-digital simulation verification platform include: OS files running on the airborne all-digital simulation verification platform; and / or, MSL files running on the airborne all-digital simulation verification platform.

[0017] Optionally, the steps of building an airborne all-digital simulation verification platform on an X86 platform using the FT2000-4 core, on-chip peripherals and a virtual bus include: using the FT2000-4 core as the core of the airborne all-digital simulation verification platform; deploying the on-chip peripherals to the FT2000-4 core; deploying the virtual bus between the on-chip peripherals and the DDS interface of the X86 platform; configuring parameters of the airborne all-digital simulation verification platform to build the airborne all-digital simulation verification platform.

[0018] The fully digital simulation verification method for airborne mission system combat software provided by the embodiments of the present disclosure can achieve the following technical effects:

[0019] The disclosed embodiment provides a method for fully digital simulation and verification of combat software for airborne mission systems. By building an airborne fully digital simulation and verification platform on an X86 platform, a virtual communication middleware and a virtual bus are constructed to simulate the communication module in the actual airborne target machine. At the same time, a development and compilation environment that is completely consistent with the X86 platform is used to implement the development and verification of the airborne fully digital simulation and verification platform on the X86 platform. While eliminating the verification differences between platforms, it can also ensure that the application algorithm verified on the airborne fully digital simulation and verification platform can be directly run on the X86 platform.

[0020] The above general description and the following description are exemplary and explanatory only and are not intended to limit the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] One or more embodiments are exemplarily described by corresponding drawings, and these exemplary descriptions and drawings do not constitute limitations on the embodiments. Elements with the same reference numerals in the drawings are considered similar elements, and the drawings do not constitute a scale limitation, and wherein:

[0022] Figure 1 It is an overall schematic diagram of an airborne all-digital simulation verification platform for an all-digital simulation verification method for airborne mission system combat software provided by an embodiment of the present disclosure;

[0023] Figure 2 It is a schematic diagram of the calling principle of each application interface of the virtual middleware of a full digital simulation verification method for airborne mission system combat software provided by an embodiment of the present disclosure;

[0024] Figure 3 It is a work flow chart of algorithm closed-loop verification of a full digital simulation verification method for airborne mission system combat software provided by an embodiment of the present disclosure;

[0025] Figure 4 It is a flow chart of a fully digital simulation verification method for airborne mission system combat software provided by an embodiment of the present disclosure;

[0026] Figure 5 It is another flow chart of a full digital simulation verification method for airborne mission system combat software provided by an embodiment of the present disclosure;

[0027] Figure 6 is another flow chart of a fully digital simulation verification method for airborne mission system combat software provided by an embodiment of the present disclosure;

[0028] Figure 7 is another flow chart of a fully digital simulation verification method for airborne mission system combat software provided by an embodiment of the present disclosure;

[0029] Figure 8 is another flow chart of a fully digital simulation verification method for airborne mission system combat software provided by an embodiment of the present disclosure;

[0030] Fig. 9 is another flow chart of a fully digital simulation verification method for airborne mission system combat software provided by an embodiment of the present disclosure;

[0031] Fig.10 is another flow chart of a fully digital simulation verification method for airborne mission system combat software provided by an embodiment of the present disclosure;

[0032] Fig.11 is another flow chart of a fully digital simulation verification method for airborne mission system combat software provided by an embodiment of the present disclosure;

[0033] Fig.12 It is another flow chart of a fully digital simulation verification method for airborne mission system combat software provided by an embodiment of the present disclosure. DETAILED DESCRIPTION

[0034] In order to be able to understand the features and technical contents of the embodiments of the present disclosure in more detail, the implementation of the embodiments of the present disclosure is described in detail below in conjunction with the accompanying drawings. The attached drawings are for reference only and are not used to limit the embodiments of the present disclosure. In the following technical description, for the convenience of explanation, a full understanding of the disclosed embodiments is provided through multiple details. However, one or more embodiments can still be implemented without these details. In other cases, to simplify the drawings, well-known structures and devices can be simplified for display.

[0035] The terms "first", "second", etc. in the specification and claims of the embodiments of the present disclosure and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the terms used in this way can be interchanged where appropriate, so that the embodiments of the embodiments of the present disclosure described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions.

[0036] In the embodiments of the present disclosure, the terms "upper", "lower", "inside", "middle", "outside", "front", "back" and the like indicate directions or positional relationships based on the directions or positional relationships shown in the accompanying drawings. These terms are mainly intended to better describe the embodiments of the present disclosure and their embodiments, and are not intended to limit the indicated devices, elements or components to have a specific direction, or to be constructed and operated in a specific direction. Moreover, in addition to being used to indicate directions or positional relationships, some of the above terms may also be used to indicate other meanings. For example, the term "upper" may also be used to indicate a certain dependency or connection relationship in certain circumstances. For those of ordinary skill in the art, the specific meanings of these terms in the embodiments of the present disclosure can be understood according to specific circumstances.

[0037] In addition, the terms "disposed", "connected", and "fixed" should be understood in a broad sense. For example, "connected" can be a fixed connection, a detachable connection, or an integral structure; it can be a mechanical connection, or an electrical connection; it can be a direct connection, or an indirect connection through an intermediate medium, or it can be an internal connection between two devices, elements, or components. For those of ordinary skill in the art, the specific meanings of the above terms in the embodiments of the present disclosure can be understood according to specific circumstances.

[0038] Unless otherwise stated, the term "plurality" means two or more.

[0039] In the embodiment of the present disclosure, the character " / " indicates that the preceding and following objects are in an "or" relationship. For example, A / B indicates: A or B.

[0040] The term "and / or" is a description of the association relationship between objects, indicating that three relationships can exist. For example, A and / or B means: A or B, or, A and B.

[0041] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present disclosure may be combined with each other.

[0042] Combination Figures 1 to 4 As shown, the embodiment of the present disclosure provides a fully digital simulation verification method for airborne mission system combat software, including:

[0043] S401, digital simulation of the FT2000-4 core on the X86 platform.

[0044] S402, digitally emulate the on-chip peripherals of the FT2000-4 core.

[0045] S403, develop a virtual bus and integrate it into the DDS communication component of the X86 platform, define the data exchange logic in the virtual bus, and call the DDS interface under the X86 platform accordingly.

[0046] S404, developing a virtual communication middleware between the virtual bus and the on-chip peripherals, the virtual communication middleware reads and writes the on-chip peripherals to call the virtual bus.

[0047] S405, uses the FT2000-4 core, on-chip peripherals and virtual bus to build an airborne full-digital simulation verification platform on the X86 platform.

[0048] S406, use the airborne full digital simulation verification platform and X86 platform to perform closed-loop verification of the algorithm.

[0049] The disclosed embodiment provides a method for fully digital simulation and verification of combat software for airborne mission systems. By building an airborne fully digital simulation and verification platform on an X86 platform, a virtual communication middleware and a virtual bus are constructed to simulate the communication module in the actual airborne target machine. At the same time, a development and compilation environment that is completely consistent with the X86 platform is used to implement the development and verification of the airborne fully digital simulation and verification platform on the X86 platform. While eliminating the verification differences between platforms, it can also ensure that the application algorithm verified on the airborne fully digital simulation and verification platform can be directly run on the X86 platform.

[0050] Combination Figures 1 to 3 As shown, in some embodiments, Figure 5 As shown, a full digital simulation verification method for airborne mission system combat software is provided, comprising:

[0051] S501, registers the FT2000-4 kernel containing ARM instructions through the interface provided by the X86 platform.

[0052] S502, through the image loading interface provided by the X86 platform, translates the image file of the FT2000-4 kernel into the ARM instruction set.

[0053] S503, through the development tool chain of the X86 platform, converts the ARM instructions in the ARM instruction set into corresponding X86 instructions, thereby realizing the digital simulation of the FT2000-4 kernel under the X86 platform.

[0054] S504, digitally emulate the on-chip peripherals of the FT2000-4 core.

[0055] S505, develop a virtual bus and integrate it into the DDS communication component of the X86 platform, define the data exchange logic in the virtual bus, and call the DDS interface under the X86 platform accordingly.

[0056] S506, developing a virtual communication middleware between the virtual bus and the on-chip peripherals, the virtual communication middleware reading and writing the on-chip peripherals to call the virtual bus.

[0057] S507, uses the FT2000-4 core, on-chip peripherals and virtual bus to build an airborne full-digital simulation verification platform on the X86 platform.

[0058] S508, use the airborne full digital simulation verification platform and X86 platform to perform closed-loop verification of the algorithm.

[0059] In the disclosed embodiment, the steps of digitally simulating the FT2000-4 kernel under the X86 platform are as follows: first, register the FT2000-4 kernel containing ARM instructions through the interface provided by the X86 platform. Then, translate the image file of the FT2000-4 kernel into the ARM instruction set through the image loading interface provided by the X86 platform. Finally, through the development tool chain of the X86 platform, convert the ARM instructions in the ARM instruction set into corresponding X86 instructions, and realize the digital simulation of the FT2000-4 kernel under the X86 platform. The instruction set differences are eliminated by converting each ARM instruction in the ARM instruction set into corresponding X86 instructions.

[0060] Combination Figures 1 to 3 As shown, in some embodiments, as Figure 6As shown, a full digital simulation verification method for airborne mission system combat software is provided, comprising:

[0061] S601, registers the FT2000-4 kernel containing ARM instructions through the interface provided by the X86 platform.

[0062] S602, through the image loading interface provided by the X86 platform, integrates the disassembly conversion algorithm in the FT2000-4 kernel to convert the binary image file into the ARM instruction set.

[0063] S603, through the development tool chain of the X86 platform, converts the ARM instructions in the ARM instruction set into corresponding X86 instructions, realizing the digital simulation of the FT2000-4 core under the X86 platform.

[0064] S604, digitally simulate the on-chip peripherals of the FT2000-4 core.

[0065] S605, develop a virtual bus and integrate it into the DDS communication component of the X86 platform. The data exchange logic is defined in the virtual bus and corresponds to the call to the DDS interface under the X86 platform.

[0066] S606, developing a virtual communication middleware between the virtual bus and the on-chip peripherals, the virtual communication middleware reading and writing the on-chip peripherals to call the virtual bus.

[0067] S607, uses the FT2000-4 core, on-chip peripherals and virtual bus to build an airborne full-digital simulation verification platform on the X86 platform.

[0068] S608, uses the airborne full digital simulation verification platform and X86 platform to perform closed-loop verification of the algorithm.

[0069] In the disclosed embodiment, the step of translating the image file of the FT2000-4 kernel into the ARM instruction set is to integrate a disassembly conversion algorithm in the FT2000-4 kernel to convert the binary image file into the ARM instruction set. The disassembly conversion algorithm is integrated in the kernel to facilitate conversion into ARM instructions.

[0070] Combination Figures 1 to 3 As shown, in some embodiments, Figure 7 As shown, a full digital simulation verification method for airborne mission system combat software is provided, comprising:

[0071] S701, registers the FT2000-4 kernel containing ARM instructions through the interface provided by the X86 platform.

[0072] S702, through the image loading interface provided by the X86 platform, integrates the disassembly conversion algorithm in the FT2000-4 kernel to convert the binary image file into the ARM instruction set.

[0073] S703, through the development tool chain of the X86 platform, convert the C code corresponding to the conversion bit of each ARM instruction in the ARM instruction set to obtain the corresponding X86 instruction, thereby realizing the digital simulation of the FT2000-4 kernel under the X86 platform.

[0074] S704, digital simulation of the on-chip peripherals of the FT2000-4 core.

[0075] S705, develop a virtual bus and integrate it into the DDS communication component of the X86 platform. The data exchange logic is defined in the virtual bus and the corresponding call is made to the DDS interface under the X86 platform.

[0076] S706, developing a virtual communication middleware between the virtual bus and the on-chip peripherals, the virtual communication middleware reading and writing the on-chip peripherals to call the virtual bus.

[0077] S707, uses the FT2000-4 core, on-chip peripherals and virtual bus to build an airborne full-digital simulation verification platform on the X86 platform.

[0078] S708 uses the airborne full-digital simulation verification platform and X86 platform to perform closed-loop verification of the algorithm.

[0079] In the disclosed embodiment, the step of converting the ARM instruction in the ARM instruction set into the corresponding X86 instruction is to convert the C code corresponding to the conversion bit of each ARM instruction in the ARM instruction set to obtain the corresponding X86 instruction. The corresponding C code is converted to obtain the corresponding X86 instruction.

[0080] Combination Figures 1 to 3 As shown, in some embodiments, Figure 8 As shown, a full digital simulation verification method for airborne mission system combat software is provided, comprising:

[0081] S801, registers the FT2000-4 kernel containing ARM instructions through the interface provided by the X86 platform.

[0082] S802, through the image loading interface provided by the X86 platform, integrates the disassembly conversion algorithm in the FT2000-4 kernel to convert the binary image file into the ARM instruction set.

[0083] S803, through the development tool chain of the X86 platform, convert the C code corresponding to the conversion bit of each ARM instruction in the ARM instruction set to obtain the corresponding X86 instruction, thereby realizing the digital simulation of the FT2000-4 kernel under the X86 platform.

[0084] S804, develop various registers corresponding to the on-chip peripheral functions through the development tool chain of the X86 platform.

[0085] S805, through the development tool chain of the X86 platform, simulates the on-chip peripheral functions and implements the internal data processing logic of each register.

[0086] S806, through the interface of the X86 platform, registers the I / O interface of each register and exchanges data with the FT2000-4 core.

[0087] S807, develop a virtual bus and integrate it into the DDS communication component of the X86 platform. The data exchange logic is defined in the virtual bus and the corresponding call is made to the DDS interface under the X86 platform.

[0088] S808, developing a virtual communication middleware between the virtual bus and the on-chip peripherals, the virtual communication middleware reading and writing the on-chip peripherals to call the virtual bus.

[0089] S809, uses the FT2000-4 core, on-chip peripherals and virtual bus to build an airborne full-digital simulation verification platform on the X86 platform.

[0090] S810 uses the airborne all-digital simulation verification platform and X86 platform to perform closed-loop verification of the algorithm.

[0091] In the disclosed embodiment, the steps of digitally simulating the on-chip peripherals of the FT2000-4 core are as follows: first, through the development tool chain of the X86 platform, develop each register corresponding to the on-chip peripheral function. Then, through the development tool chain of the X86 platform, simulate the on-chip peripheral function and realize the internal data processing logic of each register. Finally, through the interface of the X86 platform, register the I / O interface of each register and exchange data with the FT2000-4 core. The method of registering the I / O interface of each register using the interface provided by the X86 platform facilitates the data exchange between the peripheral and the core.

[0092] Combination Figures 1 to 3 As shown, in some embodiments, Fig. 9 As shown, a full digital simulation verification method for airborne mission system combat software is provided, comprising:

[0093] S901, registers the FT2000-4 kernel containing ARM instructions through the interface provided by the X86 platform.

[0094] S902, through the image loading interface provided by the X86 platform, integrates the disassembly conversion algorithm in the FT2000-4 kernel to convert the binary image file into the ARM instruction set.

[0095] S903, through the development tool chain of the X86 platform, convert the C code corresponding to the conversion bit of each ARM instruction in the ARM instruction set to obtain the corresponding X86 instruction, and realize the digital simulation of the FT2000-4 kernel under the X86 platform.

[0096] S904, developing registers corresponding to on-chip peripheral functions through a development tool chain of an X86 platform.

[0097] S905, through the development tool chain of the X86 platform, simulates the on-chip peripheral functions and implements the internal data processing logic of each register.

[0098] S906, through the interface of the X86 platform, registers the I / O interface of each register and exchanges data with the FT2000-4 core.

[0099] S907, using the development tool chain of the X86 platform, correspond the I / O interface of each register to each DDS interface of the X86 platform.

[0100] S908, through the development tool chain of the X86 platform, the processing functions of each register call each DDS interface of the X86 platform, link the DDS communication components of the X86 platform, generate a virtual bus, define the data exchange logic in the virtual bus, and call the DDS interface under the X86 platform accordingly.

[0101] S909, developing a virtual communication middleware between the virtual bus and the on-chip peripherals, the virtual communication middleware reading and writing the on-chip peripherals to call the virtual bus.

[0102] S910, uses the FT2000-4 core, on-chip peripherals and virtual bus to build an airborne full-digital simulation verification platform on the X86 platform.

[0103] S911 uses the airborne all-digital simulation verification platform and X86 platform to perform closed-loop verification of the algorithm.

[0104] In the disclosed embodiment, the steps of developing a virtual bus and integrating it into the DDS communication component of the X86 platform are as follows: first, through the development tool chain of the X86 platform, the I / O interface of each register corresponds to each DDS interface of the X86 platform. Then, through the development tool chain of the X86 platform, the processing function of each register calls each DDS interface of the X86 platform, links the DDS communication component of the X86 platform, and generates a virtual bus. Through the virtual bus, a development and compilation environment that is completely consistent with X86 is developed, thereby eliminating the verification differences between platforms.

[0105] Combination Figures 1 to 3 As shown, in some embodiments, as Fig.10 As shown, a full digital simulation verification method for airborne mission system combat software is provided, comprising:

[0106] S1001, registers the FT2000-4 kernel containing ARM instructions through the interface provided by the X86 platform.

[0107] S1002, through the image loading interface provided by the X86 platform, integrates the disassembly conversion algorithm in the FT2000-4 kernel to convert the binary image file into the ARM instruction set.

[0108] S1003, through the development tool chain of the X86 platform, convert the C code corresponding to the conversion bit of each ARM instruction in the ARM instruction set to obtain the corresponding X86 instruction, thereby realizing the digital simulation of the FT2000-4 kernel under the X86 platform.

[0109] S1004, developing registers corresponding to on-chip peripheral functions through a development tool chain of an X86 platform.

[0110] S1005, through the development tool chain of the X86 platform, simulates the on-chip peripheral functions and implements the internal data processing logic of each register.

[0111] S1006, through the interface of the X86 platform, registers the I / O interface of each register and exchanges data with the FT2000-4 core.

[0112] S1007, using the development tool chain of the X86 platform, correspond the I / O interface of each register to each DDS interface of the X86 platform.

[0113] S1008, through the development tool chain of the X86 platform, the processing function of each register calls each DDS interface of the X86 platform, links the DDS communication component of the X86 platform, generates a virtual bus, defines the data exchange logic in the virtual bus, and calls the DDS interface under the X86 platform accordingly.

[0114] S1009, obtaining and calling the formal parameters of each register interface input through the development tool chain of the X86 platform to determine the write data.

[0115] S1010, through the development tool chain of the X86 platform, write operations are performed on each register, and the obtained function parameters are input into each simulation peripheral.

[0116] S1011, after the processing of each simulated peripheral is completed, the development tool chain of the X86 platform is used to read each register, obtain the return value of each corresponding interface, generate a virtual DDS middleware, and the virtual communication middleware reads and writes the on-chip peripherals to call the virtual bus.

[0117] S1012, uses the FT2000-4 core, on-chip peripherals and virtual bus to build an airborne full-digital simulation verification platform on the X86 platform.

[0118] S1013, use the airborne full digital simulation verification platform and X86 platform to perform closed-loop verification of the algorithm.

[0119] In the disclosed embodiment, the steps of developing virtual communication middleware between the virtual bus and the on-chip peripherals are to first obtain and call the formal parameters of each register interface input through the development tool chain of the X86 platform to determine the write data. Then, through the development tool chain of the X86 platform, write operations are performed on each register, and the obtained function parameters are input into each simulation peripheral. Finally, after the processing of each simulation peripheral is completed, the development tool chain of the X86 platform is used to read each register, obtain the return value of each corresponding interface, and generate a virtual DDS middleware. The differences between platforms are eliminated by constructing virtual communication middleware and virtual buses. The development and verification of the airborne all-digital simulation verification platform under the X86 platform can be realized, and the application algorithm verified on the airborne all-digital simulation verification platform can be directly run on the X86 platform.

[0120] Combination Figures 1 to 3 As shown, in some embodiments, Fig.11 As shown, a full digital simulation verification method for airborne mission system combat software is provided, comprising:

[0121] S1101, registers the FT2000-4 kernel containing ARM instructions through the interface provided by the X86 platform.

[0122] S1102, through the image loading interface provided by the X86 platform, integrates the disassembly conversion algorithm in the FT2000-4 kernel to convert the binary image file into the ARM instruction set.

[0123] S1103, through the development tool chain of the X86 platform, convert the C code corresponding to the conversion bit of each ARM instruction in the ARM instruction set to obtain the corresponding X86 instruction, thereby realizing the digital simulation of the FT2000-4 kernel under the X86 platform.

[0124] S1104, develop various registers corresponding to the on-chip peripheral functions through the development tool chain of the X86 platform.

[0125] S1105, through the development tool chain of the X86 platform, simulates the on-chip peripheral functions and implements the internal data processing logic of each register.

[0126] S1106, through the interface of the X86 platform, registers the I / O interface of each register and exchanges data with the FT2000-4 core.

[0127] S1107, using the development tool chain of the X86 platform, correspond the I / O interface of each register to each DDS interface of the X86 platform.

[0128] S1108, through the development tool chain of the X86 platform, the processing function of each register calls each DDS interface of the X86 platform, links the DDS communication component of the X86 platform, generates a virtual bus, defines the data exchange logic in the virtual bus, and calls the DDS interface under the X86 platform accordingly.

[0129] S1109, through the development tool chain of the X86 platform, obtain and call the formal parameters input by each register interface to determine the write data.

[0130] S1110, through the development tool chain of the X86 platform, write operations are performed on each register to input the obtained function parameters into each simulation peripheral.

[0131] S1111, after the processing of each simulated peripheral is completed, the development tool chain of the X86 platform is used to read each register, obtain the return value of each corresponding interface, generate a virtual DDS middleware, and the virtual communication middleware reads and writes the on-chip peripherals to call the virtual bus.

[0132] S1112, uses the FT2000-4 core, on-chip peripherals and virtual bus to build an airborne full-digital simulation verification platform on the X86 platform.

[0133] S1113, load the APP, DDS middleware, and binary files running on the airborne full digital simulation verification platform that need to be verified into the FT2000-4 kernel.

[0134] S1114, start the verification tool under the X86 platform and the airborne full digital simulation verification platform at the same time.

[0135] S1115, enables the airborne full digital simulation verification platform to exchange data with the verification tool through the virtual bus to verify the result.

[0136] In the disclosed embodiment, the steps of using the airborne all-digital simulation verification platform and the X86 platform to perform closed-loop verification of the algorithm are to first load the APP, DDS middleware, and binary files running on the airborne all-digital simulation verification platform to be verified into the FT2000-4 kernel. Then start the verification tool and the airborne all-digital simulation verification platform under the X86 platform at the same time. Finally, the airborne all-digital simulation verification platform exchanges data with the verification tool through a virtual bus to verify the result. If the verification effect is consistent with the X86 platform, the verification is completed. If there is a difference between the verification effect and the X86 platform, it is trimmed.

[0137] Optionally, the binary files running on the airborne all-digital simulation verification platform include OS files running on the airborne all-digital simulation verification platform.

[0138] In the disclosed embodiment, the binary files run by the airborne all-digital simulation verification platform include OS files, and the closed-loop verification of the algorithm is performed by loading the OS files into the FT2000-4 kernel.

[0139] Optionally, the binary file running on the airborne all-digital simulation verification platform also includes an MSL file running on the airborne all-digital simulation verification platform.

[0140] In the disclosed embodiment, the binary file run by the airborne all-digital simulation verification platform also includes an MSL file, and the algorithm closed-loop verification is performed by loading the MSL file into the FT2000-4 kernel.

[0141] Combination Figures 1 to 3 As shown, in some embodiments, as Fig.12 As shown, a full digital simulation verification method for airborne mission system combat software is provided, comprising:

[0142] S1201, registers the FT2000-4 kernel containing ARM instructions through the interface provided by the X86 platform.

[0143] S1202, through the image loading interface provided by the X86 platform, integrates the disassembly conversion algorithm in the FT2000-4 kernel to convert the binary image file into the ARM instruction set.

[0144] S1203, converting the C code corresponding to the conversion bit of each ARM instruction in the ARM instruction set through the development tool chain of the X86 platform to obtain the corresponding X86 instruction, thereby realizing the digital simulation of the FT2000-4 kernel under the X86 platform.

[0145] S1204, developing registers corresponding to on-chip peripheral functions through a development tool chain of an X86 platform.

[0146] S1205, through the development tool chain of the X86 platform, simulates the on-chip peripheral functions and implements the internal data processing logic of each register.

[0147] S1206, through the interface of the X86 platform, registers the I / O interface of each register and exchanges data with the FT2000-4 core.

[0148] S1207, using the development tool chain of the X86 platform, correspond the I / O interface of each register to each DDS interface of the X86 platform.

[0149] S1208, through the development tool chain of the X86 platform, the processing function of each register calls each DDS interface of the X86 platform, links the DDS communication component of the X86 platform, generates a virtual bus, defines the data exchange logic in the virtual bus, and calls the DDS interface under the X86 platform accordingly.

[0150] S1209, obtaining and calling the formal parameters of each register interface input through the development tool chain of the X86 platform to determine the write data.

[0151] S1210, through the development tool chain of the X86 platform, write operations are performed on each register to input the obtained function parameters into each simulation peripheral.

[0152] S1211, after the processing of each simulated peripheral is completed, the development tool chain of the X86 platform is used to read each register, obtain the return value of each corresponding interface, generate a virtual DDS middleware, and the virtual communication middleware reads and writes the on-chip peripherals to call the virtual bus.

[0153] S1212 uses the FT2000-4 core as the core of the airborne all-digital simulation verification platform.

[0154] S1213, deploying on-chip peripherals to the FT2000-4 core.

[0155] S1214, deploys a virtual bus between on-chip peripherals and the DDS interface of the X86 platform.

[0156] S1215: configure parameters of the airborne full digital simulation verification platform and build the airborne full digital simulation verification platform.

[0157] S1216, load the APP, DDS middleware, and binary files running on the airborne full digital simulation verification platform that need to be verified into the FT2000-4 kernel.

[0158] S1217, start the verification tool under the X86 platform and the airborne full digital simulation verification platform at the same time.

[0159] S1218, enables the airborne full digital simulation verification platform to exchange data with the verification tool through the virtual bus to verify the result.

[0160] In the disclosed embodiment, the steps of building an airborne all-digital simulation verification platform on an X86 platform using the FT2000-4 core, on-chip peripherals and a virtual bus are as follows: first, the FT2000-4 core is used as the core of the airborne all-digital simulation verification platform. Then, the on-chip peripherals are deployed to the FT2000-4 core. Then, the virtual bus is deployed between the on-chip peripherals and the DDS interface of the X86 platform. Finally, the parameters of the airborne all-digital simulation verification platform are configured to build the airborne all-digital simulation verification platform. By building an airborne all-digital simulation verification platform, the contradiction between hardware verification resources and actual test requirements is solved.

[0161] The above description and the accompanying drawings sufficiently illustrate the embodiments of the present disclosure to enable those skilled in the art to practice them. Other embodiments may include structural and other changes. The embodiments represent only possible variations. Unless explicitly required, individual components and functions are optional, and the order of operations may vary. Portions and features of some embodiments may be included in or replace portions and features of other embodiments. The embodiments of the present disclosure are not limited to the structures described above and shown in the accompanying drawings, and various modifications and changes may be made without departing from the scope thereof. The scope of the present disclosure is limited only by the appended claims.

Claims

1. A fully digital simulation verification method for airborne mission system combat software, characterized in that: include: Digitally simulate the FT2000-4 core on the X86 platform; Digital simulation of the on-chip peripherals of the FT2000-4 core; Develop a virtual bus and integrate it into the DDS communication component of the X86 platform. Define the data exchange logic in the virtual bus and call the DDS interface on the X86 platform accordingly. Develop virtual communication middleware between the virtual bus and on-chip peripherals. The virtual communication middleware reads and writes on-chip peripherals to call the virtual bus. Using the FT2000-4 core, on-chip peripherals and virtual bus to build an airborne full-digital simulation verification platform on the X86 platform; The algorithm closed-loop verification is performed using the airborne fully digital simulation verification platform and X86 platform.

2. A fully digital simulation verification method for airborne mission system combat software according to claim 1, characterized in that: The steps to digitally simulate the FT2000-4 core on the X86 platform include: Register the FT2000-4 kernel containing ARM instructions through the interface provided by the X86 platform; Through the image loading interface provided by the X86 platform, the image file of the FT2000-4 kernel is translated into the ARM instruction set; Through the development tool chain of the X86 platform, the ARM instructions in the ARM instruction set are converted into corresponding X86 instructions, realizing the digital simulation of the FT2000-4 core under the X86 platform.

3. A fully digital simulation verification method for airborne mission system combat software according to claim 2, characterized in that: The steps to translate the FT2000-4 kernel image file into the ARM instruction set include: The disassembly conversion algorithm is integrated into the FT2000-4 kernel to convert the binary image file into the ARM instruction set.

4. A fully digital simulation verification method for airborne mission system combat software according to claim 2, characterized in that: The steps of converting the ARM instructions in the ARM instruction set into the corresponding X86 instructions include: Convert the C code corresponding to the conversion bit of each ARM instruction in the ARM instruction set to obtain the corresponding X86 instruction.

5. The all-digital simulation verification method for airborne mission system combat software according to claim 1, characterized in that: The steps to digitally simulate the on-chip peripherals of the FT2000-4 core include: Develop registers corresponding to on-chip peripheral functions through the development tool chain of the X86 platform; Through the development tool chain of the X86 platform, the on-chip peripheral functions are simulated to realize the internal data processing logic of each register; Through the interface of the X86 platform, the I / O interfaces of each register are registered to exchange data with the FT2000-4 core.

6. A fully digital simulation verification method for airborne mission system combat software according to claim 5, characterized in that: The steps to develop a virtual bus and integrate it into the DDS communication component of the X86 platform include: Through the development tool chain of the X86 platform, the I / O interface of each register corresponds to each DDS interface of the X86 platform; Through the development tool chain of the X86 platform, the processing functions of each register call each DDS interface of the X86 platform, link the DDS communication components of the X86 platform, and generate a virtual bus.

7. The all-digital simulation verification method for airborne mission system combat software according to claim 5, characterized in that: The steps to develop virtual communication middleware between the virtual bus and on-chip peripherals include: Through the development tool chain of the X86 platform, the formal parameters of each register interface input are obtained and called to determine the written data; Through the development tool chain of the X86 platform, write operations are performed on each register to input the obtained function parameters into each simulation peripheral; After the processing of each simulated peripheral is completed, the development tool chain of the X86 platform is used to read each register, obtain the return value of each corresponding interface, and generate a virtual DDS middleware.

8. A fully digital simulation verification method for airborne mission system combat software according to claim 7, characterized in that: The steps of closed-loop algorithm verification using the airborne all-digital simulation verification platform and X86 platform include: Load the APP, DDS middleware, and binary files of the airborne full digital simulation verification platform that need to be verified into the FT2000-4 kernel; Simultaneously start the verification tool under the X86 platform and the airborne full digital simulation verification platform; The airborne fully digital simulation verification platform exchanges data with the verification tool through a virtual bus to verify the results.

9. A fully digital simulation verification method for airborne mission system combat software according to claim 8, characterized in that: The binary files running on the airborne all-digital simulation verification platform include: OS files running on the airborne all-digital simulation verification platform; and / or, MSL file for running the airborne full digital simulation verification platform.

10. A fully digital simulation verification method for airborne mission system combat software according to any one of claims 1 to 9, characterized in that: The steps to build an airborne all-digital simulation verification platform on an X86 platform using the FT2000-4 core, on-chip peripherals, and virtual buses include: Use the FT2000-4 core as the core of the airborne all-digital simulation verification platform; Deploy on-chip peripherals to the FT2000-4 core; Deploy a virtual bus between on-chip peripherals and the DDS interface of the X86 platform; Configure parameters of the airborne full-digital simulation verification platform and build an airborne full-digital simulation verification platform.

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