Analog circuit for initial value dependence behavior of discrete system

Abstract

The invention relates to the technical field of integrated circuits, in particular to a discrete system initial value dependence behavior analog circuit which comprises a sampling and holding circuit and a system model circuit, continuous signals output by the system model circuit are sampled and held through the sampling and holding circuit, and discretization processing of the continuous signals is achieved; a system model circuit is used for simulating a two-dimensional discrete neuron model, initial value offset is carried out by adjusting initial voltage, and different coexisting attractors are generated. According to the method, the initial value dependence behavior of the discrete system is realized by using an analog circuit, the coexistence behavior of the discrete chaotic system is successfully simulated by constructing a discrete neuron model simulation circuit and adjusting the initial value of the discrete neuron model simulation circuit, and the feasibility of the method is verified through a PCB experiment.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuits, and in particular to an analog circuit of initial value-dependent behavior of a discrete system. Background Art

[0002] A chaotic system is a system that is highly sensitive to initial conditions and has high complexity, sensitivity and long-term unpredictability. As an important branch of chaos theory, discrete systems have become a powerful tool for studying chaos with their simple mathematical form and rich dynamic characteristics.

[0003] In recent years, with the in-depth exploration of nonlinear scientific theories and the rapid development of information technology, the research on discrete chaotic systems has received more and more attention; in terms of hardware implementation, discrete chaotic systems are mostly implemented using digital circuits, such as MCU, FPGA, DSP, etc.; however, there are relatively few studies on the implementation of discrete chaotic systems using analog circuits, and existing studies cannot achieve initial value-dependent behavior; using analog circuits to implement discrete systems is not only highly specialized, but can also promote IC integration and equipment miniaturization, making it easier to apply to some chaos-based industrial scenarios. Summary of the invention

[0004] In view of the shortcomings of existing circuit design, the present invention uses analog circuits to realize the initial value-dependent behavior of discrete systems. By constructing a discrete neuron model simulation circuit and adjusting its initial value, the coexistence behavior of discrete chaotic systems is successfully simulated, and the feasibility of this method is verified through PCB experiments.

[0005] The technical solution adopted by the present invention is: an analog circuit of initial value-dependent behavior of a discrete system includes: a sampling and holding circuit and a system model circuit, the sampling and holding circuit is used to sample and hold the continuous signal output by the system model circuit to realize the discretization processing of the continuous signal; the system model circuit is used to simulate a two-dimensional discrete neuron model, and the initial value is offset by adjusting the initial voltage to generate different coexistence attractors.

[0006] As a preferred embodiment of the present invention, the sampling and holding circuit includes:

[0007] The sample holders S1 to S4 and the inverter I1, the output end of S1 is respectively connected to one input end of S2, S3 and I1, the output end of S2 is respectively connected to one input end of S4 and the output end of I1, and the output end of S3 is connected to the other input end of S4.

[0008] As a preferred embodiment of the present invention, the system model circuit includes: resistors R1 to R 10 , resistor R b , resistor R p , resistor R q, operational amplifiers U1 to U5, multiplier M1 and sine converter A1, the inverting input of U1 is connected to the output and one input of M1, the other input of M1 is connected to the output of S2 and the left end of R1 respectively, the output of M1 is connected to the input of A1, R2, R p The right ends of R1 and R6 are connected to the reverse input of U2 and the left end of R3 respectively. The right end of R3 is connected to the input of S1 and the output of U2 respectively. The left end of R6 is connected to R5 and R b The right end of R5 is connected to the right end of R4 and the output end of U3, the left end of R4 is connected to the output end of S4, and the output end of U3 is connected to R b The right end of the connection, R b The left end is connected to the reverse input end of U5, R 10 , R q , one end of R9 is connected, R 10 The other end is connected to the output of U5 and the input of S3 respectively. q The right end of A1 is connected to the output end of U4 and the right end of R8 respectively. The left end of R8 is connected to the right end of R7 and the reverse input end of U4 respectively. The output end of A1 is connected to the left end of R7 and the reverse input end of R8 respectively. p Connect the right end of .

[0009] As a preferred embodiment of the present invention, the model of the sample holders S1 to S4 is: LF398.

[0010] As a preferred embodiment of the present invention, the model of the inverter I1 is 74LS04.

[0011] As a preferred implementation of the present invention, the operational amplifiers U1 to U5 are of the following model: AD711.

[0012] As a preferred implementation of the present invention, the model of the sine converter A1 is: AD639.

[0013] As a preferred implementation of the present invention, the model of the multiplier M1 is: AD633.

[0014] Beneficial effects of the present invention:

[0015] 1. The present invention provides a new way to physically realize the initial value-dependent behavior of discrete systems. By using analog circuits instead of traditional digital circuits, the initial value-dependent behavior in discrete systems is successfully obtained, which provides a new perspective and tool for the hardware implementation of complex dynamics of discrete systems. By constructing a neuron model circuit, a true discrete chaotic sequence is obtained, which provides a new idea for the research and application of chaos theory.

[0016] 2. Compared with complex digital circuit systems, the present invention has lower manufacturing costs and shorter R&D cycles, and is suitable for basic research stages. Due to the direct connection and signal transmission between analog circuit elements, circuit faults are often more intuitive and easier to locate. In addition, the design and adjustment of analog circuits are more flexible, and can quickly respond to experimental needs by replacing components or adjusting parameters. This flexibility can save a lot of time and resources, and further improve the efficiency and reliability of the experiment. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 It is a two-dimensional discrete neuron model circuit;

[0018] Figure 2 It is the sampling control signal waveform, initial input voltage waveform and output voltage waveform of two sample-and-hold devices within 0.2s before PSIM circuit simulation operation;

[0019] Figure 3 It is the comparison result between the circuit simulation waveform and the numerical simulation waveform;

[0020] Figure 4 When the control parameters are p=-0.06,q=-3.3,b=-1 and the system initial value is (x0,y0)=(0.01+0.2mπ,0.2lπ)(m,l=0,1), the discrete neuron model circuit V x -V y Comparison of initial value offset control coexistence attractor on the plane with experimental verification results. DETAILED DESCRIPTION

[0021] The present invention is further described below in conjunction with the accompanying drawings and embodiments. This figure is a simplified schematic diagram, which only illustrates the basic structure of the present invention in a schematic manner, and therefore it only shows the components related to the present invention.

[0022] like Figure 1 As shown, a simulation circuit of initial value-dependent behavior of a discrete system includes:

[0023] Four sample-and-hold devices (S1-S4), five operational amplifiers (U1-U5), inverter I1, sine converter A1, three input power supplies (V1, V x0 、V y0 ) and resistor R1-R 10 ;

[0024] Figure 1The dotted box is a sampling and holding circuit. The sampling control signal V1 is input to the sampling control terminals of the sampling and holding devices S1 and S3. The sampling control signal V1 is input to the sampling control terminals of S2 and S4 after passing through the inverter I1. The output terminal of the sampling and holding device S1 is connected to the input terminal of the sampling and holding device S2. The output terminal of the sampling and holding device S3 is connected to the input terminal of the sampling and holding device S4. The output terminal of the sampling and holding device S2 is x n , the output of the sample and hold S4 is y n ; The sampling control signal V1 is provided by a signal generator; the sample holder is preferably LF398, and the inverter is preferably 74LS04.

[0025] The circuit outside the dotted line box is the system model circuit, and the specific connection method is: the DC voltage signal V2 is connected to the positive input terminal of the operational amplifier U1; the inverting input terminal and the output terminal of the operational amplifier U1 are connected; the output terminal of the operational amplifier U1 is connected to one input terminal of the multiplier M1; the output terminal of the sample and hold S2 is connected to the other input terminal of the multiplier M1; the output terminal of the multiplier M1 is connected to the input terminal of the sine converter A1; the output terminal of the sample and hold S4 is connected to the inverting input terminal of the operational amplifier U3 after passing through the resistor R4; the resistor R5 is connected in parallel between the inverting input terminal and the output terminal of U3; the step voltage signal V x0 The output of the sine converter A1, the output of the sample and hold S2 and the output of the operational amplifier U3 are connected through resistors R2 and R p , R1 and R6 are connected to the inverting input terminal of the operational amplifier U2; a resistor R3 is connected in parallel between the inverting input terminal and the output terminal of U2; the output terminal x n+1 The input of the sample and hold device S1 is connected; the output of the sine converter A1 is connected to the inverting input of the operational amplifier U4 after passing through the resistor R7; a resistor R8 is connected in parallel between the inverting input and output of U4; the output of the operational amplifier U4 and the output of the operational amplifier U3 are connected to the step voltage signal V y0 Through resistor R q , R b Connected to the inverting input terminal of the operational amplifier U5 after R9; a resistor R is connected in parallel between the inverting input terminal and the output terminal of U5 10 ; Output terminal y of operational amplifier U5 n+1 Connect to the input end of the sample and hold S3; the step voltage signal V x0 With V y0 It can be provided by a signal generator, the operational amplifier is preferably model AD711, and the sine converter is preferably model AD639.

[0026] The two-dimensional discrete neuron model expression is as follows:

[0027]

[0028] In the formula, p, q, b are control parameters, x n and n Respectively represent the sampling values ​​of the neuron model at the nth iteration.

[0029] According to Kirchhoff's circuit laws and the electrical characteristics of circuit components, Figure 1 The circuit equation shown can be written as:

[0030]

[0031] By setting the resistance R p =166.67kΩ, R b =10kΩ, R q =30.3kΩ, we can get the control parameters p=-0.06, b=-1, q=-0.33; the sampling control square wave signal V1 has a frequency of 1000Hz and an amplitude of 5V, and the initial voltage of the step voltage signal is set to V x0 =0.01V and V y0 =0V, the step time is 0.001s, and the other resistors are all 10kΩ. On the PSIM simulation platform, the waveform of the sampling control signal V1 and the initial input voltage V x0 Waveform and output voltage V of two sample-and-hold devices s1 、V x Waveform Figure 2 As shown, it can be observed that with the input of the initial value signal, the circuit starts to perform iterative operations from the rest state.

[0032] In order to verify the correctness of the initial value input method of the present invention, Figure 3 The comparison results between circuit simulation and numerical simulation are shown below. Under the above initial voltage input, the V x Waveform Figure 3 (a); correspondingly, when the model initial value is (0.01, 0), the numerical simulation x n The time series for the first 100 iterations is as follows Figure 4 As shown in (b), it can be seen that the results of circuit simulation and numerical simulation are consistent to a large extent.

[0033] Then adjust the initial voltage of the initial signal source to (Vx0, Vy0) = (0.01, 0), (0.6383, 0), (0.01, 0.6283), (0.6383, 0.6283) respectively; the circuit simulation results are as follows Figure 4 As shown in (a), Figure 4 (a) It can be seen that the circuit simulation results show the initial offset control behavior of the model, confirming the feasibility of the circuit to realize the initial dependence behavior of the discrete neuron model.

[0034] Experimental verification:

[0035] The active devices in this design include the sample-and-hold chip LF398, the operational amplifier chip AD711, the multiplier chip AD633 and the sine converter chip AD639, all of which are powered by ±15V DC voltage, and the inverter 74LS04 is powered by +5V DC voltage; the passive devices include adjustable potentiometers, chip resistors and ceramic capacitors; the hardware experimental platform includes a printed circuit board (PCB), a DC voltage source, a signal generator and a digital oscilloscope; Figure 1 The discrete neuron model circuit shown in the figure uses two signal generators to provide sampling control signals and two initial voltage signals respectively. Channel 1 of one signal generator outputs a square wave signal with a frequency of 1000Hz and an amplitude of 5V as the sampling control signal. The two channels of the other signal generator output step signals with a step time of 0.001s as the sampling control signal. The Tektronix TDS 3054C digital oscilloscope captures attractors at different positions corresponding to different initial values. The experimental results are shown in Figure 1. Figure 4 (b) As shown; Ignoring some minor differences between the circuit simulation and the hardware circuit experiment caused by calculation errors and parasitic circuit parameters, the experimental results are almost consistent with the numerical simulation, indicating that the proposed analog circuit design for realizing the initial value-dependent behavior of the discrete system can be verified by experiments; therefore, the design method proposed in the present invention has a scientific theoretical basis and physical feasibility, and can play a positive role in promoting the application of discrete memristor models and discrete neuron models.

[0036] Based on the above ideal embodiments of the present invention, the relevant staff can make various changes and modifications without departing from the technical concept of the present invention through the above description. The technical scope of the present invention is not limited to the contents of the specification, and its technical scope must be determined according to the scope of the claims.

Claims

1. A circuit for simulating initial value-dependent behavior of a discrete system, characterized in that: include: The sampling and holding circuit and the system model circuit use the sampling and holding circuit to sample and hold the continuous signal output by the system model circuit to realize the discretization processing of the continuous signal; the system model circuit is used to simulate the two-dimensional discrete neuron model, and the initial value is offset by adjusting the initial voltage to generate different coexistence attractors.

2. The analog circuit of the discrete system initial value dependent behavior according to claim 1, characterized in that: The sample and hold circuit includes: The sample holders S1 to S4 and the inverter I1, the output end of S1 is respectively connected to one input end of S2, S3 and I1, the output end of S2 is respectively connected to one input end of S4 and the output end of I1, and the output end of S3 is connected to the other input end of S4.

3. The analog circuit of the initial value-dependent behavior of a discrete system according to claim 2, characterized in that: The system model circuit includes: resistors R1 to R 10 , resistor R b , resistor R p , resistor R q , operational amplifiers U1 to U5, multiplier M1 and sine converter A1, the inverting input of U1 is connected to the output and one input of M1, the other input of M1 is connected to the output of S2 and the left end of R1 respectively, the output of M1 is connected to the input of A1, R2, R p The right ends of R1 and R6 are connected to the reverse input of U2 and the left end of R3 respectively. The right end of R3 is connected to the input of S1 and the output of U2 respectively. The left end of R6 is connected to R5 and R b The right end of R5 is connected to the output end of U3, the left end of R4 is connected to the output end of S4, and the left end of R5 is connected to the right end of R4 and the reverse input end of U3. b The left end is connected to the reverse input end of U5, R 10 , R q , one end of R9 is connected, R 10 The other end is connected to the output of U5 and the input of S3 respectively. q The right end of A1 is connected to the output end of U4 and the right end of R8 respectively. The left end of R8 is connected to the right end of R7 and the reverse input end of U4 respectively. The output end of A1 is connected to the left end of R7 and the reverse input end of R8 respectively. p Connect the right end of .

4. The analog circuit of the initial value-dependent behavior of a discrete system according to claim 3, characterized in that: The model of the sample holders S1 to S4 is: LF398.

5. The analog circuit of the initial value-dependent behavior of a discrete system according to claim 3, characterized in that: The model of inverter I1 is 74LS04.

6. The analog circuit of the initial value-dependent behavior of a discrete system according to claim 3, characterized in that: The models of operational amplifiers U1 to U5 are: AD711.

7. The analog circuit of the initial value-dependent behavior of a discrete system according to claim 3, characterized in that: The model of sine converter A1 is: AD639.

8. The analog circuit of the initial value-dependent behavior of a discrete system according to claim 3, characterized in that: The model of multiplier M1 is: AD633.

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