Preparation method of adapter plate and adapter plate
By bonding the substrate with through holes on both sides of the carrier plate and adopting the 'blind hole' filling process, the problem of deep through hole filling difficulty in glass adapter plate filling technology is solved, and the reliability of the product is improved. Production efficiency reduces the warpage of the carrier plate.
Patent Information
- Application Number
- CN202411170169.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-23
- Publication Date
- 2024-12-27
AI Technical Summary
The hole filling technology of glass adapter plates is difficult to fill deep through holes and has high process requirements, which can easily lead to glass breakage, affecting product reliability.
The substrate with through holes is used to bond the two sides of the carrier plate separately, and the "blind hole" filling process is used to reduce the difficulty of through hole filling, and to reduce the stress of the carrier plate through double-sided bonding to avoid warping.
It effectively reduces the difficulty of the through-hole filling process, improves the reliability and production efficiency of the glass adapter plate, and reduces the risk of warping of the carrier plate.
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Figure CN119208150A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of semiconductor packaging technology, and in particular to a method for preparing an adapter plate and an adapter plate. Background Art
[0002] With the vigorous development of emerging fields such as smart phones, wearable devices, automotive electronics, and artificial intelligence, integrated circuits are moving towards diversified applications, and three-dimensional packaging technology has gradually become an important means to achieve miniaturization, lightweight, and multifunctionality of electronic products.
[0003] Glass adapter plate interconnection technology has application advantages such as excellent high-frequency electrical properties, low cost, simple process flow, and strong mechanical stability. It has broad application prospects in the fields of radio frequency devices, micro-motor system packaging, optoelectronic system integration, etc. However, the preparation of glass adapter plates still faces technical difficulties. Summary of the invention
[0004] In order to solve the above problems, the embodiments of the present application provide a method for preparing an adapter plate and an adapter plate.
[0005] In a first aspect, an embodiment of the present application provides a method for preparing an adapter board, comprising: bonding a first substrate and a second substrate to a first surface and a second surface of a carrier board, respectively, the first surface and the second surface are opposite, the first substrate includes at least one first through hole, and the second substrate includes at least one second through hole; forming a first conductive column in the first through hole and forming a first metal routing layer on a side of the first substrate away from the carrier board, and forming a second conductive column in the second through hole and forming a second metal routing layer on a side of the second substrate away from the carrier board; separating the carrier board from the first substrate and the second substrate to form at least one adapter board.
[0006] In combination with the first aspect, after the step of separating the carrier from the first substrate and the second substrate, the method further includes: forming a third metal routing layer on the side of the first substrate away from the first metal routing layer to obtain a first adapter board; and / or forming a fourth metal routing layer on the side of the second substrate away from the second metal routing layer to obtain a second adapter board; preferably, after the step of forming a third metal routing layer on the side of the first substrate away from the first metal routing layer, the method further includes: alternately forming at least one third dielectric layer, a third interconnection structure and at least one third metal routing layer on the side of the third metal routing layer away from the first substrate, wherein the third interconnection structure is located in the third dielectric layer, and the third interconnection structure connects two adjacent third metal routing layers; preferably, in the step of alternately forming at least one third dielectric layer, a third interconnection structure and at least one third metal routing layer on the side of the third metal routing layer away from the first substrate, the step of forming a third dielectric layer, a third interconnection structure and a third metal routing layer includes: preparing a third dielectric layer on the side of the upper third metal routing layer away from the first substrate, preparing a third via in the third dielectric layer; in the third via A third interconnect structure is prepared and a third metal wiring layer is prepared on a side of the third dielectric layer facing away from the first substrate; preferably, after the step of forming a fourth metal wiring layer on a side of the second substrate facing away from the second metal wiring layer, the method further comprises: alternately forming at least one fourth dielectric layer, a fourth interconnect structure and at least one fourth metal wiring layer on a side of the fourth metal wiring layer facing away from the second substrate, wherein the fourth interconnect structure is located in the fourth dielectric layer, and the fourth interconnect structure connects two adjacent fourth metal wiring layers; preferably, in the step of alternately forming at least one fourth dielectric layer, a fourth interconnect structure and at least one fourth metal wiring layer on a side of the fourth metal wiring layer facing away from the second substrate, the step of forming a fourth dielectric layer, a fourth interconnect structure and a fourth metal wiring layer comprises: preparing a fourth dielectric layer on a side of the upper fourth metal wiring layer facing away from the second substrate, and preparing a fourth via in the fourth dielectric layer; preparing a fourth interconnect structure in the fourth via and preparing a fourth metal wiring layer on a side of the fourth dielectric layer facing away from the second substrate; preferably, the process of preparing the third dielectric layer and the fourth dielectric layer comprises at least one of coating, magnetron sputtering, chemical vapor deposition and lamination.
[0007] In combination with the first aspect, the first through hole corresponds to the second through hole one by one; preferably, the orthographic projection of the first through hole on the carrier at least partially overlaps with the orthographic projection of the second through hole on the carrier; preferably, the orthographic projection of the first through hole on the carrier completely overlaps with the orthographic projection of the second through hole on the carrier; preferably, after separating the carrier from the first substrate and the second substrate, the method further includes: bonding the surface of the first substrate away from the first metal wiring layer and the surface of the second substrate away from the second metal wiring layer to obtain a third adapter board; preferably, using a heterogeneous bonding process, bonding the surface of the first substrate away from the first metal wiring layer and the surface of the second substrate away from the second metal wiring layer to obtain a third adapter board; preferably, before using a heterogeneous bonding process to bond the surface of the first substrate away from the first metal wiring layer and the surface of the second substrate away from the second metal wiring layer, the method further includes: chemical mechanical polishing of the surface of the first substrate away from the first metal wiring layer; and chemical mechanical polishing of the surface of the second substrate away from the second metal wiring layer.
[0008] In combination with the first aspect, a first conductive column is formed in a first through hole and a first metal wiring layer is formed on a side of the first substrate facing away from the carrier, and a second conductive column is formed in a second through hole and a second metal wiring layer is formed on a side of the second substrate facing away from the carrier, including: preparing a seed layer in the first through hole and on a side of the first substrate facing away from the carrier, and / or in the second through hole and on a side of the second substrate facing away from the substrate; coating a photoresist on a side of the seed layer facing away from the carrier, and patterning the photoresist; forming a metal layer on the seed layer not covered with the photoresist through an electroplating process; removing the photoresist and etching the seed layer not covered with the metal layer to obtain a first metal wiring layer and a first conductive column, and / or a second metal wiring layer and a second conductive column; preferably, the seed layer includes a copper layer or a titanium-copper composite layer; preferably, when the seed layer is copper layer, the thickness of the copper layer is 0.2μm~2μm; preferably, when the seed layer is a titanium-copper composite layer, the thickness of the titanium layer is 0.1~0.5μm, and the thickness of the copper layer is 0.3~2μm; preferably, the material of the first conductive column is the same as the material of the first metal wiring layer, and the material of the second conductive column is the same as the material of the second metal wiring layer; preferably, the material of the first conductive column and / or the first metal wiring layer includes at least one of copper, aluminum, nickel, gold, tin and silver; preferably, the material of the second conductive column and / or the second metal wiring layer includes at least one of copper, aluminum, nickel, gold, tin and silver; preferably, in the direction perpendicular to the carrier, the thickness of the first metal wiring layer is 2~10μm, preferably 4~5μm; the thickness of the second metal wiring layer is 2~10μm, preferably 4~5μm.
[0009] In combination with the first aspect, a first conductive column is formed in the first through hole and a first metal wiring layer is formed on the side of the first substrate facing away from the carrier, and a second conductive column is formed in the second through hole and a second metal wiring layer is formed on the side of the second substrate facing away from the carrier, including: through a screen printing process, the first conductive column is formed in the first through hole and the first metal wiring layer is formed on the side of the first substrate facing away from the carrier, and the second conductive column is formed in the second through hole and the second metal wiring layer is formed on the side of the second substrate facing away from the carrier; preferably, the material of the first conductive column is the same as the material of the first metal wiring layer, and the material of the second conductive column is the same as the material of the second metal wiring layer; preferably, the material of the first conductive column and the first metal wiring layer includes at least one of conductive glue or conductive paste, and the material of the second conductive column and the second metal wiring layer includes at least one of conductive glue or conductive paste.
[0010] In combination with the first aspect, after the steps of forming a first conductive column in the first through hole and forming a first metal wiring layer on the side of the first substrate facing away from the carrier, and forming a second conductive column in the second through hole and forming a second metal wiring layer on the side of the second substrate facing away from the carrier, the method further includes: alternately forming at least one first dielectric layer, a first interconnect structure and at least one first metal wiring layer on the side of the first metal wiring layer facing away from the first substrate, wherein the first interconnect structure is located in the first dielectric layer, and the first interconnect structure connects two adjacent first metal wiring layers; and / or, alternately forming at least one second dielectric layer, a second interconnect structure and at least one second metal wiring layer on the side of the second metal wiring layer facing away from the second substrate, wherein the second interconnect structure is located in the second dielectric layer, and the second interconnect structure connects two adjacent second metal wiring layers; preferably, in the step of alternately forming at least one first dielectric layer, a first interconnect structure and at least one first metal wiring layer on the side of the first metal wiring layer facing away from the first substrate, forming a first dielectric layer, a first interconnect structure and at least one first metal wiring layer. The steps of forming an interconnection structure and a first metal wiring layer include: preparing a first dielectric layer on the side of the first metal wiring layer away from the first substrate, preparing a first via hole in the first dielectric layer; preparing a first interconnection structure in the first via hole and preparing the first metal wiring layer on the side of the first dielectric layer away from the first substrate; preferably, in the step of alternately forming at least one second dielectric layer, a second interconnection structure and at least one second metal wiring layer on the side of the second metal wiring layer away from the second substrate, the step of forming a second dielectric layer, a second interconnection structure and a second metal wiring layer includes: preparing a second dielectric layer on the side of the second metal wiring layer away from the second substrate, preparing a second via hole in the second dielectric layer; preparing a second interconnection structure in the second via hole and preparing the first metal wiring layer on the side of the second dielectric layer away from the second substrate; preferably, the process of preparing the first dielectric layer and / or the second dielectric layer includes at least one of coating, magnetron sputtering, chemical vapor deposition and lamination; preferably lamination; preferably, the number of layers of the first metal wiring layer is the same as the number of layers of the second metal wiring layer.
[0011] In combination with the first aspect, the first substrate and the second substrate are bonded to the first surface and the second surface of the carrier respectively, including: forming a first bonding adhesive layer and a second bonding adhesive layer on the first surface and the second surface of the carrier respectively; bonding the first substrate on the side of the first bonding adhesive layer facing away from the carrier; bonding the second substrate on the side of the second bonding adhesive layer facing away from the carrier; preferably, the material of the carrier includes at least one of ceramic, glass, metal, and an organic substrate of a copper-clad laminate core; preferably, the first bonding adhesive layer and / or the second bonding adhesive layer includes at least one of a thermal release adhesive, a light release adhesive, a solvent release adhesive, and a mechanical release adhesive.
[0012] In combination with the first aspect, before the first substrate and the second substrate are bonded to the first surface and the second surface of the carrier respectively, the method also includes: forming a first through hole on the first substrate, and / or forming a second through hole on the second substrate; preferably, the first substrate and / or the second substrate include at least one of a glass substrate, a silicon-based substrate, a ceramic substrate, and a polymer substrate; preferably, a method for forming the first through hole and / or the second through hole includes at least one of laser induced wet etching, laser ablation, focused discharge, plasma etching, electrochemical discharge machining, and sand blasting, preferably laser induced wet etching.
[0013] In combination with the first aspect, the thickness of the first substrate is 100-1000μm, preferably 200-300μm, and the thickness of the second substrate is 100-1000μm, preferably 200-300μm; preferably, the thickness of the first substrate is the same as the thickness of the second substrate; preferably, the aperture of the first through hole is 10-200μm, preferably 40-50μm, and the aperture of the second through hole is 10-200μm, preferably 40-50μm; preferably, the orthographic projection of the first through hole on the carrier plate at least partially overlaps with the orthographic projection of the second through hole on the carrier plate; preferably, the aperture of the first through hole and the second through hole are the same; preferably, the number of the first through hole and the second through hole is the same.
[0014] In a second aspect, an embodiment of the present application provides an adapter plate, which is prepared according to the above method.
[0015] Through the above technical solution, the first substrate and the second substrate with through holes are bonded to the two surfaces of the carrier respectively, and when the through holes of the first substrate and the second substrate are filled with conductive materials, a "blind hole" filling process is adopted, which reduces the difficulty of the through hole filling process. The first substrate and the second substrate are bonded to the two surfaces of the carrier respectively, that is, double-sided bonding, which is conducive to reducing the stress of the carrier and reducing the warping of the carrier. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] Figure 1 It is a schematic flow chart of a method for preparing an adapter plate provided in one embodiment of the present application.
[0017] Figure 2a-2d Several schematic structural diagrams of the first substrate and the second substrate are shown.
[0018] Figure 3 A schematic structural diagram of bonding the first substrate and the second substrate to the carrier is shown.
[0019] Figure 4 A structural schematic diagram is shown in which a first metal wiring layer and a first conductive column are respectively arranged on a first substrate and in a first through hole, and a second metal wiring layer and a second conductive column are respectively arranged on a second substrate and in a second through hole.
[0020] Figure 5 A schematic structural diagram of a first substrate and / or a second substrate having multiple layers of first metal wiring and / or second metal wiring is shown.
[0021] Figure 6 Shows the Figure 4 Schematic diagram of the structure in which the first substrate and the second substrate are debonded.
[0022] Figure 7a Shown in Figure 6 A schematic diagram of a structure in which a third metal wiring layer is arranged on the first substrate.
[0023] Figure 7b Shown in Figure 6 A schematic diagram of a structure in which a fourth metal wiring layer is arranged on the second substrate.
[0024] Figure 8a Shown in Figure 6 A schematic diagram of a structure in which multiple layers of third metal wiring layers are arranged on a first substrate.
[0025] Figure 8b Shown in Figure 6 A schematic diagram of a structure in which a plurality of fourth metal wiring layers are arranged on a second substrate.
[0026] Fig. 9 Shows the Figure 6 A schematic structural diagram of a transfer plate formed by bonding the first substrate and the second substrate.
[0027] Fig.10 Shows the Figure 5 A schematic structural diagram of a transfer plate formed by bonding the first substrate and the second substrate. DETAILED DESCRIPTION
[0028] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.
[0029] The ordinal numbers such as "first", "second", "third" etc. in the present application are intended to avoid confusion among constituent elements rather than to limit the order or quantity.
[0030] In semiconductor device packaging, through silicon vias (TSV) and through glass vias (TGV) play an important role in achieving higher density interconnections, improving performance and reducing power consumption, and are one of the key technologies for three-dimensional integration. Compared with silicon-based adapters with TSV structures, glass adapters with TGV structures have the following advantages: (1) Low cost. The production cost of glass adapters is about 1 / 8 of that of silicon-based adapters; (2) Excellent electrical properties. Glass material is an insulator material with a dielectric constant of only 1 / 3 of that of silicon material and a loss factor 2 to 3 orders of magnitude lower than that of silicon material, and has excellent high-frequency characteristics; (3) Strong mechanical stability. When the thickness of the adapter is less than 100um, the warpage is still small. Therefore, glass adapters have become a hot topic in industry research.
[0031] However, one of the technical difficulties that restricts the application of glass adapter plates is the hole filling technology. At present, the hole filling technology of glass adapter plates mainly includes two process routes. The first is the blind hole technology, which requires grinding and chemical mechanical polishing. The glass is prone to breakage and the product reliability is low. The second technology is the through-hole technology. The problem with this method is that it is difficult to fill deep through holes, and it has high requirements for processes and equipment. In addition, chemical mechanical polishing is required after double-sided electroplating, which easily leads to glass breakage.
[0032] In view of the above technical problems, the present application provides a method for preparing an adapter board, the method comprising bonding a first substrate and a second substrate to the first surface and the second surface of a carrier board respectively, the first surface and the second surface are opposite, the first substrate includes at least one first through hole, and the second substrate includes at least one second through hole; forming a first conductive column in the first through hole and forming a first metal wiring layer on the side of the first substrate away from the carrier board, and forming a second conductive column in the second through hole and forming a second metal wiring layer on the side of the second substrate away from the carrier board; separating the carrier board from the first substrate and the second substrate to form at least one adapter board. In an embodiment of the present application, a substrate with a through hole is bonded to the carrier board, and the substrate is filled with metal using a "blind hole" filling process, which reduces the difficulty of the through hole filling process; in addition, bonding the substrates on both sides of the carrier board is respectively beneficial to reducing the stress of the carrier board and reducing the warping of the carrier board.
[0033] Optionally, before the first substrate and the second substrate are bonded to the first surface and the second surface of the carrier respectively, the method further comprises: forming a first through hole on the first substrate, and / or forming a second through hole on the second substrate.
[0034] Figure 1 FIG. 1 is a flow chart of a method for preparing an adapter plate provided in an embodiment of the present application. Figure 1 As shown, the method for preparing the adapter plate in this embodiment includes the following steps.
[0035] Step S110: forming at least one first through hole on the first substrate and forming at least one second through hole on the second substrate.
[0036] In the embodiment of the present application, the first substrate and / or the second substrate include at least one of a glass substrate, a silicon-based substrate, a ceramic substrate, a polymer substrate, etc. Preferably, the first substrate and / or the second substrate is a glass substrate. Exemplarily, the first substrate and / or the second substrate is at least one of borosilicate glass, aluminoborosilicate glass, quartz glass, alkali-free glass, alkaline glass, etc.
[0037] Optionally, the method for forming the first through hole and / or the second through hole includes at least one of laser induced wet etching, laser ablation, focused discharge, plasma etching, electrochemical discharge machining, sandblasting, etc. In the embodiment of the present application, laser induced wet etching is preferably used to form the first through hole on the first substrate and / or the second through hole on the second substrate. Optionally, in a direction parallel to the first through hole and / or the second through hole, the cross-sectional shape of the first through hole and / or the second through hole includes a rectangle, a trapezoid, a V-shaped, an X-shaped, etc., which is not limited in the present application.
[0038] In the embodiment of the present application, the thickness of the first substrate is 100-1000 μm, preferably 200-300 μm. For example, the thickness of the first substrate is 100 μm, 150 μm, 200 μm, 300 μm, 400 μm, 500 μm, 600 μm, 700 μm, 800 μm, 900 μm, 1000 μm. The thickness of the second substrate is 100-1000 μm, preferably 200-300 μm. For example, the thickness of the second substrate is 100 μm, 150 μm, 200 μm, 300 μm, 400 μm, 500 μm, 600 μm, 700 μm, 800 μm, 900 μm, 1000 μm. Optionally, the thickness of the first substrate is the same as the thickness of the second substrate. After the first substrate and the second substrate are bonded to the two surfaces of the carrier, stress balance of the carrier can be achieved to avoid warping of the carrier. Optionally, according to actual needs, the thickness of the first substrate and the second substrate can be different, so as to prepare an adapter suitable for different application scenarios.
[0039] Optionally, the aperture of the first through hole is 10 to 200 μm, preferably 40 to 50 μm. Exemplarily, the aperture of the first through hole is 10 μm, 20 μm, 30 μm, 40 μm, 50 μm, 60 μm, 80 μm, 100 μm, 120 μm, 150 μm, 170 μm, 180 μm. The aperture of the second through hole is 10 to 200 μm, preferably 40 to 50 μm. Exemplarily, the aperture of the second through hole is 10 μm, 20 μm, 30 μm, 40 μm, 50 μm, 60 μm, 80 μm, 100 μm, 120 μm, 150 μm, 170 μm, 180 μm. Optionally, the aperture and number of the first through hole and the second through hole are the same. Exemplarily, the first substrate and the second substrate are used to prepare exactly the same adapter plate, then the thickness of the first substrate and the second substrate is the same, and the aperture and number of the first through hole and the second through hole are also the same. At this time, the stress on both sides of the carrier is balanced, and the warping of the carrier can be well avoided. In this case, after the first substrate and the second substrate are bonded to the carrier, the orthographic projection of the first through hole on the carrier overlaps with the orthographic projection of the second through hole on the carrier at least partially (for example, completely overlaps). Optionally, the aperture and / or number of the first through hole and the second through hole are different. Exemplarily, the first substrate and the second substrate are used to prepare adapter plates suitable for different application scenarios, respectively, then the thickness of the first substrate and the second substrate, the aperture and number of the first through hole and the second through hole can be determined according to actual needs, and do not need to be exactly the same. In this case, compared with the case where the substrate is set only on one side of the carrier, the stress of the carrier can still be effectively reduced and the warping of the carrier can be reduced.
[0040] For example, Figure 2a-2d Several schematic diagrams of the structures of the first substrate and the second substrate are shown. Figure 2a In the embodiment, the first substrate 210 and the second substrate 220 are completely identical. That is, the first substrate 210 and the second substrate 220 have the same thickness, and the number and diameter of the first through holes 211 and the second through holes 221 are completely identical. Figure 2b In the embodiment, the first substrate 210 and the second substrate 220 have different thicknesses, and the number and diameter of the first through holes 211 and the second through holes 221 are the same. Figure 2c In the embodiment, the first substrate 210 and the second substrate 220 have the same thickness, and the first through holes 211 and the second through holes 221 have the same number but different apertures. Figure 2d In the embodiment, the first substrate 210 and the second substrate 220 have the same thickness, and the first through hole 211 and the second through hole 221 have the same aperture but different numbers. It can be understood that Figure 2a-2d This is only for the purpose of illustration, and is not intended to limit the scope of protection of the present application. The present application does not make too many restrictions on the relative relationship between the first substrate and the second substrate.
[0041] It is understandable that step S110 may be omitted. For example, the first substrate and the second substrate with through holes are directly used to implement the embodiment of the present application, and the first substrate and the second substrate with through holes may be obtained from other places (for example, purchased).
[0042] Step S120, bonding the first substrate and the second substrate to the first surface and the second surface of the carrier respectively. The first surface and the second surface are opposite to each other.
[0043] In the embodiment of the present application, "relative" means that the first surface and the second surface are parallel to each other, that is, the first surface and the second surface are two parallel surfaces on the carrier. The first substrate is bonded to the first surface, and the second substrate is bonded to the second surface, so that the first substrate and the second substrate are respectively located on the two sides of the carrier.
[0044] In the embodiment of the present application, the carrier and the first substrate and / or the carrier and the second substrate are bonded together by bonding adhesive. Specifically, a first bonding adhesive layer and a second bonding adhesive layer are formed on the first surface and the second surface of the carrier respectively; the first substrate is bonded on the side of the first bonding adhesive layer facing away from the carrier; and the second substrate is bonded on the side of the second bonding adhesive layer facing away from the carrier.
[0045] In the embodiment of the present application, in order to facilitate separation of the carrier from the first substrate or the second substrate, the first bonding adhesive layer and / or the second bonding adhesive layer includes at least one of thermal release adhesive, light release adhesive, solvent release adhesive, mechanical release adhesive, etc. Preferably, the first bonding adhesive layer and the second bonding adhesive layer include light release adhesive.
[0046] Figure 3 FIG. 1 shows a schematic diagram of a structure in which the first substrate and the second substrate are bonded to the carrier. Figure 2a The first substrate and the second substrate shown in the figure are used as examples for explanation. In other embodiments, the first substrate and the second substrate with different thicknesses, different through hole diameters and / or different through hole numbers can be bonded to the carrier. Figure 3 As shown, the first substrate 210 is bonded to the first surface of the carrier 10 through the first bonding adhesive layer 110 , and the second substrate 220 is bonded to the second surface of the carrier 10 through the second bonding adhesive layer 120 .
[0047] Step S130, forming a first conductive column in the first through hole and a first metal wiring layer on the side of the first substrate away from the carrier, and forming a second conductive column in the second through hole and a second metal wiring layer on the side of the second substrate away from the carrier.
[0048] In an embodiment of the present application, the material of the first conductive column is the same as the material of the first metal wiring layer, and the material of the second conductive column is the same as the material of the second metal wiring layer. Optionally, the first conductive column and the first metal wiring layer are prepared synchronously, and the second conductive column and the second metal wiring layer are prepared synchronously. Optionally, in a direction perpendicular to the carrier, the thickness of the first metal wiring layer is 2 to 10 μm, preferably 4 to 5 μm. Exemplarily, the thickness of the first metal wiring layer is 2 μm, 3 μm, 4 μm, 5 μm, 6 μm, 7 μm, 8 μm, 9 μm, 10 μm. In a direction perpendicular to the carrier, the thickness of the second metal wiring layer is 2 to 10 μm, preferably 4 to 5 μm. Exemplarily, the thickness of the second metal wiring layer is 2 μm, 3 μm, 4 μm, 5 μm, 6 μm, 7 μm, 8 μm, 9 μm, 10 μm.
[0049] Optionally, in an embodiment of the present application, the material of the first conductive column and the first metal wiring layer includes a metal material, for example, including but not limited to at least one of copper (Cu), aluminum (Al), nickel (Ni), gold (Au), tin (Sn), silver (Ag), etc. The material of the second conductive column and the second metal wiring layer includes a metal material, for example, including but not limited to at least one of copper, aluminum, nickel, gold, tin, silver, etc. Optionally, the first conductive column and the first metal wiring layer, and / or the second conductive column and the second metal wiring layer are prepared by an electroplating process. Specifically, a seed layer is prepared in the first through hole and on the side of the first substrate away from the carrier, and / or in the second through hole and on the side of the second substrate away from the substrate. The method for preparing the seed layer includes but is not limited to physical vapor deposition (PVD), evaporation, chemical plating, etc. Optionally, the seed layer includes a copper layer or a titanium-copper composite layer, preferably a titanium-copper composite layer. When the seed layer is a copper layer, the thickness of the copper layer is 0.2μm to 2μm. Exemplarily, the thickness of the copper layer is 0.2μm, 0.5μm, 1μm, 1.5μm, and 2μm. When the seed layer is a titanium-copper composite layer, the thickness of the titanium layer is 0.1-0.5μm, and the thickness of the copper layer is 0.3-2μm. Preferably, the thickness of the Ti layer is 0.2-0.3μm, and the thickness of the Cu layer is 1-1.5μm. Exemplarily, the thickness of the titanium layer is 0.1μm, 0.2μm, 0.3μm, 0.4μm, and 0.5μm, and the thickness of the copper layer is 0.3μm, 0.5μm, 0.8μm, 1μm, 1.5μm, and 2μm. When the seed layer is a titanium-copper composite layer, the titanium layer is located between the substrate (e.g., the first substrate or the second substrate) and the copper layer to improve the adhesion between the substrate and the copper layer. After preparing the seed layer, a photoresist is coated on the side of the seed layer away from the carrier, and the photoresist is patterned. For example, a patterned photoresist is generated by exposure and development. Then, a metal layer is formed on the seed layer not covered by the photoresist by electroplating; the photoresist is removed, and the seed layer not covered by the metal layer is etched (for example, wet etching or dry etching) to obtain a first metal wiring layer and a first conductive column, and / or a second metal wiring layer and a second conductive column.
[0050] Optionally, the material of the first conductive column and the first metal wiring layer includes a non-metallic conductive material, for example, including but not limited to at least one of conductive glue and conductive paste, and the material of the second conductive column and the second metal wiring layer includes a non-metallic conductive material, for example, including but not limited to at least one of conductive glue and conductive paste. Optionally, the first conductive column is formed in the first through hole and the first metal wiring layer is formed on the side of the first substrate away from the carrier by a screen printing process, and the second conductive column is formed in the second through hole and the second metal wiring layer is formed on the side of the second substrate away from the carrier.
[0051] Optionally, the step of forming a first conductive column in the first through hole and a first metal wiring layer on the side of the first substrate facing away from the carrier board, and the step of forming a second conductive column in the second through hole and a second metal wiring layer on the side of the second substrate facing away from the carrier board can be performed simultaneously to improve production efficiency and reduce production costs.
[0052] Figure 4 A schematic diagram of a structure in which a first metal wiring layer and a first conductive column are respectively arranged on a first substrate and in a first through hole, and a second metal wiring layer and a second conductive column are respectively arranged on a second substrate and in a second through hole. Figure 4 As shown, a first conductive column 310 is disposed in the first through hole 211, a first metal wiring layer 410 is disposed on the side of the first substrate 210 away from the carrier 10, a second conductive column 320 is disposed in the second through hole 221, and a second metal wiring layer 420 is disposed on the side of the second substrate 220 away from the carrier 10.
[0053] In some embodiments, according to actual wiring requirements, it is necessary to form multiple layers of first metal routing layers on the first substrate and / or multiple layers of second metal routing layers on the second substrate. Optionally, after step S130, the method further includes: alternately forming at least one first dielectric layer, a first interconnect structure and at least one first metal routing layer on the side of the first metal routing layer away from the first substrate; and / or alternately forming at least one second dielectric layer, a second interconnect structure and at least one second metal routing layer on the side of the second metal routing layer away from the second substrate. The first interconnect structure is located in the first dielectric layer, and the first interconnect structure connects two adjacent layers of the first metal routing layer. The second interconnect structure is located in the second dielectric layer, and the second interconnect structure connects two adjacent layers of the second metal routing layer.
[0054] In an embodiment of the present application, the steps of forming a first dielectric layer, a first interconnection structure, and a first metal routing layer include: preparing a first dielectric layer on the side of the first metal routing layer away from the first substrate, preparing a first via in the first dielectric layer; preparing a first interconnection structure in the first via, and preparing the first metal routing layer on the side of the first dielectric layer away from the first substrate. The steps of forming a second dielectric layer, a second interconnection structure, and a second metal routing layer include: preparing a second dielectric layer on the side of the second metal routing layer away from the second substrate, preparing a second via in the second dielectric layer; preparing a second interconnection structure in the second via, and preparing the first metal routing layer on the side of the second dielectric layer away from the second substrate.
[0055] In an embodiment of the present application, the material of the first dielectric layer and / or the second dielectric layer includes an organic material or an inorganic material. Exemplarily, the material of the first dielectric layer and / or the second dielectric layer includes Ajinomoto Build-up Film (ABF), polyimide (PI), etc. ABF was invented by Ajinomoto Co., Ltd. of Japan and is a thin film made of an insulating resin-based synthetic material. Optionally, the process for preparing the first dielectric layer and / or the second dielectric layer includes at least one of coating, magnetron sputtering, chemical vapor deposition, and lamination. In an embodiment of the present application, since the first dielectric layer and the second dielectric layer need to be formed on both sides of the carrier respectively, it is preferred to use a lamination process to prepare the first dielectric layer and the second dielectric layer, so that the preparation process can be simplified. It should be noted that the lamination process is suitable for thin film materials, such as ABF, PI films, etc., and is not suitable for inorganic materials or liquid organic solutions. Optionally, the first dielectric layer is patterned to form a first via, and the second dielectric layer is patterned to form a second via. Patterning methods include but are not limited to photolithography, laser etching, chemical dry etching, etc.
[0056] Optionally, the thickness of the first dielectric layer and / or the second dielectric layer is 2 to 30 μm, preferably 5 to 10 μm. Exemplarily, the thickness of the first dielectric layer and / or the second dielectric layer is 2 μm, 5 μm, 10 μm, 15 μm, 20 μm, 25 μm, 30 μm. Optionally, the thickness of the first dielectric layer and the second dielectric layer is the same, which is conducive to achieving stress balance on the carrier and avoiding warping of the carrier.
[0057] Optionally, the steps of preparing the first dielectric layer, the first interconnect structure and the first metal wiring layer and the steps of preparing the second dielectric layer, the second interconnect structure and the second metal wiring layer can be performed simultaneously to improve production efficiency. In an embodiment of the present application, the number of layers of the first metal wiring layer is the same as or different from the number of layers of the second metal wiring layer. When the number of layers of the first metal wiring layer and the number of layers of the second metal wiring layer are the same, it is beneficial for the carrier to achieve stress balance and better avoid warping of the carrier.
[0058] For example, Figure 5 A schematic diagram of a structure in which multiple layers of first metal wiring and / or second metal wiring are arranged on a first substrate and / or a second substrate is shown. Figure 5As shown, three layers of first metal wiring layers 410 are arranged on the side of the first substrate 210 facing away from the carrier 10, namely, the first layer of first metal wiring layer 411, the second layer of first metal wiring layer 412 and the third layer of first metal wiring layer 413. A first dielectric layer 510 is arranged between two adjacent layers of first metal wiring layers 410, and a first interconnection structure 610 is arranged in the first dielectric layer 510, and the first interconnection structure 610 connects adjacent first metal wiring layers 410. Specifically, a first layer of first dielectric layer 511 is arranged between the first layer of first metal wiring layer 411 and the second layer of first metal wiring layer 412, and a second layer of first dielectric layer 512 is arranged between the second layer of first metal wiring layer 412 and the third layer of first metal wiring layer 413. A first-layer first interconnect structure 611 is disposed on the first-layer first dielectric layer 511, and the first-layer first interconnect structure 611 connects the first-layer first metal wiring layer 411 and the second-layer first metal wiring layer 412. A second-layer first interconnect structure 612 is disposed on the second-layer first dielectric layer 512, and the second-layer first interconnect structure 612 connects the second-layer first metal wiring layer 412 and the third-layer first metal wiring layer 413. Three layers of second metal wiring layers 420 are disposed on the side of the second substrate 220 away from the carrier 10, namely, the first-layer second metal wiring layer 421, the second-layer second metal wiring layer 422 and the third-layer second metal wiring layer 423. A second dielectric layer 520 is disposed between two adjacent layers of second metal wiring layers 420, and a second interconnect structure 620 is disposed in the second dielectric layer 520, and the second interconnect structure 620 connects adjacent second metal wiring layers 420. Specifically, a first-layer second dielectric layer 521 is provided between the first-layer second metal routing layer 421 and the second-layer second metal routing layer 422, and a second-layer second dielectric layer 522 is provided between the second-layer second metal routing layer 422 and the third-layer second metal routing layer 423. A first-layer second interconnect structure 621 is provided on the first-layer second dielectric layer 521, and the first-layer second interconnect structure 621 connects the first-layer second metal routing layer 421 and the second-layer second metal routing layer 422. A second-layer second interconnect structure 622 is provided on the second-layer second dielectric layer 522, and the second-layer second interconnect structure 622 connects the second-layer second metal routing layer 422 and the third-layer second metal routing layer 423. It can be understood that Figure 5 This is only for the purpose of illustration and not for limiting the scope of protection of the present application. Optionally, the number of layers of the first metal routing layer and the second metal routing layer may also be other values, and the number of layers of the first metal routing layer and the second metal routing layer may be different.
[0059] Step S150 , separating the carrier from the first substrate and the second substrate to form at least one transfer plate.
[0060] In the embodiments of the present application, Figure 6 Shows the Figure 4Schematic diagram of the structure in which the first substrate and the second substrate are debonded. Figure 6 As shown, the carrier 10 is debonded from the first substrate 210 and the second substrate 220 respectively, and the first substrate 210 and the second substrate 220 are separated. The first substrate 210 and the second substrate 220 are used to prepare a transfer board.
[0061] Optionally, after separating the carrier from the first substrate and the second substrate, the method further comprises: forming a third metal wiring layer on a side of the first substrate away from the first metal wiring layer to obtain a first adapter board. Figure 7a Shown in Figure 6 A third metal wiring layer 430 is formed on the side of the first substrate 210 away from the first metal wiring layer 410, Figure 7a Optionally, a fourth metal wiring layer is formed on a side of the second substrate away from the second metal wiring layer to obtain a second transfer board. Figure 7b Shown in Figure 6 A fourth metal wiring layer 440 is formed on the side of the second substrate 220 away from the second metal wiring layer 420, Figure 7b The structure shown.
[0062] Optionally, according to actual needs, in some cases, after forming a third metal routing layer, the method further includes: alternately forming at least one third dielectric layer, a third interconnect structure and at least one third metal routing layer on the side of the third metal routing layer away from the first substrate. The third interconnect structure is located in the third dielectric layer, and the third interconnect structure connects two adjacent third metal routing layers. The steps of forming a third dielectric layer, a third interconnect structure and a third metal routing layer can refer to the steps of forming a first dielectric layer, a first interconnect structure and a first metal routing layer, which will not be repeated here. By way of example, Figure 8a Shown in Figure 6 A schematic diagram of a structure in which a plurality of third metal wiring layers are arranged on the first substrate. Figure 8aAs shown, three layers of third metal wiring layers 430 are formed on the side of the first substrate 210 away from the first metal wiring layer 410, namely, the first layer of third metal wiring layer 431, the second layer of third metal wiring layer 432 and the third layer of third metal wiring layer 433. A third dielectric layer 530 is arranged between adjacent third metal wiring layers 430, and a third interconnection structure 630 is arranged in the third dielectric layer 530, and the third interconnection structure 630 connects adjacent third metal wiring layers 430. Specifically, a first layer of third dielectric layer 531 is arranged between the first layer of third metal wiring layer 431 and the second layer of third metal wiring layer 432, and a second layer of third dielectric layer 532 is arranged between the second layer of third metal wiring layer 432 and the third layer of third metal wiring layer 433. A first-layer third interconnect structure 631 is disposed on the first-layer third dielectric layer 531, and the first-layer third interconnect structure 631 connects the first-layer third metal routing layer 431 and the second-layer third metal routing layer 432. A second-layer third interconnect structure 632 is disposed on the second-layer third dielectric layer 532, and the second-layer third interconnect structure 632 connects the second-layer third metal routing layer 432 and the third-layer third metal routing layer 433. It can be understood that only three layers of third metal routing layers are used as an example for description here, and those skilled in the art can set other numbers of third metal routing layers on the first substrate according to actual needs.
[0063] Optionally, according to actual needs, in some cases, after forming a fourth metal routing layer, the method further includes: alternately forming at least one fourth dielectric layer, a fourth interconnect structure and at least one fourth metal routing layer on the side of the fourth metal routing layer facing away from the second substrate. The fourth interconnect structure is located in the fourth dielectric layer, and the fourth interconnect structure connects two adjacent fourth metal routing layers. The steps of forming a fourth dielectric layer, a fourth interconnect structure and a fourth metal routing layer can refer to the steps of forming a first dielectric layer, a first interconnect structure and a first metal routing layer, which will not be repeated here. By way of example, Figure 8b Shown in Figure 6 A schematic diagram of a structure in which a plurality of fourth metal wiring layers are arranged on the second substrate. Figure 8bAs shown, two layers of fourth metal routing layers 440 are formed on the side of the second substrate 220 away from the second metal routing layer 420, namely, a first layer of fourth metal routing layer 441 and a second layer of fourth metal routing layer 442. A fourth dielectric layer 540 is arranged between adjacent fourth metal routing layers 440, and a fourth interconnection structure 640 is arranged in the fourth dielectric layer 540, and the fourth interconnection structure 640 connects adjacent fourth metal routing layers 440. Specifically, a first layer of fourth dielectric layer 541 is arranged on the first layer of fourth metal routing layer 441 and the second layer of fourth metal routing layer 442. A first layer of fourth interconnection structure 641 is arranged on the first layer of fourth dielectric layer 541, and the first layer of fourth interconnection structure 641 connects the first layer of fourth metal routing layer 441 and the second layer of fourth metal routing layer 442. It can be understood that only two layers of fourth metal routing layers are used as an example for description here, and those skilled in the art can arrange other numbers of fourth metal routing layers on the second substrate according to actual needs.
[0064] Optionally, in the embodiment of the present application, the first through hole corresponds to the second through hole one by one. Optionally, the orthographic projection of the first through hole on the carrier plate and the orthographic projection of the second through hole on the carrier plate at least partially overlap. Figure 3 As shown, the orthographic projection of the first through hole 211 on the carrier 10 completely overlaps with the orthographic projection of the second through hole 221 on the carrier 10. In this case, the first substrate and the second substrate can be directly bonded to form an adapter. Specifically, after the carrier is separated from the first substrate and the second substrate, the method further includes: using a heterogeneous bonding process, bonding the surface of the first substrate away from the first metal wiring layer and the surface of the second substrate away from the second metal wiring layer to obtain a third adapter. The orthographic projection of the first through hole on the carrier at least partially overlaps with the orthographic projection of the second through hole on the carrier, which can ensure that the first conductive column in the first substrate and the second conductive column in the second substrate are electrically connected. Optionally, before bonding, the method further includes: chemical mechanical polishing (CMP) on the surface of the first substrate away from the first metal wiring layer; and chemical mechanical polishing on the surface of the second substrate away from the second metal wiring layer, so that the surface roughness of the first substrate and the second substrate can be reduced, which is conducive to the bonding of the first substrate and the second substrate. Fig. 9 Shows the Figure 6 A schematic diagram of the structure of the adapter plate formed by bonding the first substrate and the second substrate. Fig. 9 As shown, the surface of the first substrate 210 where the first metal wiring layer 410 is not provided and the surface of the second substrate 220 where the second metal wiring layer 420 is not provided are directly bonded together to obtain an adapter board. Fig.10 Shows the Figure 5 A schematic diagram of the structure of the adapter plate formed by bonding the first substrate and the second substrate. Fig.10As shown, the surface of the first substrate 210 where the first metal wiring layer 410 is not provided and the surface of the second substrate 220 where the second metal wiring layer 420 is not provided are directly bonded together to obtain a transfer board.
[0065] In the embodiment of the present application, the first substrate and the second substrate with through holes are bonded to the two surfaces of the carrier respectively. When the through holes of the first substrate and the second substrate are filled with conductive materials, a "blind hole" filling process is adopted to reduce the difficulty of the through hole filling process. In addition, the first substrate and the second substrate are bonded to the two surfaces of the carrier respectively, that is, double-sided bonding, which is conducive to reducing the stress of the carrier and reducing the warping of the carrier; when the first substrate and the second substrate are exactly the same, the carrier can achieve stress balance and avoid warping of the carrier. In addition, the first metal wiring layer and the second metal wiring layer can be prepared simultaneously, thereby improving production efficiency and reducing production costs.
[0066] In a second aspect, an embodiment of the present application provides an adapter plate, which is prepared according to the above method.
[0067] The basic principles of the present application are described above in conjunction with specific embodiments. However, it should be noted that the advantages, strengths, effects, etc. mentioned in the present application are only examples and not limitations, and it cannot be considered that these advantages, strengths, effects, etc. are required by each embodiment of the present application. In addition, the specific details disclosed above are only for the purpose of illustration and ease of understanding, not for limitation, and the above details do not limit the present application to being implemented by adopting the above specific details.
[0068] The block diagrams of the devices, apparatuses, equipment, and systems involved in this application are only illustrative examples and are not intended to require or imply that they must be connected, arranged, and configured in the manner shown in the block diagram. As will be appreciated by those skilled in the art, these devices, apparatuses, equipment, and systems can be connected, arranged, and configured in any manner. Words such as "including", "comprising", "having", etc. are open words, referring to "including but not limited to", and can be used interchangeably with them. The words "or" and "and" used here refer to the words "and / or" and can be used interchangeably with them, unless the context clearly indicates otherwise. The words "such as" used here refer to the phrase "such as but not limited to", and can be used interchangeably with them.
[0069] It should also be noted that in the apparatus, device and method of the present application, each component or each step can be decomposed and / or recombined. Such decomposition and / or recombination should be regarded as equivalent solutions of the present application.
[0070] The above description of the disclosed aspects is provided to enable any person skilled in the art to make or use the present application. Various modifications to these aspects will be readily apparent to those skilled in the art, and the general principles defined herein may be applied to other aspects without departing from the scope of the present application. Therefore, the present application is not intended to be limited to the aspects shown herein, but rather to the widest scope consistent with the principles and novel features disclosed herein.
[0071] The above description has been given for the purpose of illustration and description. In addition, this description is not intended to limit the embodiments of the present application to the forms disclosed herein. Although multiple example aspects and embodiments have been discussed above, those skilled in the art will recognize certain variations, modifications, changes, additions and sub-combinations thereof.
Claims
1. A method for preparing an adapter plate, characterized in that: include: A first substrate and a second substrate are bonded to the first surface and the second surface of the carrier respectively, the first surface and the second surface are opposite to each other, the first substrate includes at least one first through hole, and the second substrate includes at least one second through hole; Forming a first conductive column in the first through hole and forming a first metal wiring layer on the side of the first substrate away from the carrier, and forming a second conductive column in the second through hole and forming a second metal wiring layer on the side of the second substrate away from the carrier; The carrier is separated from the first substrate and the second substrate to form at least one adapter plate.
2. The method according to claim 1, characterized in that After the step of separating the carrier from the first substrate and the second substrate, the method further comprises: A third metal wiring layer is formed on a side of the first substrate away from the first metal wiring layer to obtain a first adapter board; and / or, Forming a fourth metal wiring layer on a side of the second substrate away from the second metal wiring layer to obtain a second adapter board; Preferably, after the step of forming a third metal routing layer on a side of the first substrate away from the first metal routing layer, the method further comprises: alternately forming at least one third dielectric layer, a third interconnect structure and at least one third metal routing layer in sequence on a side of the third metal routing layer away from the first substrate, wherein the third interconnect structure is located in the third dielectric layer, and the third interconnect structure connects two adjacent third metal routing layers; Preferably, in the step of alternately forming at least one third dielectric layer, a third interconnect structure and at least one third metal routing layer on the side of the third metal routing layer facing away from the first substrate, the step of forming one layer of the third dielectric layer, the third interconnect structure and one layer of the third metal routing layer comprises: preparing the third dielectric layer on the side of the upper third metal routing layer facing away from the first substrate, and preparing a third via in the third dielectric layer; preparing the third interconnect structure in the third via and preparing the third metal routing layer on the side of the third dielectric layer facing away from the first substrate; Preferably, after the step of forming a fourth metal routing layer on the side of the second substrate away from the second metal routing layer, the method further comprises: alternately forming at least one fourth dielectric layer, a fourth interconnect structure and at least one fourth metal routing layer in sequence on the side of the fourth metal routing layer away from the second substrate, wherein the fourth interconnect structure is located in the fourth dielectric layer, and the fourth interconnect structure connects two adjacent fourth metal routing layers; Preferably, in the step of alternately forming at least one fourth dielectric layer, a fourth interconnect structure and at least one fourth metal routing layer on the side of the fourth metal routing layer facing away from the second substrate, the step of forming a fourth dielectric layer, a fourth interconnect structure and a fourth metal routing layer comprises: preparing the fourth dielectric layer on the side of the previous fourth metal routing layer facing away from the second substrate, and preparing a fourth via in the fourth dielectric layer; preparing the fourth interconnect structure in the fourth via and preparing the fourth metal routing layer on the side of the fourth dielectric layer facing away from the second substrate; Preferably, the process of preparing the third dielectric layer and the fourth dielectric layer includes at least one of coating, magnetron sputtering, chemical vapor deposition, and lamination.
3. The method according to claim 1, characterized in that The first through holes correspond to the second through holes one by one; Preferably, the orthographic projection of the first through hole on the carrier at least partially overlaps with the orthographic projection of the second through hole on the carrier; Preferably, the orthographic projection of the first through hole on the carrier completely overlaps with the orthographic projection of the second through hole on the carrier; Preferably, after separating the carrier from the first substrate and the second substrate, the method further comprises: Laminating a surface of the first substrate facing away from the first metal wiring layer and a surface of the second substrate facing away from the second metal wiring layer to obtain a third adapter board; Preferably, a heterogeneous bonding process is used to bond the surface of the first substrate away from the first metal wiring layer and the surface of the second substrate away from the second metal wiring layer to obtain the third adapter board; Preferably, before using the heterogeneous bonding process to bond the surface of the first substrate facing away from the first metal wiring layer and the surface of the second substrate facing away from the second metal wiring layer, the method also includes: performing chemical mechanical polishing on the surface of the first substrate facing away from the first metal wiring layer; and performing chemical mechanical polishing on the surface of the second substrate facing away from the second metal wiring layer.
4. The method according to any one of claims 1 to 3, characterized in that: The forming of the first conductive column in the first through hole and the first metal wiring layer on the side of the first substrate away from the carrier, and the forming of the second conductive column in the second through hole and the second metal wiring layer on the side of the second substrate away from the carrier, include: A seed layer is prepared in the first through hole and on the side of the first substrate facing away from the carrier, and / or in the second through hole and on the side of the second substrate facing away from the substrate; a photoresist is coated on the side of the seed layer facing away from the carrier, and the photoresist is patterned; a metal layer is formed on the seed layer not covered with the photoresist through an electroplating process; the photoresist is removed, and the seed layer not covered with the metal layer is etched to obtain the first metal wiring layer and the first conductive column, and / or the second metal wiring layer and the second conductive column; Preferably, the seed layer comprises a copper layer or a titanium-copper composite layer; Preferably, when the seed layer is a copper layer, the thickness of the copper layer is 0.2 μm to 2 μm; Preferably, when the seed layer is a titanium-copper composite layer, the thickness of the titanium layer is 0.1 to 0.5 μm, and the thickness of the copper layer is 0.3 to 2 μm; Preferably, the material of the first conductive pillar is the same as that of the first metal wiring layer, and the material of the second conductive pillar is the same as that of the second metal wiring layer; Preferably, the material of the first conductive pillar and / or the first metal wiring layer includes at least one of copper, aluminum, nickel, gold, tin and silver; Preferably, the material of the second conductive pillar and / or the second metal wiring layer includes at least one of copper, aluminum, nickel, gold, tin and silver; Preferably, in a direction perpendicular to the carrier board, the thickness of the first metal wiring layer is 2-10 μm, preferably 4-5 μm; the thickness of the second metal wiring layer is 2-10 μm, preferably 4-5 μm.
5. The method according to any one of claims 1 to 3, characterized in that: The forming of the first conductive column in the first through hole and the first metal wiring layer on the side of the first substrate away from the carrier, and the forming of the second conductive column in the second through hole and the second metal wiring layer on the side of the second substrate away from the carrier, include: By screen printing, forming the first conductive column in the first through hole and the first metal wiring layer on the side of the first substrate facing away from the carrier, and forming the second conductive column in the second through hole and the second metal wiring layer on the side of the second substrate facing away from the carrier; Preferably, the material of the first conductive pillar is the same as that of the first metal wiring layer, and the material of the second conductive pillar is the same as that of the second metal wiring layer; Preferably, the material of the first conductive column and the first metal wiring layer includes at least one of conductive glue or conductive paste, and the material of the second conductive column and the second metal wiring layer includes at least one of conductive glue or conductive paste.
6. The method according to any one of claims 1 to 3, characterized in that: After the steps of forming a first conductive column in the first through hole and forming a first metal wiring layer on the side of the first substrate facing away from the carrier, and forming a second conductive column in the second through hole and forming a second metal wiring layer on the side of the second substrate facing away from the carrier, the method further includes: At least one first dielectric layer, a first interconnect structure, and at least one first metal routing layer are alternately formed in sequence on the side of the first metal routing layer facing away from the first substrate, wherein the first interconnect structure is located in the first dielectric layer, and the first interconnect structure connects two adjacent first metal routing layers; and / or at least one second dielectric layer, a second interconnect structure, and at least one second metal routing layer are alternately formed in sequence on the side of the second metal routing layer facing away from the second substrate, wherein the second interconnect structure is located in the second dielectric layer, and the second interconnect structure connects two adjacent second metal routing layers; Preferably, in the step of alternately forming at least one first dielectric layer, a first interconnect structure and at least one first metal routing layer on the side of the first metal routing layer facing away from the first substrate, the step of forming a first dielectric layer, a first interconnect structure and a first metal routing layer comprises: preparing the first dielectric layer on the side of the first metal routing layer facing away from the first substrate, and preparing a first via in the first dielectric layer; preparing the first interconnect structure in the first via and preparing the first metal routing layer on the side of the first dielectric layer facing away from the first substrate; Preferably, in the step of alternately forming at least one second dielectric layer, a second interconnect structure and at least one second metal routing layer on the side of the second metal routing layer facing away from the second substrate, the step of forming a second dielectric layer, a second interconnect structure and a second metal routing layer comprises: preparing the second dielectric layer on the side of the second metal routing layer facing away from the second substrate, and preparing a second via in the second dielectric layer; preparing the second interconnect structure in the second via and preparing the first metal routing layer on the side of the second dielectric layer facing away from the second substrate; Preferably, the process of preparing the first dielectric layer and / or the second dielectric layer comprises at least one of coating, magnetron sputtering, chemical vapor deposition, and lamination; preferably lamination; Preferably, the number of layers of the first metal wiring layer is the same as the number of layers of the second metal wiring layer.
7. The method according to any one of claims 1 to 3, characterized in that: The method of bonding the first substrate and the second substrate to the first surface and the second surface of the carrier respectively comprises: Forming a first bonding adhesive layer and a second bonding adhesive layer on the first surface and the second surface of the carrier respectively; Bonding the first substrate to a side of the first bonding adhesive layer facing away from the carrier; Bonding the second substrate to a side of the second bonding adhesive layer facing away from the carrier; Preferably, the material of the carrier board includes at least one of ceramic, glass, metal, and an organic substrate of a copper-clad laminate core; Preferably, the first bonding adhesive layer and / or the second bonding adhesive layer comprises at least one of thermal release adhesive, light release adhesive, solvent release adhesive and mechanical release adhesive.
8. The method according to any one of claims 1 to 3, characterized in that: Before bonding the first substrate and the second substrate to the first surface and the second surface of the carrier respectively, the method further comprises: forming the first through hole on the first substrate, and / or forming the second through hole on the second substrate; Preferably, the first substrate and / or the second substrate comprises at least one of a glass substrate, a silicon-based substrate, a ceramic substrate, and a polymer substrate; Preferably, the method of forming the first through hole and / or the second through hole includes at least one of laser induced wet etching, laser ablation, focused discharge, plasma etching, electrochemical discharge machining, and sand blasting, preferably laser induced wet etching.
9. The method according to any one of claims 1 to 3, characterized in that: The thickness of the first substrate is 100-1000 μm, preferably 200-300 μm, and the thickness of the second substrate is 100-1000 μm, preferably 200-300 μm; Preferably, the thickness of the first substrate is the same as the thickness of the second substrate; Preferably, the aperture of the first through hole is 10-200 μm, preferably 40-50 μm, and the aperture of the second through hole is 10-200 μm, preferably 40-50 μm; Preferably, the orthographic projection of the first through hole on the carrier at least partially overlaps with the orthographic projection of the second through hole on the carrier; Preferably, the first through hole and the second through hole have the same aperture; Preferably, the number of the first through holes and the number of the second through holes are the same.
10. An adapter plate, wherein the adapter plate is prepared according to the method according to any one of claims 1 to 9.
