A fast charging switching power supply system

Abstract

The present invention discloses a fast-charging switching power supply system, which relates to the technical field of switching power supplies, including a front-stage power supply system and multiple fast-charging power supply output systems, wherein the fast-charging power supply output system includes a rear-stage DC-DC power supply system, which is characterized in that when only one load device is connected, for the fast-charging power supply output system connected to the load device, its rear-stage DC-DC power supply system is turned off, and according to the requirements of the load device, the output voltage of the front-stage power supply system is changed to directly power the load device; when more than two load devices are connected, the front-stage power supply system outputs a fixed voltage, and for the fast-charging power supply output system connected to the load device, the charging voltage of the load device is changed by changing the output voltage of its rear-stage DC-DC power supply system. The present invention greatly saves system costs, improves system efficiency and reduces system temperature rise.

Description

Technical Field

[0001] The present invention relates to the technical field of switching power supplies, and in particular to a fast charging switching power supply system. Background Art

[0002] In a traditional multi-port fast-charging power supply system, the front-stage system AC-DC system or DC-DC system outputs a fixed voltage, such as 24V, which is used as the input voltage of the rear-stage DC-DC power supply system. The rear-stage DC-DC power supply system outputs a voltage to power the load device, and the output voltage of the rear-stage DC-DC power supply system is changed through communication between the protocol chip and the load device; therefore, in a traditional multi-port fast-charging power supply system, whether any single-port load device or multi-port load device is connected, the front-stage power supply system outputs a fixed voltage, which is used as the input power supply voltage for the rear-stage DC-DC power supply system, and then the rear-stage DC-DC power supply system changes the output voltage of the rear-stage DC-DC power supply system according to the requirements of the load device to power the load device to realize the fast charging function. When no load device is connected, the rear-stage DC-DC power supply system also needs to work normally and output a 5V voltage. Summary of the invention

[0003] The present invention provides a fast charging switching power supply system, which can solve the above problems.

[0004] In order to solve the above problems, the technical solution adopted by the present invention is as follows:

[0005] The present invention provides a fast-charging switching power supply system, comprising a front-stage power supply system and a plurality of fast-charging power supply output systems, wherein the fast-charging power supply output system comprises a rear-stage DC-DC power supply system; when only one load device is connected, for the fast-charging power supply output system connected to the load device, its rear-stage DC-DC power supply system is turned off, and according to the requirements of the load device, the output voltage of the front-stage power supply system is changed to directly power the load device; when more than two load devices are connected, the front-stage power supply system outputs a fixed voltage, and for the fast-charging power supply output system connected to the load device, the charging voltage of the load device is changed by changing the output voltage of its rear-stage DC-DC power supply system.

[0006] Furthermore, the front-stage power supply system includes a DC power supply system and a first voltage-divider resistor group, and the rear-stage DC-DC power supply system has a second voltage-divider resistor group; when only one load device is connected, for the fast-charging power supply output system connected to the load device, the output voltage of the front-stage power supply system is changed by changing the voltage-dividing ratio of the first voltage-divider resistor group; when more than two load devices are connected, for the fast-charging power supply output system connected to the load device, the charging voltage of the load device is changed by changing the voltage-dividing ratio of the second voltage-divider resistor group of its rear-stage DC-DC power supply system.

[0007] Furthermore, the fast charging switching power supply system also includes a load device access detection resistor, and the fast charging power supply output system also includes a multi-port device access detection module, a single-port device access detection module and a load device interface; for a fast charging power supply output system connected to a load device, its multi-port device access detection module is turned on through its single-port device access detection module, and the terminal voltage of the load device access detection resistor is detected through its multi-port device access detection module, and it is identified whether only one load device is connected or more than two load devices are connected.

[0008] Furthermore, the fast charging power supply output system also includes a charge pump driving module; the subsequent DC-DC power supply system includes a DC-DC controller, two power switches, an inductor, a first capacitor, and the second voltage-dividing resistor group; when only one load device is connected, for the fast charging power supply output system connected to the load device, its charge pump driving module is turned on, and its subsequent DC-DC power supply system is turned off, so that the first power switch is turned on and the second power switch is turned off, and the output voltage of the previous power supply system passes through its first power switch, inductor, first capacitor and the power output end of the load device interface to obtain the charging voltage for the load device.

[0009] Furthermore, the fast charging power supply output system also includes a protocol analysis module, a current digital-to-analog conversion module and a logic switch circuit;

[0010] When only one load device is connected, for the fast charging power supply output system connected to the load device, its protocol parsing module controls its current digital-to-analog conversion module to output current, and the current flows to the voltage dividing node of the first voltage dividing resistor group through its logic switch circuit control to change the voltage dividing ratio of the first voltage dividing resistor group;

[0011] When more than two load devices are connected, for the fast charging power supply output system connected to the load devices, its protocol parsing module controls the output current of its current digital-to-analog conversion module, and cuts off the current channel between its current digital-to-analog conversion module and the first voltage-divider resistor group through its logic switch circuit, so that its front-stage power supply system outputs a fixed voltage, and the current output by its current digital-to-analog conversion module is controlled by its logic switch circuit to flow to the voltage-dividing node of its second voltage-dividing resistor group to change the voltage-dividing ratio of its second voltage-dividing resistor group.

[0012] Furthermore, when more than two load devices are connected, for the fast charging power supply output system connected to the load devices, its charge pump drive module is turned off, and its subsequent DC-DC power supply system is turned on, so that its two power switches are in a pulse switching state, and the output voltage of the previous power supply system passes through its subsequent DC-DC power supply system and the power output end of the load device interface to obtain the charging voltage for the load device.

[0013] Furthermore, the DC-DC controller includes an upper tube driving module, a lower tube driving module, an error amplifier EA and a PWM generating circuit; the enable input terminals of the upper tube driving module and the lower tube driving module are connected to the logic switch circuit; the output side of the PWM generating circuit is connected to the PWM input terminals of the upper tube driving module and the lower tube driving module, and the input side is connected to the output terminal of the error amplifier EA; the positive input terminal of the error amplifier EA is connected to the reference voltage vref1, and the negative input terminal is connected to the voltage dividing node of the second voltage dividing resistor group and the logic switch circuit; the bootstrap capacitor power supply terminal of the upper tube driving module is connected to the inductor, the floating ground terminal of the bootstrap capacitor of the upper tube driving module, the source terminal of the first power switch and the drain terminal of the second power switch through the second capacitor.

[0014] Furthermore, the multi-port device access detection module includes a current mirror Iat, a switch S3 and a comparator cmp1; the current mirror Iat is connected to the positive input terminal of the comparator cmp1 and the load device access detection resistor through the switch S3; the negative input terminal of the comparator cmp1 is connected to the reference voltage Vath, the output terminal of the comparator cmp1 is connected to the logic switch circuit, and the control input terminal of the switch S3 is connected to the single-port device access detection module.

[0015] Furthermore, the reference voltage Vath is greater than the product of the resistance of the detection resistor connected to the load device and the output value of the current mirror Iat, and is less than 2 times the product of the resistance of the detection resistor connected to the load device and the output value of the current mirror Iat.

[0016] Compared with the prior art, the present invention has the following beneficial effects:

[0017] 1) When any single-port load device is connected, the present invention realizes the fast charging function by shutting down the rear-stage DC-DC power supply system and changing the output voltage of the front-stage system according to the requirements of the load device to directly power the load device. Compared with the traditional architecture, the front-stage system outputs a fixed voltage (for example, 24V), and then the output voltage of the rear-stage DC-DC power supply system is used to power the load device to realize the fast charging function; the present invention directly powers the load device by changing the output voltage of the front-stage system, shutting down the rear-stage DC-DC power supply system, so the power loss of the rear-stage DC-DC power supply system is saved, significantly improving the system charging efficiency and output power, reducing the system equipment temperature, and thus improving the charging safety. When the traditional power supply system is in standby (i.e., when no load device is connected), the rear-stage DC-DC power supply system needs to output 5V normally, while the rear-stage DC-DC power supply system of the present invention is in a closed state, and the static loss of the rear-stage DC-DC power supply system is saved, which significantly reduces the standby power consumption and can easily meet the most stringent standby power consumption requirements.

[0018] 2) In traditional power supply systems, no matter how many load devices are connected, the front-stage system always outputs a fixed voltage, and then the DC-DC power supply system outputs the voltage required by the load device, so the DC-DC power supply system must be designed according to full power; the present invention adjusts the front-stage output voltage to directly power the load device when a single load device is connected, and shuts down the rear-stage DC-DC power supply system to achieve fast charging, which can save the power loss of the DC-DC power supply system; therefore, the DC-DC power supply system does not need to be designed according to full power, but is designed according to the power when multiple ports are output, which can reduce the cost of the DC-DC power supply system, improve efficiency, and reduce equipment heating. For example, in a system where a single port outputs 66W at full power, and each port outputs 33W when multiple ports are connected, the rear-stage DC-DC power supply system only needs to be designed according to the maximum power of 33W, so the cost of the rear-stage DC-DC power supply system can be significantly reduced.

[0019] 3) The present invention optimizes the design so that in a multi-port output system, it is easy to save a power switch MOS for each output port, thereby significantly reducing the system cost.

[0020] 4) The present invention improves system efficiency and reduces system temperature rise. When any single port has a load device connected, for example Figure 1 There is a load device connected to the output A port, and no load device is connected to the output B port. The power switches PM11 and PM12 are in the pwm pulse switching state, and PM13 is always on. Figure 2 There is a load device connected to USB1, and no load device connected to USB2. Figure 2 Only PM1 is continuously open. Figure 1The power switch loss of PM11 and PM12 in the pulse switching state is omitted. When load devices are connected to both ports at the same time, Figure 1 The medium power switches PM11, PM12, PM14, and PM15 are in the PWM pulse switching state, and the power switches PM13 and PM16 are in the always-on state. Figure 2 Only power switches PM1, PM2, PM3, and PM4 are in the PWM pulse switching state. Figure 1 The power switch loss of PM13 and PM16, which are always on, is saved. Therefore, whether a single-port load device is connected or a dual-port load device is connected at the same time, the invention example Figure 2 Compared with existing technology Figure 1 The losses of two power switches are saved. The present invention improves system efficiency and reduces system temperature rise.

[0021] 5) For the fast charging power output system, the present invention can easily reduce the size of the inductor L to achieve miniaturized design, while reducing the cost of the inductor L and the capacitor C, saving system cost. Because the subsequent DC-DC power supply system does not need to design the inductor L and the capacitor C according to the full power of a single port, but only needs to design the inductor L and the capacitor C of the subsequent DC-DC power supply system according to the reduced power when multiple ports are output, the size of the inductor L can be significantly reduced and the cost can be reduced.

[0022] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the embodiments of the present invention are specifically cited below and described in detail with reference to the attached drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for use in the embodiments are briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present invention and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without creative work.

[0024] Figure 1 It is a structural diagram of an existing USB interface dual-port output fast charging power supply system;

[0025] Figure 2 is a diagram of a dual-port output fast charging switching power supply system according to an embodiment;

[0026] Figure 3 is a structural diagram of the charge pump driving module described in the embodiment;

[0027] Figure 4 is a structural diagram of the upper tube driving module described in the embodiment;

[0028] Figure 5 is a structural diagram of the lower tube driving module described in the embodiment;

[0029] Figure 6 is a structural diagram of the DC-DC controller described in the embodiment;

[0030] Figure 7 It is a structural diagram of the multi-port device access detection module described in the embodiment. DETAILED DESCRIPTION

[0031] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments.

[0032] Example: Figure 2 As shown, this embodiment discloses a dual-port output fast charging switching power supply system, including a front-stage power supply system, a dual-port load device access detection resistor R7, a fast charging power supply USB1 output system and a fast charging power supply USB2 output system.

[0033] 1. Pre-stage power supply system

[0034] The DC power supply system and the first voltage-dividing resistor group (including resistors R5 and R6) form a front-stage power supply system, and the DC power supply system is an AC-DC system or a DC-DC system.

[0035] The output voltage Vdc_pre of the DC power supply system is connected to the resistor R5, the other end of the resistor R5 is connected to the resistor R6 and the VFB pin of the DC power supply system to control the output voltage, and the other end of the resistor R6 is connected to the ground.

[0036] The output Vdc_pre voltage is Vdc_pre=(1+R5 / R6)×Vref0 (where Vref0 is the reference voltage of the DC power supply system). For example, the Vdc_pre voltage can be set at 24V.

[0037] 2. Fast charging power supply USB1 output system

[0038] The fast charging power supply USB1 output system includes a control chip IC1, power switches PM1 and PM2, an inductor L1, a first capacitor ( Figure 2 The capacitor C1 in the Figure 2 Capacitor C5 in the circuit), a second voltage-dividing resistor group composed of voltage-dividing resistors R1 and R2, and USB1 interface.

[0039] The control chip IC1 includes a charge pump driver module, a DC-DC controller, an IDAC (current digital-to-analog conversion) module, a protocol analysis module, a single-port device access detection module, a multi-port device access detection module, and a logic switch circuit (including logic gate inv8 and switches S4 and S5). Figure 6 As shown, the DC-DC controller includes an upper tube driving module, a lower tube driving module, an error amplifier EA1 and a PWM generating circuit. The DC-DC controller, power switches PM1 and PM2, inductor L1, capacitor C1, and a second voltage-dividing resistor group constitute a DC-DC power supply system.

[0040] The front-stage Vdc_pre voltage is connected to the VDD pin of the control chip IC1 and the drain end of the power tube PM1. The source end of the power tube PM1 is connected to the drain end of the power tube PM2, the SW (bootstrap capacitor floating ground) pin of the control chip IC1, the inductor L1 and the capacitor C5. The other end of the capacitor C5 is connected to the BST (bootstrap capacitor power supply) pin of the control chip IC1. The gate end of the power tube PM1 is connected to the GATEH pin and the PUMP pin of the control chip IC1. The gate end of the power tube PM2 is connected to the GATEL pin of the control chip IC1. The source end of the power tube PM2 is connected to the ground GND. The other end of the inductor L1 is connected to the capacitor C1. The other end of the capacitor C1 is grounded GND. The connection point of the inductor L1 and the capacitor C1 The output voltage Vout1 end is connected to the VBUS end of the USB1 interface as the power output end, and Vout1 is simultaneously connected to resistor R1, resistor R1 is connected to resistor R2, resistor R2 is connected to ground, and the connection point of resistors R1 and R2 is simultaneously connected to the FB pin of the control chip IC1 as a voltage feedback end; the CC1, DP, DN, and CC2 ends of the USB1 interface are respectively connected to the pins CC1, DP, DN, and CC2 of the control chip IC1 as communication ports, and the GND end of the USB1 interface is connected to ground; the ATH pin of the control chip IC1 is connected to resistor R7, and the other end of resistor R7 is connected to the GND pin of the control chip IC1 and grounded; the DAC pin of the control chip IC1 is connected to resistors R5 and R6 as the Vout1 output voltage control pin.

[0041] The input side of the protocol analysis module is connected to the communication port pin group of the control chip IC (including CC1, DP, DN, and CC2 pins), and the output side is connected to the IDAC (current digital-to-analog conversion) module. The output of the IDAC module is connected to one end of the switch S4, and the other end of the switch S4 is connected to the DAC pin of the control chip IC. The control end of the switch S4 is connected to the output of the logic gate inv8; the single-port device access detection module is also connected to the communication port pin group of the control chip IC, and its output attach1 signal is connected to the detection end of the multi-port device access detection module and one of the input ends pump_ena of the charge pump driver module. The other output end of the single-port device access detection module is connected to the protocol analysis module; the other input end of the multi-port device access detection module is connected to the ATH pin, and the output signal attach_all of the multi-port device access detection module is connected to the input end of the logic gate inv8 and the control end of the switch S5. , the input end drv_ena of the lower tube driving module, the input end drv_ena of the upper tube driving module and the input end pump_dis of the charge pump driving module; the output end pmout of the charge pump driving module is connected to the PUMP pin of the control chip IC1; the input pwm of the upper tube driving module is connected to the output side of the pwm generating circuit, the output bst of the upper tube driving module is connected to the BST pin of the control chip IC1, and the output sw of the upper tube driving module is connected to the SW pin of the control chip IC1; the negative input of the error amplifier EA1 is connected to the FB pin of the control chip IC1, the positive input is connected to the reference voltage vref1, the output of the error amplifier EA1 is connected to the pwm generating circuit, the output of the pwm generating circuit is connected to the input end pwm of the lower tube driving module and the input end pwm of the upper tube driving module, and the output out of the lower tube driving module is connected to the GATEL pin of the control chip IC1.

[0042] like Figure 3As shown, the implementation circuit of the charge pump driving module includes a linear voltage regulator circuit LDO1, an oscillator OSC, diodes D1 and D2, a resistor R0, a capacitor C0, logic gates inv12, inv9, and1, inv3 and inv4, switches S1 and S2, and a MOS switch M0. The output of the linear voltage regulator circuit LDO1 is connected to the input of the diode D1, the output of the diode D1 is connected to the input of the diode D2 and the capacitor C0, the output of the diode D2 is connected to the resistor R0, the other end of the resistor R0 is connected to the drain end of the MOS switch M0 and serves as the output end pmout of the charge pump driving module, the source end of the MOS switch M0 is grounded, the other end of the capacitor C0 is connected to the switch S1 and the switch S2, the other end of the switch S1 is grounded, and the other end of the switch S2 is connected to the VDD pin voltage; two inputs of the logic gate and1 are respectively connected to the output of the oscillator OSC and the output of the logic gate inv12, and the other input serves as the input end pump_ena of the charge pump driving module; the inv12 input serves as the input end pump_dis of the charge pump driving module, the input of the logic gate inv9 is connected to the pump_ena signal, and the output is connected to the gate end of the MOS switch M0, the output of the logic gate and1 is connected to the input of the logic gate inv3, the output of inv3 is connected to the input end of inv4 and the control end of the switch S1, and the output of the logic gate inv4 is connected to the control end of the switch S2.

[0043] The principle of charge pump drive is that when the oscillator OSC output is low, the switch S1 is turned on through the logic gate inv3, and the switch S2 is turned off through the logic gate inv4. At this time, the output voltage Vldo of the linear regulator LDO1 charges the capacitor C0 through the diode D1; when the oscillator OSC output is high, the switch S1 is turned off through the logic gate inv3, and the switch S2 is turned on through the logic gate inv4. At this time, the lower end voltage of the capacitor C0 is connected to the VDD pin voltage, and the upper end voltage is VDD plus Vldo minus the forward conduction voltage of the diode D1. This voltage increases the output pmout voltage to higher than VDD through the diode D2 and the resistor R2. The final voltage of the voltage pump drive output is (VDD+Vldo-Vd1-Vd2), where VDD is the VDD pin voltage, Vldo is the LDO1 output voltage, Vd1 is the forward conduction voltage of the diode D1, and Vd2 is the forward conduction voltage of the diode D2. When the input terminal pump_dis is at a high level, the charge pump is turned off and the charge pump output pmout is in a high-impedance floating state; when the input terminal pump_dis is at a low level, the charge pump is enabled. At this time, the input terminal pump_ena is at a high level, and the charge pump output pmout is at a high level to turn on the external power MOS switch PM1. When the input terminal pump_ena is at a low level, the charge pump output pmout is at a low level to turn off the external power MOS switch PM1.

[0044] like Figure 4 As shown, the implementation circuit of the upper tube driving module includes a level conversion circuit 1, a level conversion circuit 2, logic gates inv13, nor1, nor2, inv5, inv6 and inv7, a linear voltage regulator LDO2, diodes D3 and D4, and MOS switches M1 and M2. The input signal drv_ena is connected to the level conversion circuit 1, and the output of the level conversion circuit 1 is connected to the first input terminal of the logic gate nor1 and the first input terminal of the logic gate nor2; the input signal pwm is connected to the level conversion circuit 2, and the output of the level conversion circuit 2 is connected to the input terminal of the logic gate inv13 and the second input terminal of the logic gate nor2; the output of the logic gate nor1 is connected to the logic gate inv5, and the output of the logic gate inv5 is connected to the gate terminal of the MOS switch M1, the output of the linear voltage regulator LDO2 is connected to the positive terminal of the diode D4, and the negative terminal of D4 is connected to the drain terminal of the MOS switch M1, and serves as the output terminal bst of the upper tube driving module; the source terminal of the MOS switch M1 is connected to the positive terminal of the diode D3, and the negative terminal of D3 is connected to the drain terminal of the MOS switch M2, and serves as the output terminal out of the upper tube driving module; the source terminal of the MOS switch M2 serves as the output terminal sw of the upper tube driving module; the output of the logic gate nor2 is connected to the input of the logic gate inv6, the output of inv6 is connected to the input of the logic gate inv7, and the output of inv7 is connected to the gate terminal of the MOS switch M2. When the input drv_ena is at a high level, the upper tube driver outputs the pwm input signal to the out terminal to drive the external power MOS switch PM1; when the input drv_ena is at a low level, the MOS switches M1 and M2 of the upper tube driver module are both turned off, the out output terminal of the upper tube driver module is in a floating state, and the diode D3 blocks the high voltage, allowing the out terminal to have a voltage higher than the output bst terminal.

[0045] like Figure 5As shown, the implementation circuit of the lower tube driving module includes logic gates and2, inv9, inv10, and MOS switches M3 and M4. The two input ends of the logic gate and2 are respectively used as the input end drv_ena and the input end pwm of the lower tube driving module, the output of the logic gate and2 is connected to the input of the logic gates inv9 and inv10, the output of inv9 is connected to the gate end of the MOS switch M3, the output of inv10 is connected to the gate end of the MOS switch M4, the source end of the MOS switch M3 is connected to VDD; the drain end of the MOS switch M3 is connected to the drain end of the MOS switch M4 and serves as the output end out of the lower tube driving module; the source end of the MOS M4 is grounded. When the input drv_ena is high, the lower tube driving module outputs the pwm input signal to the out end for driving the external power MOS switch PM2; when the input drv_ena is low, the out end outputs a low level for turning off the external power MOS switch PM2.

[0046] like Figure 7 As shown, the implementation circuit of the multi-port device access detection module includes a current mirror Iat, a switch S3, and a comparator cmp1. The current mirror Iat is connected to the switch S3, and the other end of S3 is connected to the positive input end of the comparator cmp1 and serves as the ATH pin of the multi-port device access detection module. The negative input end of the comparator cmp1 is connected to a reference voltage Vath, and the output of the comparator cmp1 serves as the dual-port device access detection output end attach_all of the multi-port device access detection module.

[0047] The function of the multi-port device access detection module is that when it detects that the ATH pin voltage of the control chip IC1 is higher than the reference voltage Vath, the comparator cmp1 outputs a high level, which means that 2 or more load devices are connected to the power system; when it detects that the ATH pin voltage of the control chip IC1 is lower than the reference voltage Vath, the comparator cmp1 outputs a low level, which means that only 1 load device is connected or no load device is connected to the power system.

[0048] The resistance value of the external resistor R7 satisfies the following formula:

[0049] .

[0050] 3. Fast charging power USB2 output system

[0051] The fast charging power supply USB2 output system includes the control chip IC2, N-type power tubes PM3 and PM4, inductor L2, capacitors C2 and C6, voltage divider resistors R3 and R4, and USB1 interface. The front-stage Vdc_pre voltage is connected to the VDD pin of the control chip IC2 and the drain end of the power tube PM3. The source end of the power tube PM3 is connected to the drain end of the power tube PM4, the SW pin of the control chip IC2, the inductor L2, and the capacitor C6. The other end of the capacitor C6 is connected to the BST pin of the control chip IC2. The gate end of the power tube PM3 is connected to the GATEH pin and PUMP pin of the control chip IC2. The gate end of the power tube PM4 is connected to the GATEL pin of the control chip IC2. The source end of the power tube PM4 is connected to the ground GND. The other end of the inductor L2 is connected to the capacitor C2. The other end of the capacitor C2 is connected to the Ground GND; the connection point of inductor L2 and capacitor C2 is the output voltage Vout2 terminal, Vout2 terminal is connected to the VBUS terminal of USB2 interface as the power output terminal, Vout2 is also connected to resistor R3, resistor R3 is connected to resistor R4, resistor R4 is connected to ground, and the connection point of resistors R3 and R4 is also connected to the FB pin of control chip IC2 as the voltage feedback terminal; CC1, DP, DN, CC2 terminals of USB2 interface are respectively connected to pins CC1, DP, DN, CC2 of control chip IC2 as communication ports, and the GND terminal of USB2 interface is connected to ground; ATH pin of control chip IC2 is connected to resistor R7 and ATH pin of control chip IC1.

[0052] The components of the control chip IC2 are exactly the same as those of the control chip IC1, and will not be repeated here.

[0053] The dual-port output fast charging switching power supply system described in this embodiment has the following working principle:

[0054] 1. A load device is connected to the USB1 interface, but no load device is connected to the USB2 interface.

[0055] For USB1 interface: the single-port device access detection module of the control chip IC1 detects that a load device is connected to the USB1 interface through the CC1, DP, DN, and CC2 pins, and outputs the control signal attach1 as a high level. The attach1 is high level to turn on the switch S3 of the multi-port device access detection module, and the current Iat flows into the resistor R7 through the ATH pin. However, the control chip IC2 does not detect that a load device is connected to the USB2 interface. Therefore, the output signal attach1 of the single-port device access detection module in IC2 is a low level. The attach1 in IC2 is low level to turn off the switch S3 of the multi-port device access detection module in IC2. The Iat current in IC2 does not flow into the resistor R7, so the ATH pin voltage in IC1 is Iat*R7, and the ATH pin voltage in IC1 is less than the reference voltage Vath in the multi-port device access detection module ( ), so the multi-port device access detection module outputs the control signal attach_all as a low level, attach1 in IC1 is high and attach_all is low, so the charge pump driver module starts working, and the charge pump driver pumps the PUMP pin voltage to the VDD voltage plus a fixed voltage (for example, VDD+5V) to turn on the upper tube power switch PM1; because the multi-port device access detection module outputs to the input terminal drv_ena of the upper tube driver module and the input terminal drv_ena of the lower tube driver module The attach_all of is low, so the upper tube driver module and the lower tube driver module are turned off, the GATEL pin of the control chip IC1 outputs a low level, and the power switch PM2 is turned off; the power switch PM1 is turned on and PM2 is turned off, the output voltage Vdc_pre passes through the power switch PM1 to the inductor L1, and Vout1 supplies power to the load device through the VBUS end of the USB1 interface; at the same time, the single-port device access detection module detects that a load device is connected to the protocol parsing module, and the protocol parsing module communicates with the load device through CC1, DP, DN, CC2, and controls the IDAC module to flow a certain current, and the multi-port device access detection output The signal attach_all is at a low level, which cuts off the S5 switch and turns on the S4 switch through inv8. The output current of the IDAC module passes through the S4 switch to the DAC pin to the voltage-dividing node of resistors R5 and R6, and controls the voltage-dividing ratio of R5 and R6 to change the output voltage Vdc_pre of the previous stage. Therefore, the load device can control the output voltage Vdc_pre through the CC1, DP, DN, and CC2 communication interfaces (for example, increase the voltage to 12V), and obtain the voltage Vout1 through the power switch PM1 and the inductor L1. The voltage Vout1 then reaches the VBUS end of the USB1 interface, and finally reaches the load device to achieve fast charging.

[0056] Figure 2In the technical solution shown in the present invention, control signals attach1 and attach_all are output through the single-port device access detection and multi-port device access detection modules of IC1; attach1 is high and attach_all is low, controlling the charge pump driver module to output a high level to the PUMP pin of IC1 to continuously turn on the power switch PM1, and attach_all is low to turn off the upper tube driver module and the lower tube driver module, and then turn off the power switch PM2 through the GATEL pin; the power switch PM1 is turned on and PM2 is turned off, and the output voltage Vdc_pre of the front-stage system is output to the load device through the power switch PM1 and the inductor L1 to the VBUS end of the USB1 interface, and at the same time, the IC1 protocol parsing module controls the IDAC1 module to output a current, which flows into the voltage divider resistors R5 and R6 of the front-stage power system through the switch S4, changing the voltage divider ratio of the resistors R5 and R6, thereby changing the front-stage output voltage Vdc_pre (for example, 12V) to achieve the purpose of fast charging.

[0057] For the USB2 interface: the single-port device access detection module of the control chip IC2 detects through the CC1, DP, DN, and CC2 pins that there is no load device connected to the USB2 interface, and turns off the protocol parsing module and the current digital-to-analog conversion module, and outputs the control signal attach1 as a low level. The multi-port device access detection module outputs the control signal attach_all as a low level. If both attach1 and attach_all are low levels, the charge pump driver is turned off, and the charge pump driver pulls the PUMP pin voltage down to ground, turning off the upper tube power switch PM3; the multi-port device access detection output attach_all is a low level, which is input to the upper tube drive input terminal drv_ena to turn off the upper tube drive, and is input to the lower tube drive input terminal drv_ena to turn off the lower tube drive circuit, GATEL outputs a low level, and turns off the power switch PM4; both power switches PM3 and PM4 are turned off, the output Vout2 is in the off state, and the USB2 interface is in the off state.

[0058] 2. A load device is connected to the USB2 interface, but no load device is connected to the USB1 interface. This state is similar to the above process, except that the USB1 interface is in the off state and the USB2 interface is in the fast charging state.

[0059] 3. Load devices are connected to USB1 and USB2 interfaces at the same time.

[0060] For USB1 interface: the single-port device access detection module of the control chip IC1 detects that a load device is connected to the USB1 interface through the CC1, DP, DN, and CC2 pins, and outputs the control signal attach1 as a high level, and then turns on the switch S3 of the multi-port device access detection module, and the current Iat flows into the resistor R7 through the ATH pin. The control chip IC2 also detects that a load device is added to the USB2 interface, so the output signal attach1 of the single-port device access detection module in IC2 is high. The attach1 in IC2 is high, turning on the switch S3 of the multi-port device access detection module in IC2, and the Iat current in IC2 flows into the resistor R7 through the ATH pin, so the ATH pin voltage in IC1 is 2*Iat*R7, and the ATH pin voltage in IC1 is greater than the reference voltage Vath in the multi-port detection module ( ), so the multi-port device access detection module outputs the control signal attach_all as high level, attach1 and attach_all are both high level, so the charge pump driver module is turned off, and the PUMP pin voltage is in a floating state; the multi-port device access detection module outputs attach_all as high level, which is input to the input end drv_ena of the upper tube driver module to turn on the upper tube driver module, and at the same time input to the input end drv_ena of the lower tube driver module to turn on the lower tube driver module. The upper tube driver module and the lower tube driver module start to output the output signal pwm pulse waveform to control the power switches PM1 and PM2 to turn on or off, that is to say, Figure 2 The DC-DC system in the upper part of the Figure 2 The DC-DC controller in the upper middle part, composed of power switches PM1 and PM2, inductor L1, capacitor C1 and capacitor C5, and voltage-dividing resistors R1 and R2, starts working; at the same time, the single-port device access detection module detects that a load device is connected, enables the protocol parsing module, and the protocol parsing module communicates with the load device through CC1, DP, DN, CC2, and controls the current digital-to-analog conversion module IDAC to flow out a certain current. The multi-port device access detection output signal attach_all is a high level, which turns on the S5 switch and cuts off the S4 switch through inv8. The IDAC module outputs current through the S5 switch to the FB pin, and then to the voltage-dividing node of the voltage-dividing resistors R1 and R2, and changes the voltage-dividing ratio of R1 and R2 to achieve a change in the output voltage Vout1. At this time, the Vdc_pre voltage is a fixed voltage (for example, 24V) output by the previous power supply system. Therefore, the load device can control the output voltage Vout1 (for example, increase the voltage to 12V) through the CC1, DP, DN, and CC2 communication interfaces. The output voltage Vout1 passes through the VBUS end of the USB1 interface and finally reaches the load device to achieve fast charging.

[0061] For the USB2 interface, the charging principle is the same as that of the USB1 interface.

[0062] 4. There is no load device connected to the USB1 interface and USB2 interface.

[0063] For the USB1 interface: the single-port device access detection module of the control chip IC1 detects through the CC1, DP, DN, and CC2 pins that there is no load device connected to the USB1 interface, and turns off the protocol parsing module and the current digital-to-analog conversion module. At the same time, the output control signal attach1 is low. The multi-port device access detection module also does not detect the access of the load device, and the output control signal attach_all is low. If both attach1 and attach_all are low, the charge pump drive is turned off, and the charge pump drive pulls the PUMP pin voltage down to the ground, turning off the upper tube power switch PM1; the multi-port device access detection output attach_all is low, which is input to the upper tube drive input terminal drv_ena to turn off the upper tube drive, and the GATEH pin voltage is in a floating state. At the same time, it is input to the lower tube drive input drv_ena to turn off the lower tube drive circuit, and GATEL outputs a low level to turn off the power switch PM2; both power switches PM1 and PM2 are turned off, and the output Vout1 is in the off state.

[0064] For the USB2 interface: Similarly, the single-port device access detection module of the control chip IC2 detects through the CC1, DP, DN, and CC2 pins that there is no load device connected to the USB2 interface, and turns off the protocol parsing module and the current digital-to-analog conversion module. At the same time, the output control signal attach1 is low, and the multi-port device access detection module does not detect the access of the load device, and the output control signal attach_all is low. If both attach1 and attach_all are low, the charge pump drive is turned off, and the charge pump drive pulls the PUMP pin voltage down to ground, turning off the upper tube power switch PM3; the multi-port device access detection output attach_all is low, which is input to the upper tube drive input terminal drv_ena to turn off the upper tube drive, and the GATEH pin voltage is in a floating state. At the same time, it is input to the lower tube drive input terminal drv_ena to turn off the lower tube drive circuit, and GATEL outputs a low level to turn off the power switch PM4; both power switches PM3 and PM4 are turned off, and the output Vout2 is in the off state.

[0065] Comparison: The output voltage of a non-fast charging power supply system of a USB interface is 5V, and the maximum output current of a USB interface is 5A, which limits the maximum output power to 25W. In order to increase the output power of the USB interface, the current method is to increase the output voltage to increase the output power.

[0066] Existing USB interface dual-port output fast charging power supply system such as Figure 1 As shown as a comparative example, the AC input voltage of 90~264V is converted to DC by the AC-DC system or the DC input voltage is converted to DC by the DC-DC system to output the DC voltage Vo_dc (for example, 24V). IC5 is a DC-DC controller (DC-DC controller), IC5 and power tubes PM11 and PM12, inductor L11, capacitor C11, feedback resistors R11 / R12 It forms a DC-to-DC step-down conversion system (Buck system), Vo_dc is the input voltage of the above-mentioned Buck system; IC6 is a fast charging protocol IC, and the communication pins CC1 / CC2 / DP / DN communicate with the load device through the USB interface output A. When the load device is detected to be connected, the PM13 power MOS switch is turned on through the drive circuit to output the VO10 voltage to power the load device. The load device communicates with IC6 through the USB communication pins CC1 / CC2 / DP / DN about the voltage required by the load device. IC6 parses the voltage required by the load device through the protocol. After the protocol analysis, it controls the current digital-to-analog conversion module IDAC to output the required current value Idac5 current. The Idac5 current changes the proportional coefficient of the feedback resistor R11 / R12, thereby changing the output voltage VO10 to achieve the voltage required by the load device. When only one load device is connected to USB port output A or output B, the connected load device can be stepped up or down to achieve full power output for fast charging, while the other output only outputs 5V and turns off the output port power MOS switch; when both output A and output B have load devices connected at the same time, output A and output B can be stepped up or down independently to achieve fast charging, but the sum of the power of output A and output B is the total power output, and the power distribution is pre-set for the dual-port system, such as 2 equal power distribution, or other proportion distribution; for example, a dual-port fast charging system with a total power of 66W, when only one load device is connected to USB output A or output B, the load device access port can output at full power of 66W, while the other 5V output and turn off the output port power switch for zero load; when both output A and output B have load devices connected at the same time, the total power of the two is 66W, for example, according to the dual-port equal power distribution, both output A and output B output a maximum power of 33W. From the above analysis, we can know that the DC-DC system needs to design the power tube, inductor and capacitor according to the maximum full power.

[0067] The technical solution shown in the above embodiment Figure 2 Achieved a comparison with the existing technical solutions Figure 1 The same buck-boost fast charging function is available when a load device is connected to the single port, and the following effective gains are achieved:

[0068] Figure 1In the existing power supply system shown in FIG. 1 , the power switches PM11 and PM12 are in a PWM pulse switching state, and PM13 is in a continuously turned-on state. Figure 2 In the power system shown in this embodiment, only PM1 is in a continuously turned-on state. Figure 1 The power switching loss of PM11 and PM12 in the pulse switching state is eliminated, thereby improving the system efficiency and reducing the system temperature rise.

[0069] This embodiment can reduce the size of the inductor L to achieve a miniaturized design, while reducing the cost of the inductor L and the capacitor C, saving system cost. Figure 2 There is a load device connected to USB1 port, but no load device is connected to USB2 port. Figure 2 The medium power switch PM1 is always on, the DC-DC system corresponding to the USB1 port is off, and the inductor L1 and capacitor C1 are not used as LC filters for the DC-DC system. Figure 1 There is a load device connected to the output A port, but no load device is connected to the output B port. Figure 1 The DC-DC system corresponding to the output port B is in working state, and the inductor L11 and the capacitor C11 act as output LC filter. Figure 1 The inductor L11 and capacitor C11 need to be designed according to the full power output of a single port. Figure 2 The inductor L1 and capacitor C1 do not need to be designed according to the full power output of a single port, but only need to be designed according to the maximum power of dual-port output. For example, a dual-port fast charging system with a single-port full power output of 66W and dual-port outputs of 33W each. Figure 1 The capacitors L11 and C11 need to be designed according to the 66W output power. Figure 2 The inductor L1 and the capacitor C1 only need to be designed according to the 33W power, so that the size of the inductor L can be reduced to achieve a miniaturized design, and at the same time the cost of the capacitor L1 and the capacitor C1 is reduced, saving system cost.

[0070] The technical solution shown in the above embodiment Figure 2 Comparison with prior art solutions Figure 1 As shown in the figure, the purpose of independent fast charging of each output port after the dual-port load device is connected is achieved, and the following effective gains are also brought:

[0071] This embodiment ( Figure 2 ) relative to the comparative example ( Figure 1 ) has been optimized so that in a multi-port output system, each output port can save a power switch MOS, thereby significantly reducing the system cost.

[0072] Figure 1 The medium power switches PM11, PM12, PM14, and PM15 are in the PWM pulse switching state, and the power switches PM13 and PM16 are in the always-on state. Figure 2 Only power switches PM1, PM2, PM3, and PM4 are in the PWM pulse switching state, and the power switch losses of PM13 and PM16, which are always on, are saved, which improves system efficiency and reduces system temperature rise. The price of a commonly used 30V power switch MOS is 0.3~1.5 yuan (different on-resistance Rdson, different prices), and the price of the additional load device access detection resistor is 0.01 yuan, which greatly saves system costs.

[0073] The technical solution shown in the above embodiment Figure 2 Achieved a comparison with the existing technical solutions Figure 1 The functions shown in the figure can realize the single-port buck-boost fast charging function when a single-port load device is connected, and the dual-port load devices can realize the independent buck-boost fast charging function of each output port when they are connected at the same time.

[0074] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A fast charging switching power supply system, comprising a front-stage power supply system and a plurality of fast charging power supply output systems, wherein the fast charging power supply output system comprises a rear-stage DC-DC power supply system, characterized in that: When only one load device is connected, the fast-charging power output system connected to the load device shuts down its subsequent DC-DC power system, and changes the output voltage of the previous power system according to the requirements of the load device to directly power the load device; when more than two load devices are connected, the previous power system outputs a fixed voltage, and the fast-charging power output system connected to the load device changes the charging voltage of the load device by changing the output voltage of its subsequent DC-DC power system.

2. The fast charging switching power supply system according to claim 1, characterized in that: The front-stage power supply system includes a DC power supply system and a first voltage-divider resistor group, and the rear-stage DC-DC power supply system has a second voltage-divider resistor group; when only one load device is connected, for the fast-charging power supply output system connected to the load device, the output voltage of the front-stage power supply system is changed by changing the voltage-dividing ratio of the first voltage-divider resistor group; when more than two load devices are connected, for the fast-charging power supply output system connected to the load device, the charging voltage of the load device is changed by changing the voltage-dividing ratio of the second voltage-divider resistor group of its rear-stage DC-DC power supply system.

3. The fast charging switching power supply system according to claim 2, characterized in that: It also includes a load device access detection resistor, and the fast charging power output system also includes a multi-port device access detection module, a single-port device access detection module and a load device interface; for a fast charging power output system connected to a load device, its multi-port device access detection module is turned on through its single-port device access detection module, and the terminal voltage of the load device access detection resistor is detected through its multi-port device access detection module, and it is identified whether only one load device is connected or more than two load devices are connected.

4. The fast charging switching power supply system according to claim 3, characterized in that: The fast-charging power output system also includes a charge pump driving module; the subsequent-stage DC-DC power supply system includes a DC-DC controller, two power switches, an inductor, a first capacitor, and the second voltage-dividing resistor group; when only one load device is connected, for the fast-charging power output system connected to the load device, its charge pump driving module is turned on, and its subsequent-stage DC-DC power supply system is turned off, so that the first power switch is turned on and the second power switch is turned off, and the output voltage of the previous-stage power supply system passes through its first power switch, inductor, first capacitor and the power output end of the load device interface to obtain the charging voltage for the load device.

5. The fast charging switching power supply system according to claim 4, characterized in that: The fast charging power supply output system also includes a protocol analysis module, a current digital-to-analog conversion module and a logic switch circuit; When only one load device is connected, for the fast charging power supply output system connected to the load device, its protocol parsing module controls its current digital-to-analog conversion module to output current, and the current flows to the voltage dividing node of the first voltage dividing resistor group through its logic switch circuit control to change the voltage dividing ratio of the first voltage dividing resistor group; When more than two load devices are connected, for the fast charging power supply output system connected to the load devices, its protocol parsing module controls the output current of its current digital-to-analog conversion module, and cuts off the current channel between its current digital-to-analog conversion module and the first voltage-divider resistor group through its logic switch circuit, so that its front-stage power supply system outputs a fixed voltage, and the current output by its current digital-to-analog conversion module is controlled by its logic switch circuit to flow to the voltage-dividing node of its second voltage-dividing resistor group to change the voltage-dividing ratio of its second voltage-dividing resistor group.

6. The fast charging switching power supply system according to claim 5, characterized in that: When more than two load devices are connected, for the fast charging power supply output system connected to the load devices, its charge pump drive module is turned off, and its subsequent DC-DC power supply system is turned on, so that its two power switches are in a pulse switching state, and the output voltage of the previous power supply system passes through its subsequent DC-DC power supply system and the power output end of the load device interface to obtain the charging voltage for the load device.

7. The fast charging switching power supply system according to claim 6, characterized in that: The DC-DC controller comprises an upper tube driving module, a lower tube driving module, an error amplifier EA and a PWM generating circuit; the enable input terminals of the upper tube driving module and the lower tube driving module are connected to the logic switch circuit; The output side of the PWM generating circuit is connected to the PWM input ends of the upper tube driving module and the lower tube driving module, and the input side is connected to the output end of the error amplifier EA; the positive input end of the error amplifier EA is connected to the reference voltage vref1, and the negative input end is connected to the voltage dividing node of the second voltage dividing resistor group and the logic switch circuit; the bootstrap capacitor power supply end of the upper tube driving module is connected to the inductor, the floating end of the bootstrap capacitor of the upper tube driving module, the source end of the first power switch and the drain end of the second power switch through the second capacitor.

8. The fast charging switching power supply system according to claim 7, characterized in that: The multi-port device access detection module includes a current mirror Iat, a switch S3 and a comparator cmp1; the current mirror Iat is connected to the positive input terminal of the comparator cmp1 and the load device access detection resistor through the switch S3; the negative input terminal of the comparator cmp1 is connected to the reference voltage Vath, the output terminal of the comparator cmp1 is connected to the logic switch circuit, and the control input terminal of the switch S3 is connected to the single-port device access detection module.

9. The fast charging switching power supply system according to claim 8, characterized in that: The reference voltage Vath is greater than the product of the resistance of the detection resistor connected to the load device and the output value of the current mirror Iat, and is less than 2 times the product of the resistance of the detection resistor connected to the load device and the output value of the current mirror Iat.

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