Safe starting method and device, electronic equipment and vehicle

Abstract

The invention discloses a safe starting method and device, electronic equipment and a vehicle, and the method comprises the steps: responding to a starting signal, and starting a management program through an equipment management controller of a real-time processing core; based on the management program, performing first step-by-step verification on the target component through a preset cryptographic algorithm; loading and starting the target component passing the verification; wherein the national cryptographic algorithm comprises an asymmetric encryption algorithm and a password hash algorithm; calling a data interface of the hardware security module through the security gateway to obtain a trust root, and transmitting the trust root to the application processing core; and based on the root of trust, performing second step-by-step verification by using the national cryptographic algorithm through the sub-firmware in the target firmware, and in response to a verification passing result of the second step-by-step verification, completing secure startup. The method can effectively improve the security of security startup, and can be widely applied to the technical field of data processing.

Description

Technical Field

[0001] The present invention relates to the field of data processing technology, and in particular to a safe startup method, device, electronic equipment and vehicle. Background Art

[0002] With the vigorous development of Internet of Vehicles technology, the intelligent connected vehicle industry is changing with each passing day, and intelligence has become its core feature. However, while this intelligence brings convenience, it also brings unprecedented challenges to vehicle network security due to the openness of the network. In the case of insufficient network security protection, intelligent connected vehicles may face property loss or even threats to personal safety. Therefore, it is crucial to ensure the authenticity of automotive software files, and secure boot is the key link in protecting vehicle network security. However, the existing boot process often directly applies common encryption algorithms to uniformly verify all nodes, which has low security. Summary of the invention

[0003] The present invention aims to solve the problem of related technical limitations at least to a certain extent. To this end, the present invention proposes a safe startup method, device, electronic device and vehicle, which can effectively improve the safety of safe startup.

[0004] On the one hand, an embodiment of the present invention provides a secure boot method, including:

[0005] In response to the start signal, starting the management program by the device management controller of the real-time processing core;

[0006] Based on the management program, the target components are first verified step by step through the preset national secret algorithm; the target components that pass the verification are loaded and started;

[0007] Among them, the national secret algorithms include asymmetric encryption algorithms and cryptographic hash algorithms; the target components include auxiliary boot loaders, boot programs, security gateways, body control modules, target firmware of application processing cores, and hardware security modules;

[0008] The security gateway calls the data interface of the hardware security module to obtain the root of trust, and then transmits the root of trust to the application processing core;

[0009] Based on the root of trust, a second level-by-level verification is performed using a national secret algorithm through the sub-firmware in the target firmware, and the secure boot is completed in response to the result that the second level-by-level verification passes.

[0010] In some embodiments, starting a management program by a device management controller of a real-time processing core includes the following steps:

[0011] The ROM program solidified inside the chip is started through DMSC.

[0012] In some embodiments, based on the management program, a first level-by-level verification is performed on the target component using a preset national secret algorithm, including the following steps:

[0013] The security subroutine is called by the management program, and then the auxiliary boot program is verified using the national secret algorithm based on the initial verification key;

[0014] When the auxiliary boot program passes the verification, the security subroutine is called through the auxiliary boot program, and then the hardware security module is verified using the national secret algorithm based on the initial verification key;

[0015] When the hardware security module passes the verification, the data interface of the hardware security module is called to verify the boot program using the second-stage key and the national secret algorithm;

[0016] When the boot program passes the verification, the data interface is called to use the second-stage key and the national encryption algorithm to verify the target firmware of the security gateway, body control module and application processing core.

[0017] In some embodiments, during the first level-by-level verification process, the method further comprises the following steps:

[0018] When the verification of any target component fails, the start-stop process is performed.

[0019] In some embodiments, the target firmware includes a first sub-firmware and a second sub-firmware; based on the root of trust, the sub-firmware in the target firmware is used to perform a second level-by-level verification using a national secret algorithm, including the following steps:

[0020] Obtaining access rights to the target kernel based on the root of trust through the first sub-firmware;

[0021] The second sub-firmware and the target kernel use the national secret algorithm to perform the second level-by-level verification.

[0022] In some embodiments, obtaining access rights to a target kernel based on a root of trust by a first sub-firmware comprises the following steps:

[0023] Acquire the root of trust through the first sub-firmware;

[0024] A preset storage mechanism is derived through the first sub-firmware based on the root of trust, and then the access rights of the target kernel are obtained according to the root of trust.

[0025] In some embodiments, performing a second level-by-level verification using a national secret algorithm through the second sub-firmware and the target kernel includes the following steps:

[0026] The target kernel is verified by using the national secret algorithm based on the third-stage key through the second sub-firmware;

[0027] When the target kernel passes the verification, the target kernel is loaded and started through the second sub-firmware;

[0028] The target kernel verifies the preset integrity verification mechanism using the national encryption algorithm based on the fourth-stage key;

[0029] When the integrity verification mechanism passes the verification, the root file system mounted by the target kernel is verified using the integrity verification mechanism.

[0030] On the other hand, an embodiment of the present invention provides a safe startup device, including:

[0031] A first module is used to start the management program through the device management controller of the real-time processing core in response to the start signal;

[0032] The second module is used to perform a first level-by-level verification of the target component based on the management program through a preset national secret algorithm; and load and start the target component that passes the verification;

[0033] Among them, the national secret algorithms include asymmetric encryption algorithms and cryptographic hash algorithms; the target components include auxiliary boot loaders, boot programs, security gateways, body control modules, target firmware of application processing cores, and hardware security modules;

[0034] The third module is used to obtain the root of trust by calling the data interface of the hardware security module through the security gateway, and then transmit the root of trust to the application processing core;

[0035] The fourth module is used to perform a second level-by-level verification using a national secret algorithm through a sub-firmware in the target firmware based on the root of trust, and complete the secure boot in response to a verification result of passing the second level-by-level verification.

[0036] In some embodiments, the apparatus further comprises:

[0037] The fifth module is used to start and stop processing when the verification of any target component fails.

[0038] On the other hand, an embodiment of the present invention provides an electronic device, including: a processor and a memory; the memory is used to store programs; the processor executes the program to implement the above-mentioned secure boot method.

[0039] On the other hand, an embodiment of the present invention provides a computer storage medium, in which a program executable by a processor is stored. The program executable by the processor is used to implement the above-mentioned secure startup method when executed by the processor.

[0040] On the other hand, an embodiment of the present invention provides a vehicle, the vehicle including the above-mentioned safety starting device or the above-mentioned electronic device.

[0041] The embodiment of the present invention starts the management program through the device management controller of the real-time processing core in response to the start signal; based on the management program, the target component is first checked step by step through the preset national secret algorithm; the target component that passes the check is loaded and started; wherein the national secret algorithm includes an asymmetric encryption algorithm and a cryptographic hash algorithm; the target component includes an auxiliary boot loader, a boot program, a security gateway, a body control module, the target firmware of the application processing core, and a hardware security module; the trust root is obtained by calling the data interface of the hardware security module through the security gateway, and then the trust root is transmitted to the application processing core; based on the trust root, the sub-firmware in the target firmware uses the national secret algorithm to perform a second step-by-step check, and the safe start is completed in response to the result of the second step-by-step check being a pass. In the process of checking the safe start, the embodiment of the present invention uses the national secret algorithm to check step by step to ensure the authenticity and integrity of the firmware. At the same time, the use of the national secret algorithm can achieve autonomous control and reduce the dependence on conventional algorithms and equipment. The embodiment of the present invention can effectively improve the security of safe start. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] The accompanying drawings are used to provide a further understanding of the technical solution of the present invention and constitute a part of the specification. Together with the embodiments of the present invention, they are used to explain the technical solution of the present invention and do not constitute a limitation on the technical solution of the present invention.

[0043] Figure 1 This is a schematic diagram of an implementation environment for secure startup provided by an embodiment of the present invention;

[0044] Figure 2 It is a flowchart of a secure startup method provided by an embodiment of the present invention;

[0045] Figure 3 A schematic diagram of the first step-by-step verification process provided by an embodiment of the present invention;

[0046] Figure 4 A schematic diagram of an extended process of the secure startup method provided by an embodiment of the present invention;

[0047] Figure 5 A schematic diagram of the expansion process of the second step-by-step verification provided by an embodiment of the present invention;

[0048] Figure 6 A schematic diagram of an expanded flow of obtaining access rights to a target kernel provided by an embodiment of the present invention;

[0049] Figure 7 A schematic diagram of an expanded flow of performing a second level-by-level check by a second sub-firmware and a target kernel according to an embodiment of the present invention;

[0050] Figure 8A schematic diagram of the overall process of the secure startup method provided by an embodiment of the present invention;

[0051] Fig. 9 A schematic diagram of the structure of a safety starting device provided by an embodiment of the present invention;

[0052] Fig.10 A schematic diagram of the structure of an electronic device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0053] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0054] It should be noted that, although the functional modules are divided in the system schematic diagram and the logical order is shown in the flow chart, in some cases, the steps shown or described may be performed in a different order than the module division in the system or the order in the flow chart. The terms "first / S100", "second / S200", etc. in the specification, claims and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence.

[0055] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present invention. The appearance of the phrase in various places in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0056] To facilitate the understanding of the technical solution of the present invention, the proprietary technical terms that may be applied in the technical solution of the present invention are first explained:

[0057] 1) SM2, asymmetric encryption algorithm, public key cryptographic algorithm standard based on elliptic curve cryptography, with a key length of 256 bits;

[0058] 2) SM3, cryptographic hash algorithm, is an improved algorithm based on SHA-256, and the output digest value length is 256 bits;

[0059] 3) SM4, block encryption algorithm, a block symmetric encryption algorithm independently designed by my country, used to replace international algorithms such as DES / AES;

[0060] 4) DMSC ROM, the ROM program inside DMSC, which is invisible to developers and is fixed inside the chip when it leaves the factory. DMSC refers to One Device Management and Security Controller, which provides control over device startup sequence, device management, power management, and security;

[0061] 5) SBL / uSBL, Secondary bootloader, can configure peripheral devices, such as DDR, and can load and start other cores;

[0062] 6)KEY_BOOTMAC_OEM_ROOT, secure boot checks the initial check nodes step by step, ROM checks the SBL / DMSC firmware (vHSM) signature, uses the SM2+SM3 algorithm, and is stored in the DMSC OTP;

[0063] 7)KEY_BOOTMAC_OEM_STEPRCORE, the second stage of secure boot verification, DMSC firmware (vHSM) verifies R core firmware, verifies A core ATF&TEE OS&SPL&UBOOT signature, uses SM2+SM3 algorithm, and is stored in DMSC OTP;

[0064] 8)KEY_BOOTMAC_OEM_STEPACORE, the third stage of secure boot step-by-step verification, UBOOT verifies the kernel signature, uses the SM2+SM3 algorithm, and is stored in Uboot;

[0065] 9)KEY_BOOTMAC_OEM_STEPROOTFS, the fourth stage of secure boot level-by-level verification, the kernel (orUBoot) verifies the root file system ROOTHASH signature (DM-Verity mechanism), using the SM2+SM3 algorithm, and stored in the kernel;

[0066] 10) KEY_RPMBMAC_TEE, A core TEE uses the EMMC RPMB partition to protect data integrity (the initial condition is that the EMMC RPMB OTP and TEE use the same key), using SM3-MAC, stored in the EMMC OTP;

[0067] 11)KEY_SecureStorage_TEE, A core TEE encrypted storage data, using SM4 algorithm, stored in RAM;

[0068] 12) DM-verity is an integrity verification mechanism that verifies the integrity of the system partition by creating a read-only verification area on the device partition. When the device starts, the system checks whether the hash value of each data block matches the verification table record. If it does not match, an alarm is triggered or the startup is blocked. Its main purpose is to prevent malicious tampering and ensure system security. This mechanism can effectively detect and respond to unauthorized system modifications.

[0069] 13) CB, customer Bootloader, customer customized bootloader;

[0070] 14)GAW, gateway, security gateway;

[0071] 15) BCM, body control module, is responsible for monitoring and controlling vehicle functions such as door locks, windows, lights, etc., and ensuring the integrity and security of these systems during the TDA4 secure boot process to prevent malicious attacks and unauthorized access.

[0072] 16)TEE, Trusted Execution Environment;

[0073] 17) HSM is a hardware security module, which is a secure hardware used to store, process and manage sensitive data;

[0074] 18) RPMB (Replay Protected Memory Block) is a storage mechanism used to protect the integrity and authenticity of data in embedded systems. RPMB provides a secure storage method that prevents data from being tampered with or replayed;

[0075] 19) IPC (Inter-Process Communication) is a mechanism used to transfer information and data between different processes;

[0076] 20) R core usually refers to the real-time processing core, which is mainly responsible for processing tasks with high real-time requirements, such as sensor data processing, control algorithms, etc. R cores usually have high performance and response speed to meet the needs of real-time systems. R cores are mainly responsible for initializing and verifying the underlying hardware components to ensure their integrity and correctness.

[0077] 21) A core refers to the application processing core, which is mainly responsible for running the operating system, applications and advanced software functions. The A core usually has strong computing power and processing performance to support complex applications and algorithms. The A core is responsible for loading and running operating systems, applications and advanced software components such as TEE (Trusted Execution Environment);

[0078] It is understandable that the secure startup method provided in the embodiment of the present invention can be applied to any computer device with data processing computing capabilities, and this computer device can be various types of terminals or servers. When the computer device in the embodiment is a server, the server is an independent physical server, or a server cluster or distributed system composed of multiple physical servers, or a cloud server that provides basic cloud computing services such as cloud services, cloud databases, cloud computing, cloud functions, cloud storage, network services, cloud communications, middleware services, domain name services, security services, CDN (Content Delivery Network), and big data and artificial intelligence platforms. In some embodiments, the terminal is a smart phone, a tablet computer, a laptop computer, and a desktop computer, but is not limited to this.

[0079] like Figure 1 FIG. 1 is a schematic diagram of an implementation environment provided by an embodiment of the present invention. Figure 1 The implementation environment includes at least one terminal 102 and a server 101. The terminal 102 and the server 101 can be connected to a network wirelessly or wired to complete data transmission and exchange.

[0080] Server 101 can be an independent physical server, or a server cluster or distributed system composed of multiple physical servers. It can also be a cloud server that provides basic cloud computing services such as cloud services, cloud databases, cloud computing, cloud functions, cloud storage, network services, cloud communications, middleware services, domain name services, security services, CDN (Content Delivery Network), as well as big data and artificial intelligence platforms.

[0081] In addition, the server 101 can also be a node server in the blockchain network. Blockchain is a new application model of computer technologies such as distributed data storage, peer-to-peer transmission, consensus mechanism, and encryption algorithm.

[0082] The terminal 102 may be a smart phone, a tablet computer, a laptop computer, a desktop computer, a smart speaker, a smart watch, etc. The terminal 102 may also be a vehicle-mounted terminal of various device types described above, but is not limited thereto. The terminal 102 and the server 101 may be directly or indirectly connected via wired or wireless communication, which is not limited in this embodiment of the present invention.

[0083] Based on the example Figure 1 In the implementation environment shown, an embodiment of the present invention provides a secure boot method, which is described below using the secure boot method applied in the server 101 as an example. It can be understood that the secure boot method can also be applied in the terminal 102.

[0084] Reference Figure 2 , Figure 2 The flowchart of the secure boot method applied to the server provided by the embodiment of the present invention, the execution subject of the secure boot method can be any of the aforementioned computer devices (including servers or terminals). Figure 2 , the method comprises the following steps:

[0085] S100, in response to a start signal, starting a management program through a device management controller of a real-time processing core;

[0086] It should be noted that, in some embodiments, starting the management program through the device management controller of the real-time processing core may include the following steps: starting the ROM program solidified inside the chip through the DMSC.

[0087] Exemplarily, in some specific implementations, the DMSC may initially start the ROM; wherein the DMSC ROM is the first program to be run after power-on, and its main functions are as follows: configure the watchdog, PLL clock, configure the firewall based on the startup mode, configure the MCU security agent, ring accelerator, and send a message to the R core of the MCU domain to inform it of the startup mode.

[0088] S200, based on the management program, the target components are first verified step by step by using a preset national secret algorithm; the target components that pass the verification are loaded and started;

[0089] Among them, the national secret algorithms include asymmetric encryption algorithms and cryptographic hash algorithms; the target components include auxiliary boot loaders, boot programs, security gateways, body control modules, target firmware of application processing cores, and hardware security modules;

[0090] It should be noted that if Figure 3As shown, in some embodiments, based on the management program, a first step-by-step verification of the target component is performed through a preset national secret algorithm, which may include the following steps: S201, calling the security subroutine through the management program, and then verifying the auxiliary boot program based on the initial verification key using the national secret algorithm; S202, when the verification of the auxiliary boot program passes, calling the security subroutine through the auxiliary boot program, and then verifying the hardware security module based on the initial verification key using the national secret algorithm; S203, when the verification of the hardware security module passes, calling the data interface of the hardware security module to use the second-stage key and the national secret algorithm to verify the boot program; S204, when the verification of the boot program passes, calling the data interface to use the second-stage key and the national secret algorithm to verify the target firmware of the security gateway, body control module and application processing core.

[0091] For example, in some specific implementations, the first level-by-level verification may be implemented through the following process:

[0092] 1. ROM calls SecureROM (security subroutine example) to verify uSBL (secondary boot loader example), the verification algorithm is SM2+SM3, and the key KEY_BOOTMAC_OEM_ROOT (initial verification key example) is used;

[0093] 2. uSBL calls SecureROM to verify the HSM (hardware security module example) firmware, using the SM2+SM3 algorithm, and verifies that the HSM is loaded and running, using the key KEY_BOOTMAC_OEM_ROOT;

[0094] 3. uSBL verifies CB (bootloader example), uses SM2+SM3 algorithm, verifies calling vHSM interface (data interface example) using key KEY_BOOTMAC_OEM_STEPRCORE (second node key example), and verifies that CB is loaded and run;

[0095] 4.1.CB verifies GAW (security gateway example), uses SM2+SM3 algorithm, verifies calling vHSM interface using key KEY_BOOTMAC_OEM_STEPRCORE, and verifies that GAW is loaded by passing;

[0096] 4.2.CB verifies BCM (body control module example), uses SM2+SM3 algorithm, verifies calling vHSM interface using key KEY_BOOTMAC_OEM_STEPRCORE, and verifies loading BCM;

[0097] 5.CB verifies ATF+TEE+SPL+UBOOT firmware (target firmware example), uses SM2+SM3 algorithms, verifies calling vHSM using KEY_BOOTMAC_OEM_STEPRCORE, and verifies that ATF+TEE+SPL+UBOOT firmware is loaded and run.

[0098] Among them, in some embodiments, such as Figure 4 As shown, in the first step-by-step verification process, the method may further include the following steps: S500, when the verification of any target component fails, start-stop processing is performed.

[0099] S300, calling the data interface of the hardware security module through the security gateway to obtain the root of trust, and then transmitting the root of trust to the application processing core;

[0100] Exemplarily, in some specific implementations, the KEK (32-byte root of trust) can be obtained by GAW calling the HSM interface; then, GAW transfers the KEK to the A core, the KEK transfer requires security, IPC uses memory, and access control permissions can only be obtained during the startup process.

[0101] S400. Based on the root of trust, a second level-by-level verification is performed by using a national secret algorithm through the sub-firmware in the target firmware, and a secure boot is completed in response to a verification result of passing the second level-by-level verification.

[0102] It should be noted that the target firmware includes a first sub-firmware and a second sub-firmware; in some embodiments, such as Figure 5 As shown, based on the root of trust, a second level-by-level verification is performed through the sub-firmware in the target firmware using the national secret algorithm, which can include the following steps: S410, obtaining access rights to the target kernel based on the root of trust through the first sub-firmware; S420, performing a second level-by-level verification through the second sub-firmware and the target kernel using the national secret algorithm.

[0103] Among them, in some embodiments, such as Figure 6 As shown, obtaining access rights to the target kernel based on a trusted root through the first sub-firmware may include the following steps: S411, obtaining the trusted root through the first sub-firmware; S412, deriving a preset storage mechanism based on the trusted root through the first sub-firmware, and then obtaining access rights to the target kernel based on the trusted root.

[0104] Among them, in some embodiments, such as Figure 7As shown, the second step-by-step verification using the national secret algorithm through the second sub-firmware and the target kernel can include the following steps: S421, verifying the target kernel based on the third stage key using the national secret algorithm through the second sub-firmware; S422, when the verification of the target kernel passes, loading and starting the target kernel through the second sub-firmware; S423, verifying the preset integrity verification mechanism through the target kernel based on the fourth stage key using the national secret algorithm; S424, when the verification of the integrity verification mechanism passes, using the integrity verification mechanism to verify the root file system mounted on the target kernel.

[0105] For example, in some specific implementations, the second level-by-level verification may be implemented by the following process:

[0106] 1. TEE (first sub-firmware example) obtains KEK (GAW transfers KEK to A core TEE), TEE uses KEK to derive KEY_RPMBMAC_TEE (RPMB storage mechanism) and KEY_SecureStorage_TEE (TEE software storage mechanism), which are stored in TEE memory and managed by TEE. KEK controls access rights and controls Kernel (target kernel example);

[0107] 2. After the Uboot (second sub-firmware example) verified by the target firmware in the first step-by-step verification is started, Uboot verifies the Kernel, uses the SM2+SM3 algorithm, verifies and calls the Uboot built-in algorithm, and the key is KEY_BOOTMAC_OEM_STEPACORE (third stage key example);

[0108] 3.Uboot loads and starts the kernel;

[0109] 4. Kernel verifies RootHASH in the DM-Verity mechanism (integrity verification mechanism example), using the SM2+SM3 algorithm and the key KEY_BOOTMAC_OEM_STEPROOTFS (stage 4 key example);

[0110] 5: The kernel mounts the root file system and uses the DM-Verity mechanism to verify the root file system during operation.

[0111] In order to explain the principle of the technical solution of the present invention in detail, the overall process of the present invention is described below in combination with some specific embodiments. It is easy to understand that the following is an explanation of the technical principle of the present invention and cannot be regarded as a limitation of the present invention.

[0112] First of all, it should be noted that the RSA algorithm is a powerful asymmetric encryption algorithm that relies on the pairing of public and private keys to achieve secure encryption and decryption of data. Its security is based on complex factorization mathematical problems, so it was considered to be highly secure in the past. However, with the rapid increase in computing power and the continuous advancement of technology, the RSA algorithm is facing some new challenges. On the one hand, the shorter key length is no longer able to withstand modern attack methods, so it is necessary to continuously increase the key length to improve security, which undoubtedly increases the complexity and cost of the algorithm. On the other hand, the RSA algorithm has a large amount of computation in the encryption and decryption process, which may constitute a performance bottleneck in an environment with limited resources.

[0113] The SHA algorithm is a hash algorithm widely used in fields such as data integrity verification and digital signature. It generates a hash value of fixed length by performing a hash operation on the input data, thereby ensuring the integrity and authenticity of the data. However, in recent years, attack methods against the SHA algorithm have continued to emerge, such as collision attacks, which pose a certain threat to its security.

[0114] In summary, although RSA and SHA algorithms play an important role in protecting the network security of intelligent connected vehicles, they also face some challenges and limitations. Therefore, it is necessary to continuously explore new technologies and methods to better protect the network security of intelligent connected vehicles.

[0115] In some specific application scenarios, in order to ensure the security of commercial encryption, there are a series of cryptographic standards for the national encryption algorithm, including: SM1, SM2, SM3, SM4, etc. Among them, SM1 and SM4 are symmetric algorithms, SM2 is an asymmetric algorithm, and SM3 is a hash algorithm. The use of the national encryption algorithm has the following advantages: 1. High security: The encryption algorithm and key management method used by the national encryption algorithm have undergone rigorous security evaluation and testing, and the security performance is higher than some foreign encryption algorithms. For example, SM2 (national encryption elliptic curve algorithm) and SM4 (national encryption block cipher algorithm) have passed the security evaluation and certification of the International Security Standards Organization ISO. 2. Strong controllability: The national encryption algorithm is independently designed and developed by the country and has high controllability. For some key application scenarios, it is necessary to adopt domestic encryption algorithms to ensure national security and the security of important information; the use of national encryption algorithms can achieve independent control and reduce dependence on conventional algorithms and equipment.

[0116] In view of this, during the verification process of secure boot, the authenticity and integrity of the firmware are guaranteed by using signature verification step by step. Figure 8 The specific application process of the embodiment of the present invention is as follows:

[0117] For R core:

[0118] 1. The ROM is initially started by DMSC;

[0119] 2. ROM calls SecureROM to verify uSBL (secondary boot loader), the verification algorithm is SM2+SM3, and the key KEY_BOOTMAC_OEM_ROOT (initial verification node) is used;

[0120] 3. uSBL calls SecureROM to verify the HSM (Hardware Security Module) firmware, using the SM2+SM3 algorithm, and verifies that the HSM is loaded and running, using the key KEY_BOOTMAC_OEM_ROOT (initial verification node);

[0121] 4. uSBL verifies CB (bootloader), uses SM2+SM3 algorithm, verifies calling vHSM interface using key KEY_BOOTMAC_OEM_STEPRCORE, and verifies that CB is loaded and run;

[0122] 5.1.CB verifies GAW, using SM2+SM3 algorithm, verifies calling vHSM interface using key KEY_BOOTMAC_OEM_STEPRCORE, and verifies that GAW is loaded after passing;

[0123] 5.2.CB verifies BCM (body control module), using SM2+SM3 algorithm, verifies calling vHSM interface using key KEY_BOOTMAC_OEM_STEPRCORE, and after verification, loads BCM;

[0124] 6.CB verifies ATF+TEE+SPL+UBOOT firmware, uses SM2+SM3 algorithm, verifies calling vHSM using KEY_BOOTMAC_OEM_STEPRCORE, and verifies that ATF+TEE+SPL+UBOOT firmware is loaded and run;

[0125] 7.GAW calls the HSM interface to obtain KEK (32-byte root of trust);

[0126] 8.GAW transfers KEK to A core TEE. KEK transfer requires security. IPC uses memory, and access control permissions can only be obtained during the startup process.

[0127] For A core:

[0128] 9. TEE obtains KEK, and TEE uses KEK to derive KEY_RPMBMAC_TEE (RPMB storage mechanism) and KEY_SecureStorage_TEE (TEE software storage mechanism), which are stored in TEE memory and managed by TEE. KEK controls access rights and prevents Kernel and applications from obtaining them.

[0129] 10. After Uboot is started after verification in step 6, Uboot verifies the Kernel, uses the SM2+SM3 algorithm, verifies and calls the Uboot built-in algorithm, and the key is KEY_BOOTMAC_OEM_STEPACORE;

[0130] 11.Uboot loads and starts the kernel;

[0131] 12. Kernel verifies RootHASH in the DM-Verity mechanism, using the SM2+SM3 algorithm and the key KEY_BOOTMAC_OEM_STEPROOTFS;

[0132] 13, 14: The kernel mounts the root file system and uses the DM-Verity mechanism to verify the root file system during operation.

[0133] In summary, during the process of secure startup verification, the present invention uses the national secret algorithm to perform step-by-step verification to ensure the authenticity and integrity of the firmware. At the same time, the security requirements for key storage also ensure the security of the key. The signature verification algorithm of the scheme of the present invention all uses the national secret algorithm, which has the characteristics of high security and strong controllability.

[0134] On the other hand, Fig. 9 As shown, an embodiment of the present invention provides a safe starting device 900, which may include:

[0135] The first module 901 is used to start the management program through the device management controller of the real-time processing core in response to the start signal;

[0136] The second module 902 is used to perform a first level-by-level verification on the target component based on the management program using a preset national secret algorithm; and load and start the target component that passes the verification;

[0137] Among them, the national secret algorithms include asymmetric encryption algorithms and cryptographic hash algorithms; the target components include auxiliary boot loaders, boot programs, security gateways, body control modules, target firmware of application processing cores, and hardware security modules;

[0138] The third module 903 is used to obtain the root of trust by calling the data interface of the hardware security module through the security gateway, and then transmit the root of trust to the application processing core;

[0139] The fourth module 904 is used to perform a second level-by-level verification using a national encryption algorithm through a sub-firmware in the target firmware based on the root of trust, and complete the secure boot in response to a verification passing result of the second level-by-level verification.

[0140] In some embodiments, the apparatus may further include:

[0141] The fifth module is used to start and stop processing when the verification of any target component fails.

[0142] The contents of the method embodiments of the present invention are all applicable to the device embodiments. The functions specifically implemented by the device embodiments are the same as those of the above method embodiments, and the beneficial effects achieved are also the same as those achieved by the above method embodiments.

[0143] On the other hand, an embodiment of the present invention further provides an electronic device, the electronic device comprising a memory and a processor, the memory storing a computer program, and the processor implementing the above-mentioned secure startup method when executing the computer program. The electronic device can be any intelligent terminal including a tablet computer, a vehicle-mounted computer, etc.

[0144] It can be understood that the contents of the above method embodiments are all applicable to the present device embodiments, the functions specifically implemented by the present device embodiments are the same as those of the above method embodiments, and the beneficial effects achieved are also the same as those achieved by the above method embodiments.

[0145] like Fig.10 As shown, Fig.10 The hardware structure of an electronic device 1000 of another embodiment is illustrated. The electronic device 1000 includes:

[0146] The processor 1001 may be implemented by a general-purpose CPU (Central Processing Unit), a microprocessor, an application-specific integrated circuit (ASIC), or one or more integrated circuits, and is used to execute relevant programs to implement the technical solutions provided in the embodiments of the present invention.

[0147] The memory 1002 can be implemented in the form of a read-only memory (ROM), a static storage device, a dynamic storage device, or a random access memory (RAM). The memory 1002 can store an operating system and other application programs. When the technical solution provided in the embodiment of this specification is implemented by software or firmware, the relevant program code is stored in the memory 1002, and the processor 1001 calls and executes the network node population optimization method of the embodiment of the present invention;

[0148] Input / output interface 1003, used to implement information input and output;

[0149] The communication interface 1004 is used to realize the communication interaction between the device and other devices. The communication can be realized through a wired manner (such as USB, network cable, etc.) or a wireless manner (such as mobile network, WIFI, Bluetooth, etc.);

[0150] A bus 1005 , which transmits information between various components of the device (e.g., the processor 1001 , the memory 1002 , the input / output interface 1003 , and the communication interface 1004 );

[0151] The processor 1001 , the memory 1002 , the input / output interface 1003 and the communication interface 1004 are connected to each other in communication within the device via the bus 1005 .

[0152] The electronic device embodiments described above are merely illustrative, and the units described as separate components may or may not be physically separated, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0153] The contents of the method embodiments of the present invention are all applicable to the electronic device embodiments. The functions specifically implemented by the electronic device embodiments are the same as those of the above method embodiments, and the beneficial effects achieved are also the same as those achieved by the above method embodiments.

[0154] Another aspect of an embodiment of the present invention further provides a computer-readable storage medium, wherein the storage medium stores a program, and the program is executed by a processor to implement the above method.

[0155] It should be noted that the computer-readable medium shown in the embodiment of the present invention may be a computer-readable signal medium or a computer-readable storage medium or any combination of the above two. The computer-readable storage medium may be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, device or device, or any combination of the above. More specific examples of computer-readable storage media may include, but are not limited to: an electrical connection with one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM), a flash memory, an optical fiber, a portable compact disk read-only memory (Compact Disc Read to Only Memory, CD to ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above. In the present invention, a computer-readable storage medium may be any tangible medium containing or storing a program, which may be used by or in combination with an instruction execution system, device or device. In the present invention, a computer-readable signal medium may include a data signal propagated in a baseband or as part of a carrier wave, which carries a computer-readable program code. Such propagated data signals may take a variety of forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination of the above. Computer readable signal media may also be any computer readable medium other than computer readable storage media, which may send, propagate, or transmit programs for use by or in conjunction with an instruction execution system, apparatus, or device. The program code contained on the computer readable medium may be transmitted using any suitable medium, including but not limited to: wireless, wired, etc., or any suitable combination of the above.

[0156] The contents of the method embodiments of the present invention are all applicable to the computer-readable storage medium embodiments. The functions specifically implemented by the computer-readable storage medium embodiments are the same as those of the above method embodiments, and the beneficial effects achieved are also the same as those achieved by the above method embodiments.

[0157] The embodiment of the present invention also discloses a computer program product or a computer program, which includes a computer instruction stored in a computer-readable storage medium. A processor of a computer device can read the computer instruction from the computer-readable storage medium, and the processor executes the computer instruction, so that the computer device executes the above method.

[0158] The flow chart and block diagram in the accompanying drawings illustrate the possible architecture, function and operation of the system, method and computer program product according to various embodiments of the present invention. In this regard, each box in the flow chart or block diagram can represent a module, a program segment, or a part of a code, and the above-mentioned module, program segment, or a part of a code contains one or more executable instructions for realizing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the box can also occur in a different order from the order marked in the accompanying drawings. For example, two boxes represented in succession can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram or flow chart, and the combination of the boxes in the block diagram or flow chart can be implemented with a dedicated hardware-based system that performs a specified function or operation, or can be implemented with a combination of dedicated hardware and computer instructions.

[0159] It should be noted that, although several modules of the device for action execution are mentioned in the above detailed description, this division is not mandatory. In fact, according to an embodiment of the present invention, the features and functions of two or more modules or units described above can be embodied in one module or unit. On the contrary, the features and functions of one module or unit described above can be further divided into being embodied by multiple modules or units.

[0160] Through the description of the above implementation, it is easy for those skilled in the art to understand that the example implementation described here can be implemented by software, or by software combined with necessary hardware. Therefore, the technical solution according to the implementation of the present invention can be embodied in the form of a software product, which can be stored in a non-volatile storage medium (which can be a CD to ROM, a USB flash drive, a mobile hard disk, etc.) or on a network, including several instructions to enable a computing device (which can be a personal computer, a server, a touch terminal, or a network device, etc.) to execute the method according to the implementation of the present invention.

[0161] In some selectable embodiments, the function / operation mentioned in the block diagram may not occur in the order mentioned in the operation diagram. For example, depending on the function / operation involved, the two boxes shown in succession can actually be executed substantially simultaneously or the boxes can sometimes be executed in reverse order. In addition, the embodiment presented and described in the flow chart of the present invention is provided by way of example, for the purpose of providing a more comprehensive understanding of technology. The disclosed method is not limited to the operation and logic flow presented herein. Selectable embodiments are expected, wherein the order of various operations is changed and the sub-operation of a part for which is described as a larger operation is performed independently.

[0162] In addition, although the present invention is described in the context of functional modules, it should be understood that, unless otherwise specified, one or more of the functions and / or features can be integrated into a single physical device and / or software module, or one or more functions and / or features can be implemented in a separate physical device or software module. It is also understood that a detailed discussion of the actual implementation of each module is unnecessary for understanding the present invention. More specifically, in view of the properties, functions and internal relationships of the various functional modules in the device disclosed herein, the actual implementation of the module will be understood within the conventional skills of the engineer. Therefore, those skilled in the art can implement the present invention set forth in the claims without excessive experimentation using ordinary techniques. It is also understood that the specific concepts disclosed are merely illustrative and are not intended to limit the scope of the present invention, which is determined by the full scope of the appended claims and their equivalents.

[0163] If the function is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium, including several instructions for a computer device (which can be a personal computer, server, or network device, etc.) to perform all or part of the steps of the methods of each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk, etc. Various media that can store program codes.

[0164] The logic and / or steps represented in the flowchart or otherwise described herein, for example, may be considered as an ordered list of executable instructions for implementing logical functions, and may be embodied in any computer-readable medium for use by an instruction execution device, apparatus or device (such as a computer-based device, a device including a processor, or other device that can fetch instructions from an instruction execution device, apparatus or device and execute the instructions), or in conjunction with such instruction execution device, apparatus or device. For purposes of this specification, "computer-readable medium" may be any device that can contain, store, communicate, propagate or transmit a program for use by an instruction execution device, apparatus or device, or in conjunction with such instruction execution device, apparatus or device.

[0165] More specific examples of computer-readable media (a non-exhaustive list) include the following: an electrical connection with one or more wires (electronic device), a portable computer disk case (magnetic device), a random access memory (RAM), a read-only memory (ROM), an erasable and programmable read-only memory (EPROM or flash memory), a fiber optic device, and a portable compact disk read-only memory (CDROM). In addition, the computer-readable medium may even be a paper or other suitable medium on which the program is printed, since the program may be obtained electronically, for example, by optically scanning the paper or other medium, followed by editing, deciphering or, if necessary, processing in another suitable manner, and then stored in a computer memory.

[0166] It should be understood that the various parts of the present invention can be implemented by hardware, software, firmware or a combination thereof. In the above-mentioned embodiments, a plurality of steps or methods can be implemented by software or firmware stored in a memory and executed by a suitable instruction execution device. For example, if implemented by hardware, as in another embodiment, it can be implemented by any one of the following technologies known in the art or their combination: a discrete logic circuit having a logic gate circuit for implementing a logic function for a data signal, a dedicated integrated circuit having a suitable combination of logic gate circuits, a programmable gate array (PGA), a field programmable gate array (FPGA), etc.

[0167] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0168] Although the embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the claims and their equivalents.

[0169] The above is a specific description of the preferred implementation of the present invention, but the present invention is not limited to the embodiments. Those skilled in the art can make various equivalent modifications or substitutions without violating the spirit of the present invention. These equivalent modifications or substitutions are all included in the scope defined by the claims of the present invention.

Claims

1. A secure boot method, characterized in that: The following steps are involved: In response to the start signal, starting the management program by the device management controller of the real-time processing core; Based on the management program, a first level-by-level verification is performed on the target component through a preset national secret algorithm; Loading and starting the target component that has passed the verification; Among them, the national secret algorithm includes an asymmetric encryption algorithm and a cryptographic hash algorithm; the target components include an auxiliary boot loader, a boot program, a security gateway, a body control module, a target firmware of the application processing core, and a hardware security module; The security gateway calls the data interface of the hardware security module to obtain a root of trust, and then transmits the root of trust to the application processing core; Based on the trust root, a second step-by-step verification is performed by the sub-firmware in the target firmware using the national secret algorithm, and a secure boot is completed in response to a result that the second step-by-step verification passes.

2. The secure boot method according to claim 1, characterized in that: The method of starting the management program through the device management controller of the real-time processing core includes the following steps: The ROM program solidified inside the chip is started through DMSC.

3. The secure boot method according to claim 1, characterized in that: Based on the management program, the target component is first verified step by step by using a preset national secret algorithm, including the following steps: Calling a security subroutine through the management program, and then verifying the auxiliary boot program using the national secret algorithm based on an initial verification key; When the verification of the auxiliary boot program passes, the security subroutine is called by the auxiliary boot program, and then the hardware security module is verified using the national secret algorithm based on the initial verification key; When the verification of the hardware security module passes, calling the data interface of the hardware security module to verify the boot program using the second stage key and the national secret algorithm; When the verification of the boot program passes, the data interface is called to use the second stage key and the national secret algorithm to verify the target firmware of the security gateway, the body control module and the application processing core.

4. The secure boot method according to claim 1, characterized in that: In the process of the first step-by-step verification, the method further comprises the following steps: When the verification of any of the target components fails, the start-stop process is performed.

5. The secure boot method according to claim 1, characterized in that: The target firmware includes a first sub-firmware and a second sub-firmware; and based on the root of trust, performing a second level-by-level verification using the national secret algorithm through the sub-firmware in the target firmware includes the following steps: Obtaining access rights to a target kernel based on the root of trust through the first sub-firmware; The second step-by-step verification is performed by using the national secret algorithm through the second sub-firmware and the target kernel.

6. The secure boot method according to claim 5, characterized in that: The obtaining the access right of the target kernel based on the trusted root through the first sub-firmware comprises the following steps: Acquire the root of trust through the first sub-firmware; A preset storage mechanism is derived through the first sub-firmware based on the trusted root, and access rights to the target kernel are obtained according to the trusted root.

7. The secure boot method according to claim 5, characterized in that: The step of performing the second level-by-level verification by using the national secret algorithm through the second sub-firmware and the target kernel comprises the following steps: Verifying the target kernel by using the national secret algorithm based on the third stage key through the second sub-firmware; When the target kernel passes the verification, loading and starting the target kernel through the second sub-firmware; Verifying the preset integrity verification mechanism by using the national secret algorithm based on the fourth stage key through the target kernel; When the verification of the integrity verification mechanism passes, the root file system mounted by the target kernel is verified using the integrity verification mechanism.

8. A safety starting device, characterized in that: include: A first module is used to start the management program through the device management controller of the real-time processing core in response to the start signal; The second module is used to perform a first level-by-level verification on the target component based on the management program through a preset national secret algorithm; Loading and starting the target component that has passed the verification; Among them, the national secret algorithm includes an asymmetric encryption algorithm and a cryptographic hash algorithm; the target components include an auxiliary boot loader, a boot program, a security gateway, a body control module, a target firmware of the application processing core, and a hardware security module; A third module is used to obtain a root of trust by calling the data interface of the hardware security module through the security gateway, and then transmit the root of trust to the application processing core; The fourth module is used to perform a second step-by-step verification based on the trust root by using the national encryption algorithm through the sub-firmware in the target firmware, and complete the secure boot in response to the result that the second step-by-step verification passes.

9. An electronic device, characterized in that: including a processor and a memory; The memory is used to store programs; The processor executes the program to implement the method according to any one of claims 1 to 7.

10. A vehicle, characterized in that: The vehicle includes the safety starting device according to claim 8 or the electronic device according to claim 9.

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