Amplification circuit and communication device

Abstract

An amplifier circuit (1) is provided with: a low-noise amplifier (11) that amplifies a high-frequency signal; a switching circuit (30) connected between the low noise amplifier (11) and the antenna connection terminal (100); and a bias circuit (61) that supplies a DC bias voltage to the low noise amplifier (11), the switching circuit (30) having: a terminal (30a) connected to the low noise amplifier (11) and a terminal (30c) connected to the antenna connection terminal; and a transistor (31) that has a gate terminal (g1) and a p-type first substrate, and that switches the connection and disconnection between the terminal (30a) and the terminal (30c) on the basis of a voltage applied to the gate terminal (g1), and the bias circuit (61) is DC-connected to the terminal (30a) and the first substrate.

Description

Technical Field

[0001] The present invention relates to an amplifier circuit and a communication device for amplifying a high-frequency signal. Background Art

[0002] Patent document 1 discloses a front-end circuit that switches and transmits high-frequency signals of multiple frequency bands. In the front-end circuit, an antenna switch, multiple filters corresponding to multiple frequency bands, a semiconductor switch (LNA switch) that switches the connection and non-connection between a low-noise amplifier (LNA) and the multiple filters, and a low-noise amplifier are sequentially arranged. Thus, the transmission and non-transmission of high-frequency signals of any frequency band can be controlled.

[0003] Patent Document 1: U.S. Patent Application Publication No. 2020 / 0343933

[0004] However, in the front-end circuit (amplifier circuit) disclosed in Patent Document 1, there is a case where the transmission loss increases due to the on-resistance of the semiconductor switch when the high-frequency signal is transmitted, or the off-leakage current of the semiconductor switch flows when the high-frequency signal is not transmitted. In contrast, it is assumed that an additional circuit for reducing the on-resistance and the off-leakage current of the semiconductor switch is configured, but this leads to an increase in the size of the amplifier circuit. Summary of the invention

[0005] Therefore, the present invention has been made to solve the above-mentioned problems, and an object of the present invention is to provide a small amplifier circuit and a communication device capable of transmitting a high-frequency signal with low loss.

[0006] In order to achieve the above-mentioned purpose, an amplifier circuit of a technical solution of the present invention comprises: a first input terminal for inputting a high-frequency signal; an amplifier for amplifying the high-frequency signal; a switching circuit connected between the amplifier and the first input terminal; and a bias circuit for supplying a DC bias voltage to the amplifier, wherein the switching circuit comprises: a first terminal connected to the amplifier and a second terminal connected to the first input terminal; and a first switch comprising a transistor having a first control terminal and a first substrate of a first conductivity type, which switches the connection and non-connection between the first terminal and the second terminal based on a voltage applied to the first control terminal, and the bias circuit is DC-connected to the first terminal and the first substrate.

[0007] According to the present invention, a small amplifier circuit and a communication device capable of transmitting a high-frequency signal with low loss can be provided. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Figure 1 It is a circuit configuration diagram of an amplifier circuit and a communication device according to an embodiment.

[0009] Figure 2AIt is a diagram showing a part of the circuit configuration of a switching circuit and a peripheral circuit according to an embodiment.

[0010] Figure 2B It is a schematic cross-sectional view of a transistor constituting a switch circuit according to an embodiment.

[0011] Figure 3 It is a diagram showing a part of the circuit configuration of a switching circuit and a peripheral circuit of a comparative example.

[0012] Figure 4 It is a diagram showing a part of the circuit configuration of a switching circuit and a peripheral circuit according to a modified example.

[0013] Figure 5 It is a diagram showing a circuit state of a switch circuit and a peripheral circuit during signal transmission according to a modified example. DETAILED DESCRIPTION

[0014] Hereinafter, the embodiments of the present invention will be described in detail. It should be noted that the embodiments described below all represent general or specific examples. The numerical values, shapes, materials, constituent elements, configurations of constituent elements, and connection methods shown in the following embodiments are examples and do not limit the subject matter of the present invention. The constituent elements in the following embodiments and modified examples that are not recorded in the independent claims are described as arbitrary structural elements. In addition, the sizes or size ratios of the constituent elements shown in the drawings are not necessarily strict. In each figure, the same figure mark is marked for substantially the same structure, and repeated descriptions are sometimes omitted or simplified.

[0015] In the following, terms such as parallel and perpendicular indicating the relationship between elements, terms such as rectangular indicating the shape of an element, and numerical ranges do not only have strict meanings but also mean substantially equivalent ranges including, for example, a difference of about several %.

[0016] In addition, in the following embodiments, the definition of "A and B are connected" not only means that A and B are in contact, but also includes the case where A and B are electrically connected via a conductor electrode, a conductor terminal, a wiring, or other circuit components. In addition, "connected between A and B" means that A and B are connected to both A and B.

[0017] In addition, in the present disclosure, “component A is arranged in series on path B” means that both the signal input end and the signal output end of component A are connected to wiring, electrodes, or terminals constituting path B.

[0018] In the present disclosure, a “path” means a transmission line composed of a wiring through which a high-frequency signal propagates, an electrode directly connected to the wiring, and a terminal directly connected to the wiring or the electrode.

[0019] (Implementation Method)

[0020] [1. Configuration of Amplifier Circuit 1 and Communication Device 4]

[0021] One side reference Figure 1 Next, the circuit configurations of the amplifier circuit 1 and the communication device 4 according to the present embodiment will be described. Figure 1 It is a circuit configuration diagram of the amplifier circuit 1 and the communication device 4 according to the embodiment.

[0022] [1.1 Circuit Configuration of Communication Device 4]

[0023] First, the circuit structure of the communication device 4 is described. Figure 1 As shown, the communication device 4 includes an amplifier circuit 1 , an antenna 2 , and an RF signal processing circuit (RFIC) 3 .

[0024] The amplifier circuit 1 transmits a high-frequency signal between the antenna 2 and the RFIC 3. The detailed circuit structure of the amplifier circuit 1 will be described later.

[0025] The antenna 2 is connected to the antenna connection terminal 100 of the amplifier circuit 1 , transmits the high-frequency signal output from the amplifier circuit 1 , and receives a high-frequency signal from the outside and outputs it to the amplifier circuit 1 .

[0026] RFIC3 is an example of a signal processing circuit that processes a high-frequency signal. Specifically, RFIC3 performs signal processing on a received signal input through a receiving path of the amplifier circuit 1 by down-conversion, etc., and outputs the received signal generated by the signal processing to a baseband signal processing circuit (BBIC, not shown). In addition, RFIC3 performs signal processing on a transmission signal input from the BBIC by up-conversion, etc., and outputs the transmission signal generated by the signal processing to the transmission path of the amplifier circuit 1. In addition, RFIC3 has a control unit that controls switches, amplifiers, and bias circuits, etc., of the amplifier circuit 1. The control unit of RFIC3 controls, for example, the power supply voltage and bias voltage supplied to each amplifier of the amplifier circuit 1. Specifically, RFIC3 outputs a digital control signal to the bias circuits 61 and 62. In each amplifier of the amplifier circuit 1, the bias voltage set according to the above-mentioned digital control signal is supplied to the bias circuits 61 and 62.

[0027] Furthermore, part or all of the functions of the control unit of RFIC3 may be installed outside RFIC3, for example, in BBIC or amplifier circuit 1.

[0028] [1.2 Circuit structure of amplifier circuit 1]

[0029] Next, the circuit structure of the amplifier circuit 1 is described. Figure 1 As shown, the amplifier circuit 1 includes low noise amplifiers 11 and 12 , switch circuits 20 and 30 , bias circuits 61 and 62 , filters 41 , 42 , 43 , 44 , 45 , 46 , 47 and 48 , inductors 51 , 52 and 53 , an antenna connection terminal 100 , and high frequency output terminals 110 and 120 .

[0030] The antenna connection terminal 100 is an example of a first input terminal for inputting a high-frequency signal, and is connected to the antenna 2. The high-frequency output terminals 110 and 120 are connected to the RFIC 3.

[0031] The low noise amplifier 11 is an example of an amplifier that amplifies a high frequency signal, and its input end is connected to the terminal 30a of the switch circuit 30 via the inductor 51, and its output end is connected to the high frequency output terminal 110. The low noise amplifier 12 is an example of an amplifier that amplifies a high frequency signal, and its input end is connected to the terminal 30b of the switch circuit 30 via the inductor 52, and its output end is connected to the high frequency output terminal 120.

[0032] The switch circuit 30 is connected between the low noise amplifiers 11 and 12 and the antenna connection terminal 100. The switch circuit 30 has terminals 30a (first terminal), 30b (first terminal), 30c (second terminal), 30d, 30e, 30f, and 30g, and switches between connection and non-connection between the terminal 30a and each of the terminals 30c, 30d, 30e, 30f, and 30g, and switches between connection and non-connection between the terminal 30b and each of the terminals 30c, 30d, 30e, 30f, and 30g. The switch circuit 30 has transistors connected to the terminals 30a to 30g, respectively.

[0033] The bias circuit 61 supplies a DC bias voltage to the low noise amplifier 11. The bias circuit 62 supplies a DC bias voltage to the low noise amplifier 12. In addition, the bias circuit 61 supplies a DC bias voltage to the transistor connected to the terminal 30a via the low noise amplifier 11, the inductor 51, and the terminal 30a. In addition, the bias circuit 62 supplies a DC bias voltage to the transistor connected to the terminal 30b via the low noise amplifier 12, the inductor 52, and the terminal 30b.

[0034] The switch circuit 20 is connected between the antenna connection terminal 100 and the filters 41 to 48. The switch circuit 20 has terminals 20a, 20b, 20c, 20d, 20e, and 20f, and switches between connection and disconnection between the terminal 20a and each of the terminals 20b, 20c, 20d, 20e, and 20f.

[0035] The filter 41 is a receiving filter for a downlink operation frequency band including the frequency band A of FDD (Frequency Division Duplex) in the passband. The filter 42 is a transmitting filter for an uplink operation frequency band including the frequency band A in the passband. The output end of the filter 42 and the input end of the filter 41 are connected to the antenna connection terminal 100 via the terminal 20b, and the output end of the filter 41 is connected to the terminal 30c.

[0036] The filter 43 is a receiving filter for a downlink operation frequency band including the frequency band B of FDD in the passband. The filter 44 is a transmitting filter for an uplink operation frequency band including the frequency band B in the passband. The output end of the filter 44 and the input end of the filter 43 are connected to the antenna connection terminal 100 via the terminal 20c, and the output end of the filter 43 is connected to the terminal 30d.

[0037] The filter 45 is a receiving filter for a downlink operation frequency band including the frequency band C of FDD in the passband. The filter 46 is a transmitting filter for an uplink operation frequency band including the frequency band C in the passband. The output end of the filter 46 and the input end of the filter 45 are connected to the antenna connection terminal 100 via the terminal 20d, and the output end of the filter 45 is connected to the terminal 30e.

[0038] The filter 47 is a transmission / reception filter whose passband includes the TDD (Time Division Duplex) frequency band D. One end of the filter 47 is connected to the antenna connection terminal 100 via the terminal 20e, and the other end of the filter 47 is connected to the terminal 30f.

[0039] The filter 48 is a transmission / reception filter whose passband includes the TDD frequency band E. One end of the filter 48 is connected to the antenna connection terminal 100 via the terminal 20f, and the other end of the filter 48 is connected to the terminal 30g.

[0040] Furthermore, each of the filters 44 to 48 may be connected to an antenna connection terminal (second input terminal) different from the antenna connection terminal 100 via the switch circuit 20 .

[0041] Furthermore, it is desirable that at least one of the filters 41 , 43 , 45 , 47 , and 48 is an elastic wave filter.

[0042] Thus, since the elastic wave filter has a capacitive structure, the DC bias voltage supplied from the bias circuits 61 and 62 is not passed through, and thus it is possible to prevent the DC bias voltage from leaking from the switch circuit 30 to the antenna connection terminal 100 side.

[0043] In addition, the FDD band and the TDD band mean a band predefined by a standardization group (e.g., 3GPP (3rd Generation Partnership Project) (registered trademark), IEEE (Institute of Electrical and Electronics Engineers), etc.) for a communication system constructed using a radio access technology (RAT: Radio Access Technology). In the present embodiment, as a communication system, for example, a 4G (4th Generation: fourth generation)-LTE (Long Term Evolution: long term evolution) system, a 5G (5th Generation: fifth generation)-NR (New Radio: new wireless) system, and a WLAN (Wireless Local Area Network: wireless local area network) system can be used, but it is not limited thereto.

[0044] One end of the inductor 51 is connected to the terminal 30a, and the other end is connected to the low noise amplifier 11, so as to obtain impedance matching between the low noise amplifier 11, the switch circuit 30, and the filters 41 to 48. One end of the inductor 52 is connected to the terminal 30b, and the other end is connected to the low noise amplifier 12, so as to obtain impedance matching between the low noise amplifier 12, the switch circuit 30, and the filters 41 to 48. The inductor 53 is connected between the path connecting the antenna connection terminal 100 and the terminal 20a and the ground line, so as to obtain impedance matching between the antenna 2, the switch circuit 20, and the filters 41 to 48.

[0045] In the amplifier circuit 1 of the present embodiment, no inductor is connected between the path connecting the terminal 30a and the low-noise amplifier 11 and the ground. In addition, no inductor is connected between the path connecting the terminal 30b and the low-noise amplifier 12 and the ground, and the paths are connected by connection components such as electrodes or through-hole conductors. Thus, a DC bias voltage can be supplied from the bias circuit 61 to the transistor connected to the terminal 30a via the low-noise amplifier 11 and the terminal 30a, and a DC bias voltage can be supplied from the bias circuit 62 to the transistor connected to the terminal 30b via the low-noise amplifier 12 and the terminal 30b.

[0046] In addition, the amplifier circuit 1 only needs to include at least a low-noise amplifier 11, a switch circuit 30, a bias circuit 61, and an antenna connection terminal 100. In addition, the switch circuit 30 only needs to include at least terminals 30a and 30c. In addition, a power amplifier that amplifies a transmission signal may be configured instead of the low-noise amplifier 11 that amplifies the received signal. When the power amplifier is configured, the switch circuit 30 is connected between the RFIC3 and the power amplifier.

[0047] Figure 2A FIG. 1 is a diagram showing a part of the circuit configuration of the switch circuit 30 and the peripheral circuits included in the amplifier circuit 1 according to the embodiment. Figure 2A , a detailed circuit structure of the switch circuit 30 is shown.

[0048] like Figure 2A As shown in FIG. 1 , the switch circuit 30 includes terminals 30a, 30c, and 30d, and transistors 31 and 32. In addition, the terminals 30b, 30e, 30f, and 30g are not shown in the figure.

[0049] Figure 2B It is a schematic cross-sectional view of transistors 31 and 32 constituting the switch circuit 30 according to the embodiment.

[0050] The transistor 31 is an example of a first switch, and is a field effect transistor (FET) having a first substrate, a gate terminal g1, a source s1, and a drain d1. In the present embodiment, the first substrate is a p-type (first conductivity type), the gate terminal g1 is a first control terminal, the source s1 is an n-type (second conductivity type) first region configured on the first substrate, the drain d1 is an n-type (second conductivity type) second region configured on the first substrate, and the transistor 31 is an n-type FET.

[0051] The transistor 32 is an example of a first switch, and is a FET having a second substrate, a gate terminal g2, a source s2, and a drain d2. In the present embodiment, the second substrate is a p-type (first conductivity type), the gate terminal g2 is a second control terminal, the source s2 is an n-type (second conductivity type) third region configured on the second substrate, the drain d2 is an n-type (second conductivity type) fourth region configured on the second substrate, and the transistor 32 is an n-type FET.

[0052] In addition, in transistor 31, the first substrate may be n-type, the source s1 may be a p-type first region configured in the first substrate, the drain d1 may be a p-type second region configured in the first substrate, and transistor 31 may be a p-type FET. In addition, in transistor 32, the second substrate may be n-type, the source s2 may be a p-type third region configured in the second substrate, the drain d2 may be a p-type fourth region configured in the second substrate, and transistor 32 may be a p-type FET.

[0053] like Figure 2A as well as Figure 2B As shown, the source s1 is connected to the terminal 30a, and the drain d1 is connected to the terminal 30c. In addition, the source s2 is connected to the terminal 30a, and the drain d2 is connected to the terminal 30d.

[0054] The transistor 31 switches between connection and disconnection between the terminal 30a and the terminal 30c based on a voltage applied to the gate terminal g1, and the transistor 32 switches between connection and disconnection between the terminal 30a and the terminal 30d based on a voltage applied to the gate terminal g2.

[0055] Here, if Figure 2A as well as Figure 2B As shown, the first substrate and the source s1 of the transistor 31 are connected to the terminal 30a, and the bias circuit 61, the terminal 30a, and the first substrate of the transistor 31 are DC-connected. That is, a DC bias voltage is applied from the bias circuit 61 via the terminal 30a and the source s1 as a substrate bias voltage of the transistor 31. In addition, the state in which the bias circuit 61 is DC-connected to the first substrate of the transistor 31 refers to a circuit state in which an element such as an element that cuts off DC (for example, a capacitor) is not arranged between the bias circuit 61 and the first substrate.

[0056] In addition, if Figure 2A as well as Figure 2B As shown, the second substrate and source s2 of transistor 32 are connected to terminal 30a, and bias circuit 61, terminal 30a and the second substrate of transistor 32 are DC connected. That is, a DC bias voltage is applied as a substrate bias voltage of transistor 32 from bias circuit 61 via terminal 30a and source s2.

[0057] In addition, the bias voltage supplied from the bias circuit 61 to the first substrate of the transistor 31 and the second substrate of the transistor 32 is referred to as a substrate bias voltage.

[0058] Generally, when a transistor is used as a switch, the transmission loss (Ron) when it is turned on (connected) is expressed by the following formula 1. Here, μ represents mobility, Cox represents gate capacitance per unit area, W represents gate width, L represents gate length, Vgs represents gate-source voltage, and Vt represents threshold voltage.

[0059] [Mathematical formula 1]

[0060]

[0061] According to Formula 1, if the threshold voltage Vt of the transistor is small, the transmission loss Ron when it is turned on (connected) can be reduced. On the other hand, by applying a substrate bias voltage to the transistor, the threshold voltage Vt can be controlled. Thus, for example, by applying a positive substrate bias voltage to an n-type FET, the threshold voltage Vt can be reduced, and the transmission loss Ron can be reduced. However, if the threshold voltage Vt is always low, the off-leakage current generated when the transistor is not turned on (not connected) becomes large.

[0062] According to the amplifier circuit 1 of the present embodiment, a dedicated path is not provided, and the substrate bias voltage supplied to the transistor 31 is supplied from the bias circuit 61 which is the same as the bias voltage supplied to the low-noise amplifier 11 via the low-noise amplifier 11 and the terminal 30a. Thus, the bias circuit can be reduced, and the amplifier circuit 1 can be miniaturized. In addition, by applying the substrate bias voltage, the threshold voltage Vt of the transistor 31 can be reduced, thereby reducing the transmission loss Ron of the transistor 31. Therefore, a high-frequency signal can be transmitted with low loss in the amplifier circuit 1. In addition, a received signal can be supplied to the low-noise amplifier 11 with low loss, so that the degradation of the receiving sensitivity can be suppressed. On the other hand, when the low-noise amplifier 11 is set to the disconnected state, the substrate bias voltage can be reduced and the threshold voltage Vt can be increased, so that the cut-off leakage current when the high-frequency signal is not amplified can be reduced.

[0063] In addition, according to the amplifier circuit 1 of the present embodiment, a dedicated path is not provided, and the substrate bias voltage supplied to the transistor 32 is supplied from the bias circuit 62 which is the same as the bias voltage supplied to the low-noise amplifier 12 via the low-noise amplifier 12 and the terminal 30a. Thus, the bias circuit can be reduced, and the amplifier circuit 1 can be miniaturized. In addition, by applying the substrate bias voltage, the threshold voltage Vt of the transistor 32 can be reduced, thereby reducing the transmission loss Ron of the transistor 32. On the other hand, when the low-noise amplifier 12 is set to the off state, the substrate bias voltage can be reduced and the threshold voltage Vt can be increased, so that the off-leakage current when the high-frequency signal is not amplified can be reduced.

[0064] Furthermore, the transistors 31 and 32 may be FETs as described above, or may be bipolar transistors. When the transistors 31 and 32 are bipolar transistors, for example, the source is the emitter, the drain is the collector, and the gate terminal is the base terminal.

[0065] Figure 31 is a circuit diagram of a switch circuit 530 and a peripheral circuit included in an amplifier circuit 500 of a comparative example. The amplifier circuit 500 of the comparative example is an example of a conventional amplifier circuit. The amplifier circuit 500 of the comparative example includes at least a low noise amplifier 11, a switch circuit 530, bias circuits 61 and 63, and a capacitor 54. The amplifier circuit 500 of the comparative example is different from the amplifier circuit 1 of the embodiment in that a bias circuit 63 and a capacitor 54 are added and in the connection structure of the switch circuit 530. In the following, the description of the amplifier circuit 500 of the comparative example is omitted for the same structure as the amplifier circuit 1 of the embodiment, and the description is centered on the different structure.

[0066] The capacitor 54 is connected between the low noise amplifier 11 and the terminal 30 a , and blocks the flow of a DC component such as a DC bias voltage.

[0067] The bias circuit 61 supplies a DC bias voltage to the low noise amplifier 11. In addition, the DC bias voltage supplied from the bias circuit 61 is not supplied to the switch circuit 530 via the capacitor 54.

[0068] The bias circuit 63 supplies a DC bias voltage to the transistors 531 and 532. The DC bias voltage supplied from the bias circuit 63 is not supplied to the low noise amplifier 11 via the capacitor 54.

[0069] The switch circuit 530 includes terminals 30 a , 30 c , and 30 d , and transistors 531 and 532 .

[0070] The transistor 531 is a FET having a first substrate, a gate terminal g1, a source s1, and a drain d1. In this comparative example, the first substrate is p-type (first conductivity type), the source s1 is an n-type (second conductivity type) first region configured on the first substrate, the drain d1 is an n-type (second conductivity type) second region configured on the first substrate, and the transistor 531 is an n-type FET.

[0071] The transistor 532 is a FET having a second substrate, a gate terminal g2, a source s2, and a drain d2. In this comparative example, the second substrate is p-type (first conductivity type), the source s2 is configured in the third region of the second substrate of n-type (second conductivity type), the drain d2 is configured in the fourth region of the second substrate of n-type (second conductivity type), and the transistor 532 is an n-type FET.

[0072] like Figure 3 As shown, the source s1 is connected to the terminal 30a, and the drain d1 is connected to the terminal 30c. In addition, the source s2 is connected to the terminal 30a, and the drain d2 is connected to the terminal 30d.

[0073] The transistor 531 switches between connection and disconnection between the terminal 30a and the terminal 30c based on a voltage applied to the gate terminal g1, and the transistor 532 switches between connection and disconnection between the terminal 30a and the terminal 30d based on a voltage applied to the gate terminal g2.

[0074] Here, if Figure 3 As shown, the first substrate of the transistor 531 is not connected to the terminal 30a, and the bias circuit 61 is not directly connected to the first substrate of the transistor 531. On the other hand, a DC bias voltage is applied from the bias circuit 63 as a substrate bias voltage of the transistor 531. In addition, the second substrate of the transistor 532 is not connected to the terminal 30a, and the bias circuit 61 is not directly connected to the second substrate of the transistor 532. On the other hand, a DC bias voltage is applied from the bias circuit 63 as a substrate bias voltage of the transistor 532.

[0075] According to the amplifier circuit 500 of the comparative example, by applying a substrate bias voltage to the transistors 531 and 532, the threshold voltage Vt of the transistors 531 and 532 can be reduced, thereby reducing the transmission loss Ron of the transistors 531 and 532. However, the substrate bias voltage supplied to the transistors 531 and 532 is not supplied from the bias circuit 61 that supplies the bias voltage to the low-noise amplifier 11, but is supplied from the bias circuit 63 for supplying the substrate bias voltage. Therefore, the bias circuit 61 that supplies the bias voltage to the low-noise amplifier 11 and the bias circuit 63 that supplies the substrate bias voltage are configured, so the amplifier circuit 500 is large-scaled. In addition, in order to reduce the off-leakage current when the low-noise amplifier 11 is set to the off state, it is desired to reduce the substrate bias voltage, but the bias circuit 61 and the bias circuit 63 must be linked to control the bias voltage. Therefore, the control of the bias circuit becomes complicated.

[0076] In contrast, according to the amplifier circuit 1 of the present embodiment, the substrate bias voltage supplied to the transistor 31 is supplied from the bias circuit 61 that supplies the bias voltage to the low-noise amplifier 11, so the bias circuit can be reduced, and the amplifier circuit 1 can be miniaturized. In addition, by applying the substrate bias voltage, the threshold voltage Vt of the transistor 31 can be reduced, thereby reducing the transmission loss Ron of the transistor 31. In addition, the substrate bias voltage supplied to the transistor 32 is supplied from the bias circuit 61 that supplies the bias voltage to the low-noise amplifier 11, so the bias circuit can be reduced, and the amplifier circuit 1 can be miniaturized. In addition, by applying the substrate bias voltage, the threshold voltage Vt of the transistor 32 can be reduced, thereby reducing the transmission loss Ron of the transistor 32. Therefore, in the amplifier circuit 1, a high-frequency signal can be transmitted with low loss. On the other hand, when the low-noise amplifier 11 is set to an off state, the substrate bias voltage can be reduced to increase the threshold voltage Vt, so that the off-leakage current can be reduced only by controlling the bias circuit 61.

[0077] [1.3 Circuit Configuration of Amplifier Circuit 1A of Modification Example]

[0078] Next, the circuit structure of the amplifier circuit 1A according to the modified example will be described. Figure 4 As shown, the amplifier circuit 1A includes a low-noise amplifier 11 , a switch circuit 30A, a bias circuit 61 , filters 41 and 43 , an inductor 51 , and a high-frequency output terminal 110 .

[0079] In addition, the amplifier circuit 1A of this modification may also include Figure 1 The low noise amplifier 12 , the bias circuit 62 , the filters 42 , 44 to 48 , the inductors 52 and 53 , the high frequency output terminal 120 , and the antenna connection terminal 100 are shown.

[0080] The amplifier circuit 1A of this modification differs from the amplifier circuit 1 of the embodiment in that the switch circuit 30A has a different structure. Hereinafter, the description of the amplifier circuit 1A of this modification that is the same as the amplifier circuit 1 of the embodiment will be omitted, and the description will focus on the different structures.

[0081] The low noise amplifier 11 has an amplifier transistor 101. The amplifier transistor 101 is, for example, an n-type FET, and has a gate terminal, a drain terminal, and a source terminal. A high-frequency signal is input from the gate, and the high-frequency signal is amplified and output from the drain terminal. In addition, circuit elements such as transistors, inductors, and capacitors may be connected to the gate terminal, the drain terminal, and the source terminal of the amplifier transistor 101, respectively. In addition, the amplifier transistor 101 may also be a p-type FET, or, for example, a bipolar transistor. In the case where the amplifier transistor 101 is a bipolar transistor, for example, the source terminal is the emitter terminal, the drain terminal is the collector terminal, and the gate terminal is the base terminal.

[0082] The bias circuit 61 supplies a DC bias voltage to the gate terminal of the amplifier transistor 101. The bias circuit 61 supplies a DC bias voltage to transistors 311, 312, 313, 321, 322, and 323 connected to the terminal 30a via the low noise amplifier 11, the inductor 51, and the terminal 30a.

[0083] The switch circuit 30A is connected between the low noise amplifier 11 and the antenna connection terminal 100. The switch circuit 30A includes terminals 30a (first terminal), 30c (second terminal), and 30d, and transistors 311, 312, 313, 314, 315, 316, 321, 322, 323, 324, 325, and 326. The switch circuit 30A switches the connection and non-connection between the terminal 30a and the terminals 30c and 30d by switching the conduction and non-conduction of the transistors 311 to 316 and 321 to 326.

[0084] The terminal 30a is connected to the low noise amplifier 11 via the inductor 51, the terminal 30c is connected to the antenna connection terminal 100 via the filter 41 and the switch circuit 20, and the terminal 30d is connected to the antenna connection terminal 100 via the filter 43 and the switch circuit 20. In addition, the terminal 30d may be connected to an antenna connection terminal (second input terminal) different from the antenna connection terminal 100 (first input terminal).

[0085] Transistors 311 to 313 are examples of one or more first switches, and are so-called series switches connected in series between terminal 30a (first terminal) and terminal 30c (second terminal). Transistor 311 is a FET having a third substrate, gate terminal g11, source s11, and drain d11. Transistor 312 is a FET having a fourth substrate, gate terminal g12, source s12, and drain d12. Transistor 313 is a FET having a fifth substrate, gate terminal g13, source s13, and drain d13. In this modified example, the third to fifth substrates are p-type (first conductivity type), gate terminals g11 to g13 are first control terminals, sources s11 to s13 are n-type (second conductivity type) first regions arranged on the third to fifth substrates, drains d11 to d13 are n-type (second conductivity type) second regions arranged on the third to fifth substrates, and transistors 311 to 313 are n-type FETs. The source s11 is connected to the terminal 30a and the third substrate, the drain d11 is connected to the source s12 and the fourth substrate, the drain d12 is connected to the source s13 and the fifth substrate, and the drain d13 is connected to the terminal 30c.

[0086] According to the above connection structure, the bias voltage output from the bias circuit 61 is applied to the third substrate via the low noise amplifier 11, the terminal 30a, and the source s11. Furthermore, when the transistors 311, 312, and 313 are in the on state, the bias voltage output from the bias circuit 61 is applied to the fourth substrate via the source s12, and is applied to the fifth substrate via the source s13. Thus, when the transistors 311 to 313 are in the on state, the substrate bias voltage is applied to the transistors 311 to 313, respectively, so that the on resistance of the transistors 311 to 313 can be reduced. On the other hand, when the transistors 311 to 313 are in the off state, the substrate bias voltage is not applied to the transistors 311 to 313, respectively, so that the off leakage current of the transistors 311 to 313 can be reduced.

[0087] Transistors 314 to 316 are examples of one or more second switches, and are so-called shunt switches connected in series between the path connecting terminals 30a and 30c and the ground line. Transistor 314 is a FET having a sixth substrate, a gate terminal, a source, and a drain. Transistor 315 is a FET having a seventh substrate, a gate terminal, a source, and a drain. Transistor 316 is a FET having an eighth substrate, a gate terminal, a source, and a drain. In this variant, the sixth to eighth substrates are p-type (first conductivity type), the sources of transistors 314 to 316 are n-type (second conductivity type) regions arranged on the sixth to eighth substrates, the drains of transistors 314 to 316 are n-type (second conductivity type) regions arranged on the sixth to eighth substrates, and transistors 314 to 316 are n-type FETs.

[0088] Furthermore, there may be one transistor (first switch) connected in series between the terminal 30a and the terminal 30c, or there may be no transistors 312 and 313. Furthermore, there may be four or more transistors connected in series between the terminal 30a and the terminal 30c.

[0089] The transistor 311 is the transistor that is connected closest to the low noise amplifier 11 among the transistors 311 to 316 .

[0090] Thus, the transistor 311 connected closest to the low-noise amplifier 11 is not the second switch connected between the path connecting the terminal 30a and the terminal 30c and the ground line, but is the first switch arranged in series with the path connecting the terminal 30a and the terminal 30c. Therefore, the bias voltage supplied from the bias circuit 61 can be supplied to at least the third substrate of the transistor 311 closest to the low-noise amplifier 11.

[0091] In addition, the number of transistors (second switch) connected in series between the path connecting the terminals 30a and 30c and the ground may be one, and there may be no transistors 315 and 316. In addition, the number of transistors connected in series between the path connecting the terminals 30a and 30c and the ground may be four or more.

[0092] Thus, by exclusively turning on and off the first switch and the second switch, a high-frequency signal can be transmitted with low loss. In addition, since the switch closest to the amplifier is not the second switch but the first switch, a bias voltage can be supplied to the substrate of the first switch.

[0093] In addition, the third to fifth substrates may also be one substrate. In addition, the sixth to eighth substrates may also be one substrate. And, in addition, the third to eighth substrates may also be one substrate.

[0094] Transistors 321 to 323 are examples of one or more third switches, and are so-called series switches connected in series between terminal 30a (first terminal) and terminal 30d (third terminal). Transistor 321 is a FET having a ninth substrate, a gate terminal g21, a source s21, and a drain d21. Transistor 322 is a FET having a tenth substrate, a gate terminal g22, a source s22, and a drain d22. Transistor 323 is a FET having an eleventh substrate, a gate terminal g23, a source s23, and a drain d23. In this modified example, the ninth to eleventh substrates are p-type (first conductivity type), the gate terminals g21 to g23 are first control terminals, the sources s21 to s23 are third regions of n-type (second conductivity type) arranged on the ninth to eleventh substrates, the drains d21 to d23 are fourth regions of n-type (second conductivity type) arranged on the ninth to eleventh substrates, and transistors 321 to 323 are n-type FETs. The source s21 is connected to the terminal 30a and the ninth substrate, the drain d21 is connected to the source s22 and the tenth substrate, the drain d22 is connected to the source s23 and the eleventh substrate, and the drain d23 is connected to the terminal 30c.

[0095] According to the above connection structure, the bias voltage output from the bias circuit 61 is applied to the ninth substrate via the low noise amplifier 11, the terminal 30a, and the source s21. Furthermore, when the transistors 321, 322, and 323 are in the on state, the bias voltage output from the bias circuit 61 is applied to the tenth substrate via the source s22, and to the eleventh substrate via the source s23. Thus, when the transistors 321 to 323 are in the on state, the substrate bias voltage is applied to the transistors 321 to 323, respectively, so that the on resistance of the transistors 321 to 323 can be reduced. On the other hand, when the transistors 321 to 323 are in the off state, the substrate bias voltage is not applied to the transistors 321 to 323, respectively, so that the off leakage current of the transistors 321 to 323 can be reduced.

[0096] Transistors 324 to 326 are examples of one or more fourth switches, and are so-called shunt switches connected in series between the path connecting terminals 30a and 30d and the ground line. Transistor 324 is a FET having a twelfth substrate, a gate terminal, a source and a drain. Transistor 325 is a FET having a thirteenth substrate, a gate terminal, a source and a drain. Transistor 326 is a FET having a fourteenth substrate, a gate terminal, a source and a drain. In this variation, the twelfth to fourteenth substrates are p-type (first conductivity type), the sources of transistors 324 to 326 are n-type (second conductivity type) regions arranged on the twelfth to fourteenth substrates, the drains of transistors 324 to 326 are n-type (second conductivity type) regions arranged on the twelfth to fourteenth substrates, and transistors 324 to 326 are n-type FETs.

[0097] Furthermore, there may be one transistor (third switch) connected in series between the terminal 30a and the terminal 30d, or there may be no transistors 322 and 323. Furthermore, there may be four or more transistors connected in series between the terminal 30a and the terminal 30d.

[0098] Among the transistors 321 to 326 , the transistor that is connected closest to the low-noise amplifier 11 is the transistor 321 .

[0099] Thus, the transistor 321 connected closest to the low-noise amplifier 11 is not the fourth switch connected between the path connecting the terminal 30a and the terminal 30d and the ground line, but is the third switch connected in series with the path connecting the terminal 30a and the terminal 30d. Therefore, the bias voltage supplied from the bias circuit 61 can be supplied to at least the ninth substrate of the transistor 321 closest to the low-noise amplifier 11.

[0100] In addition, the number of transistors (fourth switch) connected in series between the path connecting the terminals 30a and 30d and the ground may be one, and there may be no transistors 325 and 326. In addition, the number of transistors connected in series between the path connecting the terminals 30a and 30d and the ground may be four or more.

[0101] Thus, by exclusively turning on and off the third and fourth switches, high-frequency signals can be transmitted with low loss. In addition, since the switch closest to the low-noise amplifier 11 is not the fourth switch but the third switch, a bias voltage can be supplied to the ninth substrate of the third switch.

[0102] In addition, the ninth to eleventh substrates may also be one substrate. In addition, the twelfth to fourteenth substrates may also be one substrate. Furthermore, in addition, the ninth to fourteenth substrates may also be one substrate. Furthermore, the third to fourteenth substrates may also be one substrate.

[0103] The transistor 312 has a resistor 412 connecting the source s12 and the drain d12. The transistor 313 has a resistor 413 connecting the source s13 and the drain d13. On the other hand, the transistor 311 does not have a resistor connecting the source s11 and the drain d11.

[0104] The transistor 322 has a resistor 422 connecting the source s22 and the drain d22. The transistor 323 has a resistor 423 connecting the source s23 and the drain d23. On the other hand, the transistor 321 does not have a resistor connecting the source s21 and the drain d21.

[0105] By means of resistor elements 412 and 413, it is possible to prevent transistors 312 and 313 from being destroyed by surge voltage from the outside, but in the signal path (cutoff signal path) in which the low noise amplifier 11 is set to the disconnected state, the bias voltage from other signal paths is supplied via the resistor element. At this time, there is a situation where the threshold voltage of transistors 312 and 313 is reduced and becomes the on state, and the high-frequency signal leaks to the above-mentioned cutoff signal path and the isolation characteristic deteriorates. In contrast, transistor 311 does not have a resistor element, so it is possible to suppress the bias voltage output from the bias circuit 61 from being supplied to transistors 312 and 313 via resistor elements 412 and 413. Therefore, it is possible to suppress the degradation of the isolation characteristic.

[0106] Furthermore, the transistor having no resistor connecting the drain and the source may not be the transistor 311 , and may be at least one of the transistors 311 to 313 .

[0107] In addition, the resistor elements 422 and 423 can prevent the transistors 322 and 323 from being destroyed by the surge voltage from the outside, but in the signal path (cut-off signal path) in which the low noise amplifier 11 is set to the disconnected state, the bias voltage from the other signal path is supplied via the resistor element. At this time, there is a situation where the threshold voltage of the transistors 322 and 323 is reduced and becomes the on state, and the high-frequency signal leaks to the above-mentioned cut-off signal path and the isolation characteristic deteriorates. In contrast, the transistor 321 does not have a resistor element, so it is possible to suppress the bias voltage output from the bias circuit 61 from being supplied to the transistors 322 and 323 via the resistor elements 422 and 423. Therefore, it is possible to suppress the degradation of the isolation characteristic.

[0108] Furthermore, the transistor having no resistor connecting the drain and the source may not be the transistor 321 , and may be at least one of the transistors 321 to 323 .

[0109] The transistor 315 has a resistor 415 connecting the source and the drain. The transistor 316 has a resistor 416 connecting the source and the drain. On the other hand, the transistor 314 does not have a resistor connecting the source and the drain.

[0110] The transistor 325 includes a resistor 425 connecting the source and the drain. The transistor 326 includes a resistor 426 connecting the source and the drain. On the other hand, the transistor 324 does not include a resistor connecting the source and the drain.

[0111] The resistors 415 and 416 can prevent the transistors 315 and 316 from being destroyed by the surge voltage from the outside, but in the signal path (the on-signal path) in which the low noise amplifier 11 is turned on, the bias voltage from the signal path is supplied via the resistors 415 and 416. At this time, there is a case where the threshold voltage of the transistors 315 and 316 is reduced and the transistors 315 and 316 are turned on, and the high-frequency signal leaks to the ground line, increasing the transmission loss. In contrast, the transistor 314 does not have a resistor, so it is possible to suppress the bias voltage from being supplied via the resistor.

[0112] Furthermore, the transistor having no resistor connecting the drain and the source may not be the transistor 314 , and may be at least one of the transistors 314 to 316 .

[0113] In addition, the resistors 425 and 426 can prevent the transistors 325 and 326 from being destroyed by the surge voltage from the outside, and in the signal path (the on-signal path) in which the low noise amplifier 11 is turned on, the bias voltage from the signal path is supplied via the resistors 425 and 426. At this time, there is a case where the threshold voltage of the transistors 325 and 326 is reduced, and the transistors 325 and 326 are turned on, and the high-frequency signal leaks to the ground line, and the transmission loss increases. In contrast, the transistor 324 does not have a resistor, so it is possible to suppress the bias voltage from being supplied via the resistor.

[0114] Furthermore, the transistor having no resistor connecting the drain and the source may not be the transistor 324 , and may be at least one of the transistors 324 to 326 .

[0115] Figure 51 is a diagram showing a circuit state of a switch circuit 30A and peripheral circuits during signal transmission according to a modification. This diagram shows a supply state of a bias signal when a high-frequency signal in frequency band B is transmitted.

[0116] As shown in the figure, when a high frequency signal of frequency band B is transmitted, terminal 30a and terminal 30c are in a non-connected state, and terminal 30a and terminal 30d are in a connected state. To achieve this connected state, in switch circuit 30A, transistors 311 to 313 and transistors 324 to 326 are in an off state, and transistors 314 to 316 and transistors 321 to 323 are in an on state.

[0117] At this time, in the path B (filter 43-terminal 30d-transistors 323, 322, 321-terminal 30a) for transmitting high-frequency signals in the frequency band B, the transistors 321 to 323 are in the on state, so the bias voltage from the bias circuit 61 is applied to the sixth substrate of the transistor 321 via the source s21, to the seventh substrate of the transistor 322 via the source s22, and to the eighth substrate of the transistor 323 via the source s23. In addition, the above-mentioned bias voltage is not applied to a position closer to the antenna connection terminal 100 than the filter 43. In addition, since the transistor 324 does not have a resistance element between the source and the drain, the above-mentioned bias voltage is not applied to the ground line via the transistors 325 and 326.

[0118] In addition, in the path A (filter 41-terminal 30c-transistors 313, 312, 311-terminal 30a) that does not transmit the high-frequency signal of the frequency band B, the transistors 311 to 313 are in the off state. At this time, since the transistor 311 does not have a resistor element between the source and the drain, the bias voltage from the bias circuit 61 is not supplied to the transistors 312 and 313 via the resistor elements 412 and 413.

[0119] Thus, a dedicated path is not provided, and the substrate bias voltage supplied to the transistors 321 to 323 is supplied from the bias circuit 61 which is the same as the bias voltage supplied to the low-noise amplifier 11, via the low-noise amplifier 11 and the terminal 30a. Thus, the bias circuit can be reduced, and the amplifier circuit 1A can be miniaturized. In addition, by applying the substrate bias voltage, the threshold voltage Vt of the transistors 321 to 323 can be reduced, thereby reducing the transmission loss Ron of the transistors 321 to 323, and a high-frequency signal can be transmitted with low loss in the amplifier circuit 1A. In addition, the received signal can be supplied to the low-noise amplifier 11 with low loss, so that the degradation of the receiving sensitivity can be suppressed.

[0120] Furthermore, since the transistor 324 has no resistor between the source and the drain, the bias voltage output from the bias circuit 61 can be prevented from being supplied to the transistors 325 and 326 via the resistors 425 and 426. Therefore, leakage of high-frequency signals to the ground and increase in transmission loss can be prevented.

[0121] In addition, since the transistor 311 does not have a resistor between the source and the drain, it is possible to suppress supply of the current to the transistors 312 and 313 via the resistors 412 and 413. Therefore, it is possible to suppress degradation of isolation characteristics.

[0122] [2. Effects, etc.]

[0123] As described above, the amplifier circuit 1 of this embodiment includes: the antenna connection terminal 100 to which a high-frequency signal is input; the low-noise amplifier 11 to amplify the high-frequency signal; the switch circuit 30 connected between the low-noise amplifier 11 and the antenna connection terminal 100; and the bias circuit 61 to supply a DC bias voltage to the low-noise amplifier 11. The switch circuit 30 includes: a terminal 30a connected to the low-noise amplifier 11 and a terminal 30c connected to the antenna connection terminal; and a transistor 31 including a gate terminal g1 and a p-type first substrate, and switching between connection and non-connection of the terminal 30a and the terminal 30c based on a voltage applied to the gate terminal g1. In the amplifier circuit 1, the bias circuit 61 is DC-connected to the terminal 30a and the first substrate.

[0124] Thus, a dedicated path is not provided, and the substrate bias voltage supplied to the transistor 31 is supplied from the bias circuit 61 which is the same as the bias voltage supplied to the low-noise amplifier 11, via the low-noise amplifier 11 and the terminal 30a. Thus, the bias circuit can be reduced, and the amplifier circuit 1 can be miniaturized. In addition, by applying the substrate bias voltage, the threshold voltage Vt of the transistor 31 can be reduced, thereby reducing the transmission loss Ron of the transistor 31. Therefore, a high-frequency signal can be transmitted with low loss in the amplifier circuit 1. In addition, a received signal can be supplied to the low-noise amplifier 11 with low loss, so that the degradation of the receiving sensitivity can be suppressed.

[0125] Furthermore, for example, in the amplifier circuit 1 , a DC bias voltage may be applied to the first substrate from the bias circuit 61 via the low-noise amplifier 11 and the terminal 30 a .

[0126] This can reduce the transmission loss Ron of the transistor 31 and reduce the substrate bias voltage to increase the threshold voltage Vt when the low noise amplifier 11 is turned off, thereby reducing the off-leakage current when a high frequency signal is not amplified.

[0127] For example, in the amplifier circuit 1 , the first substrate may include an n-type source region connected to the terminal 30 a and an n-type drain region connected to the terminal 30 c , and the transistor 31 may be a FET with a source connected to the first substrate.

[0128] Thereby, a substrate bias voltage can be applied via the source electrode.

[0129] For example, in the amplifier circuit 1A, the switch circuit 30A may include a transistor 311 disposed in a path connecting the terminal 30a and the terminal 30c, and a transistor 314 connected between the path connecting the transistor 311 and the terminal 30c and the ground.

[0130] Thus, high-frequency signals can be transmitted with low loss by exclusively turning on and off transistor 311 and transistor 314. In addition, since the transistor closest to low-noise amplifier 11 is transistor 311 rather than transistor 314, when transistor 314 is turned on, leakage of bias voltage to the ground can be suppressed.

[0131] In addition, for example, the amplifier circuit 1 may further include a filter 41 connected between the antenna connection terminal 100 and the switch circuit 30 and including an elastic wave resonator.

[0132] Thus, since the elastic wave filter has a capacitive structure, the filter 41 does not allow a DC signal to pass therethrough, and thus it is possible to prevent the bias voltage from leaking from the switch circuit 30 to the antenna connection terminal 100 side.

[0133] In addition, for example, the amplifier circuit 1 may further include an inductor 51 having one end connected to the input end of the low noise amplifier 11 and the other end connected to the terminal 30a, and no inductor may be arranged between the path connecting the input end of the low noise amplifier 11 and the terminal 30a and the ground.

[0134] Thus, the impedance matching between the low noise amplifier 11 and the switch circuit 30 can be achieved by the inductor 51. In addition, since no inductor is disposed between the above-mentioned path and the ground, the bias voltage can be prevented from leaking to the ground and not being supplied to the switch circuit 30.

[0135] In addition, for example, in the amplifier circuit 1A, the switch circuit 30A includes: transistors 311 to 313, which are connected in series between the terminal 30a and the terminal 30c; and transistors 314 to 316, which are connected in series between the path connecting the terminals 30a and 30c and the ground line, and the transistor 311 among the transistors 311 to 316 that is most closely connected to the low-noise amplifier 11 is the transistor 311.

[0136] Thus, when the transistors 314 to 316 are in the on state, it is possible to suppress the bias voltage from leaking to the ground.

[0137] In addition, for example, in the amplifier circuit 1A, the switch circuit 30A further includes: a terminal 30d connected to the antenna connection terminal 100; transistors 321 to 323 connected in series between the terminal 30a and the terminal 30d; and transistors 324 to 326 connected in series between a path connecting the terminals 30a and 30d and a ground line, wherein the transistors 321 to 323 respectively include: a gate terminal; a p-type substrate; an n-type source disposed on the substrate and connected to the terminal 30a; and a p-type drain disposed on the substrate. board, connected to terminal 30d, switching connection and non-connection between terminal 30a and terminal 30d based on the voltage supplied to the gate terminal, supplying bias voltage to the substrate from bias circuit 61 via low noise amplifier 11 and terminal 30a, transistors 312 and 313 have a resistor element connecting the source and the drain, transistor 311 does not have a resistor element connecting the source and the drain, transistors 322 and 323 have a resistor element connecting the source and the drain, transistor 321 does not have a resistor element connecting the source and the drain.

[0138] Thus, by connecting the resistor element between the source and the drain, the switch can be prevented from being destroyed by a surge voltage from the outside. However, there is a situation where, in the signal path (cutoff signal path) in which the low noise amplifier 11 is set to the off state, the bias voltage from other signal paths is supplied via the resistor element, the threshold voltage of the transistor of the cutoff signal path is reduced and becomes the on state, and the high-frequency signal leaks to the cutoff signal path and the isolation characteristics are degraded. In contrast, the transistors 311 and 321 do not have a resistor element, so the bias voltage can be suppressed from being supplied via the resistor element. Therefore, the degradation of the isolation characteristics can be suppressed.

[0139] In addition, for example, in the amplifier circuit 1A, the transistors 315 and 316 have a resistor element connecting two terminals for switching on and off, the transistor 314 does not have a resistor element connecting two terminals for switching on and off, the transistors 325 and 326 have a resistor element connecting two terminals for switching on and off, and the transistor 324 does not have a resistor element connecting two terminals for switching on and off.

[0140] Thus, in the signal path for turning on the low noise amplifier 11, the bias voltage from the signal path is supplied via the resistor element, which can prevent the threshold voltage of the off-state transistors 314 to 316 or 324 to 326 from decreasing and turning on, thereby preventing the high frequency signal from leaking to the ground.

[0141] Furthermore, the communication device 4 of the present embodiment includes: the amplifier circuit 1 ; and the RFIC 3 that processes the high-frequency signal transmitted from the amplifier circuit 1 .

[0142] Thus, the communication device 4 can achieve the same effect as the above-mentioned effect of the amplifier circuit 1 .

[0143] (Other Embodiments)

[0144] In the above, the amplifier circuit and the communication device of the embodiment are described by listing the embodiment and its modified examples, but the amplifier circuit and the communication device of the present invention are not limited to the above embodiment and its modified examples. Other embodiments implemented by combining any structural elements in the above embodiment and its modified examples, modified examples obtained by implementing various modifications conceived by those skilled in the art with respect to the above embodiment and its modified examples within the scope not departing from the gist of the present invention, and various devices incorporating the amplifier circuit and the communication device disclosed in the present invention are also included in the present invention.

[0145] For example, in the amplifier circuit and the communication device of the above-described embodiment and its modified examples, other high-frequency circuit elements and wirings may be inserted between paths connecting the circuit elements and signal paths disclosed in the drawings.

[0146] The following describes the features of the amplifier circuit and the communication device described based on the above-mentioned embodiments.

[0147] <1>

[0148] An amplifier circuit, comprising:

[0149] A first input terminal for inputting a high frequency signal;

[0150] An amplifier, for amplifying the high frequency signal;

[0151] a switch circuit connected between the amplifier and the first input terminal; and

[0152] The bias circuit supplies a DC bias voltage to the amplifier.

[0153] The above switch circuit has:

[0154] a first terminal connected to the amplifier and a second terminal connected to the first input terminal; and

[0155] The first switch includes a transistor having a first control terminal, a first substrate of a first conductivity type, a first region of a second conductivity type disposed on the first substrate and connected to the first terminal, and a second region of a second conductivity type disposed on the first substrate and connected to the second terminal, and switching between connection and non-connection between the first terminal and the second terminal based on a voltage applied to the first control terminal.

[0156] The bias circuit is connected to the first terminal and the first substrate in direct current.

[0157] <2>

[0158] According to the amplifier circuit described in <1>,

[0159] The bias voltage is applied to the first substrate from the bias circuit via the amplifier and the first terminal.

[0160] <3>

[0161] An amplifier circuit according to <1> or <2>, wherein:

[0162] The first switch comprises a field effect transistor.

[0163] The first region is a source region.

[0164] The second region is a drain region.

[0165] The first control terminal is a gate terminal,

[0166] The first region is connected to the first substrate.

[0167] <4>

[0168] The amplifier circuit according to any one of <1> to <3>, wherein:

[0169] The switch circuit further includes a second switch connected between a path connecting the first switch and the second terminal and a ground line.

[0170] <5>

[0171] The amplifier circuit according to any one of <1> to <4>, wherein:

[0172] The amplifier is a low noise amplifier that amplifies a reception signal input from the first input terminal.

[0173] <6>

[0174] The amplifier circuit according to any one of <1> to <5>, wherein:

[0175] An elastic wave filter is further provided. The elastic wave filter is connected between the first input terminal and the switch circuit.

[0176] <7>

[0177] The amplifier circuit according to any one of <1> to <6>, wherein:

[0178] An inductor is further provided, one end of the inductor being connected to the input end of the amplifier and the other end of the inductor being connected to the first terminal.

[0179] No inductor is disposed between a path connecting the input end of the amplifier and the first terminal and the ground.

[0180] <8>

[0181] According to the amplifier circuit described in <4>,

[0182] The above-mentioned switch circuit has:

[0183] One or more first switches are connected in series between the first terminal and the second terminal; and

[0184] One or more second switches are connected in series between a path connecting the first terminal and the second terminal and a ground line,

[0185] Of the one or more first switches and the one or more second switches, a switch that is connected closest to the amplifier is any one of the one or more first switches.

[0186] <9>

[0187] According to the amplifier circuit described in <8>,

[0188] It also includes a second input terminal, the second input terminal inputting a high-frequency signal,

[0189] The above-mentioned switch circuit also has:

[0190] A third terminal connected to the second input terminal;

[0191] one or more third switches connected in series between the first terminal and the third terminal; and

[0192] One or more fourth switches are connected in series between a path connecting the first terminal and the third terminal and a ground line,

[0193] The third switch includes: a second control terminal; a second substrate of the first conductivity type; a third region of the second conductivity type, disposed on the second substrate and connected to the first terminal; and a fourth region of the second conductivity type, disposed on the second substrate and connected to the third terminal, and switches between connection and non-connection between the first terminal and the third terminal based on a voltage supplied to the second control terminal.

[0194] supplying the bias voltage from the bias circuit to the second substrate via the amplifier and the first terminal,

[0195] One of the one or more first switches includes a resistor element connecting the first region and the second region.

[0196] Another switch among the one or more first switches does not have a resistor element connecting the first region and the second region.

[0197] One of the one or more third switches has a resistor element connecting the third region and the fourth region.

[0198] Another switch among the one or more third switches does not include a resistance element connecting the third region and the fourth region.

[0199] <10>

[0200] According to the amplifier circuit described in <9>,

[0201] One of the one or more second switches has a resistor element connecting two terminals for switching between connection and non-connection.

[0202] Another switch among the one or more second switches does not have a resistor element connecting two terminals for switching between connection and non-connection.

[0203] One of the one or more fourth switches has a resistor element connecting two terminals that switch between connection and non-connection.

[0204] The other of the one or more fourth switches does not have a resistance element connecting two terminals that switch between connection and non-connection.

[0205] <11>

[0206] A communication device, comprising:

[0207] The amplifier circuit described in any one of <1> to <10>; and

[0208] The RF signal processing circuit processes the high frequency signal transmitted by the above-mentioned amplification circuit.

[0209] Industrial Applicability

[0210] The present invention can be used as a front-end circuit for coping with multiple frequency bands and multiple modes and is widely used in communication equipment such as mobile phones.

[0211] Description of Reference Numerals

[0212] 1, 1A, 500…amplifier circuit; 2…antenna; 3…RF signal processing circuit (RFIC); 4…communication device; 11, 12…low noise amplifier; 20, 30, 30A, 530…switch circuit; 20a, 20b, 20c, 20d, 20e, 20f, 30a, 30b, 30c, 30d, 30e, 30f, 30g…terminal; 31, 32, 311, 312, 313, 314, 315, 316, 321, 322, 323, 324, 325, 326, 531, 532…transistor; 41, 42, 43, 44, 45, 46, 47 , 48…filter; 51, 52, 53…inductor; 54…capacitor; 61, 62, 63…bias circuit; 100…antenna connection terminal; 101…amplifier transistor; 110, 120…high frequency output terminal; 412, 413, 415, 416, 422, 423, 425, 426…resistance element; d1, d2, d11, d12, d13, d21, d22, d23…drain; g1, g2, g11, g12, g13, g21, g22, g23…gate terminal; s1, s2, s11, s12, s13, s21, s22, s23…source.

Claims

1. An amplifier circuit, wherein: have: A first input terminal for inputting a high frequency signal; an amplifier, amplifying the high frequency signal; a switch circuit connected between the amplifier and the first input terminal; and a bias circuit for supplying a DC bias voltage to the amplifier, The switch circuit has: a first terminal connected to the amplifier and a second terminal connected to the first input terminal; and The first switch includes a transistor having a first control terminal and a first substrate of a first conductivity type, and switches between connection and non-connection between the first terminal and the second terminal based on a voltage applied to the first control terminal. The bias circuit is connected to the first terminal and the first substrate in a direct current manner.

2. The amplifier circuit according to claim 1, wherein: The bias voltage is applied to the first substrate from the bias circuit via the amplifier and the first terminal.

3. The amplifier circuit according to claim 1 or 2, wherein: The first substrate includes: a first region of the second conductivity type connected to the first terminal, and a second region of the second conductivity type connected to the second terminal. The first switch comprises a field effect transistor, The first region is a source region, The second region is a drain region, The first control terminal is a gate terminal, The first region is connected to the first substrate.

4. The amplifier circuit according to any one of claims 1 to 3, wherein: The switch circuit further includes a second switch connected between a path connecting the first switch and the second terminal and a ground line.

5. The amplifier circuit according to any one of claims 1 to 4, wherein: The amplifier is a low noise amplifier that amplifies a reception signal input from the first input terminal.

6. The amplifier circuit according to any one of claims 1 to 5, wherein: The invention further includes an elastic wave filter connected between the first input terminal and the switching circuit.

7. The amplifier circuit according to any one of claims 1 to 6, wherein: An inductor is further provided, one end of the inductor being connected to the input end of the amplifier and the other end of the inductor being connected to the first terminal. No inductor is arranged between a path connecting the input end of the amplifier and the first terminal and the ground.

8. The amplifier circuit according to claim 4, wherein: The switch circuit comprises: One or more first switches are connected in series between the first terminal and the second terminal; and One or more second switches are connected in series between a path connecting the first terminal and the second terminal and a ground line, The switch that is most closely connected to the amplifier among the one or more first switches and the one or more second switches is any one of the one or more first switches.

9. The amplifier circuit according to claim 8, wherein: further comprising a second input terminal to which a high-frequency signal is input, The switch circuit further comprises: a third terminal connected to the second input terminal; one or more third switches connected in series between the first terminal and the third terminal; and One or more fourth switches are connected in series between a path connecting the first terminal and the third terminal and a ground line, The first substrate has a first region of the second conductivity type connected to the first terminal, and a second region of the second conductivity type connected to the second terminal. The third switch comprises: a second control terminal; a second substrate of the first conductivity type; a third region of the second conductivity type, arranged on the second substrate and connected to the first terminal; and a fourth region of the second conductivity type, arranged on the second substrate and connected to the third terminal, wherein the third switch switches connection and non-connection between the first terminal and the third terminal based on a voltage supplied to the second control terminal, supplying the bias voltage from the bias circuit to the second substrate via the amplifier and the first terminal, One of the one or more first switches includes a resistor element connecting the first region and the second region. Another switch among the one or more first switches does not have a resistance element connecting the first region and the second region, One of the one or more third switches has a resistor element connecting the third region and the fourth region. Another switch among the one or more third switches does not have a resistance element connecting the third region and the fourth region.

10. The amplifier circuit according to claim 9, wherein: One of the one or more second switches includes a resistor element connecting two terminals for switching between connection and non-connection. Another switch among the one or more second switches does not have a resistance element connecting two terminals for switching between connection and non-connection, One of the one or more fourth switches includes a resistor element connecting two terminals for switching between connection and non-connection. The other of the one or more fourth switches does not have a resistance element that connects the two terminals that switch between connection and non-connection.

11. A communication device, wherein: have: The amplifier circuit according to any one of claims 1 to 10; and The RF signal processing circuit processes the high frequency signal transmitted by the amplifying circuit.

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