Analog domain content addressable memory system

Abstract

The application belongs to the technical field of data retrieval, and specifically discloses an analog domain content addressable memory system, which comprises a main processor, at least one content addressable memory submodule and a comparator. The main processor is used for splitting search data into search fields and distributing each search field to a corresponding content addressable memory submodule. The content addressable memory submodule is used for comparing the difference between each search bit in the search field and the analog content stored in the analog content addressable memory of the corresponding column, and outputting the corresponding current of each row. The comparator is used for determining the target row that is most matched with the search data based on the corresponding current of each row in each content addressable memory submodule. Through the application, the storage and search of analog value data can be realized, and the current value of the corresponding size is output based on the matching degree of each bit of data, so that the difference between the input data and the stored data can be accurately quantified.

Description

Technical Field

[0001] The present application belongs to the field of data retrieval technology, and more specifically, relates to an analog domain content addressable memory system. Background Art

[0002] Content-addressable memory (CAM) is a type of memory that stores data by content rather than address. It enables efficient, parallel comparisons between input and stored data. In addition to its applications in network transmission and reception, routing, and addressing, CAM has recently gained widespread application in machine learning, pattern recognition, and other fields, benefiting from its ability to perform high-speed similarity searches.

[0003] For big data and large models, as database sizes continue to grow, the hardware overhead of implementing CAM retrieval tasks also increases dramatically. Compared to traditional binary or ternary CAMs, analog CAMs can store and search data in the analog domain, eliminating the need for digital-to-analog converters. This offers significant advantages in density and energy efficiency, making them more suitable for high-dimensional, data-intensive applications.

[0004] However, most analog CAMs lack the ability to express the degree of match between each bit of data, which makes them inadequate for similarity searches in machine learning and data retrieval tasks. Improving the data retrieval accuracy of analog content-addressable memory systems is a pressing technical challenge in this field. Summary of the Invention

[0005] In view of the shortcomings of the prior art, the purpose of this application is to improve the data retrieval accuracy of the analog domain content addressable memory system.

[0006] To achieve the above objectives, the present application provides an analog domain content addressable memory system, comprising: a main processor, at least one content addressable memory submodule, and a comparator, wherein the content addressable memory submodule comprises an analog content addressable memory having m rows and n columns, where m and n are positive integers, and the analog content stored in the same row of all the content addressable memory submodules represents a piece of stored data;

[0007] The main processor is configured to split the search data into s search fields (when s=1, the search data is 1 search field), and assign each search field to a corresponding content addressable memory submodule, where s is the number of content addressable memory submodules and the number of bits of the search field is less than or equal to n;

[0008] The content-addressable memory submodule is configured to compare a difference between each search word bit in the search field and analog content stored in the analog content-addressable memory of the corresponding column, and output a current corresponding to each row, wherein the current corresponding to a row is determined based on a first current output by each analog content-addressable memory in the corresponding row, and the first current has a preset proportional relationship with the difference;

[0009] The comparator is used to determine a target row that best matches the search data based on the current corresponding to each row in each content addressable memory submodule.

[0010] The relevant concepts of search data, search field and search word bit are explained here. Search data is the data input to the content addressable memory sub-module. When the search data length is less than n, a search data can be searched directly; when the search data length is greater than n, a search data will be split into multiple search fields; a search field can include multiple bits, and the search word bit is a bit in the search field.

[0011] The relevant concepts of storage data, storage fields and storage word bits are explained here. Storage data refers to the data stored in the content-addressable memory sub-module. When the storage data length is less than n, a piece of storage data can be directly stored in a content-addressable memory sub-module; when the storage data length is greater than n, a piece of storage data will be split into multiple storage fields; a storage field can include multiple bits, and a storage word bit is a bit in the storage field.

[0012] The data storage method of the content-addressable memory sub-module is explained here. The main processor can split each piece of storage data into s storage fields (a storage field is a field in the storage data) based on m pieces of storage data, and the number of bits of the storage field is less than n; the s storage fields of each piece of storage data are written to the corresponding rows in each content-addressable memory sub-module, and an analog content-addressable memory is used to store the analog value corresponding to a storage word bit (a storage word bit is a bit in the storage field).

[0013] For example, the analog domain content addressable memory system is configured with two content addressable memory sub-modules, and the content addressable memory sub-module has an analog content addressable memory with three rows and four columns. The three storage data can be split into two storage fields, each storage field has four storage word bits, and the two storage fields of the first storage data are respectively stored in the first row of the two content addressable memory sub-modules, and the two storage fields of the second storage data are respectively stored in the second row of the two content addressable memory sub-modules, and so on.

[0014] The above-mentioned splitting of the search data into s search fields is explained here. When the analog domain content addressable memory system is configured with 1 content addressable memory sub-module, the search data can be used as 1 search field. When the analog domain content addressable memory system is configured with 2 content addressable memory sub-modules, the search data can be split into 2 search fields. Similarly, when the analog domain content addressable memory system is configured with s content addressable memory sub-modules, the search data can be split into s search fields.

[0015] Here, an example is given to illustrate the above-mentioned allocation of each search field to the corresponding content-addressable memory sub-module. For example, the analog domain content-addressable memory system is configured with three (i.e., s=3) content-addressable memory sub-modules. The search data can be split into three search fields, and the first search field is allocated to the first content-addressable memory sub-module, the second search field is allocated to the second content-addressable memory sub-module, and the third search field is allocated to the third content-addressable memory sub-module, thereby allocating one search field to each content-addressable memory sub-module.

[0016] Here, an example is given to illustrate the above comparison of the difference between each search word bit in the search field and the analog content stored in the analog content addressable memory of the corresponding column. For example, the content addressable memory submodule has an analog content addressable memory with 2 rows and 3 columns, and the search field has 3 search word bits. In this case, the content addressable memory submodule can simultaneously compare the difference between the first search word bit in the search field and the analog content stored in each analog content addressable memory in the first column, and compare the difference between the second search word bit in the search field and the analog content stored in each analog content addressable memory in the second column, and compare the difference between the third search word bit in the search field and the analog content stored in each analog content addressable memory in the third column. Optionally, in the number of bits n in the search field, Bit When the number of columns of the content addressable memory submodule is greater than the number of bits in the search field, the content addressable memory submodule can compare each search word bit in the search field with the first n Bit The difference between the analog contents stored in the analog content addressable memories of corresponding columns in the columns.

[0017] Here, the current corresponding to the above-mentioned row is determined based on the first current output by each analog content addressable memory in the corresponding row, and is exemplified. For example, the sum of the first currents output by each analog content addressable memory in the 1st row is used as the current corresponding to the 1st row, and the sum of the first currents output by each analog content addressable memory in the 2nd row is used as the current corresponding to the 2nd row. And so on, the sum of the first currents output by each analog content addressable memory in the mth row is used as the current corresponding to the mth row.

[0018] It can be understood that by splitting the search data into s search fields and assigning each search field to a corresponding content-addressable memory sub-module, the content-addressable memory sub-module can store m pieces of storage data (the analog content stored in the same row in all content-addressable memory sub-modules represents one piece of storage data).

[0019] Furthermore, the content-addressable memory submodule can compare the difference between each search word bit in the search field and the analog content stored in the analog content-addressable memory of the corresponding column (representing a storage word bit), and output the current corresponding to each row to the comparator. The first current has a preset proportional relationship with the difference. The first current can represent the Manhattan distance between a search word bit in a line of search data and the corresponding storage word bit in a line of storage data, and has the ability to express the degree of match between each bit of data. The current corresponding to a row is determined based on the sum of the first currents output by each analog content-addressable memory in the corresponding row (the analog content stored in the analog content-addressable memory of a row represents a storage field). Therefore, the current corresponding to a row can represent the Manhattan distance between a search field in a line of search data and the corresponding storage field in a line of storage data.

[0020] The comparator can then determine the Manhattan distance between a piece of search data and any one of the m pieces of stored data (i.e., the analog content stored in the same row in all the content-addressable memory sub-modules) based on the current corresponding to each row in each content-addressable memory sub-module. Furthermore, the comparator can determine the target row among the m rows that best matches the search data, i.e., the analog content stored in the target row in all the content-addressable memory sub-modules best matches the search data.

[0021] Therefore, the analog domain content-addressable memory system provided by this application stores and searches data in the form of analog values, significantly improving storage density compared to binary or ternary CAMs. Furthermore, the output current of this analog CAM can reflect the Manhattan distance between data, expressing the degree of match between each bit of data. It can accurately output the difference between search data and stored data, effectively improving the data retrieval accuracy of the analog domain content-addressable memory system. The high-density, similarity-based search capabilities of this design are well suited to meet current application requirements in machine learning and data retrieval.

[0022] In one possible implementation, the content addressable memory submodule includes a voltage driving unit, an analog content addressable memory array, and a current readout unit, wherein the analog content addressable memory array is composed of analog content addressable memories having m rows and n columns;

[0023] The voltage driving unit is used to encode each search word bit in the search field into a voltage signal (the voltage signal can represent the content of the search word bit), and input the voltage signal corresponding to each search word bit into the analog content addressable memory of the corresponding column;

[0024] The analog content addressable memory is used to compare the difference between the search word and the analog content based on the voltage signal and the stored analog content (the analog value corresponding to the storage word), and output a first current to the current reading unit;

[0025] The current readout unit includes m input ports and m output ports, one input port corresponds to one output port, and the first current output by the analog content addressable memory in the same row enters the same input port of the current readout unit (through a matching line) (the first current output by the analog content addressable memory in different rows enters different input ports of the current readout unit);

[0026] The current reading unit is used to stabilize the voltage of the input port and copy the current of the input port as the current of the output port;

[0027] The comparator includes m input ports (one input port of the comparator corresponds to the same row in each analog content addressable memory array), and the output ports corresponding to the same row in different current readout units are connected to the same input port in the comparator;

[0028] The comparator is used to determine the target row that best matches the search data based on the currents of the m input ports.

[0029] Here, the first currents output by the analog content addressable memories in the same row entering the same input port of the current readout unit are described. The current output ends of the analog content addressable memories in the same row are connected to the same matching line, and thus the sum of the first currents output by the analog content addressable memories in the same row will enter the input port of the current readout unit through the matching line.

[0030] Here, an example is given of connecting the output ports corresponding to the same row in different current readout units to the same input port in the comparator. For example, the analog domain content addressable memory system is configured with two content addressable memory sub-modules, and the content addressable memory sub-module has three rows and four columns of analog content addressable memory. Accordingly, the comparator includes three input ports. In this case, the output ports corresponding to the first row of the current readout units of the two content addressable memory sub-modules are all connected to the first input port of the comparator; the output ports corresponding to the second row are all connected to the second input port of the comparator; and the output ports corresponding to the third row are all connected to the third input port of the comparator.

[0031] The search process is described here. The search process includes the following steps: (1) The main processor determines whether the analog content addressable memory operating mode is the exact match mode or the interval match mode, and inputs the search data into the content addressable memory sub-module, and starts the voltage clamping circuit in the current reading unit to stabilize the matching line voltage; (2) The input search data is encoded into a corresponding voltage value through the voltage driving unit, input into the analog content addressable memory array, and then searched and compared with the data stored in the array in parallel, and the results are reflected in the current of each matching line; (3) After the current reading unit reads the matching line current, the comparator circuit selects the matching line with the smallest current value. This row is the location of the data with the highest matching degree.

[0032] Therefore, the current at one input port of the comparator can represent the Manhattan distance between a search data line and a storage data line. Then, based on the currents at the m input ports, the target row that best matches the search data can be determined among the m rows. In other words, the analog content stored in the target row in the entire content-addressable memory submodule best matches the search data.

[0033] In one possible implementation, the analog content addressable memory includes: a first storage unit (unit P) and a second storage unit (unit N);

[0034] The first storage unit is configured to compare the difference between the search word bit and the analog content based on the analog content stored in the storage unit and the voltage signal provided by the voltage driving unit; if the search word bit is smaller than the analog content stored in the storage unit, the first storage unit outputs a second current proportional to the difference; otherwise, the output current is zero;

[0035] The second storage unit is configured to compare the difference between the search word bit and the analog content based on the analog content stored in the storage unit and the voltage signal provided by the voltage driving unit; if the search word bit is greater than the analog content stored in the storage unit, output a third current proportional to the difference; otherwise, the output current is 0;

[0036] The current output terminal of the first storage unit and the current output terminal of the second storage unit are connected to the same input port of the current reading unit through a matching line, and the first current is the sum of the second current and the third current.

[0037] In a possible implementation, the voltage driving unit is used to encode each search word bit in the search field into a first voltage signal V BLP , the second voltage signal The third voltage signal V BLN and the fourth voltage signal

[0038] The first storage unit includes: a first non-volatile device, a second non-volatile device and a first MOSFET, and the voltage driving unit provides a first voltage signal V corresponding to the search word bit (through the first bit line) BLP To the top electrode of the first non-volatile device; the bottom electrode of the first non-volatile device, the drain of the first MOSFET and the bottom electrode of the second non-volatile device are electrically connected, and the voltage driving unit provides a second voltage signal corresponding to the search word bit (through the second bit line) to a top electrode of a second nonvolatile device;

[0039] The second storage unit includes: a third non-volatile device, a fourth non-volatile device and a second MOSFET, and the voltage driving unit provides a third voltage signal V corresponding to the search word bit (through the third bit line) BLN To the top electrode of the third non-volatile device, the bottom electrode of the third non-volatile device, the drain of the second MOSFET and the bottom electrode of the fourth non-volatile device are electrically connected, and the voltage driving unit provides a fourth voltage signal corresponding to the search word bit (through the fourth bit line) to a top electrode of a fourth nonvolatile device;

[0040] The first MOSFET and the second MOSFET are N-type transistors operating in diode mode, the drain and gate of the MOSFET are electrically connected, and the source of the first MOSFET and the source of the second MOSFET are commonly connected to the same input port of the current reading unit through a matching line;

[0041] The non-volatile device is used to store the conductance value corresponding to a storage word bit in a piece of storage data;

[0042] VBLP It is determined by the following formula: V BLP =V ML +V GS +V P1 , V p1 =kV max +(1-k)V min ;

[0043] It is determined by the following formula:

[0044] V BLN It is determined by the following formula: V BLP =V ML +V GS +V N1 ;

[0045] It is determined by the following formula:

[0046] Among them, k represents the search word position, V ML Indicates the voltage on the matching line, V GS Represents the voltage between the gate and source of the MOSFET, V P1 represents the voltage between the top electrode and the bottom electrode of the first nonvolatile device, V P2 represents the voltage between the top electrode and the bottom electrode of the second nonvolatile device, V N1 represents the voltage between the top electrode and the bottom electrode of the third nonvolatile device, V N2 represents the voltage between the top electrode and the bottom electrode of the fourth nonvolatile device, V max Indicates the maximum voltage difference between the two ends of the non-volatile device, V min Indicates the minimum value of the voltage difference between the two ends of the non-volatile device.

[0047] Here, the first bit line, second bit line, third bit line, and fourth bit line are described. The voltage driving unit can be configured with n groups of bit lines, one group of bit lines corresponding to a column of analog content addressable memory. The group of bit lines includes the first bit line, the second bit line, the third bit line, and the fourth bit line. The first bit line is connected to the top electrode of the first non-volatile device of the first storage cell (cell P) in the analog content addressable memory in the corresponding column, the second bit line is connected to the top electrode of the second non-volatile device of the first storage cell (cell P) in the analog content addressable memory in the corresponding column, the third bit line is connected to the top electrode of the third non-volatile device of the second storage cell (cell N) in the analog content addressable memory in the corresponding column, and the fourth bit line is connected to the top electrode of the fourth non-volatile device of the second storage cell (cell N) in the analog content addressable memory in the corresponding column.

[0048] Herein, the match line is described as follows: each input port of the current reading unit can be configured with a match line, and one match line corresponds to the source of the MOSFET of one row of analog content addressable memory.

[0049] In a possible implementation, in the first matching mode (exact matching mode), the conductance value G p1 of the first nonvolatile device p2 , the conductance value G N1 of the second nonvolatile device N2 , the conductance value G P1 of the third nonvolatile device max , and the conductance value G min of the fourth nonvolatile device are determined by the following formulas:

[0050] G P2 = (1-j) G max + jG min ;

[0051] G N1 = jG P2 + (1-j) G N2 ;

[0052] G P1 = G max , G min = G ML ;

[0053] wherein j represents a storage bit, G max represents a maximum value of the conductance value of the nonvolatile device, and G max represents a minimum value of the conductance value of the nonvolatile device.

[0054] Optionally, k and j are normalized data, i.e., 0≤k,j≤1.

[0055] In a possible implementation, in the first matching mode (exact matching mode), the preset proportional relationship is determined by the following formula:

[0056] I min = |k-j|·α;

[0057] α = V min G ML - V N2 G P1 ;

[0058] wherein I max represents the first current, |k-j| represents a difference degree, and α represents a proportional coefficient.

[0059] In a possible implementation, in the second matching mode (interval matching mode), the conductance value G p2, the conductance value G of the second nonvolatile device p2 , the conductance value G of the third nonvolatile device N1 , and the conductance value G of the fourth nonvolatile device N2 are determined by the following formula:

[0060] G P1 = (1 - j P )G max + j P G min ;

[0061] G P2 = j P G max + (1 - j P )G min ;

[0062] G N1 = j N G max + (1 - j N )G min ;

[0063] G N2 = (1 - j N )G max + j N G min ;

[0064] wherein j P < j N < j P represents the lower limit value of the interval of the storage bit, j N represents the upper limit value of the interval of the storage bit, G max represents the maximum value of the conductance value of the nonvolatile device, and G min represents the minimum value of the conductance value of the nonvolatile device.

[0065] In a possible implementation, in the second matching mode (interval matching mode), the preset proportional relationship is determined by the following formula:

[0066] I P = 0 when k is within the matching interval [j N , j ML ];

[0067] I P = |k - j ML |a when k < j P ;

[0068] I N = |k - j ML |a when k > j N ; and

[0069] α=V max G max -V min G min ;

[0070] Among them, I ML represents the first current, |kj P |和|kj N | represents the difference, and α represents the proportional coefficient.

[0071] Optionally, the host processor may control the operation mode (exact match mode or range match mode) of the analog content addressable memory and receive the final matching result (target row) output by the comparator.

[0072] In a possible implementation, the non-volatile device is a resistive random access memory, a ferroelectric memory, a phase change memory, a spin transfer torque magnetic random access memory, a NOR Flash device, or a NAND Flash device.

[0073] In one possible implementation, the search word bit k and the storage word bit j are separate values.

[0074] In a possible implementation, the current sensing unit includes m current sensing sub-units, each of which includes a voltage clamping circuit and a current mirror;

[0075] The voltage clamping circuit is used to stabilize the voltage on the corresponding matching line. The first current output by the analog content addressable memory in the same row enters the current reading subunit through the same matching line.

[0076] The current mirror is used to copy the current on the corresponding matching line and output it to the comparator.

[0077] It should be noted that the current reading subunit has an input terminal and an output terminal. The input terminal of the current reading subunit serves as an input terminal of the current reading unit, and the output terminal of the current reading subunit serves as an output terminal of the current reading unit. The first current output by the analog content addressable memory in the same row enters the input terminal of the current reading subunit through the same matching line, and the current output port of the current mirror serves as the output terminal of the current reading subunit.

[0078] In a possible implementation, when the preset proportional relationship is a positive proportional relationship, the comparator is a loser-take-all (LTA) circuit.

[0079] The LTA includes m input ports (one LTA input port corresponds to each row in the analog content addressable memory array). The output ports corresponding to the same row in different current readout units are connected to the same input port in the LTA. The LTA compares the input currents in parallel, finds the lowest value, and sets the output of that row to 1, while the outputs of other rows are set to 0.

[0080] In general, the above technical solutions conceived by this application have the following beneficial effects compared with the existing technologies:

[0081] (1) The analog domain content addressable memory system provided by the embodiment of the present application stores and searches data in the form of analog values, which greatly improves the storage density compared to binary or ternary CAMs. At the same time, the output current of the analog CAM can reflect the Manhattan distance between the data, has the ability to express the degree of matching between each bit of data, can accurately output the difference between the search data and the stored data, and can effectively improve the data retrieval accuracy of the analog domain content addressable memory system. The high-density and similarity search capabilities of this design can well meet the current application requirements in the fields of machine learning and data retrieval.

[0082] (2) The analog content addressable memory provided in the embodiment of the present application can achieve an output proportional to the degree of matching and can be configured in an exact match mode and an interval match mode. The exact match mode requires that each data bit must be completely consistent, while in the interval match mode, the data is matched within a given range. Compared to an analog content addressable memory that can only output "match" and "mismatch", it can adapt to the requirements of different application scenarios for data retrieval accuracy and is applicable to a wider range of application scenarios, especially in scenarios where data needs to be clustered or similarity calculated in machine learning and neural network applications.

[0083] (3) The embodiments of the present application use a current readout circuit and a comparator circuit to directly compare the analog currents of the matching lines and output the results. The entire process is performed in the analog circuit, and there is no need to convert to the digital domain for comparison, thus avoiding the large hardware resource and energy consumption overhead of the digital-to-analog converter. In fields such as artificial intelligence, it has significant energy efficiency advantages over existing computing systems. BRIEF DESCRIPTION OF THE DRAWINGS

[0084] Figure 1 Schematic diagram of the structure of the analog domain content addressable storage system provided by an embodiment of the present application;

[0085] Figure 2 This is a schematic diagram of the basic unit structure and working principle of the analog domain content addressable memory provided by an embodiment of the present application;

[0086] Figure 3 1 is a graph showing the relationship between input data and input voltage value and stored data and device conductance value provided in an embodiment of the present application;

[0087] Figure 4 This is a graph showing the output current of the matching line in the precise matching mode provided by an embodiment of the present application;

[0088] Figure 5 is a curve diagram of the matching line output current of the interval matching mode provided in an embodiment of the present application;

[0089] Figure 6 This is a matching line voltage clamping and current reading circuit diagram provided in an embodiment of the present application;

[0090] Figure 7 This is a schematic diagram of the search process provided by the embodiment of the present application;

[0091] Figure 8 This is a schematic diagram of an example of simulating a content addressable memory to perform a precise search process provided by an embodiment of the present application;

[0092] Figure 9 This is a simulation waveform diagram of a precise search process performed by a simulated content addressable memory provided by an embodiment of the present application;

[0093] Figure 10 This is a schematic diagram of an example of simulating a content addressable memory execution interval search process provided by an embodiment of the present application;

[0094] Figure 11 This is a simulation waveform diagram of the interval search process performed by the simulated content addressable memory provided in an embodiment of the present application.

[0095] Throughout the drawings, the same reference numerals are used to denote the same elements or structures, wherein:

[0096] 100: Main processor; 102: Content addressable memory submodule; 104: Comparator; 106: Voltage driver unit; 108: Analog content addressable memory array; 110: Current sensing unit; 202: Unit P; 204: Unit N; 206: First non-volatile device; 208: Second non-volatile device; 210: First MOSFET; 212: Third non-volatile device; 214: Fourth non-volatile device; 216: Second MOSFET. DETAILED DESCRIPTION

[0097] In order to make the purpose, technical solutions and advantages of this application more clear, the following further describes this application in detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain this application and are not intended to limit this application.

[0098] The terms "first" and "second" in this specification and claims are used to distinguish different objects rather than to describe a specific order of objects. For example, "first storage unit" and "second storage unit" are used to distinguish different response messages rather than to describe a specific order of storage units.

[0099] In the embodiments of this application, words such as "exemplary" or "for example" are used to indicate examples, illustrations, or descriptions. Any embodiment or design described as "exemplary" or "for example" in the embodiments of this application should not be interpreted as being preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary" or "for example" is intended to present the relevant concepts in a concrete manner.

[0100] In the description of the embodiments of the present application, unless otherwise specified, "multiple" means two or more, for example, multiple processing units means two or more processing units, etc.; multiple elements means two or more elements, etc.

[0101] The present application provides an analog domain content addressable memory system, which includes: a main processor, a content addressable memory sub-module, and a comparator; the main processor is used to split data into small data fields, and each data field is output to each content addressable memory sub-module respectively; at the same time, the main processor needs to configure the content addressable memory working mode to exact match or interval match.

[0102] The content addressable memory submodule includes: a voltage driving unit, an analog content addressable memory array and a current reading unit.

[0103] (1) A voltage driving unit, configured to output a voltage signal of an analog value to the analog content addressable memory array.

[0104] (2) Analog content addressable memory array, used to store analog value data, wherein each bit of data is stored through two complementary units (unit P and unit N). Each unit (unit P or unit N) contains two non-volatile devices and an N-type metal-semiconductor-oxide field effect transistor operating in diode mode. The top electrodes of the two non-volatile devices are respectively connected to a pair of complementary bit lines (BL), while the bottom electrodes are connected to the gate and drain of the transistor, and the source of the transistor is connected to the matching line (ML). At this time, the transistor operates in diode mode. The input signal is applied to the analog CAM unit through the bit line in the form of voltage. At this time, the second current I flowing from unit P to the matching line OP The current I of the two non-volatile devices P1 with I P2 Similarly, the third current I flowing from unit N to the matching line ONThe current I of the two non-volatile devices N1 with I N2 Let the searched data be k, the stored information be j, and simulate the sum of the currents flowing from CAM units P and N to the matching line, that is, the first current I ML =I OP +I ON Is proportional to the difference between the search data and the stored data, that is: I ML =|kj|·α, where α is the proportionality coefficient. The analog CAM cells on the same match line are added according to Kirchhoff's current law, and finally output a current based on the total matching degree on the match line.

[0105] (3) Current reading unit, including matching line voltage clamping circuit and current reading circuit. Among them, the voltage clamping circuit uses an operational amplifier to realize negative feedback function, clamping the matching line voltage at the reference voltage V ref The current reading circuit uses a current mirror to read the current on the matching line and outputs it to the comparator for comparison.

[0106] Alternatively, for longer fields, the host processor can split the data into s shorter fields and store them in s content-addressable memory submodules. When performing a search, the input data is similarly split into s submodules and input into the corresponding submodules. Each submodule has m rows of match lines, so the total readout current is m × s.

[0107] The s readout currents corresponding to the match lines in the same row are summed using Kirchhoff's law, resulting in m currents that are input to a comparator. This comparator, composed of m loser-take-all (LTA) circuits, is used to select the data with the highest matching degree in the analog CAM array. The higher the match between the stored data and the search data, the lower the output current of the corresponding match line. The LTA quickly finds the lowest value among the m rows of match line currents and sets the output of that row to 1, while the other outputs are set to 0.

[0108] Optionally, the analog CAM cell can be configured in interval matching mode: two complementary cells (cell P and cell N) are configured to store different data values ​​j respectively. P and j N , and j P <j N When the input information is in a given interval, that is, j P <k<j N When the output current I ML =0; when the input information is outside the interval, that is, k≤j P or k ≥ j N When the output current I MLA current proportional to the difference between the data.

[0109] Optionally, the data value k and the storage value j may be separate values, in which case the content addressable memory is in a multi-value mode.

[0110] Optionally, the non-volatile device is a resistive random access memory, a ferroelectric memory, a phase change memory, a spin transfer torque magnetic random access memory, a NOR Flash device or a NAND Flash device.

[0111] The embodiments of the present application are described below in conjunction with the drawings in the embodiments of the present application.

[0112] Example 1

[0113] Figure 1 Schematic diagram of the structure of the analog domain content addressable storage system provided by the embodiment of the present application. Figure 1 As shown, the system includes a main processor 100, a content addressable memory submodule 102, and a comparator 104. The submodule includes a voltage driving unit 106, an analog content addressable memory array 108, and a current reading unit 110.

[0114] The analog domain content addressable storage system provided by the present application can split long data into multiple units for searching. Specifically, let a search data be Q, and the main processor splits it into Q1, Q2, ..., Q according to the length of the data Q. S There are s fields in total, and each field is no longer than n bits. Q1, Q2, ..., Q S The data is input into s content-addressable memory (CAM) submodules. Each CAM submodule stores m×n analog contents, and a row of analog contents (n analog contents) represents a field in a piece of stored data. The voltage driving unit in each submodule converts the input data into an analog voltage and inputs it into the CAM array. Each CAM array contains m rows and n columns, with a total of m×n CAMs. An CAM can store an analog value, and an analog value represents a bit of a field in a piece of stored data.

[0115] Specifically, the voltage driver unit encodes the input data into a voltage signal and then inputs the voltage through the bit line (BL). The stored data is stored in the analog content addressable memory array as conductance values. Both the input and output data can be analog quantities, ranging from 0 to 1. After the search process is complete, the output data is output via the match line (ML) current. The match line is connected to a current sensing unit, which maintains the match line voltage and senses the match line current. Each content addressable memory submodule outputs m output currents, corresponding to m rows of match lines. The match lines of different content addressable memory submodules in the same row are interconnected. The output currents in the same row are accumulated and input to a comparator. The comparator, specifically an LTA circuit, is used to select the smallest match line current. When the input current value of a row is the smallest, the output of that row is set to "1," corresponding to the data address with the highest match, while the outputs of other rows are set to "0."

[0116] Figure 2 This is a schematic diagram of the basic unit structure and working principle of the analog domain content addressable memory provided by the embodiment of the present application, such as Figure 2 As shown, the analog content addressable memory is composed of a cell P 202 and a cell N 204. Each cell (cell P or cell N) contains two non-volatile memories and a metal-semiconductor-oxide field-effect transistor (MOSFET). P 、 BL N 、 Four bit lines are input, and the data is in the form of conductance value G P1 , G P2 , G N1 , G N2 The first nonvolatile device 206, the second nonvolatile device 208, the third nonvolatile device 212, and the fourth nonvolatile device 214 are stored in the form of . The first MOSFET 210 and the second MOSFET 216 are N-type transistors operating in diode mode, with their drains and gates connected to each other and their sources connected to a match line. Within each cell, the top electrode of the nonvolatile device is connected to the bit line, while the bottom electrode is connected to the drain of the transistor.

[0117] Specifically, when the analog content addressable memory performs a search, the search voltage V applied to the bit line is BLP 、 V BLN 、 The value of the transistor gate-source voltage V GS , matching line voltage V MLand the voltage difference across the nonvolatile device (V P1 、-V P2 、V N1 、-V N2 ). For example, BL P The search voltage value on BLP =V ML +V GS +V P1 , The search voltage value on

[0118] It should be noted that the transistor gate-source voltage V GS , matching line voltage V ML The value of needs to comprehensively consider the suitable working range of the transistor and the readout circuit, and is set by the main processor through the control voltage drive unit.

[0119] Specifically, the input voltage value and the stored conductance value are set within a given range. The maximum voltage difference between the two ends of the non-volatile device is specified as V max , the minimum value is V min , the maximum value of conductance is G max , the minimum value is G min , are all encoded by the main processor through the control voltage drive unit. It is stipulated that the above electrical signals satisfy the following relationship: V max G min =V min G max In various embodiments, the analog content addressable memory input data value is k, and the stored data value is j, where k and j are both normalized analog data, that is, 0≤k, j≤1.

[0120] Specifically, data k and j are encoded as a voltage signal and a conductance value of a nonvolatile device, respectively. Figure 3 : is a graph showing the relationship between input data and input voltage value and stored data and device conductance value provided in an embodiment of the present application. Figure 3 The search voltage and conductance values ​​corresponding to data values ​​k and j are shown. The search voltage V in each simulation unit P1 and V P2 And store the conductance value G P1 , G P2 For example, the voltage in unit P satisfies: V p1 =kV max +(1-k)V min , V p2 =(1-k)V max +kV min ; Conductivity value satisfies: G p1 =(1-j)Gmax +jG min ,G p2 =jG max +(1-j)G min . The voltage and conductance values in cell N are in a reciprocal relationship with the values in cell P, i.e., V N1 = V P2 , V N2 = V P1 , G N1 = G P2 , G N2 = G P1 .

[0121] When a voltage signal is applied, the analog CAM will output a current to the match line. For cell P of the analog CAM, the output current I OP is the difference between the currents I P1 , I P2 flowing from the two non-volatile devices. For cell N of the analog CAM, the output current I OP is the difference between the currents I N1 , I N2 flowing from the two non-volatile devices. Since transistors T P , T N are working in diode mode, the direction of the current flowing to the match line is limited, so when I OP and I ON are less than 0, the actual output current is 0. Specifically, the current I OP flowing to the match line from cell P, and the current I ON flowing to the match line from cell N satisfy the following formula:

[0122]

[0123] wherein α = V max G max - V min G min is a proportional coefficient.

[0124] Figure 4 is a graph of the output current curve of the match line in the precise match mode provided by the embodiment of the present application, Figure 4 which shows the relationship between the output current I ML of the match line and the difference between the input signal and the stored signal. The output current of the match line is the sum of the output currents of the two CAM cells: I ML = I OP + I ON=|kj|α. In various embodiments, the degree of match between the search data and the stored data is reflected by the magnitude of the current output by the match line. Through the aforementioned analog CAM search method, the match line will output a current proportional to the difference between the data, with a proportional coefficient of α. When the difference between the input data k and the stored data j is greater, the output current I ML It also increases according to the proportional coefficient α. Therefore, the output current can reflect the matching degree between the data, that is, the smaller the output current, the higher the matching degree.

[0125] Optionally, the data k and j can be set to discrete values ​​to alleviate the difficulty of nonvolatile devices in accurately encoding arbitrary analog values. In this case, the CAM operates in multi-value mode. For example, k can be set to 0, 0.25, 0.5, or 0.75, which is a 2-bit encoding mode.

[0126] Alternatively, the analog CAM can be configured in interval matching mode. In this mode, the data stored in the analog CAM cell P and cell N are no longer the same value, but two different data values. P and j N . Provisions P <j N When the input data k is in the matching interval (j P ,j N ) within the output current I ML When the input data is in the mismatch interval, that is, k <k P or k>k N , I ML The output is a current proportional to the difference.

[0127] Figure 5 is a matching line output current curve diagram of the interval matching mode provided in an embodiment of the present application, Figure 5 The relationship between input data and output current working in range matching mode is shown.

[0128] Figure 6 This is a matching line voltage clamping and current reading circuit diagram provided by an embodiment of the present application, such as Figure 6 As shown, the current reading subunit consists of a voltage clamp circuit and a current mirror. The voltage clamp circuit consists of an N-type transistor and an amplifier. The function of this circuit is to match the line voltage V ML Clamped to the reference voltage V ref When the matching line current I ML After flowing out of the transistor source, the current mirror converts I ML Copied as output current I c , I ML =I c , and input to the comparator.

[0129] Figure 7 This is a schematic diagram of the search process provided by the embodiment of the present application. Figure 7 The overall framework of simulating CAM to realize search is shown. For a long data Q, it will be split into s fields Q1, Q2, ..., Q s . Each field is input into the analog content addressable memory array, and the array size is m×n. After the input is compared with the stored data, the resulting match line current is output through the readout circuit. The current output lines in the same row in different content addressable memory sub-modules are all connected to the same input port of the minimum comparator LTA circuit. The output currents of the same row are directly added on the connected match lines according to Kirchhoff's current law and input into the LTA circuit. LTA will screen out the path with the smallest current and set the output of the corresponding row to 1, while the other rows are set to 0. The path with an output of 1 is the location of the data with the highest match with the input data.

[0130] Example 2

[0131] Figure 8 FIG. 1 is a schematic diagram of an example of a simulated content addressable memory performing a precise search process provided by an embodiment of the present application. Figure 8 As shown, in this example, the length of the data is 4 and the array size of the analog content addressable device is 3×4. Matching line voltage V ML is 0.3V, the transistor source-drain voltage V DS is 0.56V, the maximum search voltage V max =0.5V, minimum search voltage V min =0.05V, maximum conductance value G max 100μS, minimum conductance value G min is 10μS, and the proportional coefficient α=V max G max -V min G min =45μA. Taking the search data "0.1, 0.3, 0.6, 0.7" as an example, the first row stores data "0.4, 0.1, 0.5, 0.3". From the first to the fourth bit, the difference between each data is 0.3, 0.2, 0.1, and 0.4 respectively, so the total mismatch is 1. Similarly, the sum of the mismatch of the second and third rows is 1.6 and 0.8 respectively. The output current value is multiplied by the mismatch |kj| as the proportional coefficient α to obtain the theoretical output current I of the matched line. o1 , I o2 , I o3 The above currents are then compared in the comparator circuit LTA. o3The third row will be filtered out as the minimum value, and the data in the row is the data with the highest matching degree.

[0132] Figure 9 is a simulation waveform diagram of the precise search process of the analog content addressable memory provided in the embodiments of the present application, Figure 9 The simulation waveform diagram of the precise search process is shown. The voltage signal is input on the search line at t=10 ns. When the current is stable, the output current I o2 >I o1 >I o3 Therefore, the third row is the data with the highest matching degree.

[0133] Figure 10 is an example schematic diagram of the interval search process of the analog content addressable memory provided in the embodiments of the present application, as Figure 10 shown, in the example, the configuration of the circuit signal is the same as that in the previous example. Taking the first row as an example, the search data is “0.1, 0.3, 0.6, 0.7”, and the stored data is “0.4-0.5, 0.1-0.8, 0-1.0, 0.5-0.9”. For the first bit data, the matching interval is (0.4, 0.5), that is, the lower limit of the interval is 0.4, and the upper limit of the interval is 0.5. At this time, the first bit data is outside the matching interval, and the difference value with the lower limit of the interval is 0.3, while the second to fourth bits are all within the matching interval, so the total mismatch degree is 0.3; similarly, the mismatch degrees of the second row and the third row of data are 1 and 0.5 respectively. The theoretical output currents I o1 , I o2 , I o3 of the matching lines are 13.5 μA, 45 μA, and 22.5 μA respectively. After comparison by the LTA, the first row will output “1”, corresponding to the highest matching degree. While the other two rows will output “0”, corresponding to lower matching degrees.

[0134] Figure 11 is a simulation waveform diagram of the interval search process of the analog content addressable memory provided in the embodiments of the present application, Figure 11 The simulation waveform diagram of the precise search process is shown. The voltage signal is input on the search line at t=10 ns. When the current is stable, the output current I o2 >I o3 >I o1 Therefore, the first row is the data with the highest matching degree.

[0135] It should be understood that expressions such as "include" and "may include" used in this application indicate the existence of the disclosed functions, operations, or constituent elements, and do not limit one or more additional functions, operations, and constituent elements. In this application, terms such as "include" and / or "have" may be interpreted as indicating specific characteristics, numbers, operations, constituent elements, components, or combinations thereof, but may not be interpreted as excluding the existence or possibility of adding one or more other characteristics, numbers, operations, constituent elements, components, or combinations thereof.

[0136] The above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this application should be included in the scope of protection of this application. Therefore, the scope of protection of this application should be based on the scope of protection of the claims.

Claims

1. An analog domain content addressable memory system, characterized in that: include: A main processor, at least one content-addressable memory submodule, and a comparator, wherein the content-addressable memory submodule has an analog content-addressable memory with m rows and n columns, where m and n are positive integers, the analog content stored in the same row of all the content-addressable memory submodules represents a piece of stored data, and the content-addressable memory submodule stores m pieces of stored data; The main processor is used to split the search data into s search fields and assign each search field to a corresponding content addressable memory submodule, where s is the number of content addressable memory submodules and the number of bits of the search field is less than or equal to n; The content-addressable memory submodule is configured to compare a difference between each search word bit in the search field and analog content stored in the analog content-addressable memory of the corresponding column, and output a current corresponding to each row, wherein the current corresponding to a row is determined based on a sum of first currents output by each analog content-addressable memory in the corresponding row, and the first current has a preset proportional relationship with the difference; The comparator is configured to determine a Manhattan distance between a search data and any one of the m stored data based on the current corresponding to each row in each content addressable memory submodule, and then determine a target row in the m rows that best matches the search data; Among them, an analog content addressable memory is used to store a storage word bit; the difference is based on Determined, or, the difference is based on and Determined; Indicates the search word position, Indicates the storage word bit, Indicates the lower limit of the storage word range, Indicates the upper limit of the storage word range.

2. The analog domain content addressable memory system according to claim 1, wherein: The content addressable memory submodule includes a voltage driving unit, an analog content addressable memory array and a current reading unit, wherein the analog content addressable memory array is composed of analog content addressable memories of m rows and n columns; The voltage driving unit is used to encode each search word bit in the search field into a voltage signal, and input the voltage signal corresponding to each search word bit into the analog content addressable memory of the corresponding column; The analog content addressable memory is used to compare the difference between the search word bit and the analog content based on the voltage signal and the stored analog content, and output a first current to the current reading unit; The current reading unit includes m input ports and m output ports, one input port corresponds to one output port, and the first currents output by the analog content addressable memories in the same row enter the same input port of the current reading unit; The current reading unit is used to stabilize the voltage of the input port and copy the current of the input port as the current of the output port; The comparator includes m input ports, and the output ports corresponding to the same row of different current readout units are connected to the same input port in the comparator; The comparator is used to determine a target row that best matches the search data based on the currents of the m input ports.

3. The analog domain content addressable memory system according to claim 2, wherein: The analog content addressable memory includes: a first storage unit and a second storage unit; The first storage unit is configured to compare the difference between the search word bit and the analog content based on the analog content stored in the storage unit and the voltage signal provided by the voltage driving unit; if the search word bit is smaller than the analog content stored in the storage unit, output a second current proportional to the difference; otherwise, output the current as 0; The second storage unit is configured to compare the difference between the search word bit and the analog content based on the analog content stored in the storage unit and the voltage signal provided by the voltage driving unit; if the search word bit is greater than the analog content stored in the storage unit, output a third current proportional to the difference; otherwise, output the current as 0; The current output end of the first storage unit and the current output end of the second storage unit are commonly connected to the same input port of the current readout unit, and the first current is the sum of the second current and the third current.

4. The analog domain content addressable memory system according to claim 3, characterized in that: The voltage driving unit is used to encode each search word in the search field into a first voltage signal , the second voltage signal , the third voltage signal and the fourth voltage signal ; The first storage unit includes: a first non-volatile device, a second non-volatile device and a first MOSFET, and the voltage driving unit provides a first voltage signal corresponding to the search word bit. To the top electrode of the first non-volatile device, the bottom electrode of the first non-volatile device, the drain of the first MOSFET and the bottom electrode of the second non-volatile device are electrically connected, and the voltage driving unit provides a second voltage signal corresponding to the search word bit to a top electrode of the second nonvolatile device; The second storage unit includes: a third non-volatile device, a fourth non-volatile device and a second MOSFET, and the voltage driving unit provides a third voltage signal corresponding to the search word bit. To the top electrode of the third non-volatile device, the bottom electrode of the third non-volatile device, the drain of the second MOSFET and the bottom electrode of the fourth non-volatile device are electrically connected, and the voltage driving unit provides a fourth voltage signal corresponding to the search word bit to a top electrode of the fourth nonvolatile device; The first MOSFET and the second MOSFET are N-type transistors operating in diode mode, the drain and gate of the MOSFET are electrically connected, and the source of the first MOSFET and the source of the second MOSFET are commonly connected to the same input port of the current reading unit through a matching line; The non-volatile device is used to store the conductance value corresponding to a storage word bit in a piece of storage data; It is determined by the following formula: , ; It is determined by the following formula: , ; It is determined by the following formula: ; It is determined by the following formula: , ; in, Indicates the search word position, represents the voltage on the matching line, represents the voltage between the gate and source of the MOSFET, represents the voltage between the top electrode and the bottom electrode of the first non-volatile device, represents the voltage between the bottom electrode and the top electrode of the second non-volatile device, represents the voltage between the top electrode and the bottom electrode of the third non-volatile device, represents the voltage between the bottom electrode and the top electrode of the fourth non-volatile device, Indicates the maximum value of the voltage difference between the two ends of the non-volatile device. Indicates the minimum value of the voltage difference between the two ends of the non-volatile device.

5. The analog domain content addressable memory system according to claim 4, characterized in that: In the first matching mode, the conductance value of the first non-volatile device is , the conductance value of the second non-volatile device , the conductance value of the third non-volatile device and the conductance value of the fourth nonvolatile device Determined by the following formula: ； ； ； in, Indicates the storage word bit, Indicates the maximum conductance value of the non-volatile device, Indicates the minimum conductance value of the nonvolatile device.

6. The analog domain content addressable memory system according to claim 5, characterized in that: In the first matching mode, the preset proportional relationship is determined by the following formula: ； ； in, represents the first current, represents the degree of difference, Represents the proportionality factor.

7. The analog domain content addressable memory system according to claim 4, characterized in that: In the second matching mode, the conductance value of the first non-volatile device is , the conductance value of the second non-volatile device , the conductance value of the third non-volatile device and the conductance value of the fourth nonvolatile device Determined by the following formula: ； ； ； ； in, , Indicates the lower limit of the storage word range, Indicates the upper limit of the storage word range, Indicates the maximum conductance value of the non-volatile device, Indicates the minimum conductance value of the nonvolatile device.

8. The analog domain content addressable memory system according to claim 7, characterized in that: In the second matching mode, the preset proportional relationship is determined by the following formula: exist In matching range Internal time, ; exist hour, ; exist hour, ; ； in, represents the first current, and represents the degree of difference, Represents the scale factor.

9. The analog domain content addressable memory system according to any one of claims 2 to 8, characterized in that: Search word position and storage word bits Can be configured to discrete values.

10. The analog domain content addressable memory system according to any one of claims 2 to 8, characterized in that: The current reading unit includes m current reading sub-units, and the current reading sub-units include a voltage clamping circuit and a current mirror; The voltage clamp circuit is used to stabilize the voltage on the corresponding matching line. The first current output by the analog content addressable memory in the same row enters the current readout subunit through the same matching line. The current mirror is used to replicate the current on the corresponding matching line and output the copied current to the comparator.

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