SGT device and preparation method thereof

Abstract

The invention discloses an SGT device and a preparation method thereof. The preparation method comprises the following steps: forming an epitaxial layer on a substrate; the epitaxial layer comprises a first surface and a second surface which are oppositely arranged; the first surface is the surface, away from the substrate, of the second surface, the epitaxial layer comprises a body region, and the surface, away from the substrate, of the body region and the first surface are on the same plane; forming at least one first groove in the first surface; the first groove extends into the epitaxial layer from the first surface; forming a protection layer on the side wall of the first groove; forming a second groove in each first groove; the second grooves extend into the epitaxial layer from the bottoms of the first grooves, and each first groove corresponds to one second groove; in the first direction, the width of the second groove is larger than that of the first groove, and the first direction is perpendicular to the direction, pointing to the epitaxial layer, of the substrate; forming a first gate structure in the second groove; removing the protective layer; and forming a second gate structure in the first trench. The avalanche characteristic of the device can be optimized, and the pressure bearing capacity of the device is improved.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to an SGT device and a preparation method thereof. Background Art

[0002] Metal oxide semiconductor field effect transistors (MOSFETs) can be roughly divided into the following categories: planar MOSFET; trench MOSFET, mainly used in low voltage fields; shielded gate trench (Shielded Gate Transistor, SGT) MOSFET, mainly used in medium voltage and low voltage fields; super junction (SJ) MOSFET, mainly used in high voltage fields.

[0003] Insulated gate field effect transistors are widely used in various power systems because of their advantages such as fast switching speed, low power consumption, easy gate drive, low drive power, high input impedance and good frequency response. SGT MOSFET is widely used in medium and low voltage power systems because of its excellent specific on-resistance and switch conduction figure of merit. SGT MOSFET uses the lateral depletion of the epitaxial layer by the shielded gate to modulate the longitudinal electric field distribution in the epitaxial layer, thereby improving the avalanche characteristics of the device. Since the shielded gate polycrystalline is at the same potential as a whole, and the potential of the epitaxial layer (EPI) varies in the longitudinal direction, the lateral depletion line will not be completely horizontal, and it will contribute in the longitudinal direction. Therefore, the longitudinal electric field distribution of the SGT is not straight, but concave, which makes the SGT device able to withstand a smaller voltage and has poor avalanche characteristics. Summary of the invention

[0004] The present invention provides an SGT device and a preparation method thereof, which can optimize the avalanche characteristics of the device and improve the pressure bearing capacity of the device.

[0005] According to one aspect of the present invention, there is provided a method for preparing an SGT device, comprising:

[0006] An epitaxial layer is formed on a substrate; the epitaxial layer comprises a first surface and a second surface arranged opposite to each other; the first surface is a surface of the second surface away from the substrate; the epitaxial layer comprises a body region, and a surface of the body region away from the substrate is in the same plane as the first surface;

[0007] At least one first trench is formed on the first surface; the first trench extends from the surface of the body region away from the substrate to the epitaxial layer;

[0008] forming a protective layer on a sidewall of the first trench;

[0009] A second trench is formed in each first trench; the second trench extends from the bottom of the first trench to the epitaxial layer, and each first trench corresponds to a second trench; along a first direction, the width of the second trench is greater than the width of the first trench, and the first direction is perpendicular to the direction of the substrate pointing to the epitaxial layer;

[0010] forming a first gate structure in the second trench;

[0011] Remove the protective layer;

[0012] A second gate structure is formed in the first trench.

[0013] Optionally, forming a first gate structure in the second trench includes:

[0014] forming a first insulating layer in the second trench; the first insulating layer covers the bottom of the first trench and the sidewall connected to the bottom;

[0015] A first gate is formed on a side of the first insulating layer away from the substrate; the first gate covers the first insulating layer.

[0016] Optionally, after forming the first gate on the side of the first insulating layer away from the substrate, the method further includes:

[0017] A third insulating layer is formed on a side of the first gate away from the substrate; the third insulating layer is located in the second trench, and the third insulating layer covers the first gate.

[0018] Optionally, forming a second gate structure in the first trench includes:

[0019] forming a second insulating layer in the first trench; the second insulating layer covers the bottom of the first trench and the sidewall connected to the bottom;

[0020] A second gate is formed on a side of the second insulating layer away from the substrate; the second gate covers the second insulating layer.

[0021] Optionally, forming at least one first groove on the first surface includes:

[0022] forming a first mask sublayer on a side of the epitaxial layer away from the substrate; the first mask sublayer covers the epitaxial layer;

[0023] The first mask sublayer is etched by a photolithography process to form at least one first window and a first mask layer; the epitaxial layer is exposed at the first window;

[0024] Etching the first surface of the epitaxial layer through the first window to form at least one first trench;

[0025] After removing the protective layer, it also includes:

[0026] The first mask layer is removed.

[0027] Optionally, forming a protection layer on the sidewall of the first trench includes:

[0028] forming a protective sublayer on a side of the epitaxial layer away from the substrate; the protective sublayer covers the bottom of the first trench and the sidewall connected to the bottom, and the first surface of the epitaxial layer;

[0029] The protective sublayer is anisotropically etched to form a protective layer; the protective layer covers the sidewall of the first trench.

[0030] Optionally, forming a first insulating layer in the second trench includes:

[0031] A first insulating layer is formed in the second trench by an oxidation process.

[0032] Optionally, forming a second groove in each first groove includes:

[0033] A second trench is formed in each first trench by wet etching.

[0034] Optionally, along the first direction, the width of the first groove is 3-5 μm, and the width of the second groove is 4-7 μm.

[0035] According to another aspect of the present invention, there is provided an SGT device, which is manufactured by the method for manufacturing the SGT device described in any embodiment of the present invention.

[0036] The preparation method of the SGT device provided by the technical solution of the embodiment of the present invention includes: forming an epitaxial layer on a substrate; the epitaxial layer includes a first surface and a second surface arranged opposite to each other; the first surface is the surface of the second surface away from the substrate; the epitaxial layer includes a body region, and the surface of the body region away from the substrate is in the same plane as the first surface; at least one first groove is formed on the first surface; the first groove extends from the surface of the body region away from the substrate to the epitaxial layer; a protective layer is formed on the sidewall of the first groove; a second groove is formed in each first groove; the second groove extends from the bottom of the first groove to the epitaxial layer, and each first groove corresponds to a second groove; along the first direction, the width of the second groove is greater than the width of the first groove, and the first direction is perpendicular to the direction of the substrate pointing to the epitaxial layer; a first gate structure is formed in the second groove; the protective layer is removed; and a second gate structure is formed in the first groove. The width of the second trench formed in the embodiment of the present invention is greater than that of the first trench, so the width of the second gate structure is greater than that of the first gate structure. An electric field strength peak is added at the middle position between the PN junction formed by the surface of the body region adjacent to the substrate in contact with the epitaxial layer and the bottom of the second trench. The integrated area of ​​the electric field strength curve along the trench depth direction becomes larger, and the SGT device has a stronger ability to bear voltage, thereby achieving the effect of improving the avalanche characteristics of the SGT device.

[0037] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present invention, nor are they intended to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0039] Figure 1 This is a schematic diagram of the structure of a conventional SGT device and its electric field distribution.

[0040] Figure 2 It is a flow chart of a method for preparing an SGT device provided in an embodiment of the present invention.

[0041] Figure 3-Figure 9 It is a schematic diagram of an intermediate structure of an SGT device provided by an embodiment of the present invention.

[0042] Fig.10 The diagram is a schematic diagram of the structure of an SGT device and its electric field distribution provided by an embodiment of the present invention.

[0043] Fig.11 yes Figure 2 A detailed flow chart included in S120. DETAILED DESCRIPTION

[0044] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0045] It should be noted that the terms "first", "second", etc. in the present invention are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product, or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products, or devices.

[0046] The inventors found that in the conventional process, the formation of the SGT device is that after a trench is dug on the substrate 10, a sidewall oxide layer is first formed, and then the trench is filled with gate polysilicon, the gate polysilicon is etched down to form a shield gate, and then the sidewall oxide layer is removed, and then the SGT device is formed by forming an oxide layer and then filling the trench with polysilicon. Figure 1 This is a schematic diagram of the structure and electric field distribution of a conventional SGT device. Figure 1 , Figure 1 The left side is a conventional SGT structure diagram, and the right side is an electric field distribution diagram, where Y represents the depth direction of the trench, and E represents the electric field strength. An electric field peak in a conventional SGT device is located between the body region 30 and the epitaxial layer 20, and another electric field peak is located at the bottom of the shield gate polycrystalline. The electric field in the middle area between the two is concave, and the integral area of ​​the electric field distribution curve along the trench depth direction Y is small, so that the SGT device can withstand a small voltage and has poor avalanche characteristics.

[0047] The embodiment of the present invention provides a method for preparing a SGT device. Figure 2 is a flow chart of a method for preparing an SGT device provided in an embodiment of the present invention, Figure 3-Figure 9 is a schematic diagram of an intermediate structure of an SGT device provided by an embodiment of the present invention, with reference to Figure 2-Figure 9 , the preparation method comprises:

[0048] S110, forming an epitaxial layer on a substrate; the epitaxial layer comprises a first surface and a second surface arranged opposite to each other; the first surface is a surface of the second surface away from the substrate; the epitaxial layer comprises a body region, and a surface of the body region away from the substrate is in the same plane as the first surface.

[0049] Among them, SGT device is SGT MOSFET device; reference Figure 3The substrate 10 and the epitaxial layer 20 may be made of silicon or silicon carbide. The epitaxial layer 20 is formed on the substrate 10 by epitaxial growth, and the body region 30 is formed on the first surface 21 of the epitaxial layer 20. The body region 30 may be formed by P-type ion implantation. The first surface 21 is the surface of the second surface 22 away from the substrate 10.

[0050] S120, forming at least one first trench on the first surface; the first trench extends from the surface of the body region away from the substrate to the epitaxial layer.

[0051] Among them, reference Figure 3 and Figure 4 At least one first groove 41 is formed on the first surface 21 by etching. The depth of the first groove may be 0.8 μm-2 μm. Exemplarily, the etching process may be wet etching or dry etching. The first groove 41 extends from the surface of the body region 30 away from the substrate 10 to the epitaxial layer 20. Figure 4 The structure of two first trenches 41 is drawn as an example. The two first trenches 41 are arranged at intervals. The body region 30 includes two parts arranged at intervals. One first trench 41 extends from the first part of the body region 30 to the epitaxial layer 20, and the other first trench 41 extends from the second part of the body region 30 to the epitaxial layer 20.

[0052] S130 , forming a protection layer on the sidewall of the first trench.

[0053] Among them, reference Figure 6 The material of the protective layer 02 can be nitride, such as silicon nitride. The thickness of the protective layer 02 along the first direction X is 1000 angstroms to 2000 angstroms. The first direction X is perpendicular to the direction of the substrate 10 pointing to the epitaxial layer 20. The protective layer 02 is formed on the sidewall of the first trench 41 through a deposition process and anisotropic etching processes. The protective layer 02 can protect the sidewall of the first trench 41 from being affected when the second trench is subsequently formed, so that the width of the second trench along the first direction is greater than the width of the first trench.

[0054] S140, forming a second trench in each first trench; the second trench extends from the bottom of the first trench into the epitaxial layer, and each first trench corresponds to a second trench; along the first direction, the width of the second trench is greater than the width of the first trench, and the first direction is perpendicular to the direction of the substrate pointing to the epitaxial layer.

[0055] Among them, reference Figure 7, a second groove 42 can be formed in each first groove 41 by wet etching. The side wall of the first groove 41 will not be corroded due to the presence of the protection layer 02, so the width of the second groove 42 can be greater than the width of the first groove 41, and the sum of the depths of the first groove 41 and the second groove 42 can be 2μm-5μm. When the sum of the depths of the first groove 41 and the second groove 42 is 2μm, the depth of the first groove 41 is less than 2μm.

[0056] S150 , forming a first gate structure in the second trench.

[0057] Among them, reference Figure 8 A first gate structure 50 is formed in the second trench 42. The first gate structure 50 may include a first insulating layer 51 and a first gate 52, or may include a first insulating layer 51, a first gate 52 and a third insulating layer. The third insulating layer covers the surface of the first gate 52 away from the substrate 10. The first gate structure 50 may be formed by an oxidation process and a deposition process. The first gate structure 50 is a shielding gate for forming an SGT device.

[0058] S160, removing the protective layer.

[0059] Among them, reference Figure 8 and Fig. 9 , remove the protective layer 02 by conventional process, forming Fig. 9 The structure in .

[0060] S170 , forming a second gate structure in the first trench.

[0061] in, Fig.10 is a schematic diagram of the structure and electric field distribution of an SGT device provided by an embodiment of the present invention, with reference to Fig.10 , Fig.10 On the left side is the SGT device of the present invention, and on the right side is the electric field distribution diagram of the device structure of the present invention. A second gate structure 60 is formed in the first trench 41. The second gate structure 60 may include a second insulating layer 61 and a second gate 62. The second gate structure 50 may be formed by an oxidation process and a deposition process. The present invention protects the sidewall of the first trench 41 by a protective layer, and the width of the second trench 42 formed by two etchings is greater than the width of the first trench 41. Therefore, the width of the second gate structure 60 is greater than the width of the first gate structure 50. An electric field intensity peak is added at the middle position of the PN junction formed by the surface of the body region 30 adjacent to the substrate 10 and the contact with the epitaxial layer and the bottom of the second trench 42. The integrated area of ​​the electric field intensity curve along the trench depth direction becomes larger, and the SGT device has a stronger ability to bear voltage, thereby achieving the effect of improving the avalanche characteristics of the SGT device.

[0062] The preparation method of the SGT device provided by the technical solution of the embodiment of the present invention includes: forming an epitaxial layer on a substrate; the epitaxial layer includes a first surface and a second surface arranged opposite to each other; the first surface is the surface of the second surface away from the substrate; the epitaxial layer includes a body region, and the surface of the body region away from the substrate is in the same plane as the first surface; at least one first groove is formed on the first surface; the first groove extends from the surface of the body region away from the substrate to the epitaxial layer; a protective layer is formed on the sidewall of the first groove; a second groove is formed in each first groove; the second groove extends from the bottom of the first groove to the epitaxial layer, and each first groove corresponds to a second groove; along the first direction, the width of the second groove is greater than the width of the first groove, and the first direction is perpendicular to the direction of the substrate pointing to the epitaxial layer; a first gate structure is formed in the second groove; the protective layer is removed; and a second gate structure is formed in the first groove. The embodiment of the present invention protects the side wall of the first trench through the protective layer, and the width of the formed second trench 42 is greater than the width of the first trench 41, so that the width of the second gate structure is greater than the width of the first gate structure. An electric field strength peak is added in the middle position between the PN junction formed by the surface of the body region adjacent to the substrate in contact with the epitaxial layer and the bottom of the second trench. The integrated area of ​​the electric field strength curve along the depth direction of the trench becomes larger, and the SGT device has a stronger ability to bear voltage, thereby achieving the effect of improving the avalanche characteristics of the SGT device.

[0063] Optionally, S150, forming a first gate structure in the second trench, including:

[0064] S151, forming a first insulating layer in the second trench; the first insulating layer covers the bottom of the first trench and the sidewall connected to the bottom.

[0065] Among them, reference Figure 8 , the first insulating layer 51 can be formed by an oxidation process or a deposition process. The oxidation process can be a thermal oxidation process. The thermal oxidation process includes a furnace tube process. The first insulating layer 51 can be formed by oxidation at 1000°C for 60 minutes. The thickness of the first insulating layer 51 along the depth direction Y of the groove can be 3000 angstroms-6000 angstroms. The first insulating layer can be an oxide layer, such as silicon oxide. The sidewall of the first trench 41 covered by the protective layer 02 will not be oxidized, and is used for the subsequent formation of first insulating layers and second insulating layers of different thicknesses.

[0066] S152, forming a first gate on a side of the first insulating layer away from the substrate; the first gate covers the first insulating layer.

[0067] Among them, reference Figure 8, the first gate 52 can be formed by a deposition process, and the first gate 52 is etched back to a preset size. The etched back to the preset size can be etched back to a surface flush with the bottom of the first trench 41, or etched back to a surface lower than the bottom of the first trench 41. Exemplarily, it can be etched back to 1μm-2μm below the first surface; the material of the first gate 52 can be polysilicon, and the thickness of the first gate 52 in the depth direction of the trench can be 8000 angstroms-12000 angstroms.

[0068] Optionally, after forming the first gate on the side of the first insulating layer away from the substrate, the method further includes: forming a third insulating layer on the side of the first gate away from the substrate; the third insulating layer is located in the second trench, and the third insulating layer covers the first gate.

[0069] Among them, reference Figure 8 The third insulating layer 53 may be formed by an oxidation process, wherein the oxidation process may be a thermal oxidation process, wherein the thermal oxidation process includes a furnace tube process, and the third insulating layer 53 may be formed by oxidation at 1000° C. for 60 minutes.

[0070] Optionally, S170, forming a second gate structure in the first trench, including:

[0071] S171, forming a second insulating layer in the first trench; the second insulating layer covers the bottom of the first trench and the sidewall connected to the bottom.

[0072] Among them, reference Fig.10 , the second insulating layer 61 can be formed in the first trench 41 by an oxidation process or a deposition process, the oxidation process can be a thermal oxidation process, the thermal oxidation process includes a furnace process, and the second insulating layer 61 can be formed by oxidation at 1000°C for 30 minutes; when the second insulating layer 61 is etched back into the first trench 41, the thickness of the second insulating layer 61 is less than the thickness of the first insulating layer 51. If the first gate 52 is etched back to a preset size, that is, to a surface flush with the bottom of the first trench 41, the second insulating layer 61 covers the first gate 52 and the sidewall of the first trench 41; if the first gate 52 is etched back to a surface lower than the bottom of the first trench 41, the third insulating layer 53 can be formed to cover the surface of the first gate 52 away from the substrate, and then the second insulating layer 61 can be formed to cover the third insulating layer 53 and the sidewall of the first trench 41. A silicon dioxide layer can also be formed between the second insulating layer 61 and the first trench 41, and the thickness of the silicon dioxide layer along the depth direction of the trench can be 8000 angstroms-12000 angstroms.

[0073] S172, forming a second gate on a side of the second insulating layer away from the substrate; the second gate covers the second insulating layer.

[0074] Among them, reference Fig.10, the second gate 62 can be formed by a deposition process, and the second gate 62 is etched back to a preset size, and the etched back to the preset size can be etched back to a surface flush with the first surface 21; the material of the first gate 52 can be polysilicon, and the thickness of the second gate 62 in the depth direction of the groove can be 8000 angstroms-12000 angstroms.

[0075] Optional, Fig.11 yes Figure 2 A detailed flow chart included in S120, refer to Fig.11 , S120, forming at least one first groove on the first surface, comprising:

[0076] S121. Form a first mask sublayer on a side of the epitaxial layer away from the substrate; the first mask sublayer covers the epitaxial layer.

[0077] Among them, reference Figure 3 , a first mask sublayer is formed on a side of the epitaxial layer 20 away from the substrate 10; the first mask sublayer 01 may be a hard mask.

[0078] S122, etching the first mask sublayer by a photolithography process to form at least one first window and a first mask layer; exposing the epitaxial layer at the first window.

[0079] Among them, reference Figure 3 , a photoresist is formed on the first mask sublayer, a photoresist pattern is formed by exposure and development, and then the first mask sublayer is dry-etched through the photoresist pattern to form a first window, and then the photoresist is removed by an ashing process and a wet etching process to finally form a first mask layer 01.

[0080] S123 , etching the first surface of the epitaxial layer through the first window to form at least one first trench.

[0081] The etching method may include dry etching and wet etching.

[0082] After removing the protective layer, the method further includes: removing the first mask layer.

[0083] Among them, conventional removal processes can be used for removal.

[0084] Optionally, S130, forming a protection layer on the sidewall of the first trench includes:

[0085] S131, forming a protection sublayer on a side of the epitaxial layer away from the substrate; the protection sublayer covers the bottom of the first trench and the sidewall connected to the bottom, and the first surface of the epitaxial layer.

[0086] Among them, reference Figure 5 , a protective sublayer 03 is formed on a side of the epitaxial layer 20 away from the substrate 10 through a deposition process.

[0087] S132, forming a protective layer by anisotropically etching the protective sublayer; the protective layer covers the sidewalls of the first trench.

[0088] By anisotropically etching the protective sublayer, the protective sublayer on the sidewall in the depth direction of the trench can be retained, and the protective sublayer in the first direction is etched cleanly to form a protective layer. The anisotropic etching process is simple to operate and can save process time.

[0089] Optionally, forming the first insulating layer in the second trench includes: forming the first insulating layer in the second trench through an oxidation process.

[0090] The first insulating layer is formed by oxidation, and the thickness of the first insulating layer can be controlled by controlling the temperature and time of the oxidation process, so as to accurately control the size of the film layer.

[0091] Optionally, forming the second trench in each first trench includes: forming the second trench in each first trench by wet etching.

[0092] The second groove is formed by wet etching, so the size and shape of the second groove can be precisely controlled, and the process is simple and the cost is low.

[0093] Optional, reference Fig.10 Along the first direction X, the width of the first groove 41 is 3-5 μm, and the width of the second groove 42 is 4-7 μm.

[0094] Among them, along the first direction X, the width of the first trench 41 is 3-5μm, and the width of the second trench 42 is 4-7μm. The width of the second trench 42 can be formed to be greater than the width of the first trench 41, and the width of the second gate structure 60 is greater than the width of the first gate structure 50. An electric field strength peak will be added in the middle position between the PN junction formed by the surface of the body region 30 adjacent to the substrate 10 and the epitaxial layer in contact with the bottom of the second trench 42. The integrated area of ​​the electric field strength curve along the depth direction of the trench becomes larger, and the SGT device has a stronger ability to bear voltage, thereby achieving the effect of improving the avalanche characteristics of the SGT device.

[0095] The embodiment of the present invention further provides an SGT device based on the above embodiment, which is prepared by the method for preparing the SGT device according to any embodiment of the present invention.

[0096] The SGT device provided in the embodiment of the present invention has the same beneficial effects as the method for preparing the SGT device described in any embodiment of the present invention.

[0097] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps described in the present invention can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solution of the present invention can be achieved, and this document does not limit this.

[0098] The above specific implementations do not constitute a limitation on the protection scope of the present invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A method for preparing a SGT device, characterized in that: include: An epitaxial layer is formed on a substrate; the epitaxial layer comprises a first surface and a second surface arranged opposite to each other; the first surface is a surface of the second surface away from the substrate; The epitaxial layer comprises a body region, and a surface of the body region away from the substrate is in the same plane as the first surface; forming at least one first groove on the first surface; The first trench extends from a surface of the body region away from the substrate to the epitaxial layer; forming a protective layer on the sidewalls of the first trench; forming a second groove in each of the first grooves; The second trench extends from the bottom of the first trench into the epitaxial layer, and each of the first trenches corresponds to a second trench; Along a first direction, the width of the second trench is greater than the width of the first trench, and the first direction is perpendicular to the direction of the substrate pointing to the epitaxial layer; forming a first gate structure in the second trench; removing the protective layer; A second gate structure is formed in the first trench.

2. The preparation method according to claim 1, characterized in that: forming a first gate structure in the second trench, comprising: forming a first insulating layer in the second trench; the first insulating layer covers the bottom of the first trench and the sidewall connected to the bottom; A first gate is formed on a side of the first insulating layer away from the substrate; the first gate covers the first insulating layer.

3. The preparation method according to claim 2, characterized in that: After forming a first gate on a side of the first insulating layer away from the substrate, the method further includes: A third insulating layer is formed on a side of the first gate away from the substrate; the third insulating layer is located in the second trench, and the third insulating layer covers the first gate.

4. The preparation method according to claim 2 or 3, characterized in that: forming a second gate structure in the first trench, comprising: forming a second insulating layer in the first trench; the second insulating layer covers the bottom of the first trench and the sidewall connected to the bottom; A second gate is formed on a side of the second insulating layer away from the substrate; the second gate covers the second insulating layer.

5. The preparation method according to claim 1, characterized in that: At least one first groove is formed on the first surface, comprising: forming a first mask sublayer on a side of the epitaxial layer away from the substrate; the first mask sublayer covers the epitaxial layer; Etching the first mask sublayer by a photolithography process to form at least one first window and a first mask layer; exposing the epitaxial layer at the first window; Etching the first surface of the epitaxial layer through the first window to form at least one first trench; After removing the protective layer, the method further comprises: The first mask layer is removed.

6. The preparation method according to claim 5, characterized in that: Forming a protection layer on the sidewall of the first trench, comprising: forming a protective sublayer on a side of the epitaxial layer away from the substrate; the protective sublayer covers the bottom of the first trench and the sidewall connected to the bottom, and the first surface of the epitaxial layer; The protective sublayer is anisotropically etched to form a protective layer; the protective layer covers the sidewalls of the first trench.

7. The preparation method according to claim 2, characterized in that: Forming a first insulating layer in the second trench, comprising: A first insulating layer is formed in the second trench by an oxidation process.

8. The preparation method according to claim 1, characterized in that: forming a second groove in each of the first grooves, comprising: A second trench is formed in each of the first trenches by wet etching.

9. The preparation method according to claim 1, characterized in that: Along the first direction, the width of the first groove is 3-5 μm, and the width of the second groove is 4-7 μm.

10. An SGT device, characterized in that: The SGT device is prepared by the method for preparing the SGT device according to any one of claims 1 to 9.

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