Mini LED chip sorting method and system

Abstract

The application discloses a Mini LED chip sorting method and system, and relates to the technical field of chip sorting. The method comprises the following steps: performing sampling and testing on the crystal grains in a wafer to generate test data; filling the empty gear data formed by sampling and testing according to the test data, so that all the crystal grains in the wafer correspond to test data; performing cutting processing on the wafer to cut the crystal grains in the wafer into chips; performing expansion processing on the wafer to expand the interval of the chips; performing AOI detection on the wafer to generate detection data; performing sorting processing on the chips in the wafer according to the test data and the detection data to classify the chips into corresponding grades; and performing visual inspection processing on the wafer to identify the appearance defects of the sorted chips. By using the application, the abnormal crystal grains can be effectively controlled, the abnormal crystal grains are blocked in the factory, the PPM value of the abnormal crystal grains is reduced, customer complaints are reduced, and the product quality is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the chip sorting technical field, and in particular to a Mini LED chip sorting method and system. BACKGROUND

[0002] With the increasing production capacity requirements and the mass production of Mini LED products, the LED chip manufacturing industry adopts the sampling method to detect wafers, so that the test data of each die in the wafer is not recorded, and only the sampling data of part of the dies is recorded. Therefore, in the sorting process in the later process, abnormal dies such as low brightness, high voltage, damage, short side, blue mark and the like cannot be 100% picked out, so that abnormal dies flow into the client end, resulting in customer complaints.

[0003] At the same time, when detecting the appearance of the die through AOI, due to the limitation of the AOI machine technology, the phenomenon of missing detection is easy to occur, and all the appearance data of the die cannot be output, and the small size die with appearance abnormalities cannot be stuck, and only the abnormal die can be removed by manual visual inspection, which is time-consuming, laborious and low in efficiency, and the manual removal is not clean, which will cause secondary damage to the product.

[0004] Therefore, how to improve the sorting precision of Mini LED chips has become a problem to be solved. SUMMARY

[0005] The technical problem to be solved by the present application is to provide a Mini LED chip sorting method and system, which can effectively control abnormal dies and improve the quality of products leaving the factory.

[0006] In order to solve the above technical problems, the present application provides a Mini LED chip sorting method, comprising: sampling the dies in the wafer to generate test data; filling the empty data formed by sampling according to the test data, so that all the dies in the wafer correspond to test data; cutting the wafer to cut the dies in the wafer into chips; expanding the wafer to expand the interval of the chips; performing AOI detection on the wafer to generate detection data; sorting the chips in the wafer according to the test data and detection data to classify the chips into corresponding grades; and performing visual inspection on the wafer to identify the appearance defects of the sorted chips.

[0007] As an improvement of the above scheme, the step of sampling the dies in the wafer comprises: constructing a rectangular plane coordinate system; assigning coordinates to the dies in the wafer; and respectively sampling the dies along the horizontal coordinate direction and the vertical coordinate direction at equal intervals.

[0008] As an improvement of the above scheme, the step of filling the empty data of the sampling test according to the test data comprises: taking the die which has been point tested as a reference die, and taking the die which has not been point tested as an untested die; calculating the test data of the untested die between the two adjacent reference dies according to the test data of the two adjacent reference dies; and updating the untested die with the calculated test data as a reference die.

[0009] As an improvement of the above scheme, the step of calculating the test data of the untested die between the two adjacent reference dies according to the test data of the two adjacent reference dies comprises: extracting the test data of the two adjacent reference dies; obtaining the number of the untested die between the two adjacent reference dies; and calculating the test data of the untested die between the two adjacent reference dies according to the formula Qi = Qs + i [(Qe - Qs) / (N + 1)], wherein Qs is the test data of the starting reference die of the two adjacent reference dies, Qe is the test data of the last reference die of the two adjacent reference dies, N is the number of the untested die between the two adjacent reference dies, and Qi is the test data of the ith untested die between the two adjacent reference dies.

[0010] As an improvement of the above scheme, the test data comprises electrical data and optical data.

[0011] As an improvement of the above scheme, the Mini LED chip sorting method further comprises: combining the test data and the detection data into a qualified data.

[0012] Correspondingly, the application also provides a Mini LED chip sorting system, which comprises: a point testing machine for sampling and testing the dies in a wafer to generate test data; a host computer for filling the empty data of the sampling test according to the test data, so that all the dies in the wafer correspond to test data; a cutting machine for cutting the dies in the wafer into chips; an expansion machine for expanding the interval of the chips; an AOI detection machine for AOI detection of the wafer to generate detection data; a sorting machine for sorting the chips in the wafer according to the test data and the detection data to classify the chips into corresponding grades; and an optical inspection machine for optical inspection of the wafer to identify the appearance defects of the sorted chips.

[0013] As an improvement of the above scheme, the point testing machine comprises: a coordinate system construction module for constructing a rectangular plane coordinate system; a coordinate allocation module for allocating coordinates to the dies in the wafer; and a point testing module for point testing the dies equidistantly along the horizontal coordinate direction and the vertical coordinate direction.

[0014] As the improvement of the above scheme, the main control machine table comprises: a setting module, which sets the die that has been tested as a reference die and the die that has not been tested as an untested die; a calculation module, which calculates the test data of the untested die between two adjacent reference dies according to the test data of the two adjacent reference dies; and an updating module, which updates the untested die with the calculated test data as a reference die.

[0015] As the improvement of the above scheme, the calculation module comprises: an extraction unit, which extracts the test data of two adjacent reference dies; an acquisition unit, which acquires the number of untested dies between the two adjacent reference dies; and a calculation unit, which calculates the test data of the untested die between the two adjacent reference dies according to the formula Qi = Qs+i[(Qe-Qs) / (N+1)], wherein Qs is the test data of the starting reference die among the two adjacent reference dies, Qe is the test data of the last reference die among the two adjacent reference dies, N is the number of untested dies between the two adjacent reference dies, and Qi is the test data of the ith untested die between the two adjacent reference dies.

[0016] The present application has the following beneficial effects:

[0017] The present application obtains sampling data by sampling die, estimates full test data according to the characteristics of the sampling data and the distribution law of the sampling die, and sorts out defective products through point-to-point data sorting of coordinates in subsequent sorting, so that the abnormal die can be effectively controlled, the abnormal die is blocked in the factory, the PPM value of the abnormal die is reduced, customer complaints are reduced, and product quality is improved. BRIEF DESCRIPTION OF DRAWINGS

[0018] Figure 1 is an embodiment flowchart of the Mini LED chip sorting method of the present application;

[0019] Figure 2 is a test data schematic diagram of the sampled wafer in the Mini LED chip sorting method of the present application;

[0020] Figure 3 is a test data schematic diagram of all wafers in the Mini LED chip sorting method of the present application;

[0021] Figure 4 is a test data schematic diagram of all wafers in the Mini LED chip sorting method of the present application;

[0022] Figure 5 is a test data schematic diagram of all wafers in the Mini LED chip sorting method of the present application;

[0023] Figure 6is an embodiment structure schematic diagram of the Mini LED chip sorting system of the present application. DETAILED DESCRIPTION

[0024] In order to make the purpose, technical solutions and advantages of the present application clearer, the present application will be further described in detail below with reference to the drawings.

[0025] Referring to Figure 1 , Figure 1 An embodiment flowchart of the Mini LED chip sorting method of the present application is shown, which includes:

[0026] S101, sampling the dies in the wafer to generate test data;

[0027] As Figure 2 shown, the step of sampling the dies in the wafer includes:

[0028] (1) constructing a rectangular plane coordinate system;

[0029] (2) assigning coordinates to the dies in the wafer;

[0030] Specifically, polar coordinates or equations can be used to generate all point coordinates on the wafer.

[0031] (3) respectively sampling the dies along the horizontal coordinate direction and the vertical coordinate direction to generate test data.

[0032] It should be noted that the sampling interval can be freely set according to actual conditions.

[0033] For example, one die can be sampled for point measurement every 10 dies along the horizontal coordinate direction;

[0034] For another example, one die can be sampled for point measurement every 10 dies along the vertical coordinate direction;

[0035] For another example, one die can be sampled for point measurement every 10 dies along the horizontal coordinate direction, and one die can be sampled for point measurement every 10 dies along the vertical coordinate direction.

[0036] In actual application, the dies in the wafer can be sampled by a point measurement machine to obtain test data of part of the dies; wherein the test data includes electrical and optical data.

[0037] S102, filling the empty data formed by sampling with test data to make all the dies in the wafer correspond to test data (see Figure 3 );

[0038] It should be noted that filling the empty data refers to assigning test data to the nearby grains which have not been point tested according to the test data of the grains which have been point tested, so that all the grains in the wafer correspond to test data. The electrical property data includes forward voltage (VF), reverse current (IR), etc., and the optical property data includes luminance (LOP), dominant wavelength (WLD), etc., but is not limited thereto, and can be adjusted according to actual conditions.

[0039] Correspondingly, the step of filling the empty data formed by the test data according to the test data includes:

[0040] (1) taking the grains which have been point tested as reference grains and taking the grains which have not been point tested as untested grains;

[0041] (2) calculating the test data of the untested grains between the adjacent two reference grains according to the test data of the adjacent two reference grains;

[0042] Specifically, the step of calculating the test data of the untested grains between the adjacent two reference grains according to the test data of the adjacent two reference grains includes:

[0043] (2.1) extracting the test data of the adjacent two reference grains;

[0044] (2.2) obtaining the number of the untested grains between the adjacent two reference grains;

[0045] (2.3) calculating the test data of the untested grains between the adjacent two reference grains according to the following formula:

[0046] Qi = Qs + i[(Qe - Qs) / (N + 1)]

[0047] wherein,

[0048] Qs is the test data of the starting reference grain of the adjacent two reference grains;

[0049] Qe is the test data of the last reference grain of the adjacent two reference grains;

[0050] N is the number of the untested grains between the adjacent two reference grains;

[0051] Qi is the test data of the ith untested grain between the adjacent two reference grains.

[0052] For example, in the same row, there are also unmeasured dies A2, A3 and A4 between the adjacent reference dies A1 and A5; wherein the main wavelength of the reference die A1 is 655 nm, and the main wavelength of the reference die A5 is 660 nm, then the main wavelength of the unmeasured die A2 can be calculated as Q1 = 655 + [(660-655) / (3+1)] = 656.25 nm, the main wavelength of the unmeasured die A3 can be calculated as Q2 = 655 + 2[(660-655) / (3+1)] = 657.5 nm, and the main wavelength of the unmeasured die A4 can be calculated as Q3 = 655 + 3[(660-655) / (3+1)] = 658.75 nm.

[0053] (3) updating the unmeasured dies of the calculated test data to reference dies.

[0054] After updating the unmeasured dies of the calculated test data to reference dies, the unmeasured dies can be continuously assigned values with the latest test data of the reference dies as the reference until all the dies are assigned values.

[0055] S103, performing cutting processing on the wafer to cut the dies in the wafer into chips;

[0056] The die pattern on the wafer is cut into single chips by using a two-knife cutting technology.

[0057] S104, performing expansion processing on the wafer to expand the interval of the chips;

[0058] Expansion generally refers to expanding the interval of the chips on the wafer by using specific technical means in the production process, so as to facilitate the operation of subsequent processes; this process is of great significance to improve production efficiency and reduce material waste.

[0059] After the wafer is cut, the chips are arranged closely with a very small interval (about 0.1 mm), which is not conducive to the operation of subsequent processes. Therefore, the film of the bonded wafer is expanded by using an expander to stretch the interval of the chips to about 0.6 mm, which can facilitate the subsequent appearance inspection and die sorting operation.

[0060] S105, performing AOI detection on the wafer to generate detection data;

[0061] AOI (Automatic Optical Inspection) is to identify and classify the defects on the wafer by using automatic optical detection technology.

[0062] Due to the small size of the product, the AOI machine has a lot of missed scanning problems, which causes some abnormal dies to be unable to be recognized. For example, as shown in the figure, the dot-shaped area in the wafer is a missed scanning die. Figure 4 ​

[0063] Further, the present application combines the test data and the detection data into a complete data (see Figure 5 , to ensure that each chip corresponds to a complete data, providing data support for subsequent sorting processing.

[0064] S106, according to the test data and the detection data, the chips in the wafer are sorted to classify the chips into corresponding grades;

[0065] Chip sorting is a process of classifying dies, which involves grading chips on a wafer. According to the test data and the appearance inspection results (i.e. detection data), the chips on the wafer are classified into different grades.

[0066] For example, some chips may be classified as high-performance chips, while others may be classified as secondary products due to certain defects.

[0067] Unlike the prior art, in the present application, each chip corresponds to test data, and when the detection data is missed, the chips can be sorted according to the test data, thereby ensuring the sorting effect.

[0068] S107, the wafer is subjected to visual inspection processing to identify the appearance defects of the sorted chips.

[0069] Visual inspection is a detection method under a microscope using manual means to identify the appearance defects of the sorted chips, to ensure that the quality and performance of the chips meet the requirements of the customer, and only the qualified ones can be put into storage.

[0070] Therefore, the present application obtains sampling data by sampling dies, and estimates full test data according to the characteristics of the sampling data and the distribution law of the sampling dies, so that defective products can be sorted out through point-to-point data of coordinates in subsequent sorting; thereby effectively controlling abnormal dies, keeping abnormal dies in the factory, reducing the PPM value of die abnormalities, reducing customer complaints, and improving product quality.

[0071] Referring to Figure 6 , Figure 6 The specific structure of the Mini LED chip sorting system 100 of the present application is shown, which includes:

[0072] The sampling machine 1 is used to sample the dies in the wafer to generate test data.

[0073] The main control machine 2 is used to fill the empty data formed by sampling with test data, so that all the dies in the wafer correspond to test data; wherein, filling the empty data means that according to the test data of the dies that have been sampled, test data is assigned to the dies nearby that have not been sampled, so that all the dies in the wafer correspond to test data.

[0074] A cutting machine 3 is used to cut the wafer to separate the dies into chips.

[0075] An expander 4 is used to expand the wafer to increase the distance between the chips. The film of the wafer is expanded by the expander to increase the distance between the chips from 0.1 mm to about 0.6 mm, which facilitates the subsequent appearance inspection and die sorting operation.

[0076] An AOI detector 5 is used to detect the wafer by AOI (Automatic Optical Inspection) to generate detection data.

[0077] A sorting machine 6 is used to sort the chips in the wafer according to the test data and the detection data to classify the chips into corresponding grades. The chip sorting is a process of classifying the dies, which involves classifying the chips on the wafer into different grades. According to the test data and the appearance inspection result (i.e. the detection data), the chips on the wafer are classified into different grades.

[0078] An appearance inspection machine 7 is used to perform appearance inspection on the wafer to identify the appearance defects of the sorted chips. The appearance inspection is a manual detection under a microscope to identify the appearance defects of the sorted chips, which ensures that the quality and performance of the chips meet the requirements of the customers and the chips are qualified to be stored in the warehouse.

[0079] It should be noted that the AOI detector has a small product size and has a lot of missed scanning problems, which cannot identify some abnormal dies. The test data and the detection data are combined into the qualified data to ensure that each chip has corresponding qualified data. When the detection data is missed, the chips are forced to be sorted according to the test data, which provides data support for the subsequent sorting operation.

[0080] Further, the point testing machine 1 comprises:

[0081] A coordinate system construction module is used to construct a rectangular plane coordinate system.

[0082] A coordinate allocation module is used to allocate coordinates to the dies in the wafer. Specifically, polar coordinates or equations can be used to generate all point coordinates on the wafer.

[0083] A point testing module is used to extract the dies for point testing at equal intervals along the horizontal coordinate direction and the vertical coordinate direction. The extraction interval can be freely set according to the actual situation.

[0084] In practical applications, the wafer can be tested by a point testing machine to obtain test data of some of the dies, wherein the test data includes electrical data and optical data, the electrical data includes forward voltage (VF), reverse current (IR), etc., and the optical data includes luminance (LOP), dominant wavelength (WLD), etc., but the application is not limited thereto and can be adjusted according to actual conditions.

[0085] In addition, the main control machine 2 includes:

[0086] The setting module sets the dies that have been tested as reference dies and the dies that have not been tested as untested dies.

[0087] The calculation module calculates the test data of the untested dies between the two adjacent reference dies according to the test data of the two adjacent reference dies.

[0088] The updating module updates the untested dies with the calculated test data to reference dies.

[0089] Therefore, after the untested dies with the calculated test data are updated to reference dies, the untested dies can be continuously assigned values with the test data of the latest reference dies as a reference until all the dies are assigned values.

[0090] More preferably, the calculation module includes:

[0091] The extraction unit extracts the test data of the two adjacent reference dies.

[0092] The acquisition unit acquires the number of untested dies between the two adjacent reference dies.

[0093] The calculation unit calculates the test data of the untested dies between the two adjacent reference dies according to the formula Qi = Qs+i[(Qe-Qs) / (N+1)], wherein Qs is the test data of a starting reference die of the two adjacent reference dies, Qe is the test data of a last reference die of the two adjacent reference dies, N is the number of untested dies between the two adjacent reference dies, and Qi is the test data of the ith untested die between the two adjacent reference dies.

[0094] As can be seen from the above, the application has the following advantages:

[0095] 1. The product quality is improved, all the chips leaving the factory are strictly tested, the defective products are reduced or eliminated, and thus the overall product quality is improved.

[0096] 2. The customer trust is enhanced, the high-quality products without defects are provided, the customer trust and satisfaction for the brand are enhanced, and thus the enterprise image is improved.

[0097] 3. Reduce the cost of after-sales, reduce the after-sales service demand caused by quality problems, reduce the cost of after-sales maintenance and replacement.

[0098] The above is the preferred embodiment of the present application, it should be noted that for those skilled in the art, without departing from the principles of the present application, can make a number of improvements and refinements, these improvements and refinements are also considered to be within the scope of the present application.

Claims

1. A method for sorting Mini LED chips, characterized in that, The method comprises the following steps: sampling the dies in the wafer to generate test data; the sampling step comprises: constructing an orthogonal plane coordinate system; assigning coordinates to the dies in the wafer; and sampling the dies along the horizontal and vertical coordinates respectively; filling the empty data formed by sampling with the test data, so that all the dies in the wafer correspond to test data; the step of filling the empty data formed by sampling with the test data comprises: taking the dies that have been sampled as reference dies, and taking the dies that have not been sampled as untested dies; calculating the test data of the untested dies between two adjacent reference dies according to the test data of the two adjacent reference dies; and updating the untested dies with the calculated test data as reference dies; cutting the wafer to cut the dies in the wafer into chips; expanding the wafer to expand the spacing of the chips; performing AOI detection on the wafer to generate detection data; sorting the chips in the wafer according to the test data and the detection data to classify the chips into corresponding grades; performing visual inspection on the wafer to identify the appearance defects of the sorted chips; the step of calculating the test data of the untested dies between two adjacent reference dies according to the test data of the two adjacent reference dies comprises: extracting the test data of the two adjacent reference dies; obtaining the number of untested dies between the two adjacent reference dies; and calculating the test data of the untested dies between the two adjacent reference dies according to the formula Qi=Qs+i[(Qe-Qs) / (N+1)], wherein Qs is the test data of the starting reference die among the two adjacent reference dies, Qe is the test data of the last reference die among the two adjacent reference dies, N is the number of untested dies between the two adjacent reference dies, and Qi is the test data of the ith untested die between the two adjacent reference dies.

2. The Mini LED chip sorting method of claim 1, wherein, The test data comprises electrical and optical data.

3. The Mini LED chip sorting method of claim 1, wherein, The method further comprises: combining the test data and the detection data into a complete file.

4. A Mini LED chip sorting system, characterized in that, The method comprises the following steps: a sampling machine for sampling the dies in the wafer to generate test data; the sampling machine comprises: a coordinate system construction module for constructing an orthogonal plane coordinate system; a coordinate assignment module for assigning coordinates to the dies in the wafer; and a sampling module for sampling the dies along the horizontal and vertical coordinates respectively; a main control machine for filling the empty data formed by sampling with the test data, so that all the dies in the wafer correspond to test data; the main control machine comprises: a setting module for taking the dies that have been sampled as reference dies, and taking the dies that have not been sampled as untested dies; a calculation module for calculating the test data of the untested dies between two adjacent reference dies according to the test data of the two adjacent reference dies; and an updating module for updating the untested dies with the calculated test data as reference dies; a cutting machine for cutting the wafer to cut the dies in the wafer into chips; A wafer expander is used to expand the wafer to enlarge the interval of the chips; An AOI detector is used to detect the wafer to generate detection data; A sorting machine is used to sort the chips in the wafer according to the test data and the detection data to classify the chips into corresponding grades; An optical inspection machine is used to perform optical inspection on the wafer to identify appearance defects of the sorted chips. The calculation module comprises: an extraction unit configured to extract test data of two adjacent reference dies; an acquisition unit configured to acquire a number of untested dies between the two adjacent reference dies; and a calculation unit configured to calculate test data of the untested dies between the two adjacent reference dies according to a formula Qi=Qs+i[(Qe-Qs) / (N+1)], wherein Qs is test data of a starting reference die among the two adjacent reference dies, Qe is test data of a last reference die among the two adjacent reference dies, N is the number of the untested dies between the two adjacent reference dies, and Qi is test data of an ith untested die between the two adjacent reference dies.

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