Stacked chip with edge mounted antennas for small pitch phased arrays
By adopting a three-dimensional communication die and a vertically oriented 3D architecture, the problem of increasing integration complexity in traditional two-dimensional antenna arrays in high-frequency communication is solved, higher frequency and wider beam coverage are achieved, and wireless communication bandwidth is improved.
Patent Information
- Application Number
- CN202311838771.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-06-29
- Filing Date
- 2023-12-28
- Publication Date
- 2024-12-31
AI Technical Summary
In millimeter wave and sub-terahertz wireless communication, traditional two-dimensional antenna arrays have increased integration complexity due to the spacing of less than the driving circuit size, making it difficult to achieve high-frequency communication, and traditional methods are no longer applicable.
Using a three-dimensional communication die, the size of the driver circuit does not affect the operating wavelength of the antenna, allowing the antenna spacing to be reduced, enabling higher frequency communication, and providing wider beam coverage through a vertically oriented 3D architecture and waveguide solution.
Higher frequency communication is achieved, wireless communication bandwidth is increased, integration complexity is reduced, suitable for high-frequency applications, and the size of the communication module is reduced without affecting signal propagation.
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Figure CN119231151A_ABST
Abstract
Description
Technical Field
[0001] Embodiments of the present disclosure relate to electronic systems, and more particularly, to a communication module having a three-dimensional antenna array. Background Art
[0002] As wireless communications continue to proliferate, communication modules are becoming increasingly important. Typically, a communication module includes a transceiver die (i.e., a die that is compatible with receiving communications (Rx) and with transmitting communications (Tx)). To improve the bandwidth of wireless communications, protocols are moving toward smaller wavelengths. Millimeter wave wireless transmission and sub-terahertz wireless transmission are examples of such wireless solutions.
[0003] For mmWave and sub-THz wireless transmissions, the increased carrier frequency presents several challenges regarding the achievable signal power at the receiver. For example, the increased attenuation of free space propagation or the reduced achievable output power per CMOS transmitter block are some limiting factors. Therefore, beamforming is a common approach to increase the achievable received power. The beam steering functionality is usually achieved by implementing a two-dimensional phased array. These allow beam steering with a certain angular range, such that multiple modules are required for larger angular coverage.
[0004] Such phased arrays are usually arranged in a pattern that includes antennas spaced at a spacing of λ / 2, where λ is the operating wavelength of the antennas. This can be problematic as the wavelength decreases. In particular, there are integration issues when the spacing is smaller than the size of the Tx / Rx circuitry. Therefore, two-dimensional arrays may not be suitable for advanced communication modules. BRIEF DESCRIPTION OF THE DRAWINGS
[0005] Figure 1A is a plan view of a communication module having multiple antennas in a two-dimensional array, where Tx / Rx driving circuits are integrated into the array.
[0006] Figure 1B is a plan view of a communication module having Tx / Rx driving circuits underneath each antenna in an array according to an embodiment.
[0007] Figure 2 is a perspective view of a three-dimensional (3D) communication die with Tx / Rx driving circuits on the face of the die with antennas along the edge of the die according to an embodiment.
[0008] Figure 3 is a perspective view of a communication module having multiple 3D communication dies with antennas along edge surfaces of the dies according to an embodiment.
[0009] Figure 4is a perspective view of a communication module having a pair of 3D communication dies in a back-to-back configuration according to an embodiment.
[0010] Figure 5 is a perspective view of a communication module having multiple 3D communication dies with antennas positioned offset relative to each other according to an embodiment.
[0011] Figure 6 is a perspective view of a communication module having a 3D communication die array according to an embodiment.
[0012] Figure 7 is a cross-sectional view of a vertical waveguide feed according to an embodiment.
[0013] Figures 8A-8H is a cross-sectional view illustrating a process for assembling a vertical waveguide feed according to an embodiment.
[0014] Fig. 9 is a cross-sectional view of an electronic system including a communication module having a 3D communication die array according to an embodiment.
[0015] Fig.10 is a schematic diagram of a computing device constructed in accordance with an embodiment. DETAILED DESCRIPTION
[0016] Electronic systems according to various embodiments are described herein, and more specifically, a communication module with a three-dimensional antenna array is described. In the following description, the various aspects of the illustrative embodiments will be described using terms commonly used by those skilled in the art to convey the essence of their work to other technicians in the field. However, it is obvious to those skilled in the art that the present invention can be practiced using only some of the described aspects. For the purpose of explanation, specific quantities, materials, and configurations are set forth in order to provide a thorough understanding of the illustrative embodiments. However, it is obvious to those skilled in the art that the present invention can be practiced without specific details. In other cases, well-known features are omitted or simplified so as not to make the illustrative embodiments difficult to understand.
[0017] Various operations are described as multiple discrete operations in sequence in a manner that is most helpful for understanding the present invention, however, the order of description should not be interpreted as implying that these operations must be order-dependent. In particular, these operations do not need to be performed in the order presented.
[0018] As described above, the move toward smaller wavelength wireless communications (e.g., millimeter wave communications or sub-THz communications) results in increased integration complexity. For example, in an antenna array configuration for beamforming, the antennas are typically spaced apart at a spacing equal to half the wavelength λ. As this spacing decreases, it becomes more difficult to fit the drive circuit within the array. More specifically, in order to fit the drive circuit within the array, the size of the drive circuit needs to be smaller than the antenna spacing.
[0019] Figure 1A An example of such a configuration is shown in . Figure 1A 1 and 2. The communication module 100 is shown in FIG. The communication module 100 may include a substrate 101. For example, the substrate 101 may be a semiconductor die, such as a silicon die. An array of antennas 110 may be distributed across the surface of the substrate 101. The antennas 110 may be spaced apart at a pitch P. As described above, the pitch P is typically half the operating wavelength of the communication module 100 and the antennas 110. The antennas 110 may be any type of antenna structure. For example, in some cases, the antennas 110 may be patch antennas, dipole antennas, or Vivaldi antennas.
[0020] Antennas 110 may be communicatively coupled to drive circuits 105 fabricated on substrate 101 via interconnects 106. Drive circuits 105 may include Tx and / or Rx functionality. In some cases, drive circuits 105 may be referred to as transceiver dies. Drive circuits 105 may be interleaved within an array of antennas 110. For example, each group of four antennas 110 may be arranged around Figure 1A In order to fit the driving circuit 105 in the array, the size of the driving circuit 105 needs to be smaller than the pitch P. Figure 1A In , the width W of the driving circuit 105 is smaller than the pitch P. Similarly, in Figure 1A In the embodiment, the height of the driving circuit 105 is also smaller than the pitch P.
[0021] In other embodiments, Figure 1B As shown, each instance of the driving circuit 105 can be under a single antenna 110. That is, the driving circuit 105 and the antenna 110 can be in a one-to-one relationship with each other. The driving circuit 105 can be embedded in a substrate 101 (such as a semiconductor substrate). In an embodiment, the driving circuit 105 can have a footprint of P×P, where P is half the operating wavelength.
[0022] This configuration is good when the operating wavelength of the antennas 110 is large enough. However, as the wavelength decreases (as is the case with millimeter wave and sub-THz communications), the spacing P decreases to the point where the drive circuit 105 no longer fits within the array of antennas 110. Therefore, the traditional two-dimensional approach is no longer feasible, and an alternative integration approach is necessary.
[0023] Therefore, embodiments disclosed herein include the use of a three-dimensional (3D) communication die. In the case of a 3D communication die, the size of the drive circuit and the operating wavelength of the antenna do not interact with each other. That is, the spacing between antennas can continue to shrink to smaller and smaller spacings without the size of the drive circuit affecting the layout. This allows for higher frequency communications, which can increase bandwidth.
[0024] The 3D communication die may include a first surface and a second surface. The edge surface may couple the first surface to the second surface. In an embodiment, one or both of the first surface and the second surface may include an area for a drive circuit, and an antenna may be provided along the edge surface. A plurality of 3D communication dies may be arranged in an array, wherein each die has a first face and a second face parallel to each other. The first face and the second face may be perpendicular to the underlying base die on which the 3D communication die is mounted. The 3D communication dies may be spaced apart at a spacing substantially equal to half the wavelength of the antenna.
[0025] A 3D communication die can include antennas on three edge surfaces. This provides better coverage for the antenna array as opposed to using a pure beamforming solution. For example, when using such a 3D configuration, beam transmission can be provided in the z half-space as well as the +x half-space and -x half-space. In contrast, a planar 2D array will only provide beam transmission in the z half-space.
[0026] In some cases, one antenna is provided along each edge surface. In other embodiments, two or more antennas are provided along each edge surface. In some cases, adjacent 3D communication dies may have antennas that are offset from each other by an offset of one-half λ. This enables the generation of a 2D phased array on each of the three edge surfaces.
[0027] One of the advantages of using this 3D architecture is that the material of the communication die can be different from that of the base die. For example, the base die can include standard silicon materials suitable for making CMOS circuits. In contrast, the 3D communication die can be optimized for high-frequency applications. For example, III-V semiconductors can be used for each 3D communication die.
[0028] In other embodiments, a vertically oriented 3D architecture may be used with a waveguide solution. In such an embodiment, the vertically oriented semiconductor substrate and waveguide are interlaced with each other. An array of electromagnetic signal transmitters may be disposed above the semiconductor substrate and the ends of the waveguide to propagate the signal along the waveguide. Thus, embodiments are not limited to conventional antenna architectures.
[0029] Reference now Figure 2, shows a perspective view of a communication die 250 according to an embodiment. In an embodiment, the communication die 250 includes a semiconductor substrate. For example, the semiconductor substrate can be a III-V semiconductor. Such an embodiment may be particularly beneficial for high frequency operation. However, other semiconductor materials may also be used in some cases.
[0030] The communication die 250 may include a first surface 251 and a second surface 252 opposite to the first surface 251. The first surface 251 may be coupled to the second surface 252 via an edge surface. Figure 2 253 and 254. The first surface 251 and the second surface 252 may have an area greater than that of each of the edge surfaces 253 or 254.
[0031] In an embodiment, the communication die 250 may include a circuit element 205, also referred to as a "circuit" in some cases. The circuit element may include one or more active (transistors, etc.) or passive (resistors, capacitors, etc.) electrical components that are isolated and / or used in combination to function for the desired purpose. The circuit 205 may be a circuit for driving an antenna. For example, the circuit 205 may be a Tx / Rx circuit of a transceiver. In the illustrated embodiment, the circuit 205 is shown as a single block. However, it should be understood that the circuit 205 can be divided into regions for each individual antenna 210. For example, each antenna 210 can be served by a different driving circuit block. The circuit 205 can be disposed on a first surface 251 and / or a second surface 252.
[0032] In embodiments, the circuit 205 can have any size. More specifically, the width of the circuit 205 can be greater than half the wavelength λ of the antenna 210. For example, in some embodiments, the width of the circuit 205 can be up to about 10 mm, up to about 5 mm, or up to about 2 mm. Due to the 3D architecture of the circuit 205 on the first surface 251 and / or the second surface 252, the size of the circuit 205 does not interfere with the formation of the antenna array, as will be described in more detail below.
[0033] In an embodiment, the antenna 210 may be disposed on an edge surface of the communication die 250. For example, Figure 2 , antennas 210 are shown on edge surface 253 and edge surface 254. A hidden surface opposite edge surface 254 may also have antennas 210. That is, embodiments may include three antennas 210 on communication die 250. Antennas 210 may be any suitable antenna configuration. For example, antennas 210 may be patch antennas or any other antenna architecture.
[0034] Reference now Figure 3, a perspective view of a communication module 300 according to an embodiment is shown. As shown, the communication module 300 includes a base die 301. The communication die 350 may extend upward from the base die 301. In an embodiment, the base die 301 and the communication die 350 include different semiconductor materials. For example, the base die 301 may include silicon, and the communication die 350 may include a III-V semiconductor material suitable for high frequency operation. In an embodiment, a standard CMOS circuit may be disposed on the base die 301, and a drive circuit (not shown) may be disposed on the communication die 350.
[0035] In an embodiment, the communication die 350 may include a first surface 351 and edge surfaces 353 and 354. The first surface 351 may be oriented so that it is substantially orthogonal to the surface of the base die 301 on which the communication die 350 is mounted. The area of the first surface 351 may be greater than the area of the edge surface 353 or the edge surface 354. In an embodiment, the driving circuit may be disposed on the first surface 351 of the communication die 350.
[0036] As shown, multiple antennas 310 are disposed on each communication die 350. For example, the antennas 310 are disposed on edge surface 353, edge surface 354, and a back edge surface opposite to edge surface 354. Each antenna 310 can be coupled to a driving circuit on the communication die 350. The antenna 310 can be a patch antenna or the like.
[0037] In an embodiment, the communication die 350 may be spaced apart from each other at a pitch P. The pitch P may be half the operating wavelength λ of the antenna 310. For example, the pitch P may be about 10 mm or less, or about 5 mm or less, or about 1 mm or less. As used herein, "about" refers to a range of values within ten percent of the stated value. For example, about 10 mm refers to a range of values between 9 mm and 11 mm.
[0038] Reference now Figure 4 , shows a perspective view of a communication module 400 according to an additional embodiment. In an embodiment, the communication module 400 includes a 2D planar array formed on each edge surface. This allows three antenna arrays facing different directions to be included in a single communication module 400.
[0039] The communication module 400 may include a base die 401, wherein a communication die 450 extends upward from the base die 401. In a particular embodiment, the communication die 450 is grouped into a pair 460. The pair 460 includes a communication die 450A and a communication die 450B. In some embodiments, the communication die 450A and 450B may be spaced apart from each other. In other embodiments, the communication die 450A and 450B may be bonded together.
[0040] The communication dies 450A and 450B may be arranged in a back-to-back configuration. For example, the first surfaces 451A and 451B face away from each other. Therefore, the driving circuits 405 on each of the communication dies 450A and 450B also face away from each other. In an embodiment, the communication dies 450A and 450B may include multiple instances of the circuit 405. For example, six instances of the circuit 405 may be provided on each of the communication dies 450A and 450B. The circuit 405 may be connected to the antenna 410 via the interconnect 407. In an embodiment, multiple antennas 410 are provided on the communication dies 450A and 450B. For example, the edge surfaces 453 and 454 may each have one or more antennas 410. Figure 4 As shown, a pair of antennas 410 are disposed on each of the edge surfaces 453 and 454 .
[0041] In an embodiment, the circuits 405 may be spaced apart from each other at a spacing P. To accommodate larger circuits 405, the spacing P may be greater than half the wavelength λ of the antenna 410. In a particular embodiment, the spacing P may be approximately equal to the wavelength λ of the antenna 410. However, the spacing P may also be greater. This results in the corresponding antennas 410 also being spaced apart at a spacing greater than half the wavelength λ of the antenna 410. Such an array would not provide the necessary spacing to achieve desired signal propagation, beamforming, etc.
[0042] Thus, embodiments include offsetting the antennas 410 on adjacent communication dies 450. For example, the antenna 410 on die 450B may be offset from the antenna 410 on die 450A by an offset O. In embodiments, the offset O is equal to half the wavelength of the antenna 410. Thus, a four by one array is provided on each edge surface of the pair 460. By providing multiple pairs 460 spaced apart at a pitch of one-half λ, an array of any desired size may be provided.
[0043] Reference now Figure 5 , shows a perspective view of a communication module 500 according to an additional embodiment. In an embodiment, the communication module 500 can also allow 2D integration along the edge of the computing die 550. However, the complexity of the die-to-die integration is reduced because there is no close pitch stacking or die-to-die stacking, such as Figure 4 This is the case in the embodiment shown in .
[0044] In an embodiment, the communication module 500 may include a base die 501. A plurality of communication dies 550 may be attached to the base die 501. The base die 501 and the communication die 550 may be different semiconductor materials. Each base die 501 may include a circuit 505. The circuit 505 may be disposed on a side of the communication die 550, the side being orthogonal to the surface of the base die 501 on which the communication die 550 is supported.
[0045] In an embodiment, the circuit 505 may be electrically coupled to the antenna 510 via an interconnect 507. In an embodiment, two or more antennas 510 may be disposed on each edge surface of the communication die 550. The antennas 510 on a single communication die 550 may be spaced apart by a distance equal to the wavelength λ of the antenna 510. In an embodiment, adjacent communication dies 550 may include antennas 510 offset by an offset O. For example, the offset O may be half the wavelength λ of the antenna 510. Thus, a 2D array of antennas 510 spaced apart by λ / 2 is disposed along each edge of the communication module 500. The communication die 550 may be spaced apart by a pitch P. For example, the pitch P may be one quarter of the wavelength λ of the antenna 510. Thus, for each row of antennas 510, the antennas are spaced apart by λ / 2.
[0046] Reference now Figure 6 , shows a perspective view of a communication module 600 according to an embodiment. In an embodiment, the communication module 600 includes a base die 601. A plurality of communication dies 650 may be arranged above the base die 601. The communication die 650 may include a semiconductor material different from the base die 601. For example, the communication die 650 may include a III-V semiconductor 656, and the base die 601 may include silicon. In an embodiment, the communication die 650 may be spaced apart at a pitch P. In an embodiment, the pitch P may be less than half the wavelength λ of the antenna 610. Such an embodiment allows a compact array without considering the size of the circuit required to drive the antenna 610. That is, the size of the driving circuit does not affect the pitch P of the array.
[0047] In an embodiment, each communication die 650 may include an occupied area having a length L and a width W. The length L and the width W may be suitable for assembling the communication die 650 within a limited pitch P. However, the available area on the communication die 650 is not limited because the height H is a free parameter. The height H can be extended to any desired size in order to assemble a drive circuit for the overlying antenna 610. In addition, although the communication die 650 is shown as having vertical sidewalls, it should be understood that in some embodiments, the sidewalls may be inclined. For example, in some embodiments, the communication die 650 may not be orthogonal to the base die 601. The angled architecture can reserve space for circuits while also minimizing the total Z height of the communication module 600.
[0048] In the embodiments disclosed above, 3D antenna architectures are described. However, the embodiments are not limited to antenna architectures. For example, propagation of signals through solid or flexible waveguides can also benefit from 3D architectures. In particular, the size of the waveguide transmitter is also limited by half the wavelength at which the system operates. For example, at 110 GHz to 170 GHz, the waveguide transmitter can be approximately 1 mm by 2 mm, and at 260 GHz, the waveguide transmitter can be approximately 1 mm by 0.5 mm. At even greater sub-THz frequencies, the area occupied by the transmitter can reach the deep sub-millimeter (sub-mm) range and can be lower than the size of typical Tx and Rx circuits, which leads to complex wiring and additional losses.
[0049] In some cases, a waveguide feed is fabricated. The waveguide can be interdigitated with a semiconductor body extending along the length of the waveguide. The unrestricted length dimension of the cube allows the circuit to be fabricated in any area while still maintaining the necessary dimensions of a waveguide transmitter.
[0050] exist Figure 7 An example of such an embodiment is shown in the cross-sectional view of . In an embodiment, the waveguide feed 770 includes a waveguide launcher layer 775. The waveguide launcher layer 775 may include a shielding structure 776 on either side of a waveguide launcher (or antenna) 777. The waveguide launcher 777 may be a patch, a slot-based launcher, a monopole launcher, a dipole launcher, etc. In an embodiment, a semiconductor body 771 may be disposed below the waveguide launcher layer 775. The semiconductor body 771 may include a drive circuit for the waveguide launcher 777. Since there is an unlimited height dimension for the semiconductor body 771, the size of the drive circuit is not limited by the size or spacing of the waveguide launcher 777. In an embodiment, the feed line 773 provides a conductive path to connect the drive circuit of the semiconductor body 771 with the waveguide launcher 777. An interface layer 772 may be disposed between the semiconductor bodies 771. In an embodiment, the structure may be embedded in a dielectric layer 778 (such as a molding layer 778).
[0051] Reference now Figures 8A-8H , shows a series of cross-sectional views depicting a process for forming a waveguide feed according to an embodiment. In an embodiment, Figures 8A-8H The waveguide feed in can be similar to the above Figure 7 Waveguide feed 770 is described.
[0052] Reference now Fig. 8A, shows a cross-sectional view of a waveguide feeder at a manufacturing stage according to an embodiment. In an embodiment, a plurality of semiconductor wafers 871 are prepared. Wafer 871 may include circuits for driving one or more antennas or electromagnetic signal transmitters. Cutting in subsequent operations may isolate an area of the circuit for each waveguide feeder. In the illustrated embodiment, four wafers 871 are provided as examples. However, it should be understood that any number of wafers 871 may be used. In addition, it should be understood that operations such as thinning, polishing, etc. may be used. Although shown as having substantially the same thickness, it should be understood that wafers 871 may have different thicknesses.
[0053] Reference now Figure 8B , showing a cross-sectional view of a waveguide feeder at different manufacturing stages according to an embodiment. The wafers 871 may be bonded to each other in a stacked manner. In addition, a plurality of interface layers 872 may be provided between the wafers 871. The interface layer 872 may include any dielectric, ceramic, conductive material (e.g., metal), or a mixture of any such materials. Now referring to Figure 8C , showing a cross-sectional view of a waveguide feeder at different stages of manufacture according to an embodiment. As shown by the dashed line 880, the stack is divided into multiple regions. Each region may include a single instance of the drive circuit in each wafer 871. That is, in Figure 8C In each region shown, there may be four instances of the driver circuit (one in each layer). Figure 8C Three complete regions are shown in FIG, and portions of two additional regions are shown (in Figure 8C at the edge of the ).
[0054] Reference now Fig.8D , shows a cross-sectional view of a stack after singulation according to an embodiment. In an embodiment, singulation may isolate each region 885. For simplicity, the Figure 8C In an embodiment, singulation may be accomplished using any suitable singulation process, such as sawing, etching, plasma cutting, laser ablation, a combination of the two, and the like.
[0055] Reference now Fig. 8E , shows a cross-sectional view of a reconstructed wafer having a plurality of regions 885 according to an embodiment. Each region may be Fig.8D The orientation shown is rotated 90 degrees. After rotation, region 885 can be embedded in dielectric layer 878. The dielectric layer can be a molding material, an oxide material, or any other suitable material. In the rotated orientation, the interface layer 872 and the end of wafer 871 are exposed. Fig. 8EAlso shown is a stem 873. Feed line 873 may be added in this operation, may be added in a previous operation, or may be added in a subsequent operation. Feed line 873 may be a conductive path that connects the drive circuit to a subsequently formed antenna or transmitter.
[0056] Reference now Fig.8F , shows a cross-sectional view of a reconstructed wafer after providing a waveguide launcher layer 875 according to an embodiment. The waveguide launcher layer 875 can be a dielectric layer, etc. The waveguide launcher layer 875 can be provided over the interface layer 872 and the end of the wafer 871, and over the dielectric layer 878.
[0057] Reference now Figure 8G , shows a cross-sectional view of a reconstructed wafer after provision of an emitter architecture according to an embodiment. In an embodiment, the emitter architecture may include a shielding structure 876 that isolates each emission region. Additionally, a waveguide emitter 877 may be disposed above the interface layer 872. The waveguide emitter 877 may be communicatively coupled to a feed line 873 to transmit a signal along the interface layer 872. In an embodiment, an attachment layer 888 may also be disposed along the bottom surface of the reconstructed wafer. The attachment layer 888 may be used to attach the completed waveguide cube to an underlying base die or other structure.
[0058] In an embodiment, the interface layer 872 may also be a coupling layer. That is, one or more of the interface layers 872 may include communication coupling features (e.g., traces, vias, etc.) that provide communication coupling from the wafer 871 to the underlying base die substrate. For example, the base die may include I / O features, power delivery, etc.
[0059] Reference now Figure 8H , shows a cross-sectional view of a reconstructed wafer after singulation to form a waveguide cube 870 according to an embodiment. In an embodiment, singulation can be a sawing process, a laser ablation process, a combination thereof, etc. In an embodiment, the waveguide cube 870 includes a vertically oriented interface layer 872, and an adjacent portion of the semiconductor wafer 871 houses a drive circuit for the interface layer 872. Although referred to as a "cube", it should be understood that the waveguide cube 870 need not have external dimensions that result in a true cube shape. For example, the waveguide cube 870 may be more generally referred to as a rectangular prism.
[0060] Reference now Fig. 9, a cross-sectional view of an electronic system 990 according to an embodiment is shown. In an embodiment, the electronic system 990 includes a board 991, such as a printed circuit board (PCB). The board 991 can be coupled to a package substrate 993 via an interconnect 992. The interconnect 992 can be a solder ball, a socket, etc. In an embodiment, the communication module 900 is coupled to the package substrate 993 via an interconnect 994. The interconnect 994 can be any first level interconnect (FLI) architecture.
[0061] In an embodiment, the communication module 900 includes a base die 901, and a plurality of communication die 950 are supported on the base die 901. The connection between the base die 901 and the communication die 950 can be any suitable interconnect architecture. In an embodiment, the communication die 950 can be similar to any communication die 950 described herein. For example, one or more of the edge surfaces of the communication die 950 can include an antenna 910. The driving circuit for one or more antennas 910 can be arranged on the first surface 951 of the communication die 950 or at other locations on the communication die 950. As described above, this configuration allows the 3D architecture to be reduced to a wavelength that is smaller than the achievable occupied area of the driving circuit. Therefore, improved scalability is provided.
[0062] Fig.10 A computing device 1000 is shown according to one embodiment of the present invention. The computing device 1000 houses a board 1002. The board 1002 may include a number of components, including but not limited to a processor 1004 and at least one communication chip 1006. The processor 1004 is physically and electrically coupled to the board 1002. In some embodiments, the at least one communication chip 1006 is also physically and electrically coupled to the board 1002. In other embodiments, the communication chip 1006 is part of the processor 1004.
[0063] These other components include, but are not limited to, volatile memory (e.g., DRAM), non-volatile memory (e.g., ROM), flash memory, graphics processors, digital signal processors, cryptographic processors, chipsets, antennas, displays, touch screen displays, touch screen controllers, batteries, audio codecs, video codecs, power amplifiers, global positioning system (GPS) devices, compasses, accelerometers, gyroscopes, speakers, cameras, and mass storage devices (such as hard drives, compact disks (CDs), digital versatile disks (DVDs), etc.).
[0064] The communication chip 1006 implements wireless communications for transmitting data to and from the computing device 1000. The term "wireless" and its derivatives may be used to describe circuits, devices, systems, methods, techniques, communication channels, etc. that can communicate data via a non-solid medium using modulated electromagnetic radiation. The term does not mean that the associated device does not contain any wires, although in some embodiments they may not. The communication chip 1006 may implement any of a variety of wireless standards or protocols, including but not limited to Wi-Fi (IEEE 802.11 series), WiMAX (IEEE802.16 series), IEEE 802.20, Long Term Evolution (LTE), Ev-DO, HSPA+, HSDPA+, HSUPA+, EDGE, GSM, GPRS, CDMA, TDMA, DECT, Bluetooth, its derivatives, and any other wireless protocols designated as 3G, 4G, 5G and above. The computing device 1000 may include multiple communication chips 1006. For example, the first communication chip 1006 may be dedicated to shorter-range wireless communications such as Wi-Fi and Bluetooth, and the second communication chip 1006 may be dedicated to longer-range wireless communications such as GPS, EDGE, GPRS, CDMA, WiMAX, LTE, Ev-DO, etc.
[0065] The processor 1004 of the computing device 1000 includes an integrated circuit die packaged within the processor 1004. In some embodiments of the invention, the integrated circuit die of the processor may be part of a communication module that includes a base die with a vertically oriented communication die implementing one or more antenna arrays according to embodiments described herein. The term "processor" may refer to any device or portion of a device that processes electronic data from registers and / or memory to transform the electronic data into other electronic data that may be stored in registers and / or memory.
[0066] The communication chip 1006 also includes an integrated circuit die packaged within the communication chip 1006. According to another embodiment of the present invention, the integrated circuit die of the communication chip may be part of a communication module including a base die having a vertically oriented communication die implementing one or more antenna arrays according to embodiments described herein.
[0067] In an embodiment, the computing device 1000 may be part of any apparatus. For example, the computing device may be part of a personal computer, a server, a mobile device, a tablet computer, an automobile, etc. That is, the computing device 1000 is not limited to use in any particular type of system, and the computing device 1000 may be included in any apparatus that may benefit from computing functionality.
[0068] The above description of the illustrated embodiments of the present invention (including what is described in the Abstract) is not intended to be exhaustive or to limit the present invention to the precise forms disclosed. Although specific embodiments and examples of the present invention are described herein for illustrative purposes, various equivalent modifications are possible within the scope of the present invention as will be appreciated by those skilled in the relevant art.
[0069] Based on the above specific embodiments, these modifications can be made to the present invention. The terms used in the appended claims should not be interpreted as limiting the present invention to the specific embodiments disclosed in the specification and claims. On the contrary, the scope of the present invention is determined entirely by the appended claims, which will be interpreted according to the established principles of claim interpretation.
[0070] Example 1: A communication die comprising: a substrate having a first side and a second side, and wherein an edge surface connects the first side to the second side; a circuit element on the first side; and an antenna on at least one of the edge surfaces.
[0071] Example 2: The communications die of Example 1, wherein the circuit element includes a circuit for driving the antenna.
[0072] Example 3: The communications die of Example 1 or Example 2, wherein the substrate comprises a III-V semiconductor material.
[0073] Example 4: The communication die of Examples 1-3, further comprising: a plurality of antennas, each antenna being on a different one of the edge surfaces.
[0074] Example 5: The communication die of Examples 1-4, wherein the antenna is a millimeter wave antenna or a sub-terahertz antenna.
[0075] Example 6: The communication die of Examples 1-5, further comprising: a base die as a CMOS logic chip, wherein the substrate is coupled to the base die.
[0076] Example 7: The communications die of Example 6, wherein the connection from the circuit element to the antenna spans one of the edge surfaces.
[0077] Example 8: A communication module comprises: a base die having a first surface and a second surface; an array of communication die on the base die, and wherein each of the communication die comprises: a third surface, the third surface being orthogonal to the first surface of the base die; a fourth surface, the fourth surface being orthogonal to the first surface of the base die; an edge surface, the edge surface being used to couple the third surface to the fourth surface; a circuit element on the third surface; and an antenna on one or more of the edge surfaces.
[0078] Example 9: The communication module of Example 8, wherein the communication dies are spaced apart at a pitch.
[0079] Example 10: The communication module of Example 9, wherein a width of one or more of the circuit elements is greater than the spacing.
[0080] Example 11: The communication module of Example 10, wherein a width of the circuit element is at least 1.5 times the pitch.
[0081] Example 12: The communication module of Examples 8-11, wherein the array of communication die comprises a first die and a second die, wherein the first die is adjacent to the second die, wherein the first die comprises a first antenna; and wherein the second die comprises a second antenna, wherein an edge of the first antenna is offset from an edge of the second antenna by a distance half of the spacing between adjacent communication die.
[0082] Example 13: The communication module of Examples 8-12, wherein each communication die includes two or more antennas along each of the edge surfaces, and wherein the circuit elements on the first surface include a number of drive circuit instances equal to the number of antennas.
[0083] Example 14: The communications module of Examples 8-13, wherein the first communications die and the second communications die are oriented in a back-to-back configuration such that the first surfaces face away from each other.
[0084] Example 15: The communication module of Example 14, wherein the first antenna on the first communication die is offset from the second antenna on the second communication die.
[0085] Example 16: The communication module of Examples 8-15, further comprising: a packaging substrate coupled to the base die; and a board coupled to the packaging substrate.
[0086] Example 17: The communication module of Example 16, wherein the communication module is part of a personal computer, a server, a mobile device, a tablet computer, or a car.
[0087] Example 18: A waveguide module comprises: a first semiconductor layer; a waveguide adjacent to the first semiconductor layer; a second semiconductor layer adjacent to the waveguide; and a waveguide launcher structure above edges of the first semiconductor layer, the waveguide and the second semiconductor layer.
[0088] Example 19: The waveguide module of Example 18, wherein the waveguide module is embedded in a molding layer.
[0089] Example 20: The waveguide module of Example 18 or Example 19, wherein the first semiconductor layer and / or the second semiconductor layer includes a driving circuit.
Claims
1. A communication die, comprising: a substrate having a first side and a second side, and wherein an edge surface connects the first side to the second side; a circuit element, the circuit element being on the first side; and An antenna is provided on at least one of the edge surfaces.
2. The communication die according to claim 1, wherein: The circuit element includes a circuit for driving the antenna.
3. The communication die according to claim 1 or 2, wherein: The substrate includes a III-V semiconductor material.
4. The communication die according to claim 1 or 2, further comprising: A plurality of antennas are provided, each antenna being on a different one of the edge surfaces.
5. The communication die according to claim 1 or 2, wherein: The antenna is a millimeter wave antenna or a sub-terahertz antenna.
6. The communication die according to claim 1 or 2, further comprising: As a base die of a CMOS logic chip, wherein the substrate is coupled to the base die.
7. The communication die according to claim 6, wherein: The connection from the circuit element to the antenna is across one of the edge surfaces.
8. A communication module, comprising: a base die having a first surface and a second surface; An array of communication die, the array of communication die being on the base die, and wherein each of the communication die comprises: a third surface, the third surface being orthogonal to the first surface of the base die; a fourth surface, the fourth surface being orthogonal to the first surface of the base die; an edge surface for coupling the third surface to the fourth surface; a circuit element, the circuit element being on the third surface; and An antenna is provided on one or more of the edge surfaces.
9. The communication module according to claim 8, wherein: The communication dies are spaced apart at a pitch.
10. The communication module according to claim 9, wherein: One or more of the circuit elements have a width greater than the pitch.
11. The communication module according to claim 10, wherein: The width of the circuit element is at least 1.5 times the pitch.
12. The communication module according to claim 8, 9, 10 or 11, wherein: The array of communication tube dies includes a first tube die and a second tube die, wherein the first tube die is adjacent to the second tube die, wherein the first die comprises a first antenna; and The second tube core includes a second antenna, and the edge of the first antenna is offset from the edge of the second antenna by a distance of half the spacing between adjacent communication tube cores.
13. The communication module according to claim 8, 9, 10 or 11, wherein: Each communications die includes two or more antennas along each of the edge surfaces, and wherein the circuit elements on the first surface include a number of driver circuit instances equal to the number of antennas.
14. The communication module according to claim 8, 9, 10 or 11, wherein: The first and second communications dies are oriented in a back-to-back configuration such that the first surfaces face away from each other.
15. The communication module according to claim 14, wherein: A first antenna on the first communication die is offset from a second antenna on the second communication die.
16. The communication module according to claim 8, 9, 10 or 11, further comprising: a packaging substrate coupled to the base die; as well as A board is coupled to the package substrate.
17. The communication module according to claim 16, wherein: The communication module is part of a personal computer, a server, a mobile device, a tablet or a car.
18. A waveguide module, comprising: a first semiconductor layer; a waveguide, the waveguide being adjacent to the first semiconductor layer; a second semiconductor layer, the second semiconductor layer being adjacent to the waveguide; as well as A waveguide launcher structure is provided over the first semiconductor layer, the waveguide, and an edge of the second semiconductor layer.
19. The waveguide module according to claim 18, wherein: The waveguide module is embedded in the molding layer.
20. The waveguide module according to claim 18 or 19, wherein: The first semiconductor layer and / or the second semiconductor layer includes a driving circuit.
