A topology and control method of a coupled inductor high-gain buck-boost inverter

Abstract

The present invention provides a topology of a coupled inductor high-gain buck-boost inverter, including a coupled inductor, wherein the coupled inductor includes a first coupled inductor and a second coupled inductor; the same-name end of the first coupled inductor is electrically connected to the positive electrode of a power supply, the drain of a third semiconductor switch device, and the drain of a fifth semiconductor switch device, and the opposite-name end of the first coupled inductor is electrically connected to the drain of the first semiconductor switch device and the source of the second semiconductor switch device. The high-gain single-stage buck-boost single-phase inverter proposed by the present invention has buck-boost capability, and can achieve stable AC output when the input voltage varies over a wide range of the output voltage of the photovoltaic cell.

Description

Technical Field

[0001] The invention is used in the field of electrical technology and mainly relates to the topology of a coupled inductor high-gain buck-boost inverter and a control method thereof. Background Art

[0002] Inverters play an important role in photovoltaic power generation, whether in the process of grid connection or the reuse of stored energy. In order to make full use of the energy of photovoltaic cells, it has become a trend to match a single photovoltaic cell with an inverter to achieve maximum power tracking. However, due to the low voltage level of a single photovoltaic cell, traditional inverters cannot directly connect photovoltaic cells to the grid, which puts higher requirements on the miniaturization, cost and adaptability to low voltage of the inverter.

[0003] During operation, the output capacity of photovoltaic cells is greatly affected by environmental factors, resulting in output voltage fluctuations. Due to the size and cost of inverters and the inability of traditional inverters to operate under low voltage input conditions, it is impossible to install inverters one-to-one for photovoltaic cells. The method of connecting multiple photovoltaic cells in series and parallel and then performing maximum power tracking cannot fully utilize the energy of a single photovoltaic cell and is also lacking in overall stability. Figure 2 The traditional MPPT method shown in the figure adds an extra DC / DC between the battery and the inverter to track the maximum power and then inverts the bus voltage. This method is undoubtedly not very friendly in terms of efficiency, cost and volume because it adds one more conversion level. A small, high-gain, low-cost inverter is needed in engineering. Summary of the invention

[0004] In order to solve the above problems, the present invention discloses a topology of a coupled inductor high-gain buck-boost inverter.

[0005] In order to achieve the above objectives, the present invention is implemented through the following technical solutions:

[0006] A coupled inductor high-gain buck-boost inverter topology includes a coupled inductor, wherein the coupled inductor includes a first coupled inductor L 1 and the second coupling inductor L 2 ; The first coupling inductor L 1 The same-name end is electrically connected to the positive electrode of the power source E and the third semiconductor switch device S 3 The drain and the fifth semiconductor switching device S 5 The drain of the first coupling inductor L 1 The opposite end is electrically connected to the first semiconductor switch device S 1 The drain of the second semiconductor switching device S 2 The source of

[0007] The second coupled inductor L 2The opposite end is electrically connected to the negative electrode of the power source E, the first semiconductor switch device S 1 The source of the first capacitor C 1 One end and the sixth semiconductor switching device S 6 The source of the second coupling inductor L 2 The same-name end is electrically connected to the third semiconductor switch device S 3 The source of the fourth semiconductor switching device S 4 The drain of the second semiconductor switching device S 2 The drain is electrically connected to the first capacitor C 1 The other end of and one end of the full bridge circuit;

[0008] The fifth semiconductor switch device S 5 The source of the sixth semiconductor switching device S is electrically connected to 6 The drain and second capacitor C 2 One end of the fourth semiconductor switch device S 4 The source of the second capacitor C 2 The other end of the full bridge circuit;

[0009] The full bridge circuit is electrically connected to the load R through the filter circuit L .

[0010] Further improvement, the full-bridge circuit includes a first full-bridge semiconductor switch device S g1 , the second full-bridge semiconductor switch device S g2 , the third full-bridge semiconductor switch device S g3 and the fourth full-bridge semiconductor switching device S g4 ; Wherein the first full-bridge semiconductor switch device S g1 The drain of the second full-bridge semiconductor switch device S g2 The drain of the second semiconductor switching device S is electrically connected to 2 The drain and first capacitor C 1 The other end of the third full-bridge semiconductor switch device S g3 The source and the fourth full-bridge semiconductor switching device S g4 The source of the fourth semiconductor switching device S is electrically connected to 4 The source and second capacitor C 2 The other end of the third full-bridge semiconductor switch device S g3 The drain of the first full-bridge semiconductor switching device S is electrically connected to g1 The source of the fourth semiconductor switching device S 4 The drain of the second full-bridge semiconductor switching device S is electrically connected to g2 The source.

[0011] Further improvement, the filter circuit includes a filter inductor L O , filter inductor LO One end is electrically connected to the first full-bridge semiconductor switch device S g1 The source of the third full-bridge semiconductor switching device S g3 The other end is connected to the filter capacitor C O One end and the load R L One end of the filter capacitor C O The other end is electrically connected to the load R L The other end of the second full-bridge semiconductor switch device S g2 The source of the fourth full-bridge semiconductor switching device S g4 of the drain.

[0012] As a further improvement, the filter inductor (L O ) has a value range of:

[0013]

[0014] Among them, L O * is the inductance of the filter inductor, I Omax is the maximum output current of the filter inductor, E * is the input voltage value of the power supply, T S is the switching cycle of the semiconductor switching device;

[0015] The capacitance range of the filter capacitor is as follows:

[0016]

[0017] Among them, C O * is the capacitance of the filter capacitor, ΔU max is the maximum output ripple of the filter capacitor.

[0018] Further improvement, the first semiconductor switch device S 1 , the second semiconductor switch device S 2 , the third semiconductor switch device S 3 , the fourth semiconductor switch device S 4 , the fifth semiconductor switch device S 5 , the sixth semiconductor switch device S 6 , the first full-bridge semiconductor switch device S g1 , the second full-bridge semiconductor switch device S g2 , the third full-bridge semiconductor switch device S g3 and the fourth full-bridge semiconductor switching device S g4 All are MOSFET or IGBT.

[0019] Further improvements,

[0020] The first coupled inductor L 1 and the second coupling inductor L 2 The range of induction value is:

[0021]

[0022] Among them, L 1 * is the inductance of the first coupled inductor and the second coupled inductor, ΔI Lmax is the maximum ripple current of the first coupled inductor and the second coupled inductor, G max is the maximum gain during the operation of the first coupled inductor and the second coupled inductor;

[0023] The first capacitor C 1 and the second capacitor C 2 The capacitance value range is:

[0024]

[0025] C 1、2 is the capacitance of the first capacitor C1 and the second capacitor C2, ΔU C1 is the maximum ripple voltage on the first capacitor C1 and the second capacitor C2.

[0026] A method for controlling a topology of a coupled inductor high-gain buck-boost inverter comprises the following steps: 1 and the second coupling inductor L 2 Work in CCM mode;

[0027] When the output voltage is between 0 and the input voltage Vin, the full-bridge circuit operates in Buck mode.

[0028] At this time, mode 1 and mode 2 are operated alternately;

[0029] When the output voltage is greater than the input voltage Vin, the topology of the coupled inductor high-gain buck-boost inverter operates in boost mode, and the full-bridge circuit is only used for power frequency conversion. At this time, mode 3 and mode 1 operate alternately;

[0030] The first semiconductor switch device S 1 , the second semiconductor switch device S 2 , the third semiconductor switch device S 3 , the fourth semiconductor switch device S 4 , the fifth semiconductor switch device S 5 , the sixth semiconductor switch device S 6 , the first full-bridge semiconductor switch device S g1 , the second full-bridge semiconductor switch device S g2 , the third full-bridge semiconductor switch device S g3and the fourth full-bridge semiconductor switching device S g4 The operating frequency is f s , the switching period is T s ;

[0031] When the output voltage is between 0 and Vin, the first semiconductor switch device S 1 , the second semiconductor switch device S 2 , the third semiconductor switch device S 3 , the fourth semiconductor switch device S 4 , the fifth semiconductor switch device S 5 , the sixth semiconductor switch device S 6 The power supply is directly passed to the rear full bridge, and the full bridge circuit operates in Buck mode. At this time, mode 1 and mode 2 operate alternately. The buck operates in mode 1 during charging and in mode 2 during freewheeling. When the output voltage is greater than Vin, the topology of the coupled inductor high-gain buck-boost inverter operates in boost mode, and mode 3 and mode 1 operate alternately. The boost operates in mode 3 during charging and in mode 1 during freewheeling. S 1 To S 6 Working in boost mode, the rear full bridge is only used for power frequency conversion;

[0032] Mode 1: The second semiconductor switch device S 2 , the fourth semiconductor switch device S 4 , the sixth semiconductor switch device S 6 , the first full-bridge semiconductor switch device S g1 and the fourth full-bridge semiconductor switching device S g4 The first semiconductor switch device S is turned on. 1 , the third semiconductor switch device S 3 , the fifth semiconductor switch device S 5 , the second full-bridge semiconductor switch device S g2 and the third full-bridge semiconductor switching device S g3 Shutdown, the power supply passes through the first coupled inductor L 1 , the second coupled inductor L 2 , the second semiconductor switch device S 2 , the fourth semiconductor switch device S 4 , the first full-bridge semiconductor switch device S g1 and the fourth full-bridge semiconductor switching device S g4 For the filter circuit and load R L Power supply, at this time the filter inductor L O The current rises, the filter inductor L O Energy storage begins. In mode 1, the circuit as a whole is in the Buck inductor charging stage;

[0033] Mode 2: The first full-bridge semiconductor switch device S g1 and the second full-bridge semiconductor switching device S g2 Turn off, the third full-bridge semiconductor switch device S g3 and the fourth full-bridge semiconductor switching device S g4 The states of the other semiconductor switch devices are the same as those in mode 1. The filter inductor L O Through the third full-bridge semiconductor switching device S g3 and the fourth full-bridge semiconductor switching device S g4 For the filter circuit and load R L Power supply, the power supply is not working at this time, and the circuit as a whole is in the Buck discharge stage;

[0034] Mode 3: The first semiconductor switch device S 1 , the third semiconductor switch device S 3 and the fifth semiconductor switching device S 5 The second semiconductor switch device S is turned on. 2 , the fourth semiconductor switch device S 4 and the sixth semiconductor switching device S 6 When the inverter is turned off, the full-bridge circuit acts as an industrial frequency converter. At this time, the topology of the coupled inductor high-gain buck-boost inverter is in the Boost inductor charging stage.

[0035] Compared with the existing method, the present invention has the following advantages:

[0036] The high-gain single-stage buck-boost single-phase inverter proposed by the present invention has buck-boost capability, and can achieve stable AC output when the input voltage varies over a wide range of the photovoltaic cell output voltage. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] Figure 1 A topological structure diagram of a coupled inductor high-gain single-stage buck-boost single-phase inverter proposed by the present invention;

[0038] Figure 2 This is the traditional multi-channel MPPT structure diagram;

[0039] Figure 3 A schematic diagram of the modulation strategy of the coupled inductor high-gain single-stage buck-boost single-phase inverter proposed in the present invention;

[0040] Figure 4a It is a schematic diagram of the working mode 1 of the inverter proposed in the present invention within a modulation wave cycle;

[0041] Figure 4b It is a schematic diagram of the working mode 2 of the inverter proposed in the present invention within a modulation wave cycle;

[0042] Figure 4c It is a schematic diagram of the working mode 3 of the inverter proposed in the present invention within a modulation wave cycle;

[0043] Figure 5a Schematic diagram of the output gain of the coupled inductor high-gain single-stage buck-boost single-phase inverter proposed by the present invention changing with the duty cycle Figure 1 ;

[0044] Figure 5b Schematic diagram of the output gain of the coupled inductor high-gain single-stage buck-boost single-phase inverter proposed by the present invention changing with the duty cycle Figure 2 ;

[0045] Figure 6 This is the waveform diagram of the proposed inverter outputting a stable voltage when the input voltage changes.

[0046] Specific implementation method

[0047] The present invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0048] like Figure 1 As shown, the present invention proposes a coupled inductor type high-gain single-stage buck-boost single-phase inverter, comprising a coupled inductor, a boost conversion part consisting of six switch tubes, and a buck conversion part consisting of four switch tubes. The coupled inductor type high-gain single-stage buck-boost single-phase inverter is used to connect the energy output by photovoltaic panels or energy storage devices to the power grid. Thanks to the high gain feature, the inverter can adapt to a larger voltage range, and the input can be directly connected to the power grid during operation without the need for an additional DC / DC converter.

[0049] like Figure 1 The coupled inductor type high gain single-stage buck-boost single-phase inverter in the embodiment of the present invention is composed of a switching device S 1 , S 2 , S 3 , S 4 , S 5 , S 6 , S g1 , S g2 , S g3 , S g4 (All the switch devices used in the present invention are fully controlled bidirectional conduction devices, not limited to the MOSFET shown in the figure), coupled inductor L 1 , L 2 , capacitor C 1 , C 2 , output filter circuit L O , C O The input end of the present invention can be directly connected to the photovoltaic power generation panel.1 The same-name end of S1 is connected to the positive pole of the power supply. The drain of S1 is connected to the negative pole of the power supply, and the source is connected to S 2 Drain and L 1 Non-identical ends are connected, S 2 Source connection C 1 , C 1 The other end is connected to the negative pole of the power supply. 2 The non-identical end of the inductor is connected to the negative pole of the inductor, and the identical end is connected to S 3 Drain, S 4 Source connected, S 3 The source is connected to the positive pole of the power supply, S 4 Drain and capacitor C 2 Connected, C 2 The other end is connected to S 6 Drain, S 6 Drain and S 3 The source is connected. 5 The drain is connected to the negative pole of the power supply, and the source is connected to S 6 Drain. S 2 Source and S 4 The drain is connected to S g1 , S g2 , S g3 , S g4 The full-bridge circuit is composed of two bridge arms connected by output filter L O , C O The following is the total inverter output.

[0050] The control method of the high-gain single-stage buck-boost single-phase inverter topology shown in this embodiment is composed of the following steps:

[0051] Coupled inductor type high gain single-stage buck-boost single-phase inverter output voltage U O The modulation strategy for a sine wave is as follows Figure 3 As shown, the coupled inductor L 1 , L 2 Working in CCM mode, within one modulation wave cycle, the topology has three operating modes. The following discusses the output waveform as positive. When the output voltage is between 0 and Vin, S 1 To S 6 Pass the power directly to the next-stage full bridge, S g1 To S g4 When running in Buck mode, mode 1 and mode 2 operate alternately. When the output voltage is greater than Vin, the topology works in boost mode, and mode 3 and mode 1 operate alternately. 1 To S 6 Working in boost mode, the rear full bridge is only used for power frequency conversion. The working frequency of the tube when working at high frequency is defined as f s, the switching period is T s .

[0052] Mode 1: If Figure 4a As shown. 2 , S 4 , S 6 , S g1 , S g4 On, S 1 , S 3 , S g2 , S g3 Shutdown, power supply through coupled inductor, S 2 , S 4 , S g1 , S g4 To power the output filter circuit and the load, the inductor L O Current rise, L O Energy storage begins, and this mode topology is in the Buck inductor charging stage as a whole.

[0053] Mode 2: If Figure 4b As shown. 1 To S 6 Same as mode 1, S g1 and S g2 Shutdown, S g3 and S g4 The inductor is turned on through S g3 and S g4 The output filter circuit and the load are powered. At this time, the power supply is not working and the overall mode topology is in the Buck discharge stage.

[0054] Mode 3: If Figure 4c As shown. 1 , S 3 , S 5 On, S 2 , S 4 , S 6 The next stage full bridge is turned off and acts as a power frequency converter. At this time, the two inductors are connected in parallel with the power supply, the power supply charges the inductor, the coupled inductor current rises, and the load is connected by the capacitor C 1 , C 2 Series power supply. This modal topology is in the Boost inductor charging stage. The boost circuits composed of two coupled inductors can run alternately, which can effectively reduce the inductor ripple and expand the inverter capacity.

[0055] According to the modulation strategy described above, in Buck mode: the coupled inductor in the DTs interval of mode 1 is charged. Assuming that the inductor is completely symmetrical and the inductance values ​​at both ends are consistent, there is formula (1) (L 1 * corresponds to L 1The inductance value at one end), E* is the input voltage value:

[0056]

[0057] Mode 2 is powered by the inductor in the (1-D) interval, and the formula (2) is:

[0058]

[0059] When the equipment is running stably, the excitation inductance is approximated by the volt-second balance and small ripple as follows (3):

[0060] D(U O -E * )+U O (1-D)=0 (3)

[0061] Combining (1), (2), and (3), we can obtain:

[0062]

[0063] In Boost mode: the DTs interval of mode 3 stores energy in the inductor, and the two ends of one side of the inductor have the following formula:

[0064]

[0065] In the (1-D)Ts interval of mode 4,

[0066]

[0067] During stable operation, the excitation inductance is approximated by volt-second balance and small ripple as follows (8):

[0068]

[0069] Combining (5), (6) and (7), we can get:

[0070]

[0071] Similarly, the voltage of capacitor C2 is:

[0072]

[0073] In the D range, for the filter inductor L O For example, O * is L O Sensitivity value):

[0074]

[0075] In the (1-D) interval, for the filter inductor L O For example:

[0076]

[0077] According to the volt-second balance law:

[0078] D(U O -U C1 -U C2 )+(1-D)(U O +E * -U C1 -U C2 )=0 (12)

[0079] Combining (8), (9) and (12), we get:

[0080]

[0081] It can be seen from equations (4) and (8) that the inverter gain is affected by the duty cycle D and the inverter operating mode. The inverter gain in Buck and Boost modes is shown in Figure (5). In Boost mode, this topology has the characteristics of high gain and is more suitable for wide voltage range occasions.

[0082] This article provides a method for calculating the device parameters of a coupled inductor high-gain single-stage buck-boost single-phase inverter, including the coupled inductor L 1 , L 2 , capacitor C 1 , C 2 , and output filter circuit L O , C O Parameters. Assume the ripple current of the coupled inductor is ΔI L1 (ΔI L2 =ΔI L1 ), the maximum ripple current allowed on the inductor is ΔI Lmax ; Capacitor C 1 , C 2 The maximum permissible ripple voltage is ΔU C1 ; Output filter inductor L O The maximum ripple current is ΔI Omax ; Filter capacitor C O The maximum ripple voltage allowed is ΔU max ; Load R L The current is I O , the maximum load current is I Omax ; G max is the maximum gain. Since the two inductors are in interleaved operation in Boost mode, the equivalent switching frequency is 2fs. The coupled inductor L 1 , L 2 Including self-sensing s and mutual inductance L m, where L s and L m equal.

[0083] First determine the range of coupled inductance values, for mode 3:

[0084]

[0085] Find:

[0086]

[0087] Combining (13) and solving the coupled inductor value range is:

[0088]

[0089] For mode 2:

[0090] L O * ΔI LO =U O T S (1-D) (17)

[0092] Combining (4) we get:

[0093]

[0094] When D = 0.5, the ripple is the largest, so the solution is:

[0095]

[0096] The following is the capacitance C 1 , C 2 Select values ​​to calculate:

[0097]

[0098] Solving (15) together, we can get the range of C1 and C2 as follows:

[0099]

[0100] The following is the capacitance C O Select values ​​to calculate:

[0101]

[0102] Combining (18) we get:

[0103]

[0104] like Figure 6As shown, the present invention simulates the proposed topology and control method, and simulates the process of stabilizing the output when the input battery voltage drops. The results show that the high-gain single-stage buck-boost single-phase inverter proposed in the present invention has buck-boost capability, and can achieve stable AC output when the input voltage changes over a wide range of the photovoltaic cell output voltage.

[0105] Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. A topology of a coupled inductor high-gain buck-boost inverter, characterized in that: The invention comprises a coupled inductor, wherein the coupled inductor comprises a first coupled inductor (L1) and a second coupled inductor (L2); the same-name end of the first coupled inductor (L1) is electrically connected to the positive electrode of a power source (E), the drain electrode of a third semiconductor switch device (S3) and the drain electrode of a sixth semiconductor switch device (S6); and the opposite-name end of the first coupled inductor (L1) is electrically connected to the drain electrode of the first semiconductor switch device (S1) and the source electrode of the second semiconductor switch device (S2); The opposite-name end of the second coupled inductor (L2) is electrically connected to the negative electrode of the power source (E), the source electrode of the first semiconductor switch device (S1), one end of the first capacitor (C1) and the source electrode of the fifth semiconductor switch device (S5); The same-name end of the second coupled inductor (L2) is electrically connected to the source of the third semiconductor switch device (S3) and the drain of the fourth semiconductor switch device (S4); the drain of the second semiconductor switch device (S2) is electrically connected to the other end of the first capacitor (C1) and one end of the full-bridge circuit; The source of the sixth semiconductor switch device (S6) is electrically connected to the drain of the fifth semiconductor switch device (S5) and one end of the second capacitor (C2); the source of the fourth semiconductor switch device (S4) is electrically connected to the other end of the second capacitor (C2) and the other end of the full-bridge circuit; The full bridge circuit is electrically connected to the load (R L ).

2. The topology of the coupled inductor high gain buck-boost inverter according to claim 1, characterized in that: The full-bridge circuit includes a first full-bridge semiconductor switch device (S g1 ), the second full-bridge semiconductor switch device (S g2 )、The third full-bridge semiconductor switch device (S g3 ) and the fourth full-bridge semiconductor switching device (S g4 );in The first full-bridge semiconductor switching device (S g1 ) and the drain of the second full-bridge semiconductor switch device (S g2 ) are electrically connected to the drain of the second semiconductor switch device (S2) and the other end of the first capacitor (C1); the third full-bridge semiconductor switch device (S g3 ) and the source of the fourth full-bridge semiconductor switch device (S g4 ) are electrically connected to the source of the fourth semiconductor switch device (S4) and the other end of the second capacitor (C2); the third full-bridge semiconductor switch device (S g3 ) is electrically connected to the drain of the first full-bridge semiconductor switch device (S g1 ), and the drain of the fourth semiconductor switch device (S4) is electrically connected to the second full-bridge semiconductor switch device (S g2 ) source.

3. The topology of the coupled inductor high gain buck-boost inverter according to claim 2, characterized in that: The filter circuit includes a filter inductor (L O ), filter inductance (L O ) is electrically connected to the first full-bridge semiconductor switch device (S g1 ) and the source of the third full-bridge semiconductor switch device (S g3 ) drain, and the other end is electrically connected to the filter capacitor (C O ) and the load (R L ) one end; filter capacitor (C O ) is electrically connected to the load (R L ) and the other end of the second full-bridge semiconductor switch device (S g2 ) and the source of the fourth full-bridge semiconductor switching device (S g4 ) of the drain.

4. The topology of the coupled inductor high gain buck-boost inverter according to claim 3, characterized in that: The filter inductor (L O ) has a value range of: Among them, L O * is the inductance of the filter inductor, I Omax is the maximum output current of the filter inductor, E * is the input voltage value of the power supply, T S is the switching cycle of the semiconductor switching device; The capacitance range of the filter capacitor is as follows: Among them, C O * is the capacitance of the filter capacitor, ΔU max is the maximum output ripple of the filter capacitor.

5. The topology of the coupled inductor high gain buck-boost inverter according to claim 3, characterized in that: The first semiconductor switch device (S1), the second semiconductor switch device (S2), the third semiconductor switch device (S3), the fourth semiconductor switch device (S4), the fifth semiconductor switch device (S5), the sixth semiconductor switch device (S6), the first full-bridge semiconductor switch device (S g1 ), the second full-bridge semiconductor switch device (S g2 )、The third full-bridge semiconductor switch device (S g3 ) and the fourth full-bridge semiconductor switching device (S g4 ) are all MOSFET or IGBT.

6. The topology of the coupled inductor high gain buck-boost inverter according to claim 1, characterized in that: The inductance range of the first coupled inductor (L1) and the second coupled inductor (L2) is: Among them, L1 * is the inductance of the first coupled inductor and the second coupled inductor, ΔI Lmax is the maximum ripple current of the first coupled inductor and the second coupled inductor, G max is the maximum gain during the topology operation; E* is the input voltage value; The capacitance range of the first capacitor (C1) and the second capacitor (C2) is: C 1、2 is the capacitance of the first capacitor (C1) and the second capacitor (C2), ΔU C1 is the maximum ripple voltage on the first capacitor (C1) and the second capacitor (C2).

7. A method for controlling a topology of a coupled inductor high-gain buck-boost inverter, characterized in that: The topology of the coupled inductor high-gain buck-boost inverter is as described in any one of claims 1 to 6, and the control method comprises the following steps: The first coupled inductor (L1) and the second coupled inductor (L2) operate in a CCM mode; When the output voltage is between 0 and the input voltage Vin, the full-bridge circuit operates in Buck mode. At this time, mode 1 and mode 2 are operated alternately; When the output voltage is greater than the input voltage Vin, the topology of the coupled inductor high-gain buck-boost inverter operates in boost mode, and the full-bridge circuit is only used for power frequency conversion. At this time, mode 3 and mode 1 operate alternately; The first semiconductor switch device (S1), the second semiconductor switch device (S2), the third semiconductor switch device (S3), the fourth semiconductor switch device (S4), the fifth semiconductor switch device (S5), the sixth semiconductor switch device (S6), the first full-bridge semiconductor switch device (S g1 ), the second full-bridge semiconductor switch device (S g2 )、The third full-bridge semiconductor switch device (S g3 ) and the fourth full-bridge semiconductor switching device (S g4 ) The operating frequency is f s , the switching period is T s； When the output voltage is between 0 and Vin, the first semiconductor switch device (S1), the second semiconductor switch device (S2), the third semiconductor switch device (S3), the fourth semiconductor switch device (S4), the fifth semiconductor switch device (S5), and the sixth semiconductor switch device (S6) directly pass the power supply to the rear-stage full bridge, and the full-bridge circuit operates in Buck mode. At this time, mode 1 and mode 2 are operated alternately, wherein the buck charging period operates in mode 1, and the buck freewheeling period operates in mode 2; when the output voltage is greater than Vin, the topology of the coupled inductor high-gain buck-boost inverter operates in boost mode, and mode 3 and mode 1 are operated alternately. The boost charging period operates in mode 3, and the boost freewheeling period operates in mode 1. S1 to S6 operate in boost mode, and the rear-stage full bridge is only used for power frequency conversion; In mode 1: the second semiconductor switch device (S2), the fourth semiconductor switch device (S4), the sixth semiconductor switch device (S6), the first full-bridge semiconductor switch device (S g1 ) and the fourth full-bridge semiconductor switching device (S g4 ) is turned on, the first semiconductor switch device (S1), the third semiconductor switch device (S3), the fifth semiconductor switch device (S5), the second full-bridge semiconductor switch device (S g2 ) and the third full-bridge semiconductor switching device (S g3 ) is turned off, and the power supply is connected through the first coupled inductor (L1), the second coupled inductor (L2), the second semiconductor switch device (S2), the fourth semiconductor switch device (S4), the first full-bridge semiconductor switch device (S g1 ) and the fourth full-bridge semiconductor switching device (S g4 ) is the filter circuit and load (R L ) power supply, at this time the filter inductor (L O ) current rises, the filter inductor (L O ) starts to store energy. In mode 1, the circuit as a whole is in the Buck inductor charging stage; In mode 2: the first full-bridge semiconductor switch device (S g1 ) and the second full-bridge semiconductor switching device (S g2 ) is turned off, and the third full-bridge semiconductor switch device (S g3 ) and the fourth full-bridge semiconductor switching device (S g4 ) is turned on, and the states of the other semiconductor switch devices are the same as in mode 1. The filter inductor (L O ) through the third full-bridge semiconductor switching device (S g3 ) and the fourth full-bridge semiconductor switching device (S g4 ) is the filter circuit and load (R L ) power supply, the power supply does not work at this time, and the circuit as a whole is in the Buck discharge stage; In mode 3: the first semiconductor switch device (S1), the third semiconductor switch device (S3) and the fifth semiconductor switch device (S5) are turned on, the second semiconductor switch device (S2), the fourth semiconductor switch device (S4) and the sixth semiconductor switch device (S6) are turned off, and the full-bridge circuit acts as an industrial frequency converter. At this time, the topology of the coupled inductor high-gain buck-boost inverter is in the Boost inductor charging stage.

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