Array substrate, display panel and display device

Abstract

The invention provides an array substrate, a display panel and a display device, and the array substrate comprises a substrate which comprises a display area and a non-display area surrounding the display area; the display panel further comprises a supplementary metal layer, a third metal layer and a first planarization layer, the supplementary metal layer is located on one side of the substrate, the first planarization layer is located on the side, away from the substrate, of the supplementary metal layer, and the first planarization layer is located on the side, away from the substrate, of the third metal layer and located in the display area and the non-display area; wherein in the non-display area, the orthographic projection of the first planarization layer on the supplementary metal layer is located in the orthographic projection of the third metal layer on the supplementary metal layer. According to the array substrate provided by the invention, the condition that the first planarization layer absorbs water to expand in a high-temperature and high-humidity environment to cause stress change of the lower film layer to cause breakage of the lower film layer can be avoided, so that water vapor is prevented from invading the supplementary metal layer to cause corrosion of the supplementary metal layer, the supplementary metal layer can be effectively protected, and the packaging effect is ensured.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to an array substrate, a display panel and a display device. Background Art

[0002] OLED (Organic Light-Emitting Diode) is an active light-emitting device with a sandwich structure consisting of multiple organic layers and electrodes on both sides. At present, display screens based on AMOLED (Active-matrix organic light-emitting diode) have been commercialized in the fields of smart phones, watches and laptops.

[0003] However, the performance of existing displays needs to be improved. Summary of the invention

[0004] In view of this, the purpose of the present application is to provide an array substrate that can prevent corrosion of the supplementary metal layer and ensure the packaging effect.

[0005] Based on the above purpose, the present application provides an array substrate, which includes:

[0006] A substrate, comprising a display area and a non-display area surrounding the display area;

[0007] A supplementary metal layer, located at one side of the substrate and located in the display area and the non-display area;

[0008] A third metal layer is located at a side of the supplementary metal layer away from the substrate and located in the display area and the non-display area;

[0009] A first planarization layer is located on a side of the third metal layer away from the substrate and located in the display area and the non-display area;

[0010] Wherein, in the non-display area, the orthographic projection of the first planarization layer on the supplementary metal layer is located within the orthographic projection of the third metal layer on the supplementary metal layer.

[0011] In one embodiment, the array substrate further includes:

[0012] The inorganic film layer at least covers a portion of the third metal layer that is not covered by the first planarization layer.

[0013] In one embodiment, the array substrate further includes:

[0014] a fourth metal layer, located on a side of the first planarization layer away from the substrate;

[0015] A second planarization layer is located on a side of the fourth metal layer away from the substrate;

[0016] The inorganic film portion is located on a side of the second planarization layer away from the substrate;

[0017] The fifth metal layer is located on a side of the inorganic film layer away from the substrate.

[0018] In one embodiment, the array substrate further includes:

[0019] The third planarization layer is partially located on a side of the fifth metal layer away from the substrate, and partially covers an area on the inorganic film layer that is not covered by the fifth metal layer.

[0020] In one embodiment, the array substrate further includes: a first metal layer and a second metal layer located between the substrate and the supplementary metal layer; and

[0021] A first insulating layer, located between the first metal layer and the second metal layer;

[0022] a second insulating layer, located between the second metal layer and the supplementary metal layer;

[0023] a third insulating layer, at least partially located between the supplementary metal layer and the third metal layer, wherein the inorganic film layer partially covers an area on the third insulating layer that is not covered by the third metal layer;

[0024] Preferably, the first metal layer is connected to the second metal layer through a via, and the second metal layer is connected to the third metal layer through a via.

[0025] In one embodiment, the substrate comprises:

[0026] A first flexible substrate, a second flexible substrate, and a first barrier layer located between the first flexible substrate and the second flexible substrate.

[0027] In one embodiment, the array substrate further includes:

[0028] A second barrier layer, a buffer layer and a gate dielectric layer are disposed between the substrate and the supplementary metal layer and away from the substrate in sequence. In one embodiment, the third metal layer is connected to the supplementary metal layer through a via.

[0029] Based on the same inventive concept, the present application also discloses a display panel, which includes any of the array substrates described above.

[0030] Based on the same inventive concept, the present application also discloses a display device, which includes any one of the display panels described above.

[0031] Compared with the prior art, in the array substrate provided by the present application, in the non-display area, the orthographic projection of the first planarization layer on the supplementary metal layer is located within the orthographic projection of the third metal layer on the supplementary metal layer, thereby preventing the first planarization layer from absorbing water and expanding in a high temperature and high humidity environment, causing stress changes in the underlying film layer and causing the underlying film layer to break, thereby preventing water vapor from invading the supplementary metal layer and causing corrosion of the supplementary metal layer, and can effectively protect the supplementary metal layer and ensure the packaging effect. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] In order to more clearly illustrate the technical solutions in the present application or related technologies, the drawings required for use in the embodiments or related technical descriptions are briefly introduced below. Obviously, the drawings described below are only embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0033] Figure 1 is a schematic diagram of a layer structure of a related array substrate;

[0034] Figure 2 A schematic diagram of the structure of an array substrate provided in one embodiment of the present application;

[0035] Figure 3 A schematic diagram of the layer structure of an array substrate provided in one embodiment of the present application;

[0036] Figure 4 A schematic diagram of the layer structure of an array substrate provided in another embodiment of the present application;

[0037] Figure 5 A schematic diagram of the layer structure of an array substrate provided in another embodiment of the present application;

[0038] Figure 6 A schematic diagram of the layer structure of an array substrate provided in another embodiment of the present application;

[0039] Figure 7 A schematic diagram of the layer structure of an array substrate provided in another embodiment of the present application;

[0040] Figure 8 A schematic diagram of the layer structure of an array substrate provided in another embodiment of the present application;

[0041] Fig. 9 A schematic diagram of the layer structure of an array substrate provided in another embodiment of the present application.

[0042] Marking Description:

[0043] 100, array substrate; 101, display area; 102, non-display area;

[0044] 1. substrate; 11. first flexible substrate; 12. first barrier layer; 13. second flexible substrate;

[0045] 21. first metal layer; 22. second metal layer; 23. supplementary metal layer; 24. third metal layer; 241. extension portion; 25. fourth metal layer; 26. fifth metal layer;

[0046] 3. planarization layer; 31. first planarization layer; 32. second planarization layer; 33. third planarization layer;

[0047] 4. Insulating layer; 41. First insulating layer; 42. Second insulating layer; 43. Third insulating layer; 44. Inorganic film layer;

[0048] 51. second barrier layer; 52. buffer layer; 53. gate dielectric layer;

[0049] 6. Vias. DETAILED DESCRIPTION

[0050] In order to make the objectives, technical solutions and advantages of the present application more clearly understood, the present application is further described in detail below in combination with specific embodiments and with reference to the accompanying drawings.

[0051] It should be noted that, unless otherwise defined, the technical terms or scientific terms used in the embodiments of the present application should be the usual meanings understood by people with ordinary skills in the field to which the present application belongs. The "first", "second" and similar words used in the embodiments of the present application do not represent any order, quantity or importance, but are only used to distinguish different components. "Including" or "comprising" and similar words mean that the elements or objects appearing in front of the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. "Connect" or "connected" and similar words are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0052] With the development of display technology, the ultra-narrow border of OLED display panels is the main development trend at present, which also puts higher and higher requirements on the wiring design of display panels. Especially on the lower border of the display panel, due to the dense wiring, it is easy to cause some reliability problems at the overlapping position of the film layer.

[0053] For details, please refer to Figure 1As shown, a related array substrate includes a substrate 1, wherein the substrate 1 includes a display area and a non-display area surrounding the display area. Figure 1 The layer structure diagram of the non-display area (lower frame), the array substrate also includes a first metal layer 21, a second metal layer 22 and a third metal layer 24, a planarization layer 3, etc. stacked on the substrate 1. Among them, the first metal layer 21 is usually used to form the gate of the transistor in the pixel driving circuit, the first metal layer 21 and the second metal layer 22 are usually used to form the first plate and the second plate of the storage capacitor in the pixel driving circuit, the third metal layer 24 is usually used to form the source / drain, bridge wire and metal power line of the transistor, the planarization layer 3 is used to form the pixel definition layer and other structures, and an insulating layer 4 is usually provided between adjacent metal layers. Among them, the insulating layer 4 can avoid short circuits due to direct contact between different metal layers, ensure that the electrical characteristics of each metal layer are not disturbed, and maintain normal circuit functions. At the same time, the signal interference between adjacent metal layers is reduced to improve the display quality.

[0054] Please continue to refer to Figure 1 As shown, in order to improve the signal transmission efficiency, the array substrate sets a supplementary metal layer 23 between the second metal layer 22 and the third metal layer 24 for routing. The boundary of the planarization layer 3 is easy to absorb water and expand in a high temperature and high humidity environment, which will cause the stress change of the lower film layer and cause the lower film layer to break, thereby causing water vapor to invade the supplementary metal layer 23 below, causing the supplementary metal layer 23 to corrode.

[0055] Based on this, the present application provides an array substrate solution to solve the above problems.

[0056] Please refer to Figure 2 and 3 As shown, an array substrate 100 provided in an embodiment of the present application includes a substrate 1, a supplementary metal layer 23, a third metal layer 24 and a first planarization layer 31.

[0057] The substrate 1 includes a display area 101 and a non-display area 102 surrounding the display area 101; the supplementary metal layer 23 is located at one side of the substrate 1 and is located in the display area 101 and the non-display area 102; the third metal layer 24 is located at a side of the supplementary metal layer 23 away from the substrate 1 and is located in the display area 101 and the non-display area 102; the first planarization layer 31 is located at a side of the third metal layer 24 away from the substrate 1 and is located in the display area 101 and the non-display area 102. In the non-display area 102, the orthographic projection of the first planarization layer 31 on the supplementary metal layer 23 is located within the orthographic projection of the third metal layer 24 on the supplementary metal layer 23.

[0058] Among them, the substrate 1 can provide buffering, protection or support for the display panel. The material of the substrate 1 can be polyimide (PI), polyethylene naphthalate (PEN) or polyethylene terephthalate (PET), etc., or a mixture of the above materials.

[0059] Among them, the first metal layer 21 is usually used to form the gate of the transistor in the pixel driving circuit, the first metal layer 21 and the second metal layer 22 are usually used to form the first plate and the second plate of the storage capacitor in the pixel driving circuit, the third metal layer 24 is usually used to form the source / drain, bridge wire and metal power line of the transistor, the planarization layer 3 is used to form the pixel definition layer and other structures, and the supplementary metal layer 23 is used as an additional routing layer to improve the signal transmission efficiency and reduce the interference between signals. Preferably, the material of the first metal layer 21 and the second metal layer 22 includes molybdenum Mo, and the material of the third metal layer 24 is Ti-AL-Ti. In other embodiments, the materials of the first metal layer 21, the second metal layer 22 and the third metal layer 24 can also be replaced by other metal materials, without specific limitation.

[0060] It should be noted that the first metal layer 21, the second metal layer 22, the supplementary metal layer 23, and the third metal layer 24 in this embodiment are distributed in both the display area 101 and the non-display area 102. The metal layer in the display area 101 is used to drive and control the display of pixels, such as transmitting signals, controlling transistor switches, etc. The metal layer in the non-display area 102 plays the role of connection, power supply, signal transmission, etc., to ensure the normal operation of the entire display panel, and is also used to connect with external circuits.

[0061] In the array substrate 100 provided in the present embodiment, in the non-display area 102, the orthographic projection of the first planarization layer 31 on the supplementary metal layer 23 is located within the orthographic projection of the third metal layer 24 on the supplementary metal layer 23, so as to prevent the first planarization layer 31 from absorbing water and expanding in a high temperature and high humidity environment, causing stress changes in the film layer below and causing the film layer below to break, thereby preventing water vapor from invading the supplementary metal layer 23 and causing corrosion of the supplementary metal layer 23, thereby effectively protecting the supplementary metal layer 23 and ensuring the packaging effect.

[0062] For details, please refer to Figure 3 As shown, the third metal layer 24 completely blocks the bottom of the first planarization layer 31. Even if the first planarization layer 31 absorbs water and expands in a high temperature and high humidity environment, the stress change of the third metal layer 24 caused by it cannot be transmitted to the underlying film layer, thereby avoiding the rupture of the underlying film layer and preventing water vapor from invading the supplementary metal layer 23.

[0063] Reference Figure 4As shown, in one embodiment, the array substrate 100 further includes an inorganic film layer 44, which at least covers the portion of the third metal layer 24 not covered by the first planarization layer 31, wherein the inorganic film layer 44 can prevent the third metal layer 24 from being short-circuited with the upper metal layer, and at the same time, the inorganic film layer 44 can also prevent the intrusion of external water vapor, and further prevent the corrosion of the supplementary metal layer 23. Preferably, the inorganic film layer 44 is an inorganic material, which is conducive to ensuring the water vapor proof effect.

[0064] Please continue to refer to Figure 4 As shown, in one embodiment, the array substrate 100 further includes a fourth metal layer 25, a second planarization layer 32 and a fifth metal layer 26, the fourth metal layer 25 is located on the side of the first planarization layer 31 away from the substrate 1, the second planarization layer 32 is located on the side of the fourth metal layer 25 away from the substrate 1, the inorganic film layer 44 is partially located on the side of the second planarization layer 32 away from the substrate 1, and the fifth metal layer 26 is located on the side of the inorganic film layer 44 away from the substrate 1. Among them, the fourth metal layer 25 and the fifth metal layer 26 are used to realize different routing functions, such as forming a metal power line. Preferably, the material of the fourth metal layer 25 is Ti-AL-Ti, and the material of the fifth metal layer 26 includes Mo. In other embodiments, the materials of the fourth metal layer 25 and the fifth metal layer 26 can also be replaced by other metal materials, which are not specifically limited. Among them, the fourth metal layer 25 and the fifth metal layer 26 are distributed in both the display area 101 and the non-display area 102.

[0065] The inorganic film layer 44 can prevent the fifth metal layer 26 and the third metal layer 24 from being short-circuited.

[0066] Reference Figure 5 As shown, in one embodiment, the array substrate 100 further includes a third planarization layer 33, and a portion of the third planarization layer 33 is located on a side of the fifth metal layer 26 away from the substrate 1, and a portion of the third planarization layer 33 covers an area on the inorganic film layer 44 that is not covered by the fifth metal layer 26. The third planarization layer 33 can eliminate the height difference between different film layers, provide a flat surface for the deposition of subsequent film layers, avoid short circuits between adjacent metal layers due to unevenness, and protect the underlying film layer structure from damage.

[0067] Reference Figure 6As shown, in one embodiment, in the non-display area 102, the third metal layer 24 extends the first planarization layer 31 from one end close to the non-display area 102, and forms an extension portion 241, and the inorganic film layer 44 covers the extension portion 241. Among them, the extension portion 241 can more effectively prevent the first planarization layer 31 from absorbing water and swelling in a high temperature and high humidity environment, causing stress changes in the film layer below and causing the film layer below to break, thereby preventing water vapor from invading the supplementary metal layer 23 and causing corrosion of the supplementary metal layer 23, which can more effectively protect the supplementary metal layer 23 and further ensure the packaging effect.

[0068] Please continue to refer to Figure 3 As shown, in one embodiment, the array substrate 100 further includes a first metal layer 21 and a second metal layer 22, the first metal layer 21 is located at one side of the substrate 1 and is located in the display area 101 and the non-display area 102, the second metal layer 22 is located at a side of the first metal layer 21 away from the substrate 1 and is located in the display area 101 and the non-display area 102. The array substrate 100 further includes a first insulating layer 41, a second insulating layer 42 and a third insulating layer 43, the first insulating layer 41 is located between the first metal layer 21 and the second metal layer 22, the second insulating layer 42 is located between the second metal layer 22 and the supplementary metal layer 23, and the third insulating layer 43 is located between the supplementary metal layer 23 and the third metal layer 24.

[0069] Among them, the insulating layer can prevent short circuits between different metal layers due to direct contact, ensure that the electrical characteristics of each metal layer are not disturbed, and maintain normal circuit functions. At the same time, it reduces signal interference between adjacent metal layers and improves display quality. Optionally, the first metal layer 21 and the second metal layer 22 are used to form the gate of a thin film transistor, a capacitor plate, etc.

[0070] Reference Figure 7 As shown, in one embodiment, the substrate 1 includes: a first flexible substrate 11, a second flexible substrate 13, and a first barrier layer 12 located between the first flexible substrate 11 and the second flexible substrate 13. The double-layer flexible substrate can enhance the bending and folding performance, and isolate water vapor through the barrier layer to avoid mutual influence between the double-layer flexible substrates.

[0071] Reference Figure 8 As shown, in one embodiment, the array substrate 100 further includes a second barrier layer 51, a buffer layer 52 and a gate dielectric layer 53, which are located between the substrate 1 and the supplementary metal layer 23 and are arranged in sequence away from the substrate 1. The second barrier layer 51 can block water vapor. The gate dielectric layer 53 insulates the gate and the channel to prevent current leakage, and controls the current in the channel through the gate voltage, while helping to maintain the stable operation of devices such as transistors. The buffer layer 52 increases the flatness of the film layer and enhances the adhesion of the film layer.

[0072] Reference Fig. 9 As shown, in one embodiment, the first metal layer 21 is connected to the second metal layer 22 through the via 6, the second metal layer 22 is connected to the third metal layer 24 through the via 6, and the third metal layer 24 is connected to the supplementary metal layer 23 through the via 6, thereby realizing the transmission of signals between different routing layers.

[0073] Specifically, the first insulating layer 41, the second insulating layer 42 and the third insulating layer 43 are all provided with via holes 6, the first metal layer 21 is connected to the second metal layer 22 through the via holes 6 on the first insulating layer 41, the second metal layer 22 and the third metal layer 24 are connected through the via holes 6 on the second insulating layer 42, and the third metal layer 24 is connected to the supplementary metal layer 23 through the via holes 6 on the third insulating layer 43. Further, the via holes 6 on the first insulating layer 41, the second insulating layer 42 and the third insulating layer 43 are all formed by etching.

[0074] In one embodiment, the fourth metal layer 25 is connected to the third metal layer 24 through a via 6. Specifically, the first planarization layer 31 is provided with a via 6, and the fourth metal layer 25 is connected to the third metal layer 24 through the via 6 on the first planarization layer 31. Further, the via 6 on the first planarization layer 31 is formed by etching.

[0075] Based on the same inventive concept, another embodiment of the present application further discloses a display panel, which includes the array substrate 100 as in the above embodiment.

[0076] The display panel provided in this embodiment has an array substrate 100, in the non-display area 102, the orthographic projection of the first planarization layer 31 on the supplementary metal layer 23 is located within the orthographic projection of the third metal layer 24 on the supplementary metal layer 23, so as to prevent the first planarization layer 31 from absorbing water and expanding in a high temperature and high humidity environment, causing stress changes in the film layer below and causing the film layer below to break, thereby preventing water vapor from invading the supplementary metal layer 23 and causing corrosion of the supplementary metal layer 23, which can effectively protect the supplementary metal layer 23, ensure the packaging effect, and improve the performance of the display panel.

[0077] In one embodiment, the display panel further includes an encapsulation layer, which is located on the side of the third planarization layer 33 away from the substrate 1, and the encapsulation layer includes a first encapsulation layer, a second encapsulation layer and a third encapsulation layer which are stacked, and the first encapsulation layer, the second encapsulation layer and the third encapsulation layer are sequentially arranged away from the substrate 1. Preferably, the first encapsulation layer and the third encapsulation layer include inorganic materials, and the second encapsulation layer includes organic materials, so as to realize inorganic-organic-inorganic three-layer encapsulation and ensure the encapsulation effect. Among them, the inorganic encapsulation can be prepared by chemical vapor deposition, which is beneficial to improve the compactness and encapsulation effect of the encapsulation layer, and the organic encapsulation can be prepared by inkjet printing.

[0078] Based on the same inventive concept, another embodiment of the present application further discloses a display device, which includes the display panel in the above embodiment. Further, the display device includes a mobile phone, VR equipment, computer, television, car display equipment, etc.

[0079] The display device provided in the present embodiment has an array substrate 100 in its display panel. In the non-display area 102, the orthographic projection of the first planarization layer 31 on the supplementary metal layer 23 is located within the orthographic projection of the third metal layer 24 on the supplementary metal layer 23. This prevents the first planarization layer 31 from absorbing water and expanding in a high temperature and high humidity environment, causing stress changes in the film layer below and causing the film layer below to break. This prevents water vapor from invading the supplementary metal layer 23 and causing corrosion of the supplementary metal layer 23. This can effectively protect the supplementary metal layer 23, ensure the packaging effect, and improve the performance of the display device.

[0080] Although the present application has been described in conjunction with specific embodiments thereof, many alternatives, modifications and variations of these embodiments will be apparent to those skilled in the art in light of the foregoing description.

[0081] It should be noted that the above describes some embodiments of the present application. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recorded in the claims can be performed in an order different from that in the above embodiments and still achieve the desired results. In addition, the processes depicted in the accompanying drawings do not necessarily require the specific order or continuous order shown to achieve the desired results. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0082] The embodiments of the present application are intended to cover all such substitutions, modifications and variations that fall within the broad scope of the appended claims. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the embodiments of the present application should be included in the scope of protection of the present application.

Claims

1. An array substrate, characterized in that: include: A substrate, comprising a display area and a non-display area surrounding the display area; A supplementary metal layer, located at one side of the substrate and located in the display area and the non-display area; A third metal layer is located at a side of the supplementary metal layer away from the substrate and located in the display area and the non-display area; A first planarization layer is located on a side of the third metal layer away from the substrate and located in the display area and the non-display area; Wherein, in the non-display area, the orthographic projection of the first planarization layer on the supplementary metal layer is located within the orthographic projection of the third metal layer on the supplementary metal layer.

2. The array substrate according to claim 1, characterized in that: The array substrate further includes: The inorganic film layer at least covers a portion of the third metal layer that is not covered by the first planarization layer.

3. The array substrate according to claim 2, characterized in that: The array substrate further includes: a fourth metal layer, located on a side of the first planarization layer away from the substrate; A second planarization layer is located on a side of the fourth metal layer away from the substrate; The inorganic film layer is partially located on a side of the second planarization layer away from the substrate; The fifth metal layer is located on a side of the inorganic film layer away from the substrate.

4. The array substrate according to claim 3, characterized in that: The array substrate further includes: The third planarization layer is partially located on a side of the fifth metal layer away from the substrate, and partially covers an area on the inorganic film layer that is not covered by the fifth metal layer.

5. The array substrate according to claim 2, characterized in that: The array substrate further includes: a first metal layer and a second metal layer located between the substrate and the supplementary metal layer; and A first insulating layer, located between the first metal layer and the second metal layer; a second insulating layer, located between the second metal layer and the supplementary metal layer; a third insulating layer, at least partially located between the supplementary metal layer and the third metal layer, wherein the inorganic film layer partially covers an area on the third insulating layer that is not covered by the third metal layer; Preferably, the first metal layer is connected to the second metal layer through a via, and the second metal layer is connected to the third metal layer through a via.

6. The array substrate according to claim 1, characterized in that: The substrate comprises: A first flexible substrate, a second flexible substrate, and a first barrier layer located between the first flexible substrate and the second flexible substrate.

7. The array substrate according to claim 1, characterized in that: The array substrate further includes: A second barrier layer, a buffer layer and a gate dielectric layer are located between the substrate and the supplementary metal layer and are arranged in sequence away from the substrate.

8. The array substrate according to claim 1, characterized in that: The third metal layer is connected to the supplementary metal layer through a via.

9. A display panel, characterized in that: It comprises the array substrate as described in any one of claims 1 to 8.

10. A display device, characterized in that: Comprising the display panel as claimed in claim 9.

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