Resistive random access memory structure and manufacturing method thereof

Abstract

The invention discloses a resistive random access memory structure and a manufacturing method thereof, the resistive random access memory structure comprises a lower electrode, a resistance conversion layer, an upper electrode, a gap wall and a conductive wire, the lower electrode is a first cylinder, the resistance conversion layer comprises a second cylinder and a three-dimensional disc, and the gap wall is arranged between the second cylinder and the three-dimensional disc. Wherein a first lower bottom surface of the second cylinder is in direct contact with an upper surface of the three-dimensional disc, the upper electrode is a third cylinder, the third cylinder comprises an upper top surface, a second lower bottom surface and a side surface, and the first cylinder is embedded in the second cylinder and the three-dimensional disc. The second cylinder is embedded in the third cylinder, the second lower bottom surface of the third cylinder is in direct contact with the upper surface of the three-dimensional disc, the gap wall surrounds and is in direct contact with the side wall of the three-dimensional disc, and the conductive wire wraps the upper top surface and the side surface of the third cylinder.

Description

Technical Field

[0001] The present invention relates to a resistance random access memory, and in particular to a memory structure for increasing the resistance difference between a high resistance state and a low resistance state of the resistance random access memory and a manufacturing method thereof. Background Art

[0002] Resistive Random Access Memory (RRAM) is a type of non-volatile memory that offers the following advantages: small memory cell size, ultra-high-speed operation, low-power operation, high endurance, and CMOS compatibility.

[0003] The main operating principle of RRAM is to use the resistance of metal oxide to change with the applied bias voltage to generate different resistance values ​​to store data. How to distinguish the internally stored value is determined by the resistance value of the RRAM.

[0004] As the amount of electronic data grows, the demand for memory with high capacity, high read / write times and faster read / write speed has also increased significantly. In order to achieve high-performance operation, the retention and endurance of RRAM must be increased. Summary of the invention

[0005] In view of this, the present invention provides a novel resistance random access memory structure to increase the durability and read / write endurance of the resistance random access memory structure.

[0006] According to a preferred embodiment of the present invention, a resistive random access memory structure includes a lower electrode, a resistive conversion layer, an upper electrode, a spacer and a conductive line, wherein the lower electrode is a first cylinder, the resistive conversion layer includes a second cylinder and a three-dimensional disk, wherein a first lower bottom surface of the second cylinder directly contacts an upper surface of the three-dimensional disk, the upper electrode is a third cylinder, the third cylinder includes an upper top surface, a second lower bottom surface and a side surface, wherein the first cylinder is buried in the second cylinder and the three-dimensional disk, the second cylinder is buried in the third cylinder and the second lower bottom surface of the third cylinder directly contacts the upper surface of the three-dimensional disk, the spacer surrounds and directly contacts the side wall of the three-dimensional disk, and the conductive line covers the upper top surface and side surface of the third cylinder.

[0007] According to another preferred embodiment of the present invention, a method for manufacturing a resistive random access memory structure includes first forming a lower electrode, a resistive conversion layer and an upper electrode in sequence, wherein the lower electrode is a first cylinder, the resistive conversion layer includes a second cylinder and a three-dimensional disk, the upper electrode is a third cylinder, the third cylinder includes an upper top surface, a second lower bottom surface and a side surface, then forming a spacer wall surrounding the resistive conversion layer, and finally forming a conductive line covering and directly contacting the upper top surface and side surface of the third cylinder.

[0008] In order to make the above-mentioned objectives, features and advantages of the present invention more clearly understood, the following is a detailed description of the preferred embodiments and the accompanying drawings. However, the following preferred embodiments and drawings are only for reference and explanation, and are not intended to limit the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1 A three-dimensional schematic diagram of a resistance random access memory according to a preferred embodiment of the present invention;

[0010] Figure 2 for Figure 1 Exploded diagram of

[0011] Figure 3 A three-dimensional schematic diagram of a resistive random access memory structure according to a preferred embodiment of the present invention;

[0012] Figures 4 to 10 It is a schematic diagram of the manufacturing process of a resistance random access memory structure according to a preferred embodiment of the present invention.

[0013] Explanation of symbols

[0014] 10: First Cylinder

[0015] 12: Second Cylinder

[0016] 12a: first lower bottom surface

[0017] 12b: First upper top surface

[0018] 12d: Accommodation space

[0019] 14: 3D disc

[0020] 14b: Upper surface

[0021] 14c: Side wall

[0022] 16: The third cylinder

[0023] 16a: Second lower bottom surface

[0024] 16b: Top surface

[0025] 16c: Side

[0026] 16d: Accommodation space

[0027] 18a: Dielectric layer

[0028] 18b: Dielectric layer

[0029] 18c: Dielectric layer

[0030] 18d: Dielectric layer

[0031] 20:Metal Wire

[0032] 22: Conductive plug

[0033] 24: Virtual material layer

[0034] 24a: Holes

[0035] 26: Oxygen Atom Storage Layer

[0036] 26a: Oxygen atom storage material layer

[0037] 28: Current forming layer

[0038] 28a: Current forming material layer

[0039] 100: Resistive Random Access Memory

[0040] 200: Resistive Random Access Memory Structure

[0041] BE: Bottom Electrode

[0042] ML: Conductive thread

[0043] R: Resistance conversion layer

[0044] R1: resistance conversion material layer

[0045] S: gap wall

[0046] S1: Spacer material layer

[0047] TE: Upper electrode

[0048] TE1: upper electrode material layer

[0049] X: horizontal direction DETAILED DESCRIPTION

[0050] Figure 1 FIG. 4 is a three-dimensional schematic diagram of a resistance random access memory according to a preferred embodiment of the present invention. Figure 2 for Figure 1 Exploded diagram of . Figure 3FIG. 4 is a three-dimensional schematic diagram of a resistance random access memory structure according to a preferred embodiment of the present invention.

[0051] like Figure 1 and Figure 2 As shown, a resistance random access memory 100 includes a lower electrode BE, a resistance conversion layer R, an upper electrode TE and a spacer S, wherein the lower electrode BE is a solid first cylinder 10, the resistance conversion layer R includes a second cylinder 12 and a three-dimensional disk 14, wherein the second cylinder 12 has an accommodating space 12d for accommodating the lower electrode BE, and a first lower bottom surface 12a of the second cylinder 12 directly contacts an upper surface 14b of the three-dimensional disk 14, and the diameter of the upper surface 14b of the three-dimensional disk 14 is greater than the diameter of the first lower bottom surface 12a, and the upper electrode TE is a third cylinder 16, the third cylinder 16 includes an upper top surface 16b, a second lower bottom surface 16a and a side surface 16c, and the third cylinder 16 also has an accommodation space 16d, wherein the first cylinder 10 passes through the three-dimensional disk 14 and is buried in the accommodation space 12d of the second cylinder 12, the second cylinder 12 is buried in the accommodation space 16d of the third cylinder 16, and the second bottom surface 16a of the third cylinder 16 directly contacts the upper surface 14b of the three-dimensional disk 14, and the spacer S surrounds and directly contacts the side wall 14c of the three-dimensional disk 14 and part of the side surface 16c of the third cylinder 16, that is, the spacer S completely covers the side wall of the resistance conversion layer R and the upper electrode TE that are cut flush and the contact surface of the resistance conversion layer R and the upper electrode TE, so that the resistance conversion layer R can be prevented from being exposed to the environment, thereby preventing the resistance conversion layer R from being oxidized or being entered by water vapor, such as Figure 3 As shown, a conductive line ML is disposed on the upper electrode TE of the resistance random access memory 100. Specifically, the conductive line ML covers the upper top surface 16b and the side surface 16c of the third cylinder.

[0052] The bottom electrode BE comprises tantalum, titanium, titanium nitride, tantalum nitride or other metal materials, the top electrode TE comprises iridium, titanium nitride, tantalum nitride or other metal materials. The resistance conversion layer R comprises tantalum oxide, nickel oxide, hafnium oxide or other transition metal oxides, the spacer S comprises silicon nitride, and the conductive line ML comprises copper, aluminum, tungsten or other metals or alloys.

[0053] Figures 4 to 10 A schematic diagram of a manufacturing process of a resistance random access memory structure is shown in accordance with a preferred embodiment of the present invention. Figures 4 to 10 illustrate Figures 1 to 3 The manufacturing method of the resistance random access memory 100 and the resistance random access memory structure 200 shown in the example, wherein the components having the same function and position will be used Figures 1 to 3Component number in .

[0054] like Figure 4 As shown, a dielectric layer 18a and a dielectric layer 18b are first provided, the dielectric layer 18b covers the dielectric layer 18a, a metal line 20 is disposed in the dielectric layer 18a, and a conductive plug 22 is disposed in the dielectric layer 18b, and the conductive plug 22 contacts the metal line 20. Then, a dielectric layer 18c is formed, such as a nitrogen-doped carbide, to cover the dielectric layer 18b and contact the conductive plug 22, and then a dummy material layer 24 is formed to cover and contact the dielectric layer 18c. The dielectric layer 18a and the dielectric layer 18b may include insulating materials such as silicon oxide and silicon nitride, and the metal line 20 and the conductive plug 22 may include conductive materials such as copper, aluminum or tungsten. The dummy material layer 24 includes silicon oxide.

[0055] Then, the dummy material layer 24 is etched to form a hole 24a, which is preferably cylindrical. Then, a lower electrode material layer (not shown) is formed to cover the dummy material layer 24 and fill the hole 24a. Then, the lower electrode material layer is planarized to remove the lower electrode material layer outside the hole 24a. At this time, the lower electrode material layer remaining in the hole 24a serves as a lower electrode BE. Figure 5 As shown, the dummy material layer 24 is removed, and the lower electrode BE is protruded from the dielectric layer 18c. Then, a resistance conversion material layer R1 and an upper electrode material layer TE1 are formed in sequence to conformably cover the lower electrode BE and the dielectric layer 18c. According to a preferred embodiment of the present invention, the resistance conversion material layer R1 includes an oxygen atom storage material layer 26a and a current forming material layer 28a. The current forming material layer 28a is located on the oxygen atom storage material layer 26a. Specifically, the oxygen atom storage layer 26a includes tantalum oxide (TaO x , x<2.5), the current forming layer 28a contains tantalum pentoxide (Ta2O5).

[0056] like Figure 6 As shown, the upper electrode material layer TE1 and the resistance conversion material layer R1 are patterned to form an upper electrode TE and a resistance conversion layer R. The patterned oxygen atom storage material layer 26a becomes an oxygen atom storage layer 26, and the patterned current forming material layer 28a becomes a current forming layer 28. It is additionally explained that: Figure 1 and Figure 2 In order to make the diagram clear and concise, the resistance conversion layer R is shown as a single layer, but in fact, in the embodiment of the present invention, the resistance conversion layer R preferably includes the following Figure 6The oxygen atom storage layer 26 and the current forming layer 28 are shown. In addition, the upper electrode TE forms an inverted U shape when viewed from the side, and the resistance conversion layer R forms a square wave shape when viewed from the side. The square wave shape includes an inverted U shape and has a rectangular connection at each end of the inverted U shape, and the connected rectangles extend toward the horizontal direction X, and the horizontal direction X is parallel to the upper surface of the dielectric layer 18c.

[0057] like Figure 7 As shown, a spacer material layer S1 is formed to cover the upper electrode TE, the resistance conversion layer R and the lower electrode BE. Figure 8 As shown, the spacer material layer S1 is etched to form a spacer S. The height of the spacer S needs to be no less than the vertical side wall of the rectangle at the end of the inverted U-shape of the resistance conversion layer R. Preferably, the height of the spacer S needs to be greater than the thickness of the resistance conversion layer R, that is, the spacer S needs to completely cover the vertical side wall of the rectangle at the end of the inverted U-shape. According to a preferred embodiment of the present invention, the spacer S can also extend to the side wall contacting the upper electrode TE, that is, the contact surface between the resistance conversion layer R and the upper electrode TE is completely covered. At this point, the resistance random access memory 100 of the present invention has been completed.

[0058] like Fig. 9 As shown, a dielectric layer 18d is formed to cover the upper electrode TE, the resistance conversion layer R, the lower electrode BE and the spacer S. The dielectric layer 18d is preferably silicon oxide. Fig.10 As shown, the dielectric layer 18d is etched to expose the upper electrode TE. Specifically, a trench (not shown) is formed by etching the dielectric layer 18d, so that the upper electrode TE is exposed from the bottom of the trench. Then, a conductive line ML is formed to fill the trench and cover the upper electrode TE. At this time, from the side view, the conductive line ML contacts the upper electrode TE to form an inverted U shape. At this time, the resistance random access memory structure 200 of the present invention has been completed. The etching depth of the dielectric layer 18d can be adjusted according to different requirements. It is worth noting that when etching the dielectric layer 18d, because the spacer S and the dielectric layer 18d are made of different materials, the spacer S will not be etched during the etching process. Therefore, even if the etching is performed to completely expose the upper electrode TE, the spacer S can be used to protect the resistance conversion layer R so that the resistance conversion layer R will not be damaged during the etching process. In a preferred embodiment of the present invention, after etching the dielectric layer 18d to form a groove, the thickness of the dielectric layer 18d remaining at the bottom of the groove is still greater than the height of the spacer S to prevent the spacer S from being exposed from the dielectric layer 18d at the bottom of the groove. However, in other embodiments, the dielectric layer 18d can be etched to expose the portion of the spacer S.

[0059] The conductive wire ML of the present invention covers the upper top surface 16b and the side surface 16c of the third cylinder 16 formed by the upper electrode TE, so that the contact area between the upper electrode TE and the conductive wire ML is increased. In this way, the current amount during initialization (forming) of the resistance random access memory 100 will increase, and the resistance random access memory 100 can be initialized more quickly. In addition, conductive fibers (conductive filaments) can be formed between the circumference of the second cylinder 12 formed by the resistance conversion layer R of the present invention and the lower electrode BE, and between the first upper top surface 12b and the lower electrode BE. Therefore, the total amount of conductive fibers increases, so that the resistance value of the low resistance state of the resistance random access memory 100 is smaller than the resistance value of the low resistance state of the general resistance random access memory. In this way, the resistance difference between the high resistance state and the low resistance state of the resistance random access memory 100 of the present invention can be improved, and the durability and read-write endurance of the resistance random access memory 100 are increased.

[0060] The above descriptions are only preferred embodiments of the present invention. All equivalent changes and modifications made according to the claims of the present invention should fall within the scope of the present invention.

Claims

1. A resistive random access memory structure, comprising: A lower electrode, the lower electrode being a first cylinder; The resistance conversion layer comprises a second cylinder and a three-dimensional disk, wherein the first bottom surface of the second cylinder directly contacts the upper surface of the three-dimensional disk; An upper electrode, the upper electrode is a third cylinder, the third cylinder comprises an upper top surface, a second lower bottom surface and a side surface, wherein the first cylinder is buried in the second cylinder and the three-dimensional disk, the second cylinder is buried in the third cylinder and the second lower bottom surface of the third cylinder directly contacts the upper surface of the three-dimensional disk; A spacer wall surrounds and directly contacts the side wall of the three-dimensional disk; and The conductive wire covers the upper top surface and the side surface of the third cylinder. 2 . The RRAM structure as claimed in claim 1 , wherein a diameter of the upper surface of the three-dimensional disk is greater than a diameter of the first lower bottom surface. 3 . The RRAM structure as claimed in claim 1 , wherein the spacer completely covers the sidewall of the three-dimensional disk. 4 . The RRAM structure as claimed in claim 1 , wherein the spacer covers and contacts the side surface of the third cylinder.

5. The RRAM structure of claim 1, further comprising: a first dielectric layer; A conductive plug embedded in the first dielectric layer; a second dielectric layer covering the first dielectric layer and the conductive plug; as well as The third dielectric layer covers the second dielectric layer, wherein the lower electrode penetrates the second dielectric layer and directly contacts the conductive plug, the resistance conversion layer and the spacer are located on the second dielectric layer, and the third dielectric layer surrounds the spacer and directly contacts the conductive line.

6. The resistance random access memory structure of claim 1 , wherein the resistance switching layer comprises an oxygen atom storage layer and a current forming layer, the current forming layer is located on the oxygen atom storage layer, and the oxygen atom storage layer comprises tantalum oxide (TaO x ,x<2.5), the current forming layer contains tantalum pentoxide (Ta2O5). 7 . The RRAM structure of claim 1 , wherein the conductive line comprises copper, aluminum or tungsten. 8 . The resistance random access memory structure of claim 1 , wherein the bottom electrode comprises tantalum, titanium, titanium nitride or tantalum nitride. 9 . The resistance random access memory structure of claim 1 , wherein the top electrode comprises iridium, titanium nitride or tantalum nitride.

10. The RRAM structure of claim 1, wherein the spacer comprises silicon nitride.

11. A method for manufacturing a resistance random access memory structure, comprising: A lower electrode, a resistance conversion layer and an upper electrode are formed in sequence, wherein the lower electrode is a first cylinder, the resistance conversion layer includes a second cylinder and a three-dimensional disk, and the upper electrode is a third cylinder, and the third cylinder includes an upper top surface and a second lower bottom surface and a side surface; forming a spacer to surround the resistance switching layer; and A conductive line is formed to cover and directly contact the upper top surface and the side surface of the third cylinder.

12. The method for manufacturing a resistive random access memory structure as described in claim 11, wherein the first lower bottom surface of the second cylinder directly contacts the upper surface of the three-dimensional disk, the first cylinder is buried in the second cylinder and the three-dimensional disk, the second cylinder is buried in the third cylinder and the second lower bottom surface of the third cylinder directly contacts the upper surface of the three-dimensional disk.

13. The method for manufacturing a resistance random access memory structure as claimed in claim 11, wherein the method for manufacturing the lower electrode, the resistance conversion layer and the upper electrode comprises: forming a dummy material layer; etching the dummy material layer to form a hole; forming a lower electrode to fill the hole; removing the dummy material layer; forming a resistance conversion material layer and an upper electrode material layer in sequence to cover the lower electrode; as well as The upper electrode material layer and the resistance switching material layer are patterned to form the upper electrode and the resistance switching layer.

14. The method for manufacturing a resistance random access memory structure according to claim 13, further comprising: After forming the upper electrode, the resistance switching layer and the lower electrode, forming a spacer material layer to cover the upper electrode, the resistance switching layer and the lower electrode; and The spacer material layer is etched to form the spacer.

15. The method for manufacturing a resistance random access memory structure according to claim 14, further comprising: After forming the spacer, forming a dielectric layer to cover the upper electrode, the resistance conversion layer, the lower electrode and the spacer; etching the dielectric layer to expose the upper electrode; and The conductive line is formed to cover the upper electrode.

16. The method for manufacturing a resistance random access memory structure as claimed in claim 11, wherein the resistance conversion layer comprises an oxygen atom storage layer and a current forming layer, the current forming layer is located on the oxygen atom storage layer, and the oxygen atom storage layer comprises tantalum oxide (TaO x ,x<2.5), the current forming layer contains tantalum pentoxide (Ta2O5). 17 . The method for manufacturing a resistance random access memory structure as claimed in claim 11 , wherein the conductive line comprises copper, aluminum or tungsten. 18 . The method for manufacturing a resistance random access memory structure as claimed in claim 11 , wherein the bottom electrode comprises tantalum, titanium, titanium nitride or tantalum nitride.

19. The method for manufacturing a resistance random access memory structure as claimed in claim 11, wherein the top electrode comprises iridium, titanium nitride or tantalum nitride.

20. The method for manufacturing a resistance random access memory structure as claimed in claim 11, wherein the spacer comprises silicon nitride.

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