Voltage fluctuation compensation control method and system for chip

By arranging voltage sensors and agents on the chips of a multi-chip system, and using Kalman filtering and model prediction control technologies, accurate monitoring and intelligent compensation of chip supply voltage fluctuations is achieved, solving the problem of rapid and large voltage fluctuations in the existing technology, and improving the stability and energy efficiency of the system.

CN119248095BActive Publication Date: 2025-03-14BEIJING YANHUANG GUOXIN TECH CO LTD
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Patent Information

Application Number
CN202411765087.1
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-12-04
Publication Date
2025-03-14
Estimated Expiration
2044-12-04

AI Technical Summary

Technical Problem

The prior art is difficult to effectively deal with the rapid and large fluctuations in chip power supply voltage, which affects chip performance, reliability and life.

Method used

Voltage sensors and agents are arranged on each chip of the multi-chip system, data interaction is performed through a wireless communication network, voltage data is fused using Kalman filtering algorithm, voltage fluctuation distribution map is generated, sensor status and data reporting frequency are dynamically adjusted, and voltage compensation is achieved using model prediction control and distributed optimization algorithm.

Benefits of technology

It realizes accurate monitoring and intelligent compensation of voltage fluctuations in multi-chip systems, improves the stability and energy efficiency of the system, and ensures the performance and reliability of the chip.

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Abstract

The present invention provides a voltage fluctuation compensation control method and system for a chip, which relates to the technical field of voltage compensation, including arranging a voltage sensor and an intelligent agent on each chip of a multi-chip system to obtain distributed voltage fluctuation data of the multi-chip system; generating a voltage fluctuation distribution diagram representing the overall voltage distribution of the multi-chip system according to the distributed voltage fluctuation data, and obtaining chip-level voltage compensation control data by using a model predictive control algorithm; obtaining global optimal voltage control compensation data by using a distributed optimization algorithm based on a consensus mechanism, and adaptively optimizing the global optimal voltage compensation control data by using an online learning algorithm, controlling the power management circuit in each chip to adjust the power supply voltage of the chip according to the optimized global optimal voltage compensation control data, and minimizing the energy loss in the power supply voltage adjustment process through an intelligent power management strategy, so as to realize voltage fluctuation compensation of the multi-chip system.
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Description

Technical Field

[0001] The present invention relates to voltage compensation technology, and in particular to a voltage fluctuation compensation control method and system for a chip. Background Art

[0002] With the continuous development of integrated circuit technology, the integration of chips is getting higher and higher, the functions are becoming more and more complex, and the operating frequency is also increasing. These factors have led to a continuous increase in chip power consumption, and at the same time, the stability requirements for the power supply voltage are becoming higher and higher. However, in practical applications, the power supply voltage of the chip often fluctuates. These fluctuations may be caused by a variety of factors, such as load changes, power supply noise, temperature changes, etc. Voltage fluctuations will have an adverse effect on the performance, reliability and life of the chip, and in severe cases may even cause chip failure.

[0003] In the prior art, the amplitude of voltage fluctuation is generally reduced by adding passive components such as decoupling capacitors at the chip power supply end. This method is simple and easy to implement, but the effect is limited and it is difficult to cope with rapid and large voltage fluctuations. There are also methods based on historical data and load models to predict possible voltage fluctuations and compensate in advance. This method can improve the timeliness of compensation, but the prediction accuracy is affected by many factors and the actual effect may be unstable.

[0004] Therefore, there is an urgent need for a new voltage fluctuation compensation control method and system that can overcome the limitations of the existing technology and achieve more accurate, fast, efficient and intelligent voltage fluctuation compensation to meet the increasingly stringent power supply requirements of modern chips and multi-chip systems. Summary of the invention

[0005] The embodiments of the present invention provide a voltage fluctuation compensation control method and system for a chip, which can solve the problems in the prior art.

[0006] According to a first aspect of the embodiments of the present invention,

[0007] A voltage fluctuation compensation control method for a chip is provided, comprising:

[0008] A voltage sensor and an intelligent agent are arranged on each chip of the multi-chip system, the voltage sensor is used to collect local voltage data of the chip, and data is exchanged with voltage sensors on adjacent chips through a wireless communication network, and the local voltage data collected by each voltage sensor is fused using a multi-sensor information fusion algorithm based on Kalman filtering to obtain distributed voltage fluctuation data of the multi-chip system;

[0009] According to the distributed voltage fluctuation data, a voltage fluctuation distribution diagram representing the overall voltage distribution of the multi-chip system is generated; based on the obtained voltage fluctuation distribution diagram, an adaptive scheduling algorithm is used to dynamically adjust the working state and data reporting frequency of each voltage sensor; and at the same time, an intelligent agent set on each voltage sensor is used to obtain chip-level voltage compensation control data based on the voltage fluctuation distribution diagram and the current working state of each voltage sensor using a model predictive control algorithm;

[0010] A distributed optimization algorithm based on a consensus mechanism is used to iteratively integrate and update the voltage compensation control data obtained by each intelligent agent until the preset number of iterations is met to obtain the global optimal voltage control compensation data. The global optimal voltage compensation control data is adaptively optimized using an online learning algorithm. According to the optimized global optimal voltage compensation control data, the power management circuit in each chip is controlled to adjust the supply voltage of the chip, and the energy loss in the supply voltage adjustment process is minimized through an intelligent power management strategy to achieve voltage fluctuation compensation for the multi-chip system.

[0011] In an optional embodiment,

[0012] Based on the voltage fluctuation distribution diagram and the current working state of each voltage sensor, the chip-level voltage compensation control data is obtained by using the model predictive control algorithm, including:

[0013] Constructing a partial differential equation describing the voltage response behavior of the chip, wherein the partial differential equation includes a Poisson equation and a heat equation, wherein the source term of the Poisson equation is the instantaneous current distribution of each unit in the chip; and the source term of the heat equation is the Joule heat of each unit in the chip;

[0014] Based on the constructed partial differential equation, a fully connected neural network is designed, wherein the fully connected neural network takes the spatiotemporal coordinates of the nodes in the chip and the instantaneous current distribution of each unit in the chip as input, and takes the voltage distribution and temperature distribution of the nodes in the chip as output;

[0015] Constructing a joint loss function of a fully connected neural network, the joint loss function includes a data fitting loss and a physical constraint loss, and training the fully connected neural network by minimizing the joint loss function through an adaptive gradient optimization algorithm to obtain a final chip voltage response prediction model;

[0016] Given the spatiotemporal coordinates and current excitation of any node in the chip, they are input into the chip voltage response prediction model to predict the instantaneous voltage value and instantaneous temperature value at the current node. Combined with the voltage fluctuation distribution diagram and the current working status of each voltage sensor, the power consumption of each module in the chip is analyzed, and the operating frequency and voltage of each module are dynamically adjusted according to the analysis results to obtain chip-level voltage compensation control data.

[0017] In an optional embodiment,

[0018] Constructing a joint loss function of a fully connected neural network, the joint loss function includes data fitting loss and physical constraint loss including:

[0019] The calculation formula of the joint loss function is as follows:

[0020] ;

[0021] Among them, L(θ) represents the joint loss function, θ represents the fully connected neural network parameters, and L data (θ) represents the data fitting loss, λ represents the weight coefficient of the physical constraint loss, and L phys (θ) represents the physical constraint loss;

[0022] The calculation formula of the data fitting loss is as follows:

[0023] ;

[0024] Where N represents the number of samples, represents the predicted voltage value, φ i Indicates the actual voltage value, Represents the predicted temperature value, T i Indicates the actual temperature value;

[0025] The calculation formula of the physical constraint loss is as follows:

[0026] ;

[0027] Where Ω represents the solution domain of the chip, ▽ represents the gradient operator, σ represents thermal conductivity, ∂ represents partial derivative, ρ represents charge density, t represents time, K represents the number of units, and I k (t) represents the instantaneous current of the kth unit at time t, δ(·) represents the three-dimensional Dirac function, x represents the x-axis coordinate in the chip, y represents the y-axis coordinate in the chip, z represents the z-axis coordinate in the chip, and x k represents the x-axis coordinate of the kth unit, y k represents the y-axis coordinate of the kth unit, z k represents the z-axis coordinate of the kth unit, c p represents specific heat capacity, and η represents thermal diffusivity.

[0028] In an optional embodiment,

[0029] Using a distributed optimization algorithm based on a consensus mechanism, the voltage compensation control data obtained by each intelligent agent is iteratively integrated and updated until the preset number of iterations is met, and the global optimal voltage control compensation data is obtained, including:

[0030] Constructing a communication topology graph model of a multi-chip system, wherein the communication topology graph model includes a node feature matrix and an edge feature matrix, wherein the elements in the node feature matrix represent voltage state information of corresponding nodes, and the elements in the edge feature matrix represent communication link information between corresponding nodes;

[0031] Each node collects its own voltage measurement value at the current moment, and obtains the voltage measurement value of the neighboring node at the current moment and the communication link information between the neighboring node and the neighboring node by communicating with the neighboring node;

[0032] For each node, the voltage measurement value of the node itself, the voltage measurement value of the neighboring node, and the communication link information at the current moment are input into the communication topology graph model, and after forward propagation calculation of at least two layers of graph convolution layers and attention layers, the voltage compensation control amount of the current node is output;

[0033] The obtained voltage compensation control amount is used as the feedback value, and superimposed with the current voltage measurement value of the node itself to obtain the updated node voltage state, and the updated node voltage state is broadcast to neighboring nodes through the neighbor communication mechanism;

[0034] Each node updates the voltage state of its own neighboring nodes according to the voltage state of the neighboring nodes received, and repeats the iteration until the preset number of iterations is met to obtain the global optimal voltage control compensation data.

[0035] In an optional embodiment,

[0036] The communication topology model for building a multi-chip system includes:

[0037] A graph encoder based on a graph neural network is used to extract the feature representation of the communication topology graph of the multi-chip system at the current moment. The graph encoder aggregates node features and neighborhood information through a self-attention mechanism, and introduces residual connections and layer normalization operations to enhance the node feature representation capability, thereby obtaining an enhanced feature representation of the graph at the current moment.

[0038] The enhanced current moment graph feature representation and historical trajectory information are input into the trajectory update module based on the attention mechanism for fusion. The trajectory update module adaptively aggregates the graph state feature representations of different historical moments through the position-aware attention mechanism, and updates the hidden state to obtain the fused current moment hidden state;

[0039] The fused hidden state at the current moment is decoded using a preset autoregressive model based on the Transformer architecture. The autoregressive model models the dependency relationship between nodes through a multi-head self-attention mechanism and position encoding, and uses an edge prediction attention layer to aggregate the representation of node pairs, predicts the connection probability between nodes at the next moment, and obtains the predicted communication topology graph at the next moment.

[0040] The communication topology graph at the next moment is used as the updated communication topology graph of the multi-chip system at the current moment. The graph encoder is used to extract its graph feature representation, and the extracted graph feature representation is added to the historical trajectory information as the latest historical graph state feature representation. The iteration is repeated until the preset number of iterations is met to obtain the final communication topology graph of the multi-chip system.

[0041] In an optional embodiment,

[0042] According to the optimized global optimal voltage compensation control data, the power management circuit in each chip is controlled to adjust the chip's supply voltage, and the energy loss in the supply voltage adjustment process is minimized through intelligent power management strategy to achieve voltage fluctuation compensation for multi-chip systems, including:

[0043] Multiple power routing units are set up in the chip. Each power routing unit includes a power switch matrix and a controller. The switch connection state of the power switch matrix is ​​dynamically configured by the controller to build an energy transmission path inside the chip. Adjacent power routing units are directly connected. By controlling the connection state of adjacent power routing units, a power routing network covering the entire chip is built.

[0044] The chip is divided into multiple areas, each area is equipped with a local energy routing center, and the power routing units in the area are connected to the corresponding local energy routing center to aggregate energy step by step; based on the tree-like topology, a ring connection is introduced between the energy routing centers of adjacent chips, and finally a hierarchical energy routing topology structure of the multi-chip system is obtained;

[0045] Based on the hierarchical energy routing topology of the multi-chip system, an adaptive energy routing algorithm is used to obtain the energy supply and demand status data of each chip, and a system state space is constructed based on the obtained energy supply and demand status data. The possible routing actions of each power routing unit are defined as a routing action space, and energy loss is used as an instant reward function. Based on the system state space, routing action space and instant reward function, the optimal routing action sequence under each system state is solved to form a dynamically adjusted intelligent power management strategy.

[0046] A cross-chip voltage balancing mechanism is introduced. A voltage sensor is integrated on each chip to collect real-time voltage data of each chip. The collected voltage data is shared with other chips through the power routing network. Based on the shared voltage data, the voltage difference between the chips is calculated, and a unified voltage balancing threshold is set. The voltage offset of the voltage data of each chip node relative to the voltage balancing threshold is calculated; the chip with the largest voltage offset is selected as the source chip, and the chip with the smallest voltage offset is selected as the sink chip;

[0047] According to the obtained intelligent power management strategy, the energy distribution path from the source chip to the sink chip is planned, and the directional energy transmission from the source chip to the sink chip is realized through the power switch matrix in the corresponding power routing unit on the source chip and the sink chip, so as to complete the voltage fluctuation compensation in the local area;

[0048] Continuously monitor the voltage level changes of each chip to determine whether the voltage level of each chip has reached the voltage balancing threshold range; if not, repeat the voltage fluctuation compensation steps in the local area until the voltage levels of all chips reach the voltage balancing threshold range, thus completing the voltage fluctuation compensation of the multi-chip system.

[0049] In an optional embodiment,

[0050] Based on the system state space, routing action space and immediate reward function, the optimal routing action sequence under each system state is solved to form a dynamically adjusted intelligent power management strategy including:

[0051] The eligibility trace and characteristic function are introduced, and the energy routing strategy is updated through the Q-Learning algorithm to solve the optimal routing action sequence under each system state. The calculation formula is as follows:

[0052] ;

[0053] Where Q*(·) represents the updated energy routing strategy, Q(s t , a t ) means in state s t The reward value of taking action at, α represents the learning rate, r t represents the immediate reward at time t, γ represents the discount factor, represents the energy routing strategy corresponding to the optimal action taken at the next state after time t, β represents the eligibility trace decay rate, G represents the number of characteristic functions, ε g (·) represents the characteristic function, D g represents the eligibility trace corresponding to the g-th characteristic function;

[0054] Among them, energy transmission loss is used as the immediate reward function, and the calculation formula is as follows:

[0055] ;

[0056] Where r(S, D) represents the energy loss from the source chip S to the sink chip D as an immediate reward, H represents the number of power routing units, and R h represents the resistance of the hth power routing unit, I h represents the current of the hth power routing unit, t h represents the transmission time of the hth power routing unit, μ h represents the energy transfer efficiency of the hth power routing unit, J h represents the current density of the hth power routing unit, J0 represents the reference value of the current density, m represents the number of power switches, V j represents the voltage of the jth power switch, I j represents the current of the jth power switch, t j represents the transmission time of the jth power switch, μ j represents the energy transfer efficiency of the jth power switch, e represents the base, J j represents the current density of the jth power switch.

[0057] According to a second aspect of the embodiments of the present invention,

[0058] A voltage fluctuation compensation control system for a chip is provided, comprising:

[0059] The first unit is used to arrange voltage sensors and intelligent agents on each chip of the multi-chip system, use the voltage sensors to collect local voltage data of the chip, and exchange data with voltage sensors on adjacent chips through a wireless communication network, and use a multi-sensor information fusion algorithm based on Kalman filtering to fuse the local voltage data collected by each voltage sensor to obtain distributed voltage fluctuation data of the multi-chip system;

[0060] The second unit is used to generate a voltage fluctuation distribution map representing the overall voltage distribution of the multi-chip system according to the distributed voltage fluctuation data, and dynamically adjust the working state and data reporting frequency of each voltage sensor by using an adaptive scheduling algorithm based on the obtained voltage fluctuation distribution map, and at the same time, use an intelligent agent set on each voltage sensor to obtain chip-level voltage compensation control data by using a model predictive control algorithm based on the voltage fluctuation distribution map and the current working state of each voltage sensor;

[0061] The third unit is used to utilize a distributed optimization algorithm based on a consensus mechanism to iteratively fuse and update the voltage compensation control data obtained by each intelligent agent until a preset number of iterations is met, thereby obtaining the global optimal voltage control compensation data, and to utilize an online learning algorithm to adaptively optimize the global optimal voltage compensation control data. According to the optimized global optimal voltage compensation control data, the power management circuit in each chip is controlled to adjust the power supply voltage of the chip, and the energy loss in the power supply voltage adjustment process is minimized through an intelligent power management strategy, so as to realize voltage fluctuation compensation for the multi-chip system.

[0062] According to a third aspect of the embodiments of the present invention,

[0063] An electronic device is provided, comprising:

[0064] processor;

[0065] a memory for storing processor-executable instructions;

[0066] The processor is configured to call the instructions stored in the memory to execute the aforementioned method.

[0067] A fourth aspect of the embodiments of the present invention is:

[0068] A computer-readable storage medium is provided, on which computer program instructions are stored. When the computer program instructions are executed by a processor, the aforementioned method is implemented.

[0069] In this embodiment, by arranging voltage sensors on each chip and using a multi-sensor information fusion algorithm, the distributed voltage fluctuation data of the entire multi-chip system can be obtained in real time and accurately. Based on the voltage fluctuation distribution map, the system can dynamically adjust the working state and data reporting frequency of each voltage sensor. This adaptive mechanism can optimize system resource utilization while ensuring monitoring accuracy. The intelligent agent on each chip can calculate the chip-level voltage compensation control data based on local information and global voltage distribution. This distributed method enables the system to respond quickly to local voltage fluctuations. Through a distributed optimization algorithm based on a consensus mechanism, the system can fuse the local decisions of each intelligent agent into a globally optimal voltage compensation control strategy, ensuring that the voltage stability of the entire multi-chip system is fully optimized. The global optimal voltage compensation control data is adaptively optimized using an online learning algorithm, so that the system can continuously learn and improve its control strategy to adapt to different operating conditions and load changes. Through an intelligent power management strategy, energy loss is minimized during voltage regulation, thereby improving the energy efficiency of the entire system. Through precise voltage monitoring and intelligent compensation, the impact of voltage fluctuations on system performance and reliability can be effectively reduced, the stability of the entire multi-chip system can be improved, and precise monitoring, intelligent compensation and optimized control of the multi-chip system voltage can be achieved, greatly improving the system's performance, stability and energy efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0070] Figure 1 It is a flow chart of a voltage fluctuation compensation control method for a chip according to an embodiment of the present invention;

[0071] Figure 2 The figure is a schematic diagram of the structure of a voltage fluctuation compensation control system for a chip according to an embodiment of the present invention. DETAILED DESCRIPTION

[0072] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0073] The technical solution of the present invention is described in detail with specific embodiments below. The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described in detail in some embodiments.

[0074] Figure 1 FIG. 1 is a flow chart of a voltage fluctuation compensation control method for a chip according to an embodiment of the present invention. Figure 1As shown, the method includes:

[0075] S101. Arrange voltage sensors and intelligent agents on each chip of the multi-chip system, use the voltage sensors to collect local voltage data of the chip, and exchange data with voltage sensors on adjacent chips through a wireless communication network, and use a multi-sensor information fusion algorithm based on Kalman filtering to fuse the local voltage data collected by each voltage sensor to obtain distributed voltage fluctuation data of the multi-chip system.

[0076] Exemplarily, first, a voltage sensor and an intelligent agent are arranged on each chip of a multi-chip system. A voltage sensor is a device that can convert a voltage signal into a measurable electrical signal. Through a sampling circuit and an analog-to-digital converter, local voltage data of the chip can be collected in real time. An intelligent agent is an embedded software module with data processing, communication and decision-making functions. It can work with a voltage sensor to achieve distributed data fusion and control.

[0077] In order to realize voltage fluctuation monitoring of multi-chip systems, voltage sensors exchange data with voltage sensors on adjacent chips through wireless communication networks. The wireless communication network uses short-range, low-power communication protocols such as ZigBee and Bluetooth Low Energy, and builds a sensor network covering the entire multi-chip system through multi-hop routing and dynamic networking. Each voltage sensor periodically collects local voltage data of the chip where it is located and sends the data to adjacent voltage sensors. At the same time, the voltage sensor also receives voltage data from adjacent sensors, and fuses local data with neighbor data through a multi-sensor information fusion algorithm to obtain more accurate and comprehensive voltage fluctuation information.

[0078] In the multi-sensor information fusion algorithm, a method based on Kalman filtering is used. Kalman filtering is a recursive and optimal state estimation algorithm. It predicts and updates the system state by establishing the system state equation and observation equation, using prior knowledge and real-time observation data. In the scenario of voltage fluctuation monitoring, the system state refers to the voltage distribution of the multi-chip system, and the observation data refers to the local voltage data collected by each voltage sensor. Through the Kalman filtering algorithm, the voltage data from different sensors can be effectively fused, the influence of measurement noise can be suppressed, and the accuracy of voltage fluctuation estimation can be improved.

[0079] Specifically, the Kalman filter algorithm includes two main steps: prediction and update. In the prediction step, the state prior estimate at the current moment is predicted based on the state estimate and the state transfer matrix at the previous moment. The state transfer matrix describes the changing relationship between the system state at adjacent moments, and can be modeled according to the voltage dynamic characteristics of the multi-chip system. In the update step, the Kalman gain is calculated based on the observation data and the observation matrix at the current moment, and the state prior estimate is corrected using the Kalman gain to obtain the state posterior estimate. The observation matrix describes the relationship between the observation data and the system state, and can be constructed based on the measurement principle and layout of the voltage sensor. By continuously iterating the prediction and update steps, the Kalman filter algorithm can track the voltage fluctuations of the multi-chip system in real time and provide the optimal state estimation results.

[0080] In order to fully utilize the advantages of the distributed voltage sensor network, the Kalman filter algorithm needs to be implemented in a distributed manner on each agent. Each agent maintains a local Kalman filter, which is used to make predictions and updates based on the data of the local voltage sensor and the estimated state of the neighboring agents. Through data exchange and fusion between agents, multi-sensor information fusion can be achieved under a distributed architecture, avoiding the communication overhead and single point failure problems of centralized processing. At the same time, the distributed Kalman filter algorithm is also scalable and robust, and can adapt to changes in the scale of multi-chip systems and the dynamic joining and exit of nodes.

[0081] In this embodiment, by arranging voltage sensors and intelligent agents on each chip and adopting a multi-sensor information fusion algorithm based on Kalman filtering, distributed voltage fluctuation monitoring of a multi-chip system can be achieved. The voltage sensors exchange data through a wireless communication network, and the intelligent agents perform data fusion through a distributed Kalman filtering algorithm, and finally obtain voltage fluctuation data reflecting the voltage distribution of the entire multi-chip system. This method overcomes the limitations of traditional centralized monitoring, improves the reliability, real-time performance and accuracy of the system, and provides important data support for subsequent voltage fluctuation compensation and optimization control.

[0082] S102. A voltage fluctuation distribution graph characterizing the overall voltage distribution of the multi-chip system is generated according to the distributed voltage fluctuation data. Based on the obtained voltage fluctuation distribution graph, an adaptive scheduling algorithm is used to dynamically adjust the working status and data reporting frequency of each voltage sensor. At the same time, an intelligent agent set on each voltage sensor is used to obtain chip-level voltage compensation control data based on the voltage fluctuation distribution graph and the current working status of each voltage sensor using a model predictive control algorithm.

[0083] Among them, the voltage fluctuation distribution map is an intuitive visual representation. By performing spatial interpolation and color mapping on the voltage data, the voltage fluctuations in different areas of the multi-chip system can be clearly displayed.

[0084] In an optional embodiment,

[0085] Based on the voltage fluctuation distribution diagram and the current working state of each voltage sensor, the chip-level voltage compensation control data is obtained by using the model predictive control algorithm, including:

[0086] Constructing a partial differential equation describing the voltage response behavior of the chip, wherein the partial differential equation includes a Poisson equation and a heat equation, wherein the source term of the Poisson equation is the instantaneous current distribution of each unit in the chip; and the source term of the heat equation is the Joule heat of each unit in the chip;

[0087] Based on the constructed partial differential equation, a fully connected neural network is designed, wherein the fully connected neural network takes the spatiotemporal coordinates of the nodes in the chip and the instantaneous current distribution of each unit in the chip as input, and takes the voltage distribution and temperature distribution of the nodes in the chip as output;

[0088] Constructing a joint loss function of a fully connected neural network, the joint loss function includes a data fitting loss and a physical constraint loss, and training the fully connected neural network by minimizing the joint loss function through an adaptive gradient optimization algorithm to obtain a final chip voltage response prediction model;

[0089] Given the spatiotemporal coordinates and current excitation of any node in the chip, they are input into the chip voltage response prediction model to predict the instantaneous voltage value and instantaneous temperature value at the current node. Combined with the voltage fluctuation distribution diagram and the current working status of each voltage sensor, the power consumption of each module in the chip is analyzed, and the operating frequency and voltage of each module are dynamically adjusted according to the analysis results to obtain chip-level voltage compensation control data.

[0090] For example, first, in order to accurately describe the voltage response behavior inside the chip, a corresponding mathematical model needs to be constructed. The voltage distribution in the chip is mainly affected by two factors: one is the instantaneous current distribution of each functional unit in the chip, and the other is the temperature distribution inside the chip. The instantaneous current distribution reflects the power consumption of different areas in the chip and is the main driving force for voltage fluctuations; the temperature distribution affects the resistance characteristics of the wires and devices in the chip, thereby affecting the propagation and attenuation of the voltage. Therefore, partial differential equations can be used to characterize the physical mechanism of the chip voltage response, including the Poisson equation and the heat equation. The Poisson equation describes the relationship between the voltage distribution and the charge distribution, and its source term is the instantaneous current distribution of each unit in the chip; the heat equation describes the relationship between the temperature distribution and the heat source distribution, and its source term is the Joule heat of each unit in the chip. By solving these two partial differential equations, the voltage distribution and temperature distribution inside the chip can be obtained.

[0091] The solution adopts a deep learning-based method and designs a fully connected neural network to approximate the solution of the partial differential equation. The fully connected neural network is a feedforward artificial neural network composed of multiple fully connected layers. Each neuron is connected to all neurons in the previous layer, and the input signal is transformed and transmitted through a nonlinear activation function. Among them, the fully connected neural network takes the spatiotemporal coordinates of the nodes in the chip and the instantaneous current distribution of each unit in the chip as input, and the voltage distribution and temperature distribution of the nodes in the chip as output. By adjusting the weights and bias parameters of the neural network, its output can be close to the true solution of the partial differential equation. In order to train the fully connected neural network, it is necessary to construct a joint loss function, including data fitting loss and physical constraint loss. The data fitting loss measures the difference between the predicted output of the neural network and the true voltage / temperature distribution, and adopts commonly used regression or classification loss functions such as mean square error or cross entropy. The physical constraint loss describes whether the output of the neural network satisfies the physical constraints of the partial differential equation, such as the divergence theorem of the Poisson equation and the energy conservation of the heat equation.

[0092] After defining the joint loss function, the adaptive gradient optimization algorithm is used to train the neural network. The adaptive gradient optimization algorithm is an efficient gradient descent method that can adaptively adjust the learning rate of each parameter to accelerate convergence and avoid local optimality. By minimizing the joint loss function, the predicted output of the neural network is made as close as possible to the actual voltage / temperature distribution while satisfying physical constraints, and finally an accurate and robust chip voltage response prediction model is obtained.

[0093] With a trained chip voltage response prediction model, chip-level voltage compensation control data can be generated based on the voltage fluctuation distribution map and the working status of the voltage sensor. Specifically, given the spatiotemporal coordinates and current excitation of any node in the chip, input them into the prediction model to predict the instantaneous voltage value and instantaneous temperature value at the node. By making predictions in different areas and at different times of the chip, the voltage and temperature distribution of the entire chip can be obtained. Combined with the measured data provided by the voltage fluctuation distribution map and the working status of the voltage sensor, the power consumption of each functional module in the chip can be analyzed to identify high-risk areas of voltage fluctuation and temperature anomalies.

[0094] According to the results of power consumption analysis, dynamic voltage and frequency adjustment technology is used to finely control each module in the chip. For modules with high power consumption and large voltage fluctuations, their operating frequency and voltage can be appropriately reduced to reduce power consumption and heat generation; for modules with low power consumption and small voltage fluctuations, their operating frequency and voltage can be appropriately increased to improve performance and efficiency. By dynamically adjusting the working status of each module, local voltage fluctuations can be suppressed while ensuring the overall performance of the chip, thereby extending the service life of the chip. According to the output of the voltage response prediction model and the strategy of dynamic voltage and frequency adjustment, the corresponding voltage compensation control data is generated as the basis for chip power management.

[0095] In an optional embodiment,

[0096] Constructing a joint loss function of a fully connected neural network, the joint loss function includes data fitting loss and physical constraint loss including:

[0097] The calculation formula of the joint loss function is as follows:

[0098] ;

[0099] Among them, L(θ) represents the joint loss function, θ represents the fully connected neural network parameters, and L data (θ) represents the data fitting loss, λ represents the weight coefficient of the physical constraint loss, and L phys (θ) represents the physical constraint loss;

[0100] The calculation formula of the data fitting loss is as follows:

[0101] ;

[0102] Where N represents the number of samples, represents the predicted voltage value, φ i Indicates the actual voltage value, Represents the predicted temperature value, T i Indicates the actual temperature value;

[0103] The calculation formula of the physical constraint loss is as follows:

[0104] ;

[0105] Where Ω represents the solution domain of the chip, ▽ represents the gradient operator, σ represents thermal conductivity, ∂ represents partial derivative, ρ represents charge density, t represents time, K represents the number of units, and I k (t) represents the instantaneous current of the kth unit at time t, δ(·) represents the three-dimensional Dirac function, x represents the x-axis coordinate in the chip, y represents the y-axis coordinate in the chip, z represents the z-axis coordinate in the chip, and x k represents the x-axis coordinate of the kth unit, y k represents the y-axis coordinate of the kth unit, z k represents the z-axis coordinate of the kth unit, c p represents specific heat capacity, and η represents thermal diffusivity.

[0106] In this embodiment, a chip-level voltage compensation control method based on model predictive control and deep learning is used to describe the chip voltage response behavior by constructing a partial differential equation, designing a fully connected neural network to approximate the solution of the equation, and introducing a joint loss function for physical constraints to train a high-precision and robust voltage response prediction model. Using this prediction model, combined with the voltage fluctuation distribution diagram and the working state of the voltage sensor, the power consumption of the chip is analyzed, and the operating frequency and voltage of each module are dynamically adjusted to generate the optimal voltage compensation control data. This method overcomes the limitations of traditional chip voltage control, realizes refined and real-time voltage compensation, and effectively improves the reliability and energy efficiency of the chip.

[0107] S103. Using a distributed optimization algorithm based on a consensus mechanism, the voltage compensation control data obtained by each intelligent agent is iteratively integrated and updated until the preset number of iterations is met to obtain the global optimal voltage control compensation data, and the global optimal voltage compensation control data is adaptively optimized using an online learning algorithm. According to the optimized global optimal voltage compensation control data, the power management circuit in each chip is controlled to adjust the power supply voltage of the chip, and the energy loss in the power supply voltage adjustment process is minimized through an intelligent power management strategy to achieve voltage fluctuation compensation for the multi-chip system.

[0108] Among them, the consensus mechanism is a distributed decision-making protocol. Through information exchange and iterative calculations between agents, the control decisions of each agent gradually converge to a consensus, and finally reach the global optimum. In each iteration, the agent updates its own control data by weighted average based on its own control data and the control data of its neighboring agents, and broadcasts the updated data to its neighboring agents. After multiple rounds of iterations, the control data of each agent gradually converges to the global optimal value.

[0109] In order to further improve the adaptability and robustness of voltage compensation control, an online learning algorithm is introduced to adaptively optimize the global optimal voltage compensation control data. The online learning algorithm is a method for updating model parameters in real time. By continuously receiving new data samples, the model is incrementally trained and adjusted, so that the model can adapt to the changes in the voltage fluctuation characteristics of the multi-chip system. Specifically, by collecting the voltage fluctuation data of the multi-chip system under different working conditions, a sample set of voltage compensation control is constructed. In each control cycle, according to the current voltage fluctuation distribution map and historical sample data, the global optimal voltage compensation control data is optimized using the online learning algorithm to obtain a more accurate and stable control strategy. Finally, according to the optimized global optimal voltage compensation control data, the power management circuit in each chip is controlled to adjust the supply voltage of the chip. The power management circuit is a functional module inside the chip, which is responsible for monitoring, adjusting and stabilizing the supply voltage of the chip. Through the intelligent power management strategy, the energy loss in the supply voltage adjustment process can be minimized and the energy efficiency of the voltage compensation control can be improved. The intelligent power management strategy dynamically adjusts the working mode and parameters of the power management circuit to reduce the dynamic power consumption and static power consumption of the power management circuit while meeting the voltage compensation requirements, thereby extending the service life of the chip.

[0110] In an optional embodiment,

[0111] Using a distributed optimization algorithm based on a consensus mechanism, the voltage compensation control data obtained by each intelligent agent is iteratively integrated and updated until the preset number of iterations is met, and the global optimal voltage control compensation data is obtained, including:

[0112] Constructing a communication topology graph model of a multi-chip system, wherein the communication topology graph model includes a node feature matrix and an edge feature matrix, wherein the elements in the node feature matrix represent voltage state information of corresponding nodes, and the elements in the edge feature matrix represent communication link information between corresponding nodes;

[0113] Each node collects its own voltage measurement value at the current moment, and obtains the voltage measurement value of the neighboring node at the current moment and the communication link information between the neighboring node and the neighboring node by communicating with the neighboring node;

[0114] For each node, the voltage measurement value of the node itself, the voltage measurement value of the neighboring node, and the communication link information at the current moment are input into the communication topology graph model, and after forward propagation calculation of at least two layers of graph convolution layers and attention layers, the voltage compensation control amount of the current node is output;

[0115] The obtained voltage compensation control amount is used as the feedback value, and superimposed with the current voltage measurement value of the node itself to obtain the updated node voltage state, and the updated node voltage state is broadcast to neighboring nodes through the neighbor communication mechanism;

[0116] Each node updates the voltage state of its own neighboring nodes according to the voltage state of the neighboring nodes received, and repeats the iteration until the preset number of iterations is met to obtain the global optimal voltage control compensation data.

[0117] Exemplarily, first, in order to characterize the communication and collaboration relationship between agents in a multi-chip system, a communication topology graph model is constructed. The communication topology graph is a graph structure in which nodes represent agents and edges represent communication links between agents. The communication topology graph is represented by two matrices: a node feature matrix and an edge feature matrix. Each element in the node feature matrix represents the voltage state information of the corresponding agent node, including the current voltage measurement value, voltage compensation control amount, etc.; each element in the edge feature matrix represents the communication link information between the corresponding agent nodes, including link quality, delay, etc. Through these two matrices, the communication topology structure and node status of the multi-chip system can be fully described.

[0118] In the distributed optimization process, each agent node first collects its own voltage measurement value at the current moment as the initial node feature. Then, by communicating with neighboring nodes, the agent obtains the voltage measurement value of the neighboring node at the current moment, as well as the communication link information between the neighboring nodes, which is used to update the edge feature matrix. This step is implemented through distributed communication protocols, such as broadcasting and point-to-point communication, to ensure that each node can obtain the status information of neighboring nodes in a timely and accurate manner.

[0119] After obtaining the node features and edge features of the communication topology graph, each intelligent node inputs this information into a model based on a graph neural network to calculate the voltage compensation control amount of the current node. Graph neural network is a deep learning model that specializes in processing graph structure data. Through convolution and attention mechanisms, it can effectively extract and fuse the feature information of nodes in the graph. The graph neural network includes at least two layers of graph convolution layer and attention layer. The graph convolution layer locally aggregates and transforms the node features, and fuses the features of each node with the features of its neighboring nodes; the attention layer adaptively adjusts the weights of different neighbor node features according to the edge feature matrix to highlight important neighbor information. Through the superposition of multiple layers of graph convolution and attention, the graph neural network can extract rich contextual information and generate the voltage compensation control amount for the current node.

[0120] After the voltage compensation control amount is obtained by forward propagation calculation, the intelligent node uses it as a feedback value and superimposes it with its own voltage measurement value at the current moment to obtain the updated node voltage state. In order to make the voltage state of all nodes consistent, the intelligent node needs to broadcast the updated voltage state to neighboring nodes. Through the neighbor communication mechanism, each node sends its latest voltage state to the adjacent nodes, so that the node state information of the entire system can be updated synchronously.

[0121] When an intelligent node receives the voltage status broadcast by a neighboring node, it will use this information to update the voltage status of the neighboring node stored in itself. This is equivalent to updating the node feature matrix of the communication topology graph so that each node maintains a copy of the latest global status information. The updated voltage status of the neighboring node will be used as the input of the graph neural network in the next iteration to calculate the new voltage compensation control amount.

[0122] The entire distributed optimization process is carried out in an iterative manner, repeatedly executing steps such as voltage acquisition, graph neural network calculation, state update, and neighbor communication until the preset number of iterations or convergence conditions are met. During the iteration process, each intelligent node continuously adjusts its control decision based on local information and neighbor information, and through communication interaction, the global voltage compensation control quantity is continuously optimized and finally converges to a consistent and optimal value. This distributed optimization algorithm based on the consensus mechanism makes full use of the distributed characteristics of the multi-chip system and realizes global optimal control through local calculation and communication collaboration.

[0123] In this embodiment, a distributed optimization algorithm based on a consensus mechanism models and learns the communication topology through a graph neural network, thereby realizing distributed decision-making and optimization of voltage compensation control in a multi-chip system. The algorithm makes full use of the computing and communication capabilities of chip-level intelligent agents, and through iterative updates and interactions, the control data of each node converges to the global optimal value, thus realizing efficient, scalable, and robust voltage compensation control. This provides new ideas and methods for energy efficiency optimization and reliability improvement of multi-chip systems.

[0124] In an optional embodiment,

[0125] The communication topology model for building a multi-chip system includes:

[0126] A graph encoder based on a graph neural network is used to extract the feature representation of the communication topology graph of the multi-chip system at the current moment. The graph encoder aggregates node features and neighborhood information through a self-attention mechanism, and introduces residual connections and layer normalization operations to enhance the node feature representation capability, thereby obtaining an enhanced feature representation of the graph at the current moment.

[0127] The enhanced current moment graph feature representation and historical trajectory information are input into the trajectory update module based on the attention mechanism for fusion. The trajectory update module adaptively aggregates the graph state feature representations of different historical moments through the position-aware attention mechanism, and updates the hidden state to obtain the fused current moment hidden state;

[0128] The fused hidden state at the current moment is decoded using a preset autoregressive model based on the Transformer architecture. The autoregressive model models the dependency relationship between nodes through a multi-head self-attention mechanism and position encoding, and uses an edge prediction attention layer to aggregate the representation of node pairs, predicts the connection probability between nodes at the next moment, and obtains the predicted communication topology graph at the next moment.

[0129] The communication topology graph at the next moment is used as the updated communication topology graph of the multi-chip system at the current moment. The graph encoder is used to extract its graph feature representation, and the extracted graph feature representation is added to the historical trajectory information as the latest historical graph state feature representation. The iteration is repeated until the preset number of iterations is met to obtain the final communication topology graph of the multi-chip system.

[0130] Exemplarily, first, a graph encoder is used to extract the feature representation of the communication topology graph at the current moment. The graph encoder is a deep learning model based on a graph neural network, which is used to map graph structure data to a low-dimensional feature space. The graph encoder adopts a self-attention mechanism to aggregate node features and neighborhood information by calculating the attention weights between nodes. The self-attention mechanism can adaptively capture the dependencies between nodes, highlight important neighbor nodes, and generate more information-rich node feature representations. At the same time, in order to further enhance the representation ability of node features, the graph encoder introduces residual connections and layer normalization operations. The residual connection superimposes the input features with the output features, retains the original information, and alleviates the gradient vanishing problem of the deep network; layer normalization normalizes the activation values ​​of each layer, accelerates network convergence, and improves the generalization ability of the model. Through the calculation of the graph encoder, the enhanced feature representation of the graph at the current moment is obtained, which depicts the structure and attribute information of the current communication topology graph.

[0131] After obtaining the graph feature representation at the current moment, it needs to be fused with the historical trajectory information to capture the temporal evolution of the communication topology graph. The historical trajectory information contains the graph state feature representations at several moments in the past, reflecting the dynamic change process of the communication topology graph. In order to effectively fuse the graph features at the current moment and the historical trajectory information, a trajectory update module based on the attention mechanism is adopted. This module uses the position-aware attention mechanism to adaptively adjust their attention weights according to the relative positions of different historical moments and the current moment. The position-aware attention mechanism can distinguish dependencies at different time scales and highlight historical information with higher relevance to the current moment. Through attention aggregation, the trajectory update module weightedly fuses the historical graph state features with the current graph features, and updates the hidden state to obtain the fused hidden state at the current moment.

[0132] After obtaining the fused hidden state at the current moment, it is necessary to predict and generate the communication topology graph at the next moment to realize the dynamic update of the communication topology graph. An autoregressive model based on the Transformer architecture is used for graph prediction. Transformer is a sequence modeling architecture based on the self-attention mechanism, which has the advantages of parallel computing and long-range dependency capture. In the graph prediction task, Transformer models the dependency relationship between nodes through a multi-head self-attention mechanism and position encoding. The multi-head self-attention mechanism allows the model to calculate the attention weights between nodes from different subspace perspectives and capture diverse interaction patterns; the position encoding adds position information to each node, enabling the model to distinguish the order and distance of nodes in the graph. On the basis of modeling node dependencies, the graph prediction model also introduces an edge prediction attention layer to aggregate the representation of node pairs and predict the probability of connection between nodes. Through the autoregressive generation process, the graph prediction model gradually predicts the connection relationship between nodes at the next moment based on the hidden state at the current moment, and obtains the predicted communication topology graph at the next moment.

[0133] The predicted communication topology map at the next moment will be used as the updated communication topology map of the multi-chip system at the current moment to guide the subsequent distributed voltage compensation control. In order to achieve the continuous update of the communication topology map, an iterative method is adopted. In each iteration, the graph encoder is first used to extract the graph feature representation of the updated communication topology map at the current moment, and then the extracted graph feature representation is added to the historical trajectory information as the latest historical graph state feature representation. In this way, the historical trajectory information always maintains the latest communication topology map state, providing rich context information for the next iteration. By repeatedly executing steps such as graph encoding, trajectory updating, and graph prediction, the communication topology map model can continuously learn and adapt to the dynamic changes of the multi-chip system and generate accurate and real-time topology structure information.

[0134] In this embodiment, the dynamic and timing dependence of the communication topology of the multi-chip system is fully considered through the communication topology graph model construction method based on the graph neural network and the attention mechanism. The graph features are extracted through the graph encoder, and the residual connection and layer normalization are introduced to enhance the feature representation; the historical trajectory information is fused through the trajectory update module to capture the temporal evolution law of the communication topology graph; the future communication topology graph is generated through the autoregressive graph prediction model to realize the dynamic update of the topology structure. This method can adaptively learn the complex and dynamic communication mode of the multi-chip system, provide reliable and real-time topology information for the distributed voltage compensation control algorithm, and improve the accuracy and efficiency of the control. At the same time, the method has good scalability and robustness, can cope with multi-chip systems of different scales and topological structures, and adapt to changes and interference in the communication environment. Through the graph neural network and attention mechanism, the method can dynamically model and predict the communication topology of the multi-chip system, and provide accurate and real-time topology information for the distributed optimization algorithm. This not only improves the performance and reliability of voltage compensation control, but also provides new ideas and methods for adaptive communication and collaborative control of multi-chip systems.

[0135] In an optional embodiment,

[0136] According to the optimized global optimal voltage compensation control data, the power management circuit in each chip is controlled to adjust the chip's supply voltage, and the energy loss in the supply voltage adjustment process is minimized through intelligent power management strategy to achieve voltage fluctuation compensation for multi-chip systems, including:

[0137] Multiple power routing units are set up in the chip. Each power routing unit includes a power switch matrix and a controller. The switch connection state of the power switch matrix is ​​dynamically configured by the controller to build an energy transmission path inside the chip. Adjacent power routing units are directly connected. By controlling the connection state of adjacent power routing units, a power routing network covering the entire chip is built.

[0138] The chip is divided into multiple areas, each area is equipped with a local energy routing center, and the power routing units in the area are connected to the corresponding local energy routing center to aggregate energy step by step; based on the tree-like topology, a ring connection is introduced between the energy routing centers of adjacent chips, and finally a hierarchical energy routing topology structure of the multi-chip system is obtained;

[0139] Based on the hierarchical energy routing topology of the multi-chip system, an adaptive energy routing algorithm is used to obtain the energy supply and demand status data of each chip, and a system state space is constructed based on the obtained energy supply and demand status data. The possible routing actions of each power routing unit are defined as a routing action space, and energy loss is used as an instant reward function. Based on the system state space, routing action space and instant reward function, the optimal routing action sequence under each system state is solved to form a dynamically adjusted intelligent power management strategy.

[0140] A cross-chip voltage balancing mechanism is introduced. A voltage sensor is integrated on each chip to collect real-time voltage data of each chip. The collected voltage data is shared with other chips through the power routing network. Based on the shared voltage data, the voltage difference between the chips is calculated, and a unified voltage balancing threshold is set. The voltage offset of the voltage data of each chip node relative to the voltage balancing threshold is calculated; the chip with the largest voltage offset is selected as the source chip, and the chip with the smallest voltage offset is selected as the sink chip;

[0141] According to the obtained intelligent power management strategy, the energy distribution path from the source chip to the sink chip is planned, and the directional energy transmission from the source chip to the sink chip is realized through the power switch matrix in the corresponding power routing unit on the source chip and the sink chip, so as to complete the voltage fluctuation compensation in the local area;

[0142] Continuously monitor the voltage level changes of each chip to determine whether the voltage level of each chip has reached the voltage balancing threshold range; if not, repeat the voltage fluctuation compensation steps in the local area until the voltage levels of all chips reach the voltage balancing threshold range, thus completing the voltage fluctuation compensation of the multi-chip system.

[0143] Exemplarily, multiple power routing units are first set up in each chip. The power routing unit is the basic unit that constitutes the energy transmission network inside the chip, and is composed of a power switch matrix and a controller. The power switch matrix is ​​a cross switch array composed of multiple power switches. The connection state of the switch is dynamically configured by the controller to realize the switching and transmission of energy between different paths. Adjacent power routing units are directly connected to form a distributed energy transmission network.

[0144] Considering the locality and hierarchy of energy transmission within the chip, a hierarchical energy routing topology is adopted. First, each chip is divided into multiple regions, and a local energy routing center is set up in each region. The power routing units in the region are connected to the corresponding local energy routing center to achieve step-by-step aggregation and distribution of energy in the region. On this basis, a ring connection is introduced between the energy routing centers of adjacent chips, forming a multi-chip energy routing network based on a tree topology.

[0145] In order to minimize the energy loss in the process of supply voltage regulation, an adaptive energy routing algorithm is proposed to intelligently plan and optimize the energy transmission path. The algorithm first obtains the energy supply and demand status data of each chip, including the current voltage level, power consumption demand and other information, and constructs the system state space based on these data. Then, the possible routing actions of each power routing unit are defined as the routing action space, which represents different energy transmission path selections. Energy loss is used as an immediate reward function to evaluate the pros and cons of different routing actions. Based on the system state space, routing action space and immediate reward function, the adaptive energy routing algorithm solves the optimal routing action sequence under various system states through reinforcement learning, forming a dynamically adjusted intelligent power management strategy. This strategy can adaptively select the energy transmission path according to the real-time state of the system, minimize energy loss, and improve the efficiency of voltage regulation.

[0146] In order to further improve the voltage stability and consistency of multi-chip systems, a cross-chip voltage balancing mechanism is introduced. A voltage sensor is integrated on each chip to collect the voltage data of the chip in real time. The collected voltage data is shared with other chips through the power routing network to achieve global perception of voltage information. Based on the shared voltage data, the voltage difference between the chips is calculated, and a unified voltage balancing threshold is set as the target of voltage regulation. Then, the voltage offset of the voltage data of each chip node relative to the voltage balancing threshold, that is, the voltage deviation, is calculated. The chip with the largest voltage offset is selected as the source chip, indicating that its voltage level is the highest; the chip with the smallest voltage offset is selected as the host chip, indicating that its voltage level is the lowest. By establishing a directional energy transmission channel between the source chip and the host chip, voltage balancing in a local area can be achieved.

[0147] Specifically, according to the optimal energy transmission path obtained by the intelligent power management strategy, a power switch matrix is ​​configured in the corresponding power routing units on the source chip and the sink chip to build an energy distribution path from the source chip to the sink chip. By controlling the source chip to transmit energy to the sink chip in a directional manner, the excessive voltage level can be adjusted to near the equilibrium threshold, while compensating for the insufficient voltage of the sink chip and realizing voltage fluctuation compensation in the local area. This cross-chip voltage balancing mechanism can effectively alleviate the voltage imbalance problem in the multi-chip system and improve the stability and reliability of the system.

[0148] In order to achieve continuous and dynamic voltage regulation, after completing the voltage fluctuation compensation in the local area, the voltage level changes of each chip are continuously monitored to determine whether the voltage levels of all chips have reached the voltage balancing threshold range. If there is a chip whose voltage level exceeds the threshold range, the voltage fluctuation compensation step of the local area is repeated until the voltage levels of all chips meet the balancing conditions. Through this iterative adjustment process, dynamic voltage balancing of the multi-chip system can be achieved, ensuring that the system always maintains a stable and consistent voltage level during operation.

[0149] In an optional embodiment,

[0150] Based on the system state space, routing action space and immediate reward function, the optimal routing action sequence under each system state is solved to form a dynamically adjusted intelligent power management strategy including:

[0151] The eligibility trace and characteristic function are introduced, and the energy routing strategy is updated through the Q-Learning algorithm to solve the optimal routing action sequence under each system state. The calculation formula is as follows:

[0152] ;

[0153] Where Q*(·) represents the updated energy routing strategy, Q(s t , a t ) means in state s t The reward value of taking action at, α represents the learning rate, r t represents the immediate reward at time t, γ represents the discount factor, represents the energy routing strategy corresponding to the optimal action taken at the next state after time t, β represents the eligibility trace decay rate, G represents the number of characteristic functions, ε g (·) represents the characteristic function, D g represents the eligibility trace corresponding to the g-th characteristic function;

[0154] Among them, energy transmission loss is used as the immediate reward function, and the calculation formula is as follows:

[0155] ;

[0156] Where r(S, D) represents the energy loss from the source chip S to the sink chip D as an immediate reward, H represents the number of power routing units, and R h represents the resistance of the hth power routing unit, I h represents the current of the hth power routing unit, t h represents the transmission time of the hth power routing unit, μ hrepresents the energy transfer efficiency of the hth power routing unit, J h represents the current density of the hth power routing unit, J0 represents the reference value of the current density, m represents the number of power switches, V j represents the voltage of the jth power switch, I j represents the current of the jth power switch, t j represents the transmission time of the jth power switch, μ j represents the energy transfer efficiency of the jth power switch, e represents the base, J j represents the current density of the jth power switch.

[0157] In this embodiment, by dynamically constructing the energy transmission path and optimizing the energy distribution, effective compensation for voltage fluctuations in the multi-chip system is achieved. This method makes full use of the power routing network inside the chip and the energy transmission channel between chips, and minimizes the energy loss in the supply voltage regulation process through the adaptive energy routing algorithm and voltage balancing mechanism, thereby improving the efficiency and reliability of voltage compensation. At the same time, this method adopts a hierarchical energy routing topology and a closed-loop control method, which enhances the robustness and adaptability of the system and can cope with the complex and dynamic voltage regulation requirements of the multi-chip system. This provides new ideas and methods for achieving efficient energy management and stable and reliable operation of multi-chip systems.

[0158] Figure 2 FIG. 1 is a schematic diagram of a voltage fluctuation compensation control system for a chip according to an embodiment of the present invention. Figure 2 As shown, the system comprises:

[0159] The first unit is used to arrange voltage sensors and intelligent agents on each chip of the multi-chip system, use the voltage sensors to collect local voltage data of the chip, and exchange data with voltage sensors on adjacent chips through a wireless communication network, and use a multi-sensor information fusion algorithm based on Kalman filtering to fuse the local voltage data collected by each voltage sensor to obtain distributed voltage fluctuation data of the multi-chip system;

[0160] The second unit is used to generate a voltage fluctuation distribution map representing the overall voltage distribution of the multi-chip system according to the distributed voltage fluctuation data, and dynamically adjust the working state and data reporting frequency of each voltage sensor by using an adaptive scheduling algorithm based on the obtained voltage fluctuation distribution map, and at the same time, use an intelligent agent set on each voltage sensor to obtain chip-level voltage compensation control data by using a model predictive control algorithm based on the voltage fluctuation distribution map and the current working state of each voltage sensor;

[0161] The third unit is used to utilize a distributed optimization algorithm based on a consensus mechanism to iteratively fuse and update the voltage compensation control data obtained by each intelligent agent until a preset number of iterations is met, thereby obtaining the global optimal voltage control compensation data, and to utilize an online learning algorithm to adaptively optimize the global optimal voltage compensation control data. According to the optimized global optimal voltage compensation control data, the power management circuit in each chip is controlled to adjust the power supply voltage of the chip, and the energy loss in the power supply voltage adjustment process is minimized through an intelligent power management strategy, so as to realize voltage fluctuation compensation for the multi-chip system.

[0162] According to a third aspect of the embodiments of the present invention,

[0163] An electronic device is provided, comprising:

[0164] processor;

[0165] a memory for storing processor-executable instructions;

[0166] The processor is configured to call the instructions stored in the memory to execute the aforementioned method.

[0167] A fourth aspect of the embodiments of the present invention is:

[0168] A computer-readable storage medium is provided, on which computer program instructions are stored. When the computer program instructions are executed by a processor, the aforementioned method is implemented.

[0169] The present invention may be a method, an apparatus, a system and / or a computer program product. The computer program product may include a computer-readable storage medium carrying computer-readable program instructions for executing various aspects of the present invention.

[0170] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein by equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A voltage fluctuation compensation control method for a chip, characterized in that: include: A voltage sensor and an intelligent agent are arranged on each chip of the multi-chip system, the voltage sensor is used to collect local voltage data of the chip, and data is exchanged with voltage sensors on adjacent chips through a wireless communication network, and the local voltage data collected by each voltage sensor is fused using a multi-sensor information fusion algorithm based on Kalman filtering to obtain distributed voltage fluctuation data of the multi-chip system; According to the distributed voltage fluctuation data, a voltage fluctuation distribution diagram representing the overall voltage distribution of the multi-chip system is generated; based on the obtained voltage fluctuation distribution diagram, an adaptive scheduling algorithm is used to dynamically adjust the working state and data reporting frequency of each voltage sensor; and at the same time, an intelligent agent set on each voltage sensor is used to obtain chip-level voltage compensation control data based on the voltage fluctuation distribution diagram and the current working state of each voltage sensor using a model predictive control algorithm; Using a distributed optimization algorithm based on a consensus mechanism, the voltage compensation control data obtained by each intelligent agent is iteratively integrated and updated until the preset number of iterations is met to obtain the global optimal voltage control compensation data, and the global optimal voltage compensation control data is adaptively optimized using an online learning algorithm. According to the optimized global optimal voltage compensation control data, the power management circuit in each chip is controlled to adjust the power supply voltage of the chip, and the energy loss in the power supply voltage adjustment process is minimized through an intelligent power management strategy to achieve voltage fluctuation compensation for a multi-chip system. Based on the voltage fluctuation distribution diagram and the current working state of each voltage sensor, the chip-level voltage compensation control data is obtained by using the model predictive control algorithm, including: Constructing a partial differential equation describing the voltage response behavior of the chip, wherein the partial differential equation includes a Poisson equation and a heat equation, wherein the source term of the Poisson equation is the instantaneous current distribution of each unit in the chip; and the source term of the heat equation is the Joule heat of each unit in the chip; Based on the constructed partial differential equation, a fully connected neural network is designed, wherein the fully connected neural network takes the spatiotemporal coordinates of the nodes in the chip and the instantaneous current distribution of each unit in the chip as input, and takes the voltage distribution and temperature distribution of the nodes in the chip as output; Constructing a joint loss function of a fully connected neural network, the joint loss function includes a data fitting loss and a physical constraint loss, and training the fully connected neural network by minimizing the joint loss function through an adaptive gradient optimization algorithm to obtain a final chip voltage response prediction model; Given the spatiotemporal coordinates and current excitation of any node in the chip, input them into the chip voltage response prediction model, predict the instantaneous voltage value and instantaneous temperature value at the current node, combine the voltage fluctuation distribution diagram and the current working state of each voltage sensor, analyze the power consumption of each module in the chip, dynamically adjust the working frequency and voltage of each module according to the analysis results, and obtain chip-level voltage compensation control data; Using a distributed optimization algorithm based on a consensus mechanism, the voltage compensation control data obtained by each intelligent agent is iteratively integrated and updated until the preset number of iterations is met, and the global optimal voltage control compensation data is obtained, including: Constructing a communication topology graph model of a multi-chip system, wherein the communication topology graph model includes a node feature matrix and an edge feature matrix, wherein the elements in the node feature matrix represent voltage state information of corresponding nodes, and the elements in the edge feature matrix represent communication link information between corresponding nodes; Each node collects its own voltage measurement value at the current moment, and obtains the voltage measurement value of the neighboring node at the current moment and the communication link information between the neighboring node and the neighboring node by communicating with the neighboring node; For each node, the voltage measurement value of the node itself, the voltage measurement value of the neighboring node, and the communication link information at the current moment are input into the communication topology graph model, and after forward propagation calculation of at least two layers of graph convolution layers and attention layers, the voltage compensation control amount of the current node is output; The obtained voltage compensation control amount is used as the feedback value, and superimposed with the current voltage measurement value of the node itself to obtain the updated node voltage state, and the updated node voltage state is broadcast to neighboring nodes through the neighbor communication mechanism; Each node updates the voltage state of its own neighboring nodes according to the voltage state of the neighboring nodes received, and repeats the iteration until the preset number of iterations is met to obtain the global optimal voltage control compensation data.

2. The method according to claim 1, characterized in that Constructing a joint loss function of a fully connected neural network, the joint loss function includes data fitting loss and physical constraint loss including: The calculation formula of the joint loss function is as follows: ; Among them, L(θ) represents the joint loss function, θ represents the fully connected neural network parameters, and L data (θ) represents the data fitting loss, λ represents the weight coefficient of the physical constraint loss, and L phys (θ) represents the physical constraint loss; The calculation formula of the data fitting loss is as follows: ; Where N represents the number of samples, represents the predicted voltage value, φ i Indicates the actual voltage value, Represents the predicted temperature value, T i Indicates the actual temperature value; The calculation formula of the physical constraint loss is as follows: ; Where Ω represents the solution domain of the chip, ▽ represents the gradient operator, σ represents thermal conductivity, ∂ represents partial derivative, ρ represents charge density, t represents time, K represents the number of units, and I k (t) represents the instantaneous current of the kth unit at time t, δ(·) represents the three-dimensional Dirac function, x represents the x-axis coordinate in the chip, y represents the y-axis coordinate in the chip, z represents the z-axis coordinate in the chip, and x k represents the x-axis coordinate of the kth unit, y k represents the y-axis coordinate of the kth unit, z k represents the z-axis coordinate of the kth unit, c p represents specific heat capacity, and η represents thermal diffusivity.

3. The method according to claim 1, characterized in that The communication topology model for building a multi-chip system includes: A graph encoder based on a graph neural network is used to extract the feature representation of the communication topology graph of the multi-chip system at the current moment. The graph encoder aggregates node features and neighborhood information through a self-attention mechanism, and introduces residual connections and layer normalization operations to enhance the node feature representation capability, thereby obtaining an enhanced feature representation of the graph at the current moment. The enhanced current moment graph feature representation and historical trajectory information are input into the trajectory update module based on the attention mechanism for fusion. The trajectory update module adaptively aggregates the graph state feature representations of different historical moments through the position-aware attention mechanism, and updates the hidden state to obtain the fused current moment hidden state; The fused hidden state at the current moment is decoded using a preset autoregressive model based on the Transformer architecture. The autoregressive model models the dependency relationship between nodes through a multi-head self-attention mechanism and position encoding, and uses an edge prediction attention layer to aggregate the representation of node pairs, predicts the connection probability between nodes at the next moment, and obtains the predicted communication topology graph at the next moment. The communication topology graph at the next moment is used as the updated communication topology graph of the multi-chip system at the current moment. The graph encoder is used to extract its graph feature representation, and the extracted graph feature representation is added to the historical trajectory information as the latest historical graph state feature representation. The iteration is repeated until the preset number of iterations is met to obtain the final communication topology graph of the multi-chip system.

4. The method according to claim 1, characterized in that: According to the optimized global optimal voltage compensation control data, the power management circuit in each chip is controlled to adjust the chip's supply voltage, and the energy loss in the supply voltage adjustment process is minimized through intelligent power management strategy to achieve voltage fluctuation compensation for multi-chip systems, including: Multiple power routing units are set up in the chip. Each power routing unit includes a power switch matrix and a controller. The switch connection state of the power switch matrix is ​​dynamically configured by the controller to build an energy transmission path inside the chip. Adjacent power routing units are directly connected. By controlling the connection state of adjacent power routing units, a power routing network covering the entire chip is built. The chip is divided into multiple areas, each area is equipped with a local energy routing center, and the power routing units in the area are connected to the corresponding local energy routing center to aggregate energy step by step; based on the tree-like topology, a ring connection is introduced between the energy routing centers of adjacent chips, and finally a hierarchical energy routing topology structure of the multi-chip system is obtained; Based on the hierarchical energy routing topology of the multi-chip system, an adaptive energy routing algorithm is used to obtain the energy supply and demand status data of each chip, and a system state space is constructed based on the obtained energy supply and demand status data. The possible routing actions of each power routing unit are defined as a routing action space, and energy loss is used as an instant reward function. Based on the system state space, routing action space and instant reward function, the optimal routing action sequence under each system state is solved to form a dynamically adjusted intelligent power management strategy. A cross-chip voltage balancing mechanism is introduced. A voltage sensor is integrated on each chip to collect real-time voltage data of each chip. The collected voltage data is shared with other chips through the power routing network. Based on the shared voltage data, the voltage difference between the chips is calculated, and a unified voltage balancing threshold is set. The voltage offset of the voltage data of each chip node relative to the voltage balancing threshold is calculated; the chip with the largest voltage offset is selected as the source chip, and the chip with the smallest voltage offset is selected as the sink chip; According to the obtained intelligent power management strategy, the energy distribution path from the source chip to the sink chip is planned, and the directional energy transmission from the source chip to the sink chip is realized through the power switch matrix in the corresponding power routing unit on the source chip and the sink chip, so as to complete the voltage fluctuation compensation in the local area; Continuously monitor the voltage level changes of each chip to determine whether the voltage level of each chip has reached the voltage balancing threshold range; if not, repeat the voltage fluctuation compensation steps in the local area until the voltage levels of all chips reach the voltage balancing threshold range, thus completing the voltage fluctuation compensation of the multi-chip system.

5. The method according to claim 4, characterized in that Based on the system state space, routing action space and immediate reward function, the optimal routing action sequence under each system state is solved to form a dynamically adjusted intelligent power management strategy including: The eligibility trace and characteristic function are introduced, and the energy routing strategy is updated through the Q-Learning algorithm to solve the optimal routing action sequence under each system state. The calculation formula is as follows: ; in, represents the updated energy routing strategy, Q(s t , a t ) means in state s t The reward value of taking action at, α represents the learning rate, r t represents the immediate reward at time t, γ represents the discount factor, represents the energy routing strategy corresponding to the optimal action taken at the next state after time t, β represents the eligibility trace decay rate, G represents the number of characteristic functions, ε g (·) represents the characteristic function, D g represents the eligibility trace corresponding to the g-th characteristic function; Among them, energy transmission loss is used as the immediate reward function, and the calculation formula is as follows: ; Where r(S, D) represents the energy loss from the source chip S to the sink chip D as an immediate reward, H represents the number of power routing units, and R h represents the resistance of the hth power routing unit, I h represents the current of the hth power routing unit, t h represents the transmission time of the hth power routing unit, μ h represents the energy transfer efficiency of the hth power routing unit, J h represents the current density of the hth power routing unit, J0 represents the reference value of the current density, m represents the number of power switches, V j represents the voltage of the jth power switch, I j represents the current of the jth power switch, t j represents the transmission time of the jth power switch, μ j represents the energy transfer efficiency of the jth power switch, e represents the base, J j represents the current density of the jth power switch.

6. A voltage fluctuation compensation control system for a chip, used to implement the method described in any one of claims 1 to 5, characterized in that: include: The first unit is used to arrange voltage sensors and intelligent agents on each chip of the multi-chip system, use the voltage sensors to collect local voltage data of the chip, and exchange data with voltage sensors on adjacent chips through a wireless communication network, and use a multi-sensor information fusion algorithm based on Kalman filtering to fuse the local voltage data collected by each voltage sensor to obtain distributed voltage fluctuation data of the multi-chip system; The second unit is used to generate a voltage fluctuation distribution map representing the overall voltage distribution of the multi-chip system according to the distributed voltage fluctuation data, and dynamically adjust the working state and data reporting frequency of each voltage sensor by using an adaptive scheduling algorithm based on the obtained voltage fluctuation distribution map, and at the same time, use an intelligent agent set on each voltage sensor to obtain chip-level voltage compensation control data by using a model predictive control algorithm based on the voltage fluctuation distribution map and the current working state of each voltage sensor; The third unit is used to utilize a distributed optimization algorithm based on a consensus mechanism to iteratively fuse and update the voltage compensation control data obtained by each intelligent agent until a preset number of iterations is met, thereby obtaining the global optimal voltage control compensation data, and to utilize an online learning algorithm to adaptively optimize the global optimal voltage compensation control data. According to the optimized global optimal voltage compensation control data, the power management circuit in each chip is controlled to adjust the power supply voltage of the chip, and the energy loss in the power supply voltage adjustment process is minimized through an intelligent power management strategy, so as to realize voltage fluctuation compensation for the multi-chip system.

7. An electronic device, characterized in that: include: processor; a memory for storing processor-executable instructions; The processor is configured to call the instructions stored in the memory to execute the method described in any one of claims 1 to 5.

8. A computer-readable storage medium having computer program instructions stored thereon, characterized in that: When the computer program instructions are executed by a processor, the method according to any one of claims 1 to 5 is implemented.

Citation Information

Patent Citations

  • Chip frequency control method and apparatus, blockchain server, and storage medium

    CA3207292A1

  • Wind power plant physical dynamic simulation test method based on variable flow system

    CN116184856A