Variable configuration area reading method and device, equipment and medium

Abstract

The invention discloses a variable configuration area reading method and device, equipment and a medium, and relates to the technical field of computers. The method comprises the steps that BIOS codes are reconstructed to adjust variable storage codes into target codes; the variable storage code is a variable configuration area for specifying a variable and a code for specifying that the variable is stored in the variable configuration area, and a target code is obtained by adding an empty variable in the variable configuration area; compiling the reconstructed code, initializing a preset serial peripheral interface and reading an empty variable through the interface when the system is in a started SEC stage, and judging whether the system is subjected to reserved configuration refreshing for a corresponding version before starting; and executing the flow of the PEI stage started by the system according to the judgment result, and starting to enter an operating system after execution is completed. By means of the technical scheme, the uncontrollable risk existing when codes of a basic input and output system of a domestic central processing unit platform are upgraded is solved.

Description

Technical Field

[0001] The present invention relates to the field of computer technology, and in particular to a variable configuration area reading method, device, equipment and medium. Background Art

[0002] At present, the domestic CPU (Central Processing Unit) platform cannot read the variable area before the DXE (Driver Execution Environment) stage of startup, which causes a lot of inconvenience. For example, the current server needs to retain the customer configuration upgrade during the maintenance and iteration upgrade on the client, but the existing memory training results are skipped to save boot time, and the BIOS (Basic Input Output System) cannot identify whether the configuration refresh has been retained before startup. Therefore, when the platform BIOS retains the configuration upgrade CODE, it may cause hidden dangers in DRAM (Dynamic Random Access Memory) electrical compatibility.

[0003] Therefore, how to provide a solution to the above technical problems is a problem that those skilled in the art need to solve at present. Summary of the invention

[0004] In view of this, the purpose of the present invention is to provide a variable configuration area reading method, device, equipment and medium, which can realize the reading of the variable area before the DXE stage of startup, and solve the uncontrollable risks when the BIOS of the domestic CPU platform upgrades the CODE. The specific scheme is as follows:

[0005] In a first aspect, the present application discloses a variable configuration area reading method, which is applied to a basic input and output system, comprising:

[0006] Reconstructing the code of the basic input and output system to adjust the variable storage code of the basic input and output system to the target code; wherein the variable storage code is a variable configuration area for specifying a variable and a code specifying that the variable is stored in the variable configuration area, and the target code is obtained by adding an empty variable in the variable configuration area;

[0007] Compiling the reconstructed code of the basic input / output system, when the basic input / output system is in the startup security verification stage, initializing a preset serial peripheral interface, and reading the empty variable through the preset serial peripheral interface to determine whether the basic input / output system has been refreshed with a reserved configuration for a corresponding version before startup and obtaining a corresponding determination result;

[0008] The process of the extensible firmware interface early initialization phase of the basic input and output system startup is executed according to the judgment result, and the operating system is started after the process of the extensible firmware interface early initialization phase is executed.

[0009] Optionally, after compiling the reconstructed basic input and output system code, the method further includes:

[0010] The compiled basic input / output system is refreshed by a target refresh method; wherein the target refresh method is performed by using any one of a command line interpreter, an operating system, a setting interface of the basic input / output system, and a web page interface of a baseboard management controller to perform a version refresh in a configuration-preserving manner.

[0011] Optionally, when the basic input / output system is in a startup security verification phase, initializing a preset serial peripheral interface includes:

[0012] When the basic input / output system is in the security verification stage of startup, the temporary memory space of the secondary cache is used to initialize the registers and read / write functions of the preset serial peripheral interface between the flash memory of the basic input / output system and the central processing unit through memory mapping input / output.

[0013] Optionally, the reading of the empty variable through the preset serial peripheral interface to determine whether the basic input and output system has been refreshed with a reserved configuration for a corresponding version before startup and obtaining a corresponding determination result includes:

[0014] Read the empty variable according to the globally unique identifier of the variable in the variable configuration area through the preset serial peripheral interface, and determine whether the empty variable can be read;

[0015] If the empty variable can be read, the address data of the empty variable is obtained, and whether the first state bit of the empty variable is in an available state is determined according to the address data;

[0016] When the first status bit is in an available state, it is determined that the basic input and output system has been refreshed with respect to a corresponding version of the reserved configuration before startup;

[0017] When the first status bit is in an unavailable state, it is determined that the basic input / output system has not been refreshed with respect to a corresponding version of the reserved configuration before startup.

[0018] Optionally, when the first status bit is in the available state, the process of determining whether the basic input / output system has performed a reserved configuration refresh for a corresponding version before startup further includes:

[0019] Determine the memory input / output timing parameter variable that needs to be deleted in the variable configuration area, and read the memory input / output timing parameter variable through the preset serial peripheral interface;

[0020] Setting the second state position of the memory input / output timing parameter variable to an unavailable state, and then writing the data corresponding to the memory input / output timing parameter variable in the unavailable state back to the flash memory of the basic input / output system to delete the memory input / output timing parameter variable;

[0021] The first state bit corresponding to the empty variable is set from an available state to an unavailable state, and then the data corresponding to the empty variable in the unavailable state is written back to the flash memory of the basic input and output system to delete the empty variable;

[0022] When the empty variable and the memory input / output timing parameter variable are deleted, the preset serial peripheral interface is closed and the occupied temporary memory space is released;

[0023] Correspondingly, when the first status bit is in an unavailable state, the process of determining that the basic input / output system has not performed a reserved configuration refresh for the corresponding version before startup also includes:

[0024] Directly trigger the step of closing the preset serial peripheral interface and releasing the occupied temporary memory space.

[0025] Optionally, after determining whether the empty variable can be read, the process further includes:

[0026] If the empty variable cannot be read, the step of closing the preset serial peripheral interface and releasing the occupied temporary memory space is directly triggered.

[0027] Optionally, the process of executing the early initialization phase of the extensible firmware interface started by the basic input and output system according to the judgment result includes:

[0028] Determine whether the third state bit of the memory input / output timing parameter variable in the current variable configuration area can be read;

[0029] If the third status bit can be read, obtaining the status of the third status bit;

[0030] When the third status bit is in an available state, executing a process of an extensible firmware interface early initialization phase of startup of the basic input and output system based on the first value table;

[0031] When the third state bit is in an unavailable state, re-performing memory training, and storing new training result variables generated during the memory training process to obtain a second value table, and then executing the process of the early initialization phase of the extensible firmware interface started by the basic input and output system based on the second value table;

[0032] If the third status bit cannot be read, the step of re-performing memory training and storing new training result variables generated during the memory training process to obtain a second value table is triggered.

[0033] In a second aspect, the present application discloses a variable configuration area reading device, which is applied to a basic input and output system, comprising:

[0034] A code reconstruction module, used for reconstructing the code of the basic input and output system to adjust the variable storage code of the basic input and output system to the target code; wherein the variable storage code is a variable configuration area for specifying variables and a code for specifying that the variables are stored in the variable configuration area, and the target code is obtained by adding an empty variable in the variable configuration area;

[0035] The first stage execution module is used to compile the code of the reconstructed basic input and output system, and when the basic input and output system is in the security verification stage of startup, initialize the preset serial peripheral interface, and read the empty variable through the preset serial peripheral interface to determine whether the basic input and output system has been refreshed for the corresponding version before startup and obtain the corresponding judgment result;

[0036] The second stage execution module is used to execute the process of the extensible firmware interface early initialization stage started by the basic input and output system according to the judgment result, and start to enter the operating system after executing the process of the extensible firmware interface early initialization stage.

[0037] In a third aspect, the present application discloses an electronic device, comprising a processor and a memory; wherein the memory is used to store a computer program, and the computer program is loaded and executed by the processor to implement the variable configuration area reading method as described above.

[0038] In a fourth aspect, the present application discloses a computer-readable storage medium for storing a computer program; wherein the computer program, when executed by a processor, implements the variable configuration area reading method as described above.

[0039] The present application provides a variable configuration area reading method, which is applied to a basic input and output system, comprising: reconstructing the code of the basic input and output system to adjust the variable storage code of the basic input and output system to a target code; wherein the variable storage code is a variable configuration area for specifying a variable and a code specifying that the variable is stored in the variable configuration area, and the target code is obtained by adding an empty variable in the variable configuration area; compiling the reconstructed code of the basic input and output system, and when the basic input and output system is in a security verification stage of startup, initializing a preset serial peripheral interface, and reading the empty variable through the preset serial peripheral interface to determine whether the basic input and output system has performed a reserved configuration refresh for a corresponding version before startup and obtain a corresponding determination result; executing a process of an extensible firmware interface early initialization stage of startup of the basic input and output system according to the determination result, and booting into an operating system after executing the process of the extensible firmware interface early initialization stage.

[0040] The beneficial technical effect of the present application is: by embedding an empty variable when compiling the basic input and output system, the empty variable is read through the preset serial peripheral interface when the basic input and output system is started to the security verification stage, so as to determine whether the configuration refresh version is retained before this startup. Further, in the early initialization stage of the extensible firmware interface of the basic input and output system startup, it is selected to continue to start after re-training the memory or directly continue the startup process according to the judgment result; finally, it is booted into the operating system. In this way, it is possible to realize the read and write judgment of the space in the variable configuration area in advance, solve the problem that the variable configuration area cannot be read before the driver execution environment stage of startup, and thus solve the uncontrollable risks existing in the basic input and output system upgrade code of the domestic CPU platform. When facing the machine upgrade involving version retention configuration refresh, the machine can be kept running stably, and there will be no hidden dangers in DRAM electrical compatibility. The risk of downtime and unstable operation can be solved by software means, which has great economic value and avoids customer complaints.

[0041] In addition, the present application provides a variable configuration area reading device, equipment and storage medium, which correspond to the above-mentioned variable configuration area reading method and have the same effect as above. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying creative work.

[0043] Figure 1 This is a flowchart for reading configuration information when upgrading BIOS;

[0044] Figure 2 A flow chart of a variable configuration area reading method disclosed in this application;

[0045] Figure 3 A flow chart of a specific variable configuration area reading method disclosed in this application;

[0046] Figure 4 A flow chart of a specific variable configuration area reading method disclosed in this application;

[0047] Figure 5 A flow chart of a specific variable configuration area reading method disclosed in this application;

[0048] Figure 6 This is a schematic diagram of the structure of a variable configuration area reading device disclosed in this application;

[0049] Figure 7 This is a structural diagram of an electronic device disclosed in this application. DETAILED DESCRIPTION

[0050] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0051] At present, when the domestic platform CPU is started and the BIOS is running in the SEC (Security Phase), the CPU cannot read and write the variable area of ​​the BIOS flash, which causes a lot of inconvenience. The SEC phase runs the CPU CODE code, which currently has many problems. If the configuration information can be read in the SEC phase, the problem can be solved very well.

[0052] For example, when the current server is undergoing maintenance and iteration upgrades on the client side, the client configuration needs to be retained, and the entire BIOS configuration Variable area will be retained. In addition to the BIOS configuration variables, the BIOS Variable area also uses some Variable space to store some special parameters, such as memory IOTIMING (input / output timing) information; if the new BIOS that is flashed needs to be improved and optimized due to CODE, the BIOS needs to be updated to add some DRAM patches, which may cause the new BIOS code memory training to be inconsistent with the memory IOTIMING parameters stored in the Variable of the old version of the BIOS code memory training, which may cause hidden dangers in DRAM electrical compatibility. For the process, refer to Figure 1 Schematic diagram.

[0053] According to expectations, if you want to avoid this hidden danger after the BIOS is refreshed with the retained configuration, the best way is to clear the historical IOTIMING so that the BIOS can be fully calibrated again. However, the existing memory training results that are currently done to save boot time skip the memory training operation, and the BIOS cannot identify whether the retained configuration refresh has been done before startup. Currently, the BIOS version refresh includes shell, OS, BIOS setup, BMC (Baseboard Manager Controller) web and other methods. The first few version refresh methods can be refined to the granularity level of EFI (Extensible Firmware Interface) variable, and the memory IOTIMING parameters stored in the variable can be cleared during the refresh; but when the BMC side refreshes the BIOS with the retained configuration, its update of the BIOS cannot be refined to the granularity level of EFI variable; and if a flag is set in the BIOS to indicate that the BIOS is refreshed with the retained configuration, but the memory training is in the PEI (Pre-EFI Initialization) stage of the BIOS startup, the flag of the configuration area cannot be read at this stage and before because the memory is not initialized.

[0054] To this end, this application provides a variable configuration area reading solution, which can read the variable area before the DXE stage of startup, and solve the uncontrollable risks when upgrading the CODE of the BIOS of the domestic CPU platform.

[0055] The embodiment of the present invention discloses a variable configuration area reading method, which is applied to a basic input and output system, see Figure 2 As shown, the method includes:

[0056] Step S11: Reconstruct the code of the basic input and output system to adjust the variable storage code of the basic input and output system to the target code; wherein the variable storage code is a variable configuration area for specifying variables and a code for specifying that the variables are stored in the variable configuration area, and the target code is obtained by adding an empty variable in the variable configuration area.

[0057] In the embodiment of the present application, an empty variable is embedded in the basic input and output system when it is compiled to solve the problem of refreshing the server reserved configuration. Specifically, the code of the basic input and output system is reconstructed, and the variable storage code part thereof is adjusted to the target code.

[0058] It should be noted that the variable storage code corresponds to the variable configuration area (Variable) of the specified variable, and also specifies that the relevant variables are stored in this area. For example, BIOS setup configuration, CPU chipset configuration, that is, BIOS configuration parameter information and memory training parameter information are all specified by this part of the code.

[0059] When the BIOS version is compiled, an empty variable is added to the variable configuration area, and the value of this variable does not need to be processed, thereby adjusting the part of the variable storing the code to the target code.

[0060] Step S12: compile the code of the reconstructed basic input and output system, and when the basic input and output system is in the security verification stage of startup, initialize the preset serial peripheral interface, and read the empty variable through the preset serial peripheral interface to determine whether the basic input and output system has performed a reserved configuration refresh for the corresponding version before startup and obtain the corresponding judgment result.

[0061] In the embodiment of the present application, the code of the reconstructed input / output system is compiled, and then the compiled BIOS version is refreshed through various refresh methods. Specifically, the compiled basic input / output system is refreshed through a target refresh method.

[0062] The target refresh method is to perform version refresh in a configuration-preserving manner by using any one of a command line interpreter (shell), an operating system (OS), a setup interface (setup) of the basic input / output system, and a web page interface (BMC web) of a baseboard management controller.

[0063] In the embodiment of the present application, when the machine is started to the SEC (security verification) stage, a specific preset serial peripheral interface is used to read an empty variable, and by judging the state of the empty variable or judging whether the empty variable can be read, it is further judged whether the configuration refresh version is retained before this startup. Then, based on this information, it is determined whether the memory IOTIMING parameters stored in the Variable variable configuration area are cleared before the historical memory IOTIMING parameters stored in the Variable are used, so as to solve the problem that the variable configuration area cannot be read before the DXE stage of startup.

[0064] Step S13: executing the process of the extensible firmware interface early initialization phase of the basic input and output system startup according to the judgment result, and booting into the operating system after completing the process of the extensible firmware interface early initialization phase.

[0065] In the embodiment of the present application, after determining whether the basic input and output system has been refreshed for the corresponding version before startup, a corresponding determination result will be obtained. When the machine starts and runs to the PEI stage, it will choose whether to retrain or continue to start according to the determination result.

[0066] It should be pointed out that this judgment result can characterize the state of the status bits related to the memory result variable in the variable configuration area, and clarify whether the memory-related training parameters stored in the historical Variable are cleared before the memory-related training parameters stored in the Variable configuration area are used.

[0067] It can be understood that if the memory-related training parameters stored in the historical Variable are cleared before the memory-related training parameters stored in the Variable configuration area are used, it means that memory training needs to be re-performed during this startup process, and then new training result variables are generated; if the memory-related training parameters stored in the historical Variable are not cleared before the memory-related training parameters stored in the Variable configuration area are used, it means that the startup can continue based on the original related parameters, and there will be no problem of mismatch between the new and old version parameters.

[0068] The present application provides a variable configuration area reading method, which is applied to a basic input and output system, comprising: reconstructing the code of the basic input and output system to adjust the variable storage code of the basic input and output system to a target code; wherein the variable storage code is a variable configuration area for specifying a variable and a code specifying that the variable is stored in the variable configuration area, and the target code is obtained by adding an empty variable in the variable configuration area; compiling the reconstructed code of the basic input and output system, and when the basic input and output system is in a security verification stage of startup, initializing a preset serial peripheral interface, and reading the empty variable through the preset serial peripheral interface to determine whether the basic input and output system has performed a reserved configuration refresh for a corresponding version before startup and obtain a corresponding determination result; executing a process of an extensible firmware interface early initialization stage of startup of the basic input and output system according to the determination result, and booting into an operating system after executing the process of the extensible firmware interface early initialization stage.

[0069] The beneficial technical effect of the present application is: by embedding an empty variable when compiling the basic input and output system, the empty variable is read through the preset serial peripheral interface when the basic input and output system is started to the security verification stage, so as to determine whether the configuration refresh version is retained before this startup. Further, in the early initialization stage of the extensible firmware interface of the basic input and output system startup, it is selected to continue to start after re-training the memory or directly continue the startup process according to the judgment result; finally, it is booted into the operating system. In this way, it is possible to realize the read and write judgment of the space in the variable configuration area in advance, solve the problem that the variable configuration area cannot be read before the driver execution environment stage of startup, and thus solve the uncontrollable risks existing in the basic input and output system upgrade code of the domestic CPU platform. When facing the machine upgrade involving version retention configuration refresh, the machine can be kept running stably, and there will be no hidden dangers in DRAM electrical compatibility. The risk of downtime and unstable operation can be solved by software means, which has great economic value and avoids customer complaints.

[0070] Based on the above embodiment, in a feasible implementation, when the machine starts to the SEC stage, a specific SPI (Serial Peripheral interface) interface is initialized, and the reserved empty variable is read through the SPI interface. After reading, the next step is performed. Therefore, for step S12 of the previous embodiment, it can also be specifically performed by executing Figure 3 The steps shown are implemented as follows Figure 3 Specifically, the following steps may also be included:

[0071] Step S1211: compile the code of the reconstructed basic input / output system, and when the basic input / output system is in the security verification stage of startup, use the temporary memory space of the secondary cache to initialize the registers and read / write functions of the preset serial peripheral interface between the flash memory of the basic input / output system and the central processing unit through memory mapping input / output.

[0072] In the embodiment of the present application, when the BIOS starts running to the SEC stage, it initializes the SPI interface and uses the relevant registers and read-write functions of this interface to read the empty variables buried in advance. Specifically, the BIOS uses the temporary memory space of the L2 (secondary) cache to initialize the relevant registers and read-write functions of the SPI interface between the BIOS-flash and the CPU through the memory mapping IO technology.

[0073] Step S1212: reading the empty variable according to the globally unique identifier of the variable in the variable configuration area through the preset serial peripheral interface, and determining whether the empty variable can be read.

[0074] In the embodiment of the present application, the variable configuration area is first read through the SPI interface, and then the variable area is traversed through the globally unique identifier (GUID) of each variable to find the required empty variable and determine whether the empty variable can be read.

[0075] Step S1213: If the empty variable can be read, the address data where the empty variable is located is obtained, and whether the first state bit of the empty variable is in an available state is determined according to the address data.

[0076] In a specific implementation, if an empty variable can be read, the address data of the empty variable is read out through SPI; if it cannot be read, no operation is performed to continue booting. It can be understood that there is a status bit in the header of each variable data structure specified in the UEFI (Unified Extensible Firmware Interface) specification to control whether the variable is in an available state. Therefore, if an empty variable can be read, the address data of the empty variable is obtained through the preset serial peripheral interface, and the value of its status bit is determined to be an available state or an unavailable state.

[0077] Step S1214: when the first status bit is in the available state, it is determined that the basic input / output system has been refreshed with a reserved configuration for a corresponding version before startup.

[0078] In the embodiment of the present application, when the value of the status bit corresponding to the read empty variable is in an available state, it is determined that the basic input / output system has performed a reserved configuration refresh for the corresponding version before startup. At this time, in order to avoid the hidden danger of DRAM electrical compatibility when retaining the configuration to upgrade the CODE, the memory IOTIMING parameter variable that needs to be deleted is found, and its block is read out through SPI. Specifically, the memory input / output timing parameter variable that needs to be deleted in the variable configuration area is determined, and the memory input / output timing parameter variable is read through the preset serial peripheral interface.

[0079] Furthermore, the second state position of the memory input / output timing parameter variable is set to an unavailable state, and then the data corresponding to the memory input / output timing parameter variable in the unavailable state is written back to the flash memory of the basic input / output system to delete the memory input / output timing parameter variable. It can be seen that by modifying the byte in the status, that is, setting it to an unavailable state, the variable is actually considered to be deleted. When the variable area is full, there will be a special recycling mechanism to recycle these actually abandoned areas. Then write this part of data back to the flash to complete the variable deletion operation.

[0080] Then, the deletion operation is performed on the empty variable in the same manner. Specifically, the first state bit corresponding to the empty variable is set from an available state to an unavailable state, and then the data corresponding to the empty variable in the unavailable state is written back to the flash memory of the basic input and output system to delete the empty variable.

[0081] After the above judgment and operation, the permission and SPIBAR of the SPI interface between BIOS-flash and CPU to write ROM are turned off, and the occupied temporary memory space is released before continuing other startup operations. That is, after the empty variable and the memory input / output timing parameter variable are deleted, the preset serial peripheral interface is closed, the occupied temporary memory space is released, and other startup processes are continued.

[0082] Step S1215: When the first status bit is in an unavailable state, it is determined that the basic input / output system has not been refreshed with respect to the corresponding version of the reserved configuration before startup.

[0083] In the embodiment of the present application, when the value of the status bit corresponding to the read empty variable is in an unavailable state, no operation is performed to continue the startup. This indicates that the basic input and output system has not been refreshed for the corresponding version before startup, that is, there is no memory IOTIMING parameter variable that needs to be deleted. At this time, the SPI interface is closed and other startup operations can be continued. That is, the step of directly triggering the closing of the preset serial peripheral interface and releasing the occupied temporary memory space is triggered.

[0084] It should be pointed out that, in another specific implementation manner, if the empty variable cannot be read, the step of closing the preset serial peripheral interface and releasing the occupied temporary memory space is directly triggered.

[0085] It can be seen that the design scheme of using the temporary memory space of L2 cache when BIOS boots to the SEC stage, configuring the relevant registers and read and write functions of the SPI interface between the BIOS-flash and the CPU through memory-mapped IO, and reading the empty variables buried in advance solves the uncontrollable risks when the BIOS on the domestic CPU platform upgrades the CODE.

[0086] Based on the above embodiment, this embodiment will specifically explain S13 in the above embodiment. Figure 4 , Figure 4 for Figure 2 A flowchart of an actual performance of S13 in a data transmission method is provided. The process of executing the process of the early initialization phase of the extensible firmware interface started by the basic input and output system according to the judgment result may include the following steps:

[0087] Step S1311: determining whether the third state bit of the memory input / output timing parameter variable in the current variable configuration area can be read;

[0088] Step S1312: if the third status bit can be read, obtaining the status of the third status bit;

[0089] Step S1313: when the third status bit is in an available state, executing the process of the early initialization phase of the extensible firmware interface of the basic input and output system startup based on the first value table;

[0090] Step S1314: when the third state bit is in an unavailable state, re-performing memory training, and storing new training result variables generated during the memory training process to obtain a second value table, and then executing the process of the early initialization phase of the extensible firmware interface started by the basic input and output system based on the second value table;

[0091] Step S1315: If the third status bit cannot be read, trigger the step of re-performing memory training and storing new training result variables generated during the memory training process to obtain a second value table.

[0092] For the convenience of description, the above steps are combined for explanation.

[0093] In the embodiment of the present application, the machine starts and runs to the PEI stage, and judges the status of the memory IOTIMING parameter variable. If it is unavailable (that is, cleared), it is retrained; if it is available, it continues to start.

[0094] It is understandable that when the device boots to the PEI stage, relevant training of the memory is performed. In order to overcome the problem that the flag bit of the variable configuration area cannot be read in the PEI stage and before because the memory is not initialized, the embodiment of the present application is based on the content disclosed in the steps of the aforementioned embodiment, and reads the status bit of the relevant memory training result variable in the current variable configuration area. If it can be read and is in an available state, it means that the configuration refresh version is not retained before startup, and the deletion operation of the relevant memory IOTIMING parameter variable is not performed, then continue to start according to the previous numerical table. If it cannot be read or is read as an unavailable state, the memory training is re-performed, the new training result variables are stored, and finally the boot into the OS continues. After restarting under the OS, the aforementioned steps can be repeated.

[0095] like Figure 5 As shown, it is a flowchart for implementing the advance reading of the variable configuration area provided in combination with the content disclosed in the aforementioned embodiments. When the BIOS is booted to the SEC stage, the cache temporary memory space of L2 is used to configure the relevant registers and read and write functions of the SPI interface between the initialized BIOS-flash and the CPU through memory mapping IO, and read the empty variables buried in advance. When it cannot be read or it is read but the status is unavailable, there is no operation, and the subsequent startup process is continued after the SPI interface is closed; when it is read and the status is available, the memory parameter variables and the empty variables are deleted, and then the subsequent startup process is continued after the SPI interface is closed. When the device runs to the PEI stage, it judges the available status of the status of the memory parameter variables, continues to start or retrain, and finally continues to boot into the OS. After the OS is restarted, the aforementioned steps are repeated.

[0096] In addition, based on this solution, it can also be applied to other related problems of reading configurations in the SEC and PEI stages before the DXE stage, so as to solve logical defects with less time cost and economic cost. For example, it is used to solve the romsip problem about single and double CPUs in other processor platforms. When the BIOS is compiled, the default is that the romsip configuration of the dual-channel CPU needs to replace the corresponding romsip when switching to a single channel, but this switch needs to be processed in the SEC stage of startup. The current single-channel CPU configuration needs to be first started in accordance with the dual-channel to the DXE stage and the reserved single-channel CPU backup romsip is written to the top of the BIOS (the BIOS in this area can read the data in this area at the beginning). This not only wastes the boot time, but also uses the dual-channel romsip to run the single-channel CPU configuration to DXE. There is a certain unknown risk of booting. After applying the technical solution of this application, the space of the BIOS falsh is read and written in advance to judge that the current romsip and the single and double configuration of the CPU are different, which can solve this problem well. At the same time, many other problems can also be solved by this solution. The BIOS runs before the DXE stage to read the configuration information, and this SPI can be initialized at any time when needed, and released in time after use.

[0097] Correspondingly, the embodiment of the present application also discloses a variable configuration area reading device, which is applied to a basic input and output system, see Figure 6 As shown, the device comprises:

[0098] A code reconstruction module 11 is used to reconstruct the code of the basic input and output system to adjust the variable storage code of the basic input and output system to the target code; wherein the variable storage code is a variable configuration area for specifying a variable and a code for specifying that the variable is stored in the variable configuration area, and the target code is obtained by adding an empty variable in the variable configuration area;

[0099] The first stage execution module 12 is used to compile the code of the reconstructed basic input and output system, and when the basic input and output system is in the security verification stage of startup, initialize the preset serial peripheral interface, and read the empty variable through the preset serial peripheral interface to determine whether the basic input and output system has been refreshed for the corresponding version before startup and obtain the corresponding judgment result;

[0100] The second stage execution module 13 is used to execute the process of the extensible firmware interface early initialization stage of the basic input and output system startup according to the judgment result, and start to enter the operating system after executing the process of the extensible firmware interface early initialization stage.

[0101] Among them, for more specific working processes of the above-mentioned modules, please refer to the corresponding contents disclosed in the aforementioned embodiments, which will not be repeated here.

[0102] It can be seen that the above scheme of this embodiment is applied to a basic input and output system, including: reconstructing the code of the basic input and output system to adjust the variable storage code of the basic input and output system to a target code; wherein the variable storage code is a variable configuration area for specifying a variable and a code specifying that the variable is stored in the variable configuration area, and the target code is obtained by adding an empty variable in the variable configuration area; compiling the reconstructed code of the basic input and output system, and when the basic input and output system is in the security verification stage of startup, initializing a preset serial peripheral interface, and reading the empty variable through the preset serial peripheral interface to determine whether the basic input and output system has performed a reserved configuration refresh for a corresponding version before startup and obtain a corresponding judgment result; executing the process of the early initialization stage of the extensible firmware interface of the startup of the basic input and output system according to the judgment result, and booting into the operating system after executing the process of the early initialization stage of the extensible firmware interface.

[0103] The beneficial technical effect of the present application is: by embedding an empty variable when compiling the basic input and output system, the empty variable is read through the preset serial peripheral interface when the basic input and output system is started to the security verification stage, so as to determine whether the configuration refresh version is retained before this startup. Further, in the early initialization stage of the extensible firmware interface of the basic input and output system startup, it is selected to continue to start after re-training the memory or directly continue the startup process according to the judgment result; finally, it is booted into the operating system. In this way, it is possible to realize the read and write judgment of the space in the variable configuration area in advance, solve the problem that the variable configuration area cannot be read before the driver execution environment stage of startup, and thus solve the uncontrollable risks existing in the basic input and output system upgrade code of the domestic CPU platform. When facing the machine upgrade involving version retention configuration refresh, the machine can be kept running stably, and there will be no hidden dangers in DRAM electrical compatibility. The risk of downtime and unstable operation can be solved by software means, which has great economic value and avoids customer complaints.

[0104] In a specific implementation, the first stage execution module 12 further includes:

[0105] A version refresh module is used to perform version refresh on the compiled basic input / output system through a target refresh method; wherein the target refresh method performs version refresh in a configuration-preserving manner by using any one of a command line interpreter, an operating system, a setting interface of the basic input / output system, and a web page interface of a baseboard management controller.

[0106] In a specific implementation, the first stage execution module 12 includes:

[0107] The interface initialization module is used to initialize the registers and read and write functions of the preset serial peripheral interface between the flash memory of the basic input / output system and the central processing unit through memory mapping input / output using the temporary memory space of the secondary cache when the basic input / output system is in the security verification stage of startup.

[0108] An empty variable reading module, used to read the empty variable according to the global unique identifier of the variable in the variable configuration area through the preset serial peripheral interface, and determine whether the empty variable can be read;

[0109] A state judgment module is used for obtaining the address data of the empty variable if the empty variable can be read, and judging whether the first state bit of the empty variable is in an available state according to the address data; when the first state bit is in an available state, judging that the basic input-output system has performed a reserved configuration refresh for the corresponding version before startup; when the first state bit is in an unavailable state, judging that the basic input-output system has not performed a reserved configuration refresh for the corresponding version before startup.

[0110] In a specific implementation, the state determination module further includes:

[0111] A variable reading module, used for determining the memory input / output timing parameter variable to be deleted in the variable configuration area, and reading the memory input / output timing parameter variable through the preset serial peripheral interface;

[0112] a first variable deletion module, configured to set the second state position of the memory input / output timing parameter variable to an unavailable state, and then write the data corresponding to the memory input / output timing parameter variable in the unavailable state back to the flash memory of the basic input / output system to delete the memory input / output timing parameter variable;

[0113] a second variable deletion module, configured to set the first state bit corresponding to the empty variable from an available state to an unavailable state, and then write the data corresponding to the empty variable in the unavailable state back to the flash memory of the basic input and output system to delete the empty variable;

[0114] An interface closing module, used for closing the preset serial peripheral interface and releasing the occupied temporary memory space after the empty variable and the memory input / output timing parameter variable are deleted;

[0115] If the empty variable cannot be read, the step of closing the preset serial peripheral interface and releasing the occupied temporary memory space is directly triggered.

[0116] In a specific implementation, the second stage execution module 13 is specifically used to:

[0117] Determine whether the third state bit of the memory input / output timing parameter variable in the current variable configuration area can be read;

[0118] If the third status bit can be read, obtaining the status of the third status bit;

[0119] When the third status bit is in an available state, executing a process of an extensible firmware interface early initialization phase of startup of the basic input and output system based on the first value table;

[0120] When the third state bit is in an unavailable state, re-performing memory training, and storing new training result variables generated during the memory training process to obtain a second value table, and then executing the process of the early initialization phase of the extensible firmware interface started by the basic input and output system based on the second value table;

[0121] If the third status bit cannot be read, the step of re-performing memory training and storing new training result variables generated during the memory training process to obtain a second value table is triggered.

[0122] Furthermore, the present application also discloses an electronic device. Figure 7 This is a structural diagram of an electronic device 20 according to an exemplary embodiment, and the content in the diagram cannot be regarded as any limitation on the scope of use of the present application.

[0123] Figure 7 A schematic diagram of the structure of an electronic device 20 provided in an embodiment of the present application. The electronic device 20 may specifically include: at least one processor 21, at least one memory 22, a power supply 23, a communication interface 24, an input / output interface 25, and a communication bus 26. The memory 22 is used to store a computer program, which is loaded and executed by the processor 21 to implement the relevant steps in the variable configuration area reading method disclosed in any of the aforementioned embodiments. In addition, the electronic device 20 in this embodiment may specifically be a computer.

[0124] In this embodiment, the power supply 23 is used to provide working voltage for each hardware device on the electronic device 20; the communication interface 24 can create a data transmission channel between the electronic device 20 and the external device, and the communication protocol it follows is any communication protocol that can be applied to the technical solution of the present application, and is not specifically limited here; the input and output interface 25 is used to obtain external input data or output data to the outside world, and its specific interface type can be selected according to specific application needs and is not specifically limited here.

[0125] In addition, the memory 22 as a carrier for resource storage may be a read-only memory, a random access memory, a disk or an optical disk, etc. The resources stored thereon may include an operating system 221, a computer program 222 and data 223, etc. The data 223 may include various data. The storage method may be temporary storage or permanent storage.

[0126] The operating system 221 is used to manage and control the hardware devices and computer program 222 on the electronic device 20, and can be Windows Server, Netware, Unix, Linux, etc. In addition to including a computer program that can be used to complete the variable configuration area reading method performed by the electronic device 20 disclosed in any of the aforementioned embodiments, the computer program 222 can further include a computer program that can be used to complete other specific tasks.

[0127] Furthermore, the embodiment of the present application also discloses a computer-readable storage medium, wherein the computer-readable storage medium mentioned here includes a random access memory (Random Access Memory, RAM), a memory, a read-only memory (Read-Only Memory, ROM), an electrically programmable ROM, an electrically erasable programmable ROM, a register, a hard disk, a magnetic disk or an optical disk, or any other form of storage medium known in the technical field. Wherein, when the computer program is executed by the processor, the aforementioned variable configuration area reading method is implemented. For the specific steps of the method, reference can be made to the corresponding contents disclosed in the aforementioned embodiment, and no further description will be given here.

[0128] Furthermore, an embodiment of the present application also provides a computer program product, including a computer program / instruction, which, when executed by a processor, implements any one of the above-mentioned variable configuration area reading methods.

[0129] In this specification, each embodiment is described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the embodiments can be referred to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the method part.

[0130] The steps of the variable configuration area reading method or algorithm described in conjunction with the embodiments disclosed herein can be implemented directly using hardware, a software module executed by a processor, or a combination of the two. The software module can be placed in a random access memory (RAM), a memory, a read-only memory (ROM), an electrically programmable ROM, an electrically erasable programmable ROM, a register, a hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.

[0131] Finally, it should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the presence of other identical elements in the process, method, article or device including the elements.

[0132] The above is a detailed introduction to a variable configuration area reading method, device, equipment and medium provided by the present invention. Specific examples are used in this article to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea; at the same time, for general technical personnel in this field, according to the idea of ​​the present invention, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as a limitation on the present invention.

Claims

1. A method for reading a variable configuration area, characterized in that: Applicable to basic input and output systems, including: Reconstructing the code of the basic input and output system to adjust the variable storage code of the basic input and output system to the target code; wherein the variable storage code is a variable configuration area for specifying a variable and a code specifying that the variable is stored in the variable configuration area, and the target code is obtained by adding an empty variable in the variable configuration area; Compiling the reconstructed code of the basic input / output system, when the basic input / output system is in the startup security verification stage, initializing a preset serial peripheral interface, and reading the empty variable through the preset serial peripheral interface to determine whether the basic input / output system has been refreshed with a reserved configuration for a corresponding version before startup and obtaining a corresponding determination result; The process of the extensible firmware interface early initialization phase of the basic input and output system startup is executed according to the judgment result, and the operating system is started after the process of the extensible firmware interface early initialization phase is executed.

2. The variable configuration area reading method according to claim 1, characterized in that: After compiling the reconstructed basic input and output system code, the method further includes: The compiled basic input / output system is refreshed by a target refresh method; wherein the target refresh method is performed by using any one of a command line interpreter, an operating system, a setting interface of the basic input / output system, and a web page interface of a baseboard management controller to perform a version refresh in a configuration-preserving manner.

3. The variable configuration area reading method according to claim 1, characterized in that: When the basic input and output system is in the security verification stage of startup, initializing the preset serial peripheral interface includes: When the basic input / output system is in the security verification stage of startup, the temporary memory space of the secondary cache is used to initialize the registers and read / write functions of the preset serial peripheral interface between the flash memory of the basic input / output system and the central processing unit through memory mapping input / output.

4. The variable configuration area reading method according to claim 1, characterized in that: The reading of the empty variable through the preset serial peripheral interface to determine whether the basic input and output system has been refreshed with a reserved configuration for a corresponding version before startup and obtaining a corresponding determination result includes: Read the empty variable according to the globally unique identifier of the variable in the variable configuration area through the preset serial peripheral interface, and determine whether the empty variable can be read; If the empty variable can be read, the address data of the empty variable is obtained, and whether the first state bit of the empty variable is in an available state is determined according to the address data; When the first status bit is in an available state, it is determined that the basic input and output system has been refreshed with respect to a corresponding version of the reserved configuration before startup; When the first status bit is in an unavailable state, it is determined that the basic input / output system has not been refreshed with respect to a corresponding version of the reserved configuration before startup.

5. The variable configuration area reading method according to claim 4, characterized in that: The process of determining, when the first status bit is in the available state, whether the basic input / output system has been refreshed with respect to the corresponding version before startup, further includes: Determine the memory input / output timing parameter variable that needs to be deleted in the variable configuration area, and read the memory input / output timing parameter variable through the preset serial peripheral interface; Setting the second state position of the memory input / output timing parameter variable to an unavailable state, and then writing the data corresponding to the memory input / output timing parameter variable in the unavailable state back to the flash memory of the basic input / output system to delete the memory input / output timing parameter variable; The first state bit corresponding to the empty variable is set from an available state to an unavailable state, and then the data corresponding to the empty variable in the unavailable state is written back to the flash memory of the basic input and output system to delete the empty variable; When the empty variable and the memory input / output timing parameter variable are deleted, the preset serial peripheral interface is closed and the occupied temporary memory space is released; Correspondingly, when the first status bit is in an unavailable state, the process of determining that the basic input / output system has not performed a reserved configuration refresh for the corresponding version before startup also includes: Directly trigger the step of closing the preset serial peripheral interface and releasing the occupied temporary memory space.

6. The variable configuration area reading method according to claim 5, characterized in that: After determining whether the empty variable can be read, the method further includes: If the empty variable cannot be read, the step of closing the preset serial peripheral interface and releasing the occupied temporary memory space is directly triggered.

7. The variable configuration area reading method according to any one of claims 1 to 6, characterized in that: The process of executing the early initialization phase of the extensible firmware interface of the basic input and output system startup according to the judgment result includes: Determine whether the third state bit of the memory input / output timing parameter variable in the current variable configuration area can be read; If the third status bit can be read, obtaining the status of the third status bit; When the third status bit is in an available state, executing a process of an extensible firmware interface early initialization phase of startup of the basic input and output system based on the first value table; When the third state bit is in an unavailable state, re-performing memory training, and storing new training result variables generated during the memory training process to obtain a second value table, and then executing the process of the early initialization phase of the extensible firmware interface started by the basic input and output system based on the second value table; If the third status bit cannot be read, the step of re-performing memory training and storing new training result variables generated during the memory training process to obtain a second value table is triggered.

8. A variable configuration area reading device, characterized in that: Applicable to basic input and output systems, including: A code reconstruction module, used for reconstructing the code of the basic input and output system to adjust the variable storage code of the basic input and output system to the target code; wherein the variable storage code is a variable configuration area for specifying variables and a code for specifying that the variables are stored in the variable configuration area, and the target code is obtained by adding an empty variable in the variable configuration area; The first stage execution module is used to compile the code of the reconstructed basic input and output system, and when the basic input and output system is in the security verification stage of startup, initialize the preset serial peripheral interface, and read the empty variable through the preset serial peripheral interface to determine whether the basic input and output system has been refreshed for the corresponding version before startup and obtain the corresponding judgment result; The second stage execution module is used to execute the process of the extensible firmware interface early initialization stage started by the basic input and output system according to the judgment result, and start to enter the operating system after executing the process of the extensible firmware interface early initialization stage.

9. An electronic device, characterized in that: The electronic device comprises a processor and a memory; wherein the memory is used to store a computer program, and the computer program is loaded and executed by the processor to implement the variable configuration area reading method as described in any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that: Used to store computer programs; wherein when the computer program is executed by a processor, the variable configuration area reading method according to any one of claims 1 to 7 is implemented.

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