Control circuit and control method of power factor corrector and charging and discharging equipment

Abstract

The invention discloses a control circuit and control method of a power factor corrector and charging and discharging equipment, and relates to the technical field of charging and discharging equipment, and the control circuit of the power factor corrector comprises a temperature detection module which is used for detecting the temperature of the power factor corrector; the feedback detection module is used for acquiring feedback voltage of the power factor corrector; the signal processing module is used for outputting a first time sequence control signal when the detected temperature is greater than the preset temperature; the controller is also used for outputting a second time sequence control signal when the feedback voltage is greater than the preset feedback voltage, and otherwise, outputting a third time sequence control signal; and the switch control module is used for controlling the high-frequency switch device and the low-frequency switch device to work according to the first time sequence control signal, the second time sequence control signal or the third time sequence control signal. Based on the scheme of the invention, the local hot spots of the high-frequency switching device in the power factor corrector can be reduced, and the output time of the peak power of the charging and discharging equipment in the charging process and the user experience can be improved.

Description

Technical Field

[0001] The present application relates to the technical field of charging and discharging equipment, and in particular, to a control circuit and a control method of a power factor corrector and a charging and discharging equipment. Background Art

[0002] In the charging and discharging process of charging and discharging equipment, in order to suppress the distortion of the current waveform and improve the power factor, a power factor corrector (PFC) is often used. Traditional power factor correctors generally use a structure composed of a rectifier bridge and a boost circuit (BOOST). In order to reduce the conduction loss and heat of the diode in the boost circuit, switching devices are often used to replace the diode, and the heat is distributed to multiple switching devices of the power factor corrector, resulting in less heat loss and higher power factor.

[0003] The multiple switching devices of the power factor corrector include high-frequency switching devices and low-frequency switching devices. However, during operation, the power consumption and heat generated by the switching and conduction processes of the high-frequency switching devices are much greater than the power consumption and heat generated by the switching and conduction processes of the low-frequency switching devices. As a result, the power factor corrector is prone to generate local hot spots with obvious heat in the high-frequency switching devices, affecting the peak power output time and user experience of the charging and discharging equipment during the charging process.

[0004] Therefore, a new solution is urgently needed to solve the above problems. Summary of the invention

[0005] The present application provides a control circuit, a control method and a charging and discharging device for a power factor corrector, which reduces the local hot spots of the high-frequency switching devices in the power factor corrector by adjusting the operating frequencies of the high-frequency switching devices and the low-frequency switching devices in the power factor corrector, thereby improving the peak power output time and user experience of the charging and discharging device during the charging process.

[0006] In order to achieve the above objectives, this application adopts the following technical solutions:

[0007] In a first aspect, a control circuit of a power factor corrector is provided, wherein the power factor corrector comprises a high-frequency switching device and a low-frequency switching device, and the control circuit of the power factor corrector comprises a temperature detection module, a signal processing module, a feedback detection module and a switch control module; the signal processing module is respectively connected to the temperature detection module, the feedback detection module and the switch control module; the temperature detection module is configured to obtain a detection temperature of the power factor corrector; the feedback detection module is configured to obtain a feedback voltage of the power factor corrector; the signal processing module is configured to output a first timing control signal when the detection temperature is greater than a preset temperature; and is also configured to When the feedback voltage is greater than the preset feedback voltage, a second timing control signal is output; when the feedback voltage is not greater than the preset feedback voltage, a third timing control signal is output; the switch control module is configured to control the operation of the high-frequency switching device and the low-frequency switching device according to the first timing control signal, the second timing control signal or the third timing control signal; the operating frequency of the high-frequency switching device controlled by the first timing control signal is less than or equal to the operating frequency of the high-frequency switching device controlled by the second timing control signal, and the operating frequency of the high-frequency switching device controlled by the second timing control signal is less than the operating frequency of the high-frequency switching device controlled by the third timing control signal.

[0008] In an embodiment of the present application, the temperature of the power factor corrector is detected, and when the detected temperature is greater than the preset detected temperature, the power factor corrector is controlled to work by a first timing control signal. The feedback voltage of the power factor corrector is detected, and when the feedback voltage is greater than the preset feedback voltage, the power factor corrector is controlled to work by a second timing control signal, and vice versa, the power factor corrector is controlled to work by a third timing control signal. Among them, the operating frequency of the high-frequency switching device controlled by the first timing control signal is less than or equal to the operating frequency of the high-frequency switching device controlled by the second timing control signal, and the operating frequency of the high-frequency switching device controlled by the second timing control signal is less than the operating frequency of the high-frequency switching device controlled by the third timing control signal, thereby reducing the local hot spots of the high-frequency switching device in the power factor corrector, making the heat generation more balanced, the device layout easier, the thermal design of the switching power supply simpler, the product size smaller, and the power density higher, effectively improving the peak power output time and user experience of the charging and discharging equipment during the charging process.

[0009] Optionally, the operating frequency of the high-frequency switch device controlled by the first timing control signal is the same as the operating frequency of the high-frequency switch device controlled by the second timing control signal.

[0010] In this implementation, the operating frequency of the high-frequency switching device controlled by the first timing control signal can be made the same as the operating frequency of the high-frequency switching device controlled by the second timing control signal, so that under the two timing control signals, the operating states of the switching devices in the power factor corrector are the same, the heat dissipation effect is the same, and it is easier to control.

[0011] In combination with the first aspect, the signal processing module includes a temperature comparator and a first controller; the temperature comparator is electrically connected to the temperature detection module, and is configured to compare the detected temperature with the preset temperature, and when the detected temperature is greater than the preset temperature, output a first high level; when the detected temperature is not greater than the preset temperature, output a first low level; the first controller is electrically connected to the temperature comparator, and is configured to output the first timing control signal according to the first high level.

[0012] In this implementation, the detected temperature and the preset temperature are compared by a temperature comparator. When the detected temperature is greater than the preset temperature, the first controller outputs a first timing control signal to control the working state of the switching device in the power factor corrector.

[0013] Optionally, when the detected temperature is not greater than a preset temperature, the first controller may output a first detection signal so that the feedback detection module detects the feedback voltage of the power factor corrector to determine the load condition of the power factor corrector.

[0014] Optionally, the first controller comprises an OR gate.

[0015] In this implementation, the first controller can be set as an OR gate, and as long as the temperature comparator outputs a first high level, the power factor corrector is controlled to operate with a first timing control signal. When the temperature comparator outputs a first low level, the operating state of the power factor corrector is determined according to the detection result of the feedback detection module.

[0016] In combination with the first aspect, the feedback detection module includes an input voltage detection unit and a feedback voltage detection unit; the input voltage detection unit is electrically connected to the signal processing module and is configured to obtain the input voltage of the power factor corrector; the feedback voltage detection unit is electrically connected to the signal processing module and is configured to obtain the feedback voltage of the power factor corrector.

[0017] In this implementation, the input voltage of the power factor corrector is detected by the input voltage detection unit, and the feedback voltage of the power factor corrector is determined by the feedback voltage detection unit for use by the signal processing module.

[0018] In combination with the first aspect, in some implementations of the first aspect, the signal processing module also includes an input voltage comparator, a feedback voltage comparator, a D flip-flop and a second controller; the input voltage comparator is electrically connected to the input voltage detection unit and is configured to output a second high level when the input voltage is greater than a preset input voltage; and output a second low level when the input voltage is not greater than the preset input voltage; the D flip-flop is electrically connected to the input voltage comparator and is configured to output an enable signal when the second low level is converted to the second high level; the feedback voltage comparator is electrically connected to the feedback voltage detection unit and is configured to output a third high level when the feedback voltage is greater than a preset feedback voltage; and output a third low level when the feedback voltage is not greater than the preset feedback voltage; the third high level is a feedback signal; the second controller is electrically connected to the D flip-flop and the feedback voltage comparator, respectively, and is configured to output the second timing control signal according to the enable signal and the feedback signal, and vice versa, output the third timing control signal.

[0019] In this implementation, the input voltage is determined by an input voltage comparator. When the input voltage is greater than the preset input voltage, the second high level is output; otherwise, the second low level is output. When the second low level is converted to the second high level, an enable signal is output by a D flip-flop. The feedback voltage is determined by a feedback voltage comparator. When the feedback voltage is greater than the preset feedback voltage, a third high level is output, which is the feedback signal. When the feedback voltage is not greater than the preset feedback voltage, a third low level is output, thereby outputting a second timing control signal according to the enable signal and the feedback signal. Otherwise, a third timing control signal is output to control the working state of the switch device in the power factor corrector.

[0020] Optionally, the second controller comprises an AND gate.

[0021] In this implementation, the second controller can be set as an AND gate, and the second timing control signal is output only when the enable signal and the feedback signal exist at the same time, otherwise the third timing control signal is output, so that the power factor corrector works according to the second timing control signal or the third timing control signal.

[0022] In combination with the first aspect, in certain implementations of the first aspect, the signal processing module also includes a digital filter; the digital filter is electrically connected to the input voltage comparator and the D trigger, respectively, and is configured to filter the second high level and the second low level.

[0023] In this implementation, the digital filter performs filtering processing on the second high level and the second low level, thereby obtaining a stable level signal.

[0024] In combination with the first aspect, in certain implementations of the first aspect, the control circuit of the power factor corrector also includes a zero-crossing detection unit; the zero-crossing detection unit is electrically connected to the signal processing module, and is configured to obtain the input voltage of the power factor corrector, and when the input voltage passes through zero, switch the second high level to the second low level.

[0025] In this implementation, when the input voltage passes through a zero point, the zero-crossing detection unit switches the second high level to the second low level, thereby reducing the current spike caused by the zero-crossing switching of the AC voltage.

[0026] In a second aspect, a control method for a power factor corrector is provided, which is applied to a control circuit of the power factor corrector, wherein the power factor corrector includes a high-frequency switching device and a low-frequency switching device; the control method for the power factor corrector includes: obtaining a detection temperature of the power factor corrector; when the detection temperature is greater than a preset temperature, outputting a first timing control signal; obtaining a feedback voltage of the power factor corrector; when the feedback voltage is greater than a preset feedback voltage, outputting a second timing control signal, and when the feedback voltage is not greater than the preset feedback voltage, outputting a third timing control signal; wherein the operating frequency of the high-frequency switching device controlled by the first timing control signal is less than or equal to the operating frequency of the high-frequency switching device controlled by the second timing control signal, and the operating frequency of the high-frequency switching device controlled by the second timing control signal is less than the operating frequency of the high-frequency switching device controlled by the third timing control signal.

[0027] In an embodiment of the present application, the detection temperature of the power factor corrector is first obtained. When the detection temperature is greater than the preset temperature, a first timing control signal is output to control the working state of the switching device in the power factor corrector; then the feedback voltage of the power factor corrector is obtained. When the feedback voltage is greater than the preset feedback voltage, a second timing control signal is output. When the feedback voltage is not greater than the preset feedback voltage, a third timing control signal is output, thereby controlling the working state of the power factor corrector in different scenarios, reducing the local hot spots of the high-frequency switching devices in the power factor corrector, and improving the peak power output time and user experience of the charging and discharging equipment during the charging process.

[0028] Optionally, the operating frequency of the high-frequency switch device controlled by the first timing control signal is the same as the operating frequency of the high-frequency switch device controlled by the second timing control signal.

[0029] In this implementation, the operating frequency of the high-frequency switching device controlled by the first timing control signal can be made the same as the operating frequency of the high-frequency switching device controlled by the second timing control signal, so that under the two timing control signals, the operating states of the switching devices in the power factor corrector are the same, the heat dissipation effect is the same, and it is easier to control.

[0030] In combination with the second aspect, in certain implementations of the second aspect, it also includes: obtaining the input voltage of the power factor corrector; when the feedback voltage is greater than the preset feedback voltage, outputting a second timing control signal, including: when the input voltage is greater than the preset input voltage, outputting a second high level; when the input voltage is not greater than the preset input voltage, outputting a second low level; when the second low level is converted to the second high level, outputting an enable signal; when the feedback voltage is greater than the preset feedback voltage, outputting a third high level; the third high level is a feedback signal; and outputting the second timing control signal according to the enable signal and the feedback signal.

[0031] In this implementation, based on the enable signal generated when the second low level is converted to the second high level, and the feedback signal generated when the feedback voltage is greater than the preset feedback voltage, a second timing control signal can be output to control the working state of the power factor corrector, reduce local hot spots of the high-frequency switching devices in the power factor corrector, and improve the peak power output time and user experience of the charging and discharging equipment during the charging process.

[0032] In combination with the second aspect, in certain implementations of the second aspect, it also includes: obtaining the input voltage of the power factor corrector; when the feedback voltage is greater than the preset feedback voltage, outputting a second timing control signal, including: when the input voltage is greater than the preset input voltage, outputting a second high level; when the input voltage is not greater than the preset input voltage, outputting a second low level; counting the second high level and the second low level, and when the number of the second high level and the second low level is an even number, outputting an enable signal; when the feedback voltage is greater than the preset feedback voltage, outputting a third high level; the third high level is a feedback signal; and outputting the second timing control signal according to the enable signal and the feedback signal.

[0033] In this implementation, based on the enable signal generated when the number of the second high level and the second low level is an even number, and the feedback signal generated when the feedback voltage is greater than the preset feedback voltage, a second timing control signal can be output, and vice versa, a third timing control signal is output to control the working state of the power factor corrector, reduce local hot spots of high-frequency switching devices in the power factor corrector, and improve the peak power output time and user experience of the charging and discharging equipment during the charging process.

[0034] In combination with the second aspect, in some implementations of the second aspect, when the second low level is converted to the second high level, before outputting the enable signal, the method further includes: filtering the second high level and the second low level.

[0035] In this implementation, the second high level and the second low level are filtered to obtain a stable level signal.

[0036] In combination with the second aspect, in some implementations of the second aspect, the control method of the power factor corrector further includes: when the input voltage passes through a zero point, switching the second high level to the second low level.

[0037] In this implementation, when the input voltage passes through a zero point, the second high level is switched to a second low level, thereby reducing a current spike caused by the AC voltage switching through zero.

[0038] In combination with the second aspect, in some implementations of the second aspect, the high-frequency switching device includes a first switching device and a second switching device, and the low-frequency switching device includes a third switching device and a fourth switching device; the first timing control signal includes: when the input voltage waveform is in a first cycle, the first switching device and the second switching device are both in a high-frequency switching state, the third switching device and the fourth switching device are both in a low-frequency switching state, and the duty cycle of the driving waveform of the first switching device is complementary to the duty cycle of the driving waveform of the second switching device, and the duty cycle of the driving waveform of the third switching device is complementary to the duty cycle of the driving waveform of the fourth switching device; when the input voltage waveform is in a second cycle, the first switching device and the second switching device are both in a low-frequency switching state, the third switching device and the fourth switching device are both in a high-frequency switching state, and the duty cycle of the driving waveform of the first switching device is complementary to the duty cycle of the driving waveform of the second switching device, and the duty cycle of the driving waveform of the third switching device is complementary to the duty cycle of the driving waveform of the fourth switching device.

[0039] In this implementation, in the process of controlling the operation of the power factor corrector by the first timing control signal, when the input voltage waveform is in the first cycle, the first switch device and the second switch device are both in the high-frequency switching state, and the third switch device and the fourth switch device are both in the low-frequency switching state; when the input voltage waveform is in the second cycle, the first switch device and the second switch device are both in the low-frequency switching state, and the third switch device and the fourth switch device are both in the high-frequency switching state, so that the first switch device and the second switch device and the third switch device and the fourth switch device alternately perform high-frequency operation, thereby reducing the local hot spots of the high-frequency switching devices in the power factor corrector and improving the peak power output time and user experience of the charging and discharging equipment during the charging process.

[0040] In combination with the second aspect, in some implementations of the second aspect, the high-frequency switching device includes a first switching device and a second switching device, and the low-frequency switching device includes a third switching device and a fourth switching device; the second timing control signal includes: when the input voltage waveform is in a first cycle, the first switching device and the second switching device are both in a high-frequency switching state, the third switching device and the fourth switching device are both in a low-frequency switching state, and the duty cycle of the driving waveform of the first switching device is complementary to the duty cycle of the driving waveform of the second switching device, and the duty cycle of the driving waveform of the third switching device is complementary to the duty cycle of the driving waveform of the fourth switching device; when the input voltage waveform is in a second cycle, the first switching device and the second switching device are both in a low-frequency switching state, the third switching device and the fourth switching device are both in a high-frequency switching state, and the duty cycle of the driving waveform of the first switching device is complementary to the duty cycle of the driving waveform of the second switching device, and the duty cycle of the driving waveform of the third switching device is complementary to the duty cycle of the driving waveform of the fourth switching device.

[0041] In this implementation, in the process of controlling the operation of the power factor corrector by the second timing control signal, when the input voltage waveform is in the first cycle, the first switch device and the second switch device are both in the high-frequency switching state, and the third switch device and the fourth switch device are both in the low-frequency switching state; when the input voltage waveform is in the second cycle, the first switch device and the second switch device are both in the low-frequency switching state, and the third switch device and the fourth switch device are both in the high-frequency switching state, so that the first switch device and the second switch device and the third switch device and the fourth switch device alternately perform high-frequency operation, thereby reducing the local hot spots of the high-frequency switching devices in the power factor corrector and improving the peak power output time and user experience of the charging and discharging equipment during the charging process.

[0042] In combination with the second aspect, in some implementations of the second aspect, the high-frequency switching device includes a first switching device and a second switching device, and the low-frequency switching device includes a third switching device and a fourth switching device; the third timing control signal includes: when the input voltage waveform is in a first cycle, the first switching device and the second switching device are both in a high-frequency switching state, the third switching device and the fourth switching device are both in a low-frequency switching state, and the duty cycle of the driving waveform of the first switching device is complementary to the duty cycle of the driving waveform of the second switching device, and the duty cycle of the driving waveform of the third switching device is complementary to the duty cycle of the driving waveform of the fourth switching device; when the input voltage waveform is in a second cycle, the first switching device and the second switching device are both in a high-frequency switching state, the third switching device and the fourth switching device are both in a low-frequency switching state, and the duty cycle of the driving waveform of the first switching device is complementary to the duty cycle of the driving waveform of the second switching device, and the duty cycle of the driving waveform of the third switching device is complementary to the duty cycle of the driving waveform of the fourth switching device.

[0043] In an embodiment of the present application, in the process of controlling the working of the power factor corrector by the third timing control signal, when the input voltage waveform is in the first cycle, the first switch device and the second switch device are both in the high-frequency switching state, and the third switch device and the fourth switch device are both in the low-frequency switching state; when the input voltage waveform is in the second cycle, the first switch device and the second switch device are both in the high-frequency switching state, and the third switch device and the fourth switch device are both in the low-frequency switching state, so that the first switch device and the second switch device are always in the high-frequency working state, and the third switch device and the fourth switch device are always in the low-frequency working state. When the power factor corrector is in a working scenario with a low ambient temperature and a small load, the power factor corrector generates less heat, so the third timing control signal can be used to control the working process of the power factor corrector to maintain the peak power output time and user experience of the charging and discharging equipment during the charging process.

[0044] In a third aspect, a charging and discharging device is provided, comprising the control circuit of the power factor corrector and the power factor corrector, wherein the power factor corrector comprises a high-frequency switching device and a low-frequency switching device; the high-frequency switching device and the low-frequency switching device are both connected to the control circuit of the power factor corrector;

[0045] The high frequency switch device is configured to be turned on or off under the control of the control circuit of the power factor corrector;

[0046] The low-frequency switching device is configured to be turned on or off under the control of the control circuit of the power factor corrector.

[0047] In a fourth aspect, a charging and discharging device is provided, comprising: one or more processors, and a memory; the memory is coupled to the one or more processors, the memory is used to store computer program code, the computer program code comprises computer instructions, and the one or more processors call the computer instructions to enable the charging and discharging device to execute the described method.

[0048] In a fifth aspect, a chip system is provided. The chip system is applied to a charging and discharging device. The chip system includes one or more processors. The one or more processors are used to call computer instructions so that the charging and discharging device executes the described method.

[0049] In a sixth aspect, a computer-readable storage medium is provided, wherein the computer-readable storage medium includes instructions, and when the instructions are executed on a charging and discharging device, the charging and discharging device executes the described method. BRIEF DESCRIPTION OF THE DRAWINGS

[0050] Figure 1 A schematic diagram of a charging system applicable to an embodiment of the present application;

[0051] Figure 2 A schematic diagram of the structure of a charging and discharging device provided in an embodiment of the present application;

[0052] Figure 3 A circuit diagram of a totem pole bridgeless PFC provided by an embodiment of the present application;

[0053] Figure 4 A driving waveform diagram of a totem pole bridgeless PFC provided in an embodiment of the present application;

[0054] Figure 5 A schematic diagram of the structure of a control circuit of a power factor corrector provided in an embodiment of the present application;

[0055] Figure 6 A circuit diagram of a signal processing module provided in an embodiment of the present application;

[0056] Figure 7 A circuit diagram of a feedback detection module provided in an embodiment of the present application;

[0057] Figure 8 A circuit diagram of a signal processing module provided in yet another embodiment of the present application;

[0058] Fig. 9 A circuit diagram of a signal processing module provided in yet another embodiment of the present application;

[0059] Fig.10 A circuit diagram of a signal processing module provided in yet another embodiment of the present application;

[0060] Fig.11 A circuit diagram of a signal processing module provided in yet another embodiment of the present application;

[0061] Fig.12 This is a working timing diagram of a control circuit of a power factor corrector provided in an embodiment of the present application;

[0062] Fig.13 A flow chart of a control method of a power factor corrector provided in an embodiment of the present application;

[0063] Fig.14 A flowchart of a control method for a power factor corrector provided in another embodiment of the present application;

[0064] Fig.15 A flowchart of a control method for a power factor corrector provided in another embodiment of the present application;

[0065] Fig.16 A flowchart of a control method for a power factor corrector provided in another embodiment of the present application;

[0066] Fig.17 A diagram of a totem pole bridgeless PFC energy storage path and a freewheeling path provided in an embodiment of the present application;

[0067] Fig.18 A diagram of a totem pole bridgeless PFC energy storage path and a freewheeling path provided by another embodiment of the present application;

[0068] Fig.19 A diagram of a totem pole bridgeless PFC energy storage path and a freewheeling path provided by another embodiment of the present application;

[0069] Fig. 20 A diagram of a totem pole bridgeless PFC energy storage path and a freewheeling path provided by another embodiment of the present application;

[0070] Fig.21 A schematic diagram of the structure of a charging and discharging device provided in an embodiment of the present application;

[0071] Fig. 22 The present application provides a schematic structural diagram of a charging and discharging device. DETAILED DESCRIPTION

[0072] The technical solutions in the embodiments of the present application will be described clearly and in detail below in conjunction with the accompanying drawings. In the description of the embodiments of the present application, unless otherwise specified, " / " means or, for example, A / B can mean A or B; "and / or" in the text is only a description of the association relationship of the associated objects, indicating that there can be three relationships, for example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone.

[0073] The terms "first", "second", etc. are used for descriptive purposes only and should not be understood to imply or suggest relative importance or implicitly indicate the number of technical features indicated. Thus, features defined as "first" or "second" may explicitly or implicitly include one or more of the features, and in the description of the embodiments of the present application, unless otherwise specified, "plurality" means two or more.

[0074] In order to facilitate the understanding of the embodiments of the present application, the relevant concepts involved in the embodiments of the present application are first briefly described.

[0075] 1. Power factor corrector (PFC)

[0076] In the field of circuits, power factor refers to the relationship between effective power and total power consumption (apparent power), that is, the ratio of effective power to total power consumption (apparent power). Generally speaking, power factor can measure the degree to which electricity is effectively used. The larger the value of power factor, the higher the power utilization rate. For example, as a capacitor input circuit, the phase difference between the current and voltage of a computer switching power supply will cause the loss of exchange power. At this time, a PFC circuit is needed to improve the power factor.

[0077] 2. Switching Mode Power Supply

[0078] In the field of circuits, a switching power supply, also known as an exchange power supply or a switching converter, is a high-frequency power conversion device. The function of a switching power supply is to convert a standard voltage into the voltage or current required by the user through different forms of architecture. For example, a switching power supply can maintain a stable output voltage by controlling the time ratio of the switch device on and off. It is generally composed of a pulse width modulation (PWM) control integrated circuit (IC) and a metal oxide semiconductor field effect transistor (MOSFET).

[0079] 3. Rectifier bridge

[0080] In the circuit field, a rectifier bridge refers to packaging multiple rectifier tubes together in the form of a bridge full-wave rectifier circuit, which is generally divided into full-bridge and half-bridge. A full-bridge refers to packaging four diodes of a connected bridge rectifier circuit together. A half-bridge refers to packaging half of a four-diode bridge rectifier together. Two half-bridges can form a bridge rectifier circuit, and a half-bridge can also form a full-wave rectifier circuit with a center tap of the transformer. The function of a rectifier bridge is to convert alternating current into direct current, and to convert alternating current into direct current through the unidirectional conduction principle of the diode to achieve rectification.

[0081] 4. Totem Pole

[0082] In the field of circuits, a totem pole refers to two transistors connected up and down, the upper tube is an NPN transistor, and the lower tube is a PNP transistor. The collector of the NPN transistor is connected to the positive power supply, and the collector of the PNP transistor is grounded. The bases of the two transistors are connected together and connected to the input terminal, and the emitters of the two transistors are connected together and connected to the output terminal, thus forming a circuit structure similar to a "totem pole". When working, the bases of the two transistors are driven by the same signal. When the drive signal is high, the NPN transistor is turned on; when the drive signal is low, the PNP transistor is turned on, thereby using two transistors to form a push-pull output, which is used to match the voltage or improve the driving capability of the IO port.

[0083] 5. Switching loss

[0084] In the circuit field, switching loss includes turn-on loss and turn-off loss. Turn-on loss refers to the fact that when a non-ideal switch device is turned on, the voltage of the switch device does not drop to zero immediately, but has a fall time. At the same time, its current does not rise to the load current immediately, but also has a rise time. During this period of time, there is an overlap between the current and voltage of the switch device, which will cause loss. This loss is the turn-on loss. For example, in a switching power supply, when a large MOS tube is switched on and off, the parasitic capacitance needs to be charged and discharged, which will also cause loss. By analogy, we can deduce the cause of the turn-off loss, which will not be elaborated here.

[0085] 6. Conduction loss

[0086] In the circuit field, conduction loss refers to the loss generated when the current in the circuit passes through the electronic device in the on state, which is usually caused by the resistance of the electronic device and the thermal effect when it is turned on.

[0087] 7. High frequency band (HB), low frequency band (LB) and power frequency

[0088] In the field of circuits, high frequency refers to the switching frequency of the switching devices in the switching power supply, which is usually measured in KHz and can be tens of KHz or hundreds of KHz. For example, the frequency range is above 6500HZ. Low frequency refers to the frequency range of 50HZ to 300HZ, and the power frequency refers to the operating frequency of the AC power grid, which is usually 47Hz to 63Hz.

[0089] The above is a brief introduction to the nouns involved in the embodiments of the present application, which will not be repeated below.

[0090] Figure 1 The present invention is a schematic diagram of a charging system applicable to an embodiment of the present application.

[0091] like Figure 1 As shown, the user can use the charging and discharging device 200 to charge and discharge the terminal device 100. The embodiment of the present application does not specifically limit the type of the terminal device 100. In some embodiments, the terminal device 100 can be a mobile phone, a wearable device (such as a smart bracelet, a smart watch, a headset, etc.), a tablet computer, a laptop computer (laptop), a handheld computer, a notebook computer, an ultra-mobile personal computer (ultra-mobile personal computer, UMPC), a cellular phone, a personal digital assistant (personal digital assistant, PDA), an augmented reality (Augmented reality, AR)\virtual reality (virtual reality, VR) device and other IOT (internet of things, Internet of Things) devices, and can also be a TV, a large screen, a printer, a projector, an electric car, an aerial camera, a drone and other devices. The embodiment of the present application does not specifically limit the type of the charging and discharging device 200. In some embodiments, the charging and discharging device 200 can be a power adapter, a charging pile and other devices. For ease of understanding, the following embodiments are exemplified by taking the terminal device 100 as a mobile phone and the charging and discharging device 200 as a power adapter as an example.

[0092] Figure 2 This is a schematic diagram of the structure of a charging and discharging device provided in an embodiment of the present application.

[0093] like Figure 2As shown, the charging and discharging device 200 may include a rectifier module 10, a transformer module 20, a filter module 30, etc. The transformer module 20 may be connected to the rectifier module 10 and the filter module 30, respectively. The rectifier module 10 may include a rectifier circuit 11 and a totem pole bridgeless PFC 12, the totem pole bridgeless PFC 12 may be electrically connected to the rectifier circuit 11 and the transformer module 20, respectively, the transformer module 20 may also be electrically connected to the filter module 30, and these devices may also be coupled through various interconnection buses or other electrical connection methods. In addition, the positions of the rectifier module 10 and the transformer module 20 in the charging and discharging device 200 may be swapped, for example, the rectifier module 10 may be set between the transformer module 20 and the filter module 30.

[0094] The rectifier module 10 is a circuit that can perform voltage conversion or frequency conversion on the power supply voltage or signal waveform, thereby processing the AC signal into a DC signal. The rectifier module 10 can separate and convert the positive and negative half cycles of the current or voltage to meet the needs of the DC power supply or signal. Exemplarily, the rectifier module 10 can realize voltage conversion or frequency conversion through a variety of circuits such as half-wave rectification, full-wave rectification, and bridge rectification. For example, the commonly used rectifier module 10 may include a diode rectifier module, a triode switch rectifier module, a MOS tube switch rectifier module, etc. Among them, the diode rectifier module is the simplest and most common rectifier circuit, with a diode as the main component, and the positive half-cycle signal is conducted through the unidirectional conductive characteristics, and the negative half-cycle signal is cut off, thereby realizing the half-wave rectification of the voltage. The triode switch rectifier module and the MOS tube switch rectifier module use a switch conversion method to process the AC voltage, thereby achieving a higher frequency and a wider range of application scenarios.

[0095] The transformer module 20 can be a power transformer with a switching device added. In addition to the voltage conversion function of an ordinary transformer, it also has insulation isolation and power transmission functions. It is generally used in occasions involving high-frequency circuits such as switching power supplies. For example, the switching power supply transformer and the switching device can constitute a self-excited (or externally excited) intermittent oscillator, thereby modulating the input DC voltage into a high-frequency pulse voltage, which plays a role in energy transfer and conversion. In a flyback circuit, when the switching device is turned on, the transformer converts electrical energy into magnetic field energy and stores it; when the switching device is turned off, it is released. In a forward circuit, when the switching device is turned on, the input voltage is directly supplied to the load and the energy is stored in the energy storage inductor; when the switching device is turned off, the energy storage inductor is used to continue the flow and transfer it to the load, thereby converting the input DC voltage into various required low voltages.

[0096] The filter module 30 refers to a circuit that only allows signal components within a certain frequency range to pass normally, while preventing components within another frequency range from passing. The filter module 30 is often used to reduce the AC component in the pulsating DC voltage, reduce the output voltage ripple factor, and make the waveform relatively smooth. The filter module 30 is generally composed of reactance components, such as capacitors connected in parallel at both ends of the load resistor, or inductors connected in series with the load, and various compound filter circuits composed of capacitors and inductors. Exemplarily, the filter module 30 can include two major categories: passive filter circuits and active filter circuits. When the filter module 30 is composed only of passive components (such as resistors, capacitors, inductors, etc.), it is called a passive filter circuit. The main forms of passive filter circuits include capacitor filtering, inductor filtering, and compound filtering. Compound filtering can include inverted L-type, LC filtering, LCπ-type filtering, and RCπ-type filtering. If the filter module 30 is composed not only of passive components but also of active components (such as bipolar tubes, unipolar tubes, integrated operational amplifiers, etc.), it is called an active filter circuit. The main form of active filtering circuit is active RC filtering, also known as electronic filter.

[0097] Exemplarily, the rectifier module 10 may include a rectifier circuit 11 and a totem pole bridgeless PFC 12, wherein the rectifier circuit 11 is used to rectify the power supply voltage or current, and perform voltage conversion or frequency conversion on the power supply voltage or signal waveform, thereby processing the AC signal into a DC signal. Exemplarily, the rectifier circuit 11 may use a rectifier bridge composed of four diodes. The totem pole bridgeless PFC 12 is used to suppress the distortion of the current waveform during the charging and discharging process, improve the power factor, and improve the power utilization rate. For example, the totem pole bridgeless PFC 12 may use a totem pole bridgeless PFC composed of four MOS tubes, two of which are high-frequency MOS tubes, and the other two are low-frequency MOS tubes.

[0098] It should be noted that mobile terminal manufacturers often use a charging solution of boost + flyback converter in switching power supplies with an input power of more than 75W. The boost PFC structure has the advantages of low cost, low noise, and high reliability. Traditional boost PFC can generally include a rectifier bridge and a boost circuit, but the rectifier bridge and the boost circuit will not only produce large losses when the system is working, but also cause local hot spots, resulting in a high temperature rise of the whole machine. Therefore, in order to reduce the conduction loss and heat of the bridge diode in the boost circuit and improve the system efficiency, developers often use ordinary SiMOS tubes to replace diodes to form a new bridge PFC circuit, which then evolves into a bridgeless PFC circuit. In the bridgeless PFC circuit, the totem pole PFC circuit has the least devices, including only four semiconductor power devices, with lower losses and higher power factor, and can achieve a high-efficiency, high-power density charging solution. Compared with the traditional boost PFC circuit, the totem pole PFC circuit distributes heat to four switching devices, thereby greatly alleviating the heat dissipation of the whole machine.

[0099] It should be understood that the above is only an example of the structure of the charging and discharging device 200. The charging and discharging device 200 may also include other subsystems or devices, which can be configured and modified as needed. The embodiment of the present application does not impose any limitation on this.

[0100] At present, during the operation of the totem pole bridgeless PFC12, the power consumption of the two high-frequency switching devices is much greater than that of the two low-frequency switching devices, which makes it easy for the two high-frequency switching devices to generate local hot spots, affecting the peak power output time and user experience of the charging and discharging equipment during the charging process.

[0101] In view of this, an embodiment of the present application provides a control circuit of a power factor corrector. When local hot spots are obvious, the operating frequency of the high-frequency switching device can be reduced and the operating frequency of the low-frequency switching device can be increased, thereby reducing the local hot spots of the high-frequency switching device, making the heating of the switching devices in the power factor corrector more balanced, and improving the peak power output time and user experience of the charging and discharging equipment during the charging process.

[0102] Combine the following Figure 3 to Figure 4 First, we will introduce in detail the problem that the two high-frequency switching devices of the traditional totem pole bridgeless PFC are prone to generate local hot spots during operation.

[0103] Figure 3 A circuit diagram of a totem pole bridgeless PFC provided in an embodiment of the present application.

[0104] like Figure 3As shown, in one embodiment provided in the present application, the totem pole bridgeless PFC 12 includes a first bridge arm unit 121, a second bridge arm unit 122, an energy storage inductor L, an energy storage capacitor C and a load R, the first bridge arm unit 121 includes a first switch device S1 and a second switch device S2, both of which can be used as high-frequency switch devices, and the second bridge arm unit 122 includes a third switch device S3 and a fourth switch device S4, both of which can be used as low-frequency switch devices. The source of the first switch device S1 and the drain of the second switch device S2 are both connected to the negative electrode of the input voltage Vac, the source of the third switch device S3 and the drain of the fourth switch device S4 are both connected to the positive electrode of the input voltage Vac through the energy storage inductor L, the drain of the first switch device S1 and the drain of the third switch device S3, and one end of the energy storage capacitor C are all electrically connected to one end of the load R, and the source of the second switch device S2 and the source of the fourth switch device S4, the other end of the energy storage capacitor C and the other end of the load R are all grounded.

[0105] Exemplarily, the first switch device S1, the second switch device S2, the third switch device S3 and the fourth switch device S4 can adopt Si MOSFET, SiC MOSFET, GaN MOSFET, Cool MOS and insulated gate bipolar transistor (IGBT) commonly used in the industry.

[0106] In the embodiment of the present application, the controller controls the first switching device S1 and the second switching device S2 to maintain high-frequency switching operation, and the third switching device S3 and the fourth switching device S4 to maintain low-frequency switching operation, so that the power factor corrector can suppress the distortion of the current waveform and improve the power factor in the switching power supply.

[0107] Figure 4 A driving waveform diagram of a totem pole bridgeless PFC provided in an embodiment of the present application.

[0108] like Figure 4 As shown, in one embodiment provided in the present application, the first switch device S1 and the second switch device S2 always work alternately at a high-frequency switching frequency, and the third switch device S3 and the fourth switch device S4 work alternately at an industrial frequency switching frequency. By way of example, taking a switch device with an effective current of 1.2A, an internal resistance of 200mΩ, and a duty cycle of D=50% as an example, when the switch device works at a high-frequency switching frequency of 100KHz, it is estimated that the switching loss is about 1W*2 and the conduction loss is about 0.288W*2; when the switch device works at a low-frequency switching frequency of 50Hz, it is estimated that the switching loss is about 0 and the conduction loss is about 0.288W*2. It can be seen from this that the high-frequency switching loss of the switch device is much greater than the low-frequency switching loss, and the local hot spots of the switch device working at a high-frequency switching frequency are obvious.

[0109] For example, Table 1 is a summary table of losses of a traditional totem pole bridgeless PFC. As shown in Table 1, a represents high-frequency switching loss, b represents conduction loss, and a>b. When the switch device is working from time t0 to time t4, the first switch device S1 to the fourth switch device S4 will generate losses as shown in Table 1. It can be seen from Table 1 that the high-frequency bridge arm composed of the first switch device S1 and the second switch device S2 will generate local hot spots during operation, thereby affecting the charging peak power time extension and user experience.

[0110] Table 1 Summary of losses of traditional totem pole bridgeless PFC

[0111]

[0112] Therefore, in order to solve the problem that the two high-frequency switching devices in the embodiment of the present application are prone to generate local hot spots, affecting the peak power output time and user experience of the charging and discharging equipment during the charging process, the present application provides a control circuit of a power factor corrector, which reduces the local hot spots of the high-frequency switching devices in the power factor corrector by adjusting the operating frequencies of the high-frequency switching devices and the low-frequency switching devices in the power factor corrector, thereby improving the peak power output time and user experience of the charging and discharging equipment during the charging process.

[0113] Combine the following Figures 5 to 12 , and then a control circuit solution of a power factor corrector that can adjust the operating frequencies of high-frequency switching devices and low-frequency switching devices in the power factor corrector is introduced in detail.

[0114] Figure 5 A schematic diagram of the structure of a control circuit of a power factor corrector provided in an embodiment of the present application.

[0115] like Figure 5 As shown, in one embodiment provided in the present application, exemplarily, the control circuit 40 of the power factor corrector includes a temperature detection module 41, a signal processing module 42, a feedback detection module 43 and a switch control module 44; wherein the temperature detection module 41 is used to obtain the detected temperature of the power factor corrector (i.e., the totem pole bridgeless PFC12) and send it to the signal processing module 42. The signal processing module 42 is electrically connected to the temperature detection module 41, and is used to output a first timing control signal to the switch control module 44 when the detected temperature is greater than a preset temperature, indicating that the totem pole bridgeless PFC12 is in a higher temperature state, so that the totem pole bridgeless PFC12 is controlled to work in a first timing through the switch control module 44, so as to reduce the local hot spots of the high-frequency switch device in the totem pole bridgeless PFC12.

[0116] The feedback detection module 43 is electrically connected to the signal processing module 42, and is used to obtain the feedback voltage of the power factor corrector and send it to the signal processing module 42. The signal processing module 42 is used to output a second timing control signal to the switch control module 44 when the feedback voltage is greater than the preset feedback voltage, indicating that the totem pole bridgeless PFC12 is in a higher load state, thereby controlling the totem pole bridgeless PFC12 to work in the second timing through the switch control module 44 to reduce the local hot spots of the high-frequency switch devices in the totem pole bridgeless PFC12. When the feedback voltage is not greater than the preset feedback voltage, a third timing control signal is output to the switch control module 44, indicating that the totem pole bridgeless PFC12 is in a lower load state, and the local hot spot temperature of the high-frequency switch devices in the totem pole bridgeless PFC12 is lower, thereby controlling the totem pole bridgeless PFC12 to work in the third timing through the switch control module 44, and reducing the local hot spots of the high-frequency switch devices in the totem pole bridgeless PFC12 to a lower degree or without reducing the local hot spots. Exemplarily, the temperature detection module 41 and the feedback detection module 43 may adopt any common detection circuit in the industry.

[0117] It should be noted that the switch control module 44 is electrically connected to the four switching devices in the totem pole bridgeless PFC 12 respectively, so that the control circuit 40 of the power factor corrector adjusts the wave generation mechanism of the four switching devices according to the ambient temperature and load conditions, so as to realize the high and low frequency switching of the four switching devices under different ambient temperatures and load conditions, thereby making the heat distribution of the totem pole bridgeless PFC 12 more balanced, reducing the local hot spots of the traditional totem pole PFC, and improving the difficulty of device thermal design.

[0118] In an embodiment of the present application, the operating frequency of the high-frequency switching device controlled by the first timing control signal is less than or equal to the operating frequency of the high-frequency switching device controlled by the second timing control signal, and the operating frequency of the high-frequency switching device controlled by the second timing control signal is less than the operating frequency of the high-frequency switching device controlled by the third timing control signal. Exemplarily, the operating frequency of the high-frequency switching device controlled by the first timing control signal and the operating frequency of the high-frequency switching device controlled by the second timing control signal can be the same, that is, the same wave generation mechanism is adopted. Thus, by reducing the operating frequency of the high-frequency switching device, increasing the operating frequency of the low-frequency switching device, reducing the local hot spots of the high-frequency switching device, and increasing the heat dissipation of the low-frequency switching device, the heat distribution of the totem pole bridgeless PFC12 is made more balanced, the heat generation is more balanced, the device layout is easier, the thermal design of the switching power supply is simpler, the product volume is smaller, the power density is higher, and the peak power output time and user experience of the charging and discharging equipment during the charging process are effectively improved.

[0119] Figure 6 A circuit diagram of a signal processing module provided in an embodiment of the present application.

[0120] like Figure 6 As shown, in an embodiment provided in the present application, exemplarily, the signal processing module 42 may include a temperature comparator 421 and a first controller 422; the temperature comparator 421 is electrically connected to the temperature detection module 41, and is used to compare the detection temperature of the totem pole bridgeless PFC12 detected by the temperature detection module 41 with the preset temperature Temp, and when the detection temperature is greater than the preset temperature Temp, outputs a first high level; when the detection temperature is not greater than the preset temperature Temp, outputs a first low level; the first controller 422 is electrically connected to the temperature comparator 421, and is used to output a first timing control signal according to the first high level and send it to the switch control module 44, so as to control the high-frequency switch tube in the totem pole bridgeless PFC12 to reduce the operating frequency and reduce the local hot spots of the high-frequency switch device in the totem pole bridgeless PFC12.

[0121] Exemplarily, the first controller 422 may include an OR gate, which is electrically connected to the temperature comparator 421 , indicating that the first timing control signal is output as long as the temperature comparator 421 is at a high level.

[0122] Figure 7 A circuit diagram of a feedback detection module provided in an embodiment of the present application.

[0123] like Figure 7 As shown, in an embodiment provided in the present application, the feedback detection module 43 may include an input voltage detection unit 431 and a feedback voltage detection unit 432; the input voltage detection unit 431 is electrically connected to the signal processing module 42, and is used to detect the input voltage of the totem pole bridgeless PFC12; the feedback voltage detection unit 432 is electrically connected to the signal processing module 42, and is used to detect the feedback voltage of the totem pole bridgeless PFC12, so as to determine the load condition of the totem pole bridgeless PFC12.

[0124] Figure 8 This is a circuit diagram of a signal processing module provided in yet another embodiment of the present application.

[0125] like Figure 8As shown, in one embodiment provided in the present application, the signal processing module 42 may also include an input voltage comparator 423, a feedback voltage comparator 424, a D trigger 425 and a second controller 426; the input voltage comparator 423 is electrically connected to the input voltage detection unit 431, and is used to output a second high level when the input voltage is greater than the preset input voltage Vref_in; when the input voltage is not greater than the preset input voltage Vref_in, it outputs a second low level; the D trigger 425 is electrically connected to the input voltage comparator 423, and is used to output an enable signal EN when the second low level is converted to a second high level; the feedback voltage comparator 424 is electrically connected to the feedback voltage detection unit 432, and is used to output a third high level when the feedback voltage is greater than the preset feedback voltage Vref_FB; when the feedback voltage is not greater than the preset feedback voltage Vref_FB, it outputs a third low level. Exemplarily, the third high level is the feedback signal FB; the second controller 426 is electrically connected to the D trigger 425 and the feedback voltage comparator 424, respectively, and is used to output a second timing control signal according to the enable signal EN and the feedback signal FB, and vice versa, it outputs a third timing control signal to control the operation of the power factor corrector.

[0126] Exemplarily, the second controller 426 may include an AND gate, which is electrically connected to the D flip-flop 425, the feedback voltage comparator 424 and the first controller 422, respectively, indicating that the second timing control signal is output only when the enable signal EN and the feedback signal FB are received at the same time. When the first controller 422 is an OR gate, any one of the second controller 426 and the temperature comparator 421 outputs a high level, which can make the first controller 422 output the first timing control signal.

[0127] Fig. 9 This is a circuit diagram of a signal processing module provided in yet another embodiment of the present application.

[0128] like Fig. 9 As shown, in one embodiment provided in the present application, the signal processing module 42 also includes a digital filter 427; the digital filter 427 is electrically connected to the input voltage comparator 423 and the D trigger 425, respectively, and is used to filter the second high level and the second low level to obtain a more stable second high level and second low level.

[0129] Fig.10 This is a circuit diagram of a signal processing module provided in yet another embodiment of the present application.

[0130] like Fig.10As shown, in one embodiment provided in the present application, the control circuit 40 of the power factor corrector also includes a zero-crossing detection unit 45; the zero-crossing detection unit 45 is electrically connected to the input voltage comparator 423 in the signal processing module 42, and is used to obtain the input voltage of the power factor corrector, and when the input voltage passes through the zero point, the second high level is switched to the second low level, thereby reducing the current spike caused by the zero-crossing switching of the AC voltage.

[0131] Optionally, the control circuit of the power factor corrector of the present application is applicable to an output voltage range of 0-1000V and a power range of 100-10000 W. At the same time, the control circuit of the power factor corrector of the present application is applicable to a variety of single-phase power supply power factor correctors.

[0132] Fig.11 This is a circuit diagram of a signal processing module provided in yet another embodiment of the present application.

[0133] like Fig.11 As shown, in one embodiment provided by the present application, the temperature detection module 41 is used to detect the temperature of the power factor corrector. The temperature comparator 421 is used to compare the detected temperature with a preset detected temperature, and when the detected temperature is greater than the preset detected temperature, the first controller 422 (such as an OR gate) is used to output a first timing control signal to enable the switch control module 44 to control the power factor corrector to work.

[0134] The input voltage detection unit 431 is used to detect the input voltage. The input voltage comparator 423 is used to compare the input voltage with the preset input voltage Vref_in, and when the input voltage is greater than the preset input voltage Vref_in, output the second high level; when the input voltage is not greater than the preset input voltage Vref_in, output the second low level. The zero-crossing detection unit 45 is used to switch the second high level to the second low level when the input voltage crosses the zero point. The digital filter 427 is used to filter the second high level and the second low level. The D flip-flop 425 is used to output an enable signal EN when the second low level is converted to the second high level.

[0135] The feedback voltage detection unit 432 is used to detect the feedback voltage (i.e., the output voltage of the power factor corrector). The feedback voltage comparator 424 is used to compare the feedback voltage with the preset feedback voltage Vref_FB, and when the feedback voltage is greater than the preset feedback voltage Vref_FB, output a third high level (i.e., feedback signal FB); when the feedback voltage is not greater than the preset feedback voltage Vref_FB, output a third low level.

[0136] The second controller 426 (such as an AND gate) is used to output a second timing control signal according to the enable signal EN and the feedback signal FB, and vice versa, a third timing control signal is output to control the operation of the power factor corrector through the switch control module 44. Thus, the operating frequency of the high-frequency switch device in the power factor corrector is reduced, the operating frequency of the low-frequency switch device in the power factor corrector is increased, and the local hot spots of the high-frequency switch device are reduced, so that the heating of the power factor corrector is more balanced, the device layout is easier, the thermal design of the switching power supply is simpler, the product volume is smaller, the power density is higher, and the peak power output time and user experience of the charging and discharging equipment during the charging process are effectively improved.

[0137] Fig.12 This is a working timing diagram of a control circuit of a power factor corrector provided in an embodiment of the present application.

[0138] like Fig.12 As shown, in an embodiment provided by the present application, illustratively, Vac is the input voltage of the power factor corrector. It should be noted that since the control circuit of the power factor corrector provided in the embodiment of the present application can be applicable to different voltage conditions in various countries or regions, the input voltage Vac can adopt a voltage waveform with different amplitudes or a changing amplitude. Vgs1~Vgs4 are drive signals of the switching devices S1~S4, which are used to control the on and off of the switching devices S1~S4. Polarity is a polarity conversion signal. When the polarity of the input voltage Vac is switched, the level of the polarity conversion signal Polarity also changes accordingly. For example, when the input voltage Vac is switched from a positive voltage to a negative voltage, the level of the polarity conversion signal Polarity also changes from a high level to a low level. EN is an enable signal. Only when it is detected that the polarity conversion signal Polarity switches from a low level to a high level, the level of the enable signal EN will follow the switch. FB is a feedback signal, which is used to determine the load condition of the totem pole bridgeless PFC12. When the feedback signal voltage V FB When the feedback signal voltage Vth_change exceeds the preset feedback voltage, the signal processing module 42 determines that the totem pole bridgeless PFC 12 is operating in a heavy load condition. FB When the voltage Vth_change is less than or equal to the preset feedback voltage Vth_change, the signal processing module 42 determines that the totem pole bridgeless PFC 12 is operating in a non-heavy load condition such as half load or light load.

[0139] In an embodiment of the present application, when the ambient temperature of the totem pole bridgeless PFC12 is greater than a preset temperature, the operating frequencies of the first switch device S1 and the second switch device S2 are alternately rotated with the operating frequencies of the third switch device S3 and the fourth switch device S4. For example, when the first switch device S1 and the second switch device S2 operate with an industrial frequency drive signal, the third switch device S3 and the fourth switch device S4 operate with a high frequency drive signal; when the first switch device S1 and the second switch device S2 operate with a high frequency drive signal, the third switch device S3 and the fourth switch device S4 operate with an industrial frequency drive signal. At the same time, the first switch device S1 and the second switch device S2 also perform alternating complementary operations, and the third switch device S3 and the fourth switch device S4 also perform alternating complementary operations. When the ambient temperature of the totem pole bridgeless PFC12 is less than or equal to the preset temperature, the following three situations may occur: (1) When the feedback signal voltage V FB When the feedback signal voltage Vth_change is greater than the preset feedback voltage Vth_change and the enable signal EN is at a high level, the first switch device S1 and the second switch device S2 work alternately and complementary with the industrial frequency drive signal, and the third switch device S3 and the fourth switch device S4 work alternately and complementary with the high frequency drive signal. (2) When the feedback signal voltage V FB When the feedback signal voltage Vth_change is greater than the preset feedback voltage Vth_change and the enable signal EN is at a low level, the first switch device S1 and the second switch device S2 work alternately and complementary with a high-frequency drive signal, and the third switch device S3 and the fourth switch device S4 work alternately and complementary with a low-frequency drive signal. (3) When the feedback signal voltage V FB When the voltage Vth_change is less than or equal to the preset feedback voltage Vth_change, no matter the enable signal EN is at a high level or a low level, the first switch device S1 and the second switch device S2 work alternately and complementary with the high-frequency drive signal, and the third switch device S3 and the fourth switch device S4 work alternately and complementary with the industrial frequency drive signal, as shown in Table 2 below.

[0140] Table 2 Driving modes of the four switching devices of the totem pole bridgeless PFC under different control signals

[0141]

[0142] Combine the following Figures 13 to 20 , and then a control method for a power factor corrector that can adjust the operating frequencies of high-frequency switching devices and low-frequency switching devices in the power factor corrector is introduced in detail.

[0143] Fig.13 The present invention is a flowchart of a method for controlling a power factor corrector provided in an embodiment of the present application.

[0144] like Fig.13 As shown, in an embodiment provided in the present application, illustratively, the method includes the following steps: Figure 1 The charging and discharging device shown is executed; the method includes S101 to S107, and S101 to S107 are described in detail below. The power factor corrector may include a high-frequency switching device and a low-frequency switching device. The control method of the power factor corrector may include the following steps:

[0145] S101. Obtain a detected temperature of a power factor corrector.

[0146] Exemplarily, the method of acquiring the detected temperature of the power factor corrector may adopt a variety of existing temperature detection methods, for example, using a thermistor to detect the temperature of the power factor corrector, or using a temperature sensor to detect the temperature of the power factor corrector.

[0147] Optionally, the temperature of a certain space inside the power factor corrector may be detected, and the temperature of a certain device inside the power factor corrector, for example, the temperature of a high-frequency switching device, may also be detected.

[0148] It should be understood that before obtaining the detected temperature of the power factor corrector, a system initialization process may be performed on the power factor corrector.

[0149] S102: Determine whether the detected temperature is greater than a preset temperature.

[0150] Exemplarily, judging whether the detected temperature is greater than the preset temperature may be performed using existing hardware or software judgment methods. For example, a comparator may be used to judge the size of the detected temperature and the preset temperature, or a software program may be used to judge the size of the detected temperature and the preset temperature.

[0151] S103: When the detected temperature is greater than the preset temperature, a first timing control signal is output. Otherwise, the next step is performed.

[0152] For example, when the detected temperature is greater than the preset temperature, it means that the temperature inside the power factor corrector is high, and the local hot spots of the entire charging and discharging device are obvious, which may affect the charging peak power time or user experience of the charging and discharging device. Therefore, the first timing control signal is output, which is mainly used to reduce the operating frequency of the high-frequency switching device, increase the operating frequency of the low-frequency switching device, and reduce the local hot spots caused by the long-term operation of the high-frequency switching device.

[0153] Optionally, the first timing control signal may be a wave-generating mechanism of a switching device. For example, in the embodiment of the present application, the first timing control signal may be a wave-generating mechanism of a high-frequency switching device (i.e., the first switching device S1 and the second switching device S2) and a low-frequency switching device (i.e., the third switching device S3 and the fourth switching device S4).

[0154] Optionally, when the detected temperature is not greater than a preset temperature, a first detection signal may be output to obtain a feedback voltage of the power factor corrector.

[0155] S104: Obtain feedback voltage of the power factor corrector.

[0156] Exemplarily, the feedback voltage of the power factor corrector can be obtained by using a variety of existing voltage detection methods, for example, using a voltage divider resistor to detect the feedback voltage of the power factor corrector, or using a voltage sensor to detect the feedback voltage of the power factor corrector.

[0157] Optionally, the feedback voltage of the power factor corrector may be the output voltage of the power factor corrector. Alternatively, the feedback voltage of the power factor corrector may be the load voltage of the totem pole bridgeless PFC.

[0158] S105: Determine whether the feedback voltage is greater than a preset feedback voltage.

[0159] Exemplarily, judging whether the feedback voltage is greater than the preset feedback voltage may be performed using existing hardware or software judgment methods. For example, a comparator may be used to judge the magnitude of the feedback voltage and the preset feedback voltage, or a software program may be used to judge the magnitude of the feedback voltage and the preset feedback voltage.

[0160] S106 , when the feedback voltage is greater than the preset feedback voltage, output a second timing control signal.

[0161] For example, when the feedback voltage is greater than the preset feedback voltage, it indicates that the power factor corrector is in a heavy load condition, and the heat dissipated by the entire charging and discharging device is high, especially the local hot spots of the high-frequency switching device are obvious, which may affect the charging peak power time or user experience of the charging and discharging device. Therefore, the second timing control signal is output, which is mainly used to reduce the operating frequency of the high-frequency switching device, increase the operating frequency of the low-frequency switching device, and reduce the local hot spots of the high-frequency switching device.

[0162] Optionally, the second timing control signal may be a wave-generating mechanism of a switching device. For example, in the embodiment of the present application, the second timing control signal may be a wave-generating mechanism of a high-frequency switching device (i.e., the first switching device S1 and the second switching device S2) and a low-frequency switching device (i.e., the third switching device S3 and the fourth switching device S4).

[0163] Optionally, in one implementation, since the first timing control signal and the second timing control signal are both in the case where the local hot spot of the high-frequency switch device is relatively obvious, the same wave generation mechanism can be used.

[0164] S107 . When the feedback voltage is not greater than the preset feedback voltage, output a third timing control signal.

[0165] For example, when the feedback voltage is not greater than the preset feedback voltage, it indicates that the power factor corrector is in a half-load condition or a light-load condition, and the heat dissipated by the entire charging and discharging device is low, which has little impact on the charging peak power time and user experience of the charging and discharging device. Therefore, the third timing control signal is output, which is mainly used to maintain the operating frequency of the current high-frequency switching device and the low-frequency switching device.

[0166] Optionally, the third timing control signal may be a wave-generating mechanism of a switching device. Exemplarily, in the embodiment of the present application, the third timing control signal may be a wave-generating mechanism of a high-frequency switching device (i.e., the first switching device S1 and the second switching device S2) and a low-frequency switching device (i.e., the third switching device S3 and the fourth switching device S4).

[0167] Illustratively, in one embodiment of the present application, due to different heat levels of local hot spots of the power factor corrector, the operating frequencies of the high-frequency switching devices controlled by the first timing control signal, the second timing control signal, and the third timing control signal can be reduced in sequence.

[0168] Fig.14 This is a flow chart of a control method for a power factor corrector provided in yet another embodiment of the present application.

[0169] like Fig.14 As shown, in an embodiment provided in the present application, illustratively, with Fig.13 The difference is that, in order to facilitate the control of the high-frequency switching device in the power factor corrector, the operating frequency of the high-frequency switching device controlled by the first timing control signal and the operating frequency of the high-frequency switching device controlled by the second timing control signal can be the same.

[0170] Fig.15 This is a flow chart of a control method for a power factor corrector provided in yet another embodiment of the present application.

[0171] like Fig.15 As shown, in an embodiment provided in the present application, illustratively, the method includes the following steps: Figure 1 The charging and discharging device shown in the figure is executed; the method includes S201 to S209, and S201 to S209 are described in detail below. Optionally, the power factor corrector can use a totem pole bridgeless PFC, and the above method is used to control the conduction and closing of four switching devices in the totem pole bridgeless PFC. Determining whether the feedback voltage is greater than the preset feedback voltage may also include the following steps:

[0172] S201. Obtain input voltage and feedback voltage of a power factor corrector.

[0173] Exemplarily, the input voltage of the power factor corrector can be obtained by using a variety of existing voltage detection methods, such as using a voltage divider resistor to detect the input voltage of the power factor corrector, or using a voltage sensor to detect the input voltage of the power factor corrector.

[0174] It should be noted that the input voltage of the power factor corrector may be the input voltage of the neutral terminal or the live terminal of the AC power.

[0175] S202: Determine whether the input voltage is greater than a preset input voltage.

[0176] Exemplarily, judging whether the input voltage is greater than the preset input voltage may be performed using existing hardware or software judgment methods. For example, a comparator may be used to judge the magnitude of the input voltage and the preset input voltage, or a software program may be used to judge the magnitude of the input voltage and the preset input voltage.

[0177] It can be understood that the input voltage is the AC power supply Vac of the power factor corrector.

[0178] S203 , when the input voltage is greater than the preset input voltage, output a second high level.

[0179] Exemplarily, when the input voltage is greater than the preset input voltage, it indicates that the AC power supply Vac of the power factor corrector is in a positive half cycle, so the polarity conversion signal Polarity can be obtained as a high level.

[0180] S204: When the input voltage is not greater than the preset input voltage, output a second low level.

[0181] Exemplarily, when the input voltage is not greater than the preset input voltage, it indicates that the AC power supply Vac of the power factor corrector is in the negative half cycle, so the polarity conversion signal Polarity can be obtained as a low level. In other words, the polarity conversion signal converts the sine wave of the AC power supply into a square wave for subsequent use.

[0182] S205 . When the second low level is converted to the second high level, an enable signal is output.

[0183] Exemplarily, when the second low level is converted to the second high level, it indicates that the AC power supply Vac of the power factor corrector has completed a cycle waveform, which is indicated by the high level enable signal EN.

[0184] It can be understood that when the AC power supply Vac of the power factor corrector completes the next cycle waveform, the enable signal switches to a low level, and the second high level and the second low level switch alternately, over and over again.

[0185] S206: Determine whether the feedback voltage is greater than a preset feedback voltage.

[0186] Exemplarily, judging whether the feedback voltage is greater than the preset feedback voltage may be performed using existing hardware or software judgment methods. For example, a comparator may be used to judge the magnitude of the feedback voltage and the preset feedback voltage, or a software program may be used to judge the magnitude of the feedback voltage and the preset feedback voltage.

[0187] It can be understood that the feedback voltage is the load voltage of the power factor corrector.

[0188] S207 . When the feedback voltage is greater than the preset feedback voltage, output a third high level; the third high level is a feedback signal.

[0189] Exemplarily, when the feedback voltage is greater than the preset feedback voltage, it indicates that the power factor corrector is in a heavy load condition, which is indicated by a high-level feedback signal FB.

[0190] S208 . When the feedback voltage is not greater than the preset feedback voltage, output a third low level.

[0191] Exemplarily, when the feedback voltage is not greater than the preset feedback voltage, it indicates that the power factor corrector is in a half-load or light-load condition, which is indicated by a low-level feedback signal FB.

[0192] It can be understood that when the feedback voltage is not greater than the preset feedback voltage, no matter the enable signal EN is at a high level or a low level, the feedback signal FB is at a low level, and the third timing control signal is output. That is, in one embodiment of the present application, the first switch device S1 and the second switch device S2 in the totem pole bridgeless PFC both work alternately and complementary with a high-frequency drive signal, and the third switch device S3 and the fourth switch device S4 both work alternately and complementary with an industrial frequency drive signal.

[0193] S209 , outputting a second timing control signal according to the enable signal and the feedback signal.

[0194] Exemplarily, this step indicates that the second timing control signal is output only when the enable signal and the feedback signal are both at high levels. That is, it means that within the interval period of the AC power supply Vac of the power factor corrector, and when the feedback voltage of the power factor corrector is greater than the preset feedback voltage, the power factor corrector is in a heavy load condition, the second timing control signal is output to control the working state of the high-frequency switch device and the low-frequency switch device in the power factor corrector through the switch control device. That is, in one embodiment of the present application, the operating frequency of the first switch device S1 and the second switch device S2 in the totem pole bridgeless PFC is alternately rotated with the operating frequency of the third switch device S3 and the fourth switch device S4. For example, when the first switch device S1 and the second switch device S2 work with a low-frequency drive signal, the third switch device S3 and the fourth switch device S4 work with a high-frequency drive signal; when the first switch device S1 and the second switch device S2 work with a high-frequency drive signal, the third switch device S3 and the fourth switch device S4 work with a low-frequency drive signal. At the same time, the first switch device S1 and the second switch device S2 also perform alternate complementary operations, and the third switch device S3 and the fourth switch device S4 also perform alternate complementary operations.

[0195] Fig.16 This is a flow chart of a control method for a power factor corrector provided in yet another embodiment of the present application.

[0196] like Fig.16 As shown, in an embodiment provided in the present application, illustratively, the method includes the following steps: Figure 1 The charging and discharging device shown is executed; the method includes S301 to S310, and S301 to S310 are described in detail below. Optionally, the power factor corrector can use a totem pole bridgeless PFC, and the above method is used to control the conduction and closing of four switching devices in the totem pole bridgeless PFC. Determining whether the feedback voltage is greater than the preset feedback voltage may also include the following steps:

[0197] S301. Obtain input voltage and feedback voltage of a power factor corrector.

[0198] Exemplarily, the input voltage of the power factor corrector can be obtained by using a variety of existing voltage detection methods, such as using a voltage divider resistor to detect the input voltage of the power factor corrector, or using a voltage sensor to detect the input voltage of the power factor corrector.

[0199] It should be noted that the input voltage of the power factor corrector may be the input voltage of the neutral terminal or the live terminal of the AC power.

[0200] S302: Determine whether the input voltage is greater than a preset input voltage.

[0201] Exemplarily, judging whether the input voltage is greater than the preset input voltage may be performed using existing hardware or software judgment methods. For example, a comparator may be used to judge the magnitude of the input voltage and the preset input voltage, or a software program may be used to judge the magnitude of the input voltage and the preset input voltage.

[0202] It can be understood that the input voltage is the AC power supply Vac of the power factor corrector.

[0203] S303: When the input voltage is greater than the preset input voltage, output a second high level.

[0204] Exemplarily, when the input voltage is greater than the preset input voltage, it indicates that the AC power supply Vac of the power factor corrector is in a positive half cycle, so the polarity conversion signal Polarity can be obtained as a high level.

[0205] S304: When the input voltage is not greater than the preset input voltage, output a second low level.

[0206] Exemplarily, when the input voltage is not greater than the preset input voltage, it indicates that the AC power supply Vac of the power factor corrector is in the negative half cycle, so the polarity conversion signal Polarity can be obtained as a low level. In other words, the polarity conversion signal converts the sine wave of the AC power supply into a square wave for subsequent use.

[0207] S305 , counting the second high level and the second low level.

[0208] Exemplarily, a Count function in software may be used to count the number of the second high level and the second low level, thereby implementing the control process of the power factor corrector in software form.

[0209] S306 , when the number of the second high level and the second low level is an even number, output an enable signal.

[0210] Exemplarily, when the number of the second high level and the second low level is an even number, it indicates an interval period of the AC power supply Vac of the power factor corrector. That is, an enable signal EN is outputted only at each interval of a period waveform of the AC power supply Vac.

[0211] S307: Determine whether the feedback voltage is greater than a preset feedback voltage.

[0212] Exemplarily, judging whether the feedback voltage is greater than the preset feedback voltage may be performed using existing hardware or software judgment methods. For example, a comparator may be used to judge the magnitude of the feedback voltage and the preset feedback voltage, or a software program may be used to judge the magnitude of the feedback voltage and the preset feedback voltage.

[0213] It can be understood that the feedback voltage is the load voltage of the power factor corrector.

[0214] S308 . When the feedback voltage is greater than the preset feedback voltage, output a third high level; the third high level is a feedback signal.

[0215] Exemplarily, when the feedback voltage is greater than the preset feedback voltage, it indicates that the power factor corrector is in a heavy load condition, which is indicated by a high-level feedback signal FB.

[0216] S309 , when the feedback voltage is not greater than the preset feedback voltage, output a third low level.

[0217] Exemplarily, when the feedback voltage is not greater than the preset feedback voltage, it indicates that the power factor corrector is in a half-load or light-load condition, which is indicated by a low-level feedback signal FB.

[0218] It can be understood that when the feedback voltage is not greater than the preset feedback voltage, no matter the enable signal EN is at a high level or a low level, the feedback signal FB is at a low level, and the third timing control signal is output. That is, in one embodiment of the present application, the first switch device S1 and the second switch device S2 in the totem pole bridgeless PFC both work alternately and complementary with a high-frequency drive signal, and the third switch device S3 and the fourth switch device S4 both work alternately and complementary with an industrial frequency drive signal.

[0219] S310 , outputting a second timing control signal according to the enable signal and the feedback signal.

[0220] Exemplarily, this step indicates that the second timing control signal is output only when the enable signal and the feedback signal are both at high levels. That is to say, within the interval period of the AC power supply Vac of the power factor corrector, and when the feedback voltage of the power factor corrector is greater than the preset feedback voltage, and the power factor corrector is in a heavy load condition, the second timing control signal is output to control the working state of the high-frequency switch device and the low-frequency switch device in the power factor corrector through the switch control device. That is to say, in one embodiment of the present application, the operating frequency of the first switch device S1 and the second switch device S2 is alternately rotated with the operating frequency of the third switch device S3 and the fourth switch device S4. For example, when the first switch device S1 and the second switch device S2 work with a low-frequency drive signal, the third switch device S3 and the fourth switch device S4 work with a high-frequency drive signal; when the first switch device S1 and the second switch device S2 work with a high-frequency drive signal, the third switch device S3 and the fourth switch device S4 work with a low-frequency drive signal. At the same time, the first switch device S1 and the second switch device S2 also perform alternate complementary operations, and the third switch device S3 and the fourth switch device S4 also perform alternate complementary operations.

[0221] In an embodiment provided in the present application, illustratively, in combination Fig.15 , when the second low level is converted to the second high level, before outputting the enable signal, the process further includes: filtering the second high level and the second low level. In another embodiment provided by the present application, for example, in combination with Fig.16 Before counting the second high level and the second low level, the method further includes: filtering the second high level and the second low level.

[0222] Exemplarily, filtering is performed on the second high level and the second low level to obtain more stable second high level and second low level, so as to facilitate signal switching between the second high level and the second low level.

[0223] In an embodiment provided in the present application, exemplarily, the control method of the power factor corrector further includes: when the input voltage passes through a zero point, switching the second high level to a second low level.

[0224] Exemplarily, in the process of obtaining the input voltage of the power factor corrector, when the input voltage passes through zero, the second high level is switched to the second low level, thereby retaining the dead time and reducing the current spike caused by the AC voltage zero-crossing switching.

[0225] In an embodiment provided in the present application, illustratively, the high-frequency switch device includes a first switch device and a second switch device, and the low-frequency switch device includes a third switch device and a fourth switch device. Optionally, the operating frequency of the high-frequency switch device controlled by the first timing control signal and the operating frequency of the high-frequency switch device controlled by the second timing control signal can be set to be the same. Correspondingly, the operating frequency of the low-frequency switch device controlled by the first timing control signal and the operating frequency of the low-frequency switch device controlled by the second timing control signal are also the same.

[0226] Fig.17 A diagram of a totem pole bridgeless PFC energy storage path and freewheeling path provided in an embodiment of the present application.

[0227] Exemplarily, the first timing control signal may include the following specific control process:

[0228] like Fig.17 As shown, in one embodiment provided in the present application, exemplarily, in combination with Fig.12When the totem pole bridgeless PFC operates from time t0 to time t1, the input voltage is in the positive half cycle. When the input voltage detection unit detects that the input voltage |Vac| is greater than the preset input voltage |Vac_min|, the switch device of the totem pole bridgeless PFC is soft-started. Specifically, under the control of the switch control module, the first switch device S1 of the totem pole bridgeless PFC acts as the main control switch and performs high-frequency switching with a driving signal of a duty cycle D. The second switch device S2 acts as a freewheeling device and also performs high-frequency switching with a driving waveform of a duty cycle 1-D. The driving signal of the first switch device S1 and the driving signal of the second switch device S2 form a pulse width modulation signal (PWM) in a complementary mode. At the same time, in order to reduce loop loss, at this stage, the third switch device S3 acts as a rectifier device and is continuously turned on, and the fourth switch device S4 is continuously turned off.

[0229] For example, when the first switch device S1 is turned on, the second switch device S2 is turned off, the third switch device S3 is turned on, and the fourth switch device S4 is turned off, the following may be formed: Fig.17 In the current path shown in (a), the energy storage inductor L stores energy through the first switch device S1 and the third switch device S3, and the energy storage capacitor C supplies power to the load. When the first switch device S1 is turned off, the second switch device S2 is turned on, the third switch device S3 is turned on, and the fourth switch device S4 is turned off, the following can be formed: Fig.17 In the current path shown in (b), the energy storage inductor L provides freewheeling for the energy storage capacitor C through the second switching device S2 and the third switching device S3.

[0230] Optionally, to prevent the first switching device S1 and the second switching device S2 from being in common, a dead time is reserved between two driving signals of the first switching device S1 and the second switching device S2.

[0231] Optionally, when the input voltage detection unit detects that the input voltage |Vac| is less than the preset input voltage |Vac_min|, the first switch device S1 to the fourth switch device S4 are all soft-stopped to avoid the current spike caused by the zero-crossing switching of the AC input voltage. When the AC input voltage continues to decrease and crosses zero, the polarity conversion signal Polarity signal is switched from a high level to a low level.

[0232] Fig.18 A diagram of a totem pole bridgeless PFC energy storage path and a freewheeling path provided in yet another embodiment of the present application.

[0233] Exemplarily, the first timing control signal may include the following specific control process:

[0234] like Fig.18 As shown, in one embodiment provided in the present application, exemplarily, in combination with Fig.12When the totem pole bridgeless PFC operates from time t1 to time t2, the input voltage is in the negative half cycle. When the input voltage detection unit detects that the input voltage |Vac| is greater than the preset input voltage |Vac_min|, the switch device of the totem pole bridgeless PFC is soft-started. Specifically, under the control of the switch control module, the second switch device S2 of the totem pole bridgeless PFC acts as the main control switch and performs high-frequency switching with a driving signal of a duty cycle D. The first switch device S1 acts as a freewheeling switch and also performs high-frequency switching with a driving waveform of a duty cycle 1-D. The first switch device S1 and the second switch device S2 are alternately turned on with a complementary mode PWM drive signal. At the same time, because the polarity conversion signal Polarity has been switched to a low level, at this stage, the fourth switch device S4 acts as a rectifier tube and is continuously turned on, and the third switch device S3 is continuously turned off.

[0235] For example, when the first switch device S1 is turned off, the second switch device S2 is turned on, the third switch device S3 is turned off, and the fourth switch device S4 is turned on, the following may be formed: Fig.18 In the current path shown in (a), the energy storage inductor L stores energy through the second switch device S2 and the fourth switch device S4, and the energy storage capacitor C supplies power to the load. When the first switch device S1 is turned on, the second switch device S2 is turned off, the third switch device S3 is turned off, and the fourth switch device S4 is turned on, the following can be formed: Fig.18 In the current path shown in (b), the energy storage inductor L provides freewheeling for the energy storage capacitor C through the first switching device S1 and the fourth switching device S4.

[0236] Optionally, when the input voltage detection unit detects that the input voltage |Vac| is less than the preset input voltage |Vac_min| again, the first to fourth switch devices S1 to S4 are all soft-stopped. When the AC input voltage AC voltage continues to increase and crosses zero, the polarity conversion signal Polarity switches from low level to high level.

[0237] Exemplarily, when the signal processing module detects that the polarity conversion signal Polarity switches from a low level to a high level, the level of the enable signal EN switches from a low level to a high level.

[0238] It can be understood that from time t0 to time t2, since the first switching device S1 and the second switching device S2 perform switching actions at a high switching frequency, the first switching device S1 and the second switching device S2 will generate switching losses and conduction losses, so the first switching device S1 and the second switching device S2 are the main heat sources. The third switching device S3 and the fourth switching device S4 only have conduction losses, so the heat is relatively small.

[0239] Fig.19A diagram of a totem pole bridgeless PFC energy storage path and a freewheeling path provided in yet another embodiment of the present application.

[0240] Exemplarily, the first timing control signal may include the following specific control process:

[0241] like Fig.19 As shown, in one embodiment provided in the present application, exemplarily, in combination with Fig.12 When the totem pole bridgeless PFC operates from time t2 to time t3, the input voltage is in the positive half cycle. When the feedback detection module detects the feedback voltage V FB >Vth_change and the enable signal EN is at a high level, indicating that the totem pole bridgeless PFC is in a heavy load condition. The first switch device S1 and the second switch device S2 work alternately and complementary with the industrial frequency drive signal, and the third switch device S3 and the fourth switch device S4 work alternately and complementary with the high-frequency drive signal. Specifically, the third switch device S3 acts as the main control switch and performs high-frequency switching with a drive signal of a duty cycle D, and the fourth switch device S4 acts as a freewheeling switch and also performs high-frequency switching with a drive waveform of a duty cycle 1-D. The third switch device S3 and the fourth switch device S4 are alternately turned on with a complementary mode PWM drive signal. At the same time, the first switch device S1 is continuously turned on as a rectifier, and the second switch device S2 is continuously turned off.

[0242] For example, when the third switch device S3 is turned on, the fourth switch device S4 is turned off, the first switch device S1 is turned on, and the second switch device S2 is turned off, the following may be formed: Fig.19 In the current path shown in (a), the energy storage inductor L stores energy through the third switch device S3 and the first switch device S1, and the energy storage capacitor C supplies power to the load. When the third switch device S3 is turned off, the fourth switch device S4 is turned on, the first switch device S1 is turned on, and the second switch device S2 is turned off, the following can be formed: Fig.19 In the current path shown in (b), the energy storage inductor L provides freewheeling for the energy storage capacitor C through the first switching device S1 and the fourth switching device S4.

[0243] Fig. 20 A diagram of a totem pole bridgeless PFC energy storage path and a freewheeling path provided in yet another embodiment of the present application.

[0244] Exemplarily, the first timing control signal may include the following specific control process:

[0245] like Fig. 20 As shown, in one embodiment provided in the present application, exemplarily, in combination with Fig.12When the totem pole bridgeless PFC operates from time t3 to time t4, the input voltage is in the negative half cycle, the fourth switch device S4 acts as the main control switch, and performs high-frequency switching with a driving signal of a duty cycle D, the third switch device S3 acts as a freewheeling switch, and also performs high-frequency switching with a driving waveform of a duty cycle 1-D, the third switch device S3 and the fourth switch device S4 are alternately turned on with a complementary mode PWM driving signal, the second switch device S2 acts as a rectifier tube and is continuously turned on, and the first switch device S1 is continuously turned off.

[0246] For example, when the fourth switch device S4 is turned on, the third switch device S3 is turned off, the first switch device S1 is turned off, and the second switch device S2 is turned on, the following may be formed: Fig. 20 In the current path shown in (a), the energy storage inductor L stores energy through the fourth switch device S4 and the second switch device S2, and the energy storage capacitor C supplies power to the load. When the third switch device S3 is turned on, the fourth switch device S4 is turned off, the first switch device S1 is turned off, and the second switch device S2 is turned on, the following can be formed: Fig. 20 In the current path shown in (b), the energy storage inductor L is used to freewheel the energy storage capacitor C through the third switching device S3 and the second switching device S2.

[0247] Exemplarily, Table 3 is a loss summary table of the totem pole bridgeless PFC of the present application. As shown in Table 3, a represents high-frequency switching loss, b represents conduction loss, a>b, then when the switching device is working from time t0 to time t4, the first switching device S1 to the fourth switching device S4 will generate losses as shown in Table 3.

[0248] Table 3 Summary of losses of the totem pole bridgeless PFC of this application

[0249]

[0250] It can be seen from Table 3 that, compared with the loss summary table of the traditional totem pole bridgeless PFC in Table 1, from time t0 to time t4, the high-frequency bridge arm (i.e., the first switch device S1 and the second switch device S2) and the low-frequency bridge arm (i.e., the third switch device S3 and the fourth switch device S4) work in rotation. From time t0 to time t2, the first switch device S1 and the second switch device S2 use high frequency as the switching frequency, and there are switching losses and conduction losses at the same time, which serve as the main heat source of the totem pole bridgeless PFC. The third switch device S3 and the fourth switch device S4 use the power frequency as the switching frequency, and there are only conduction losses, which serve as the secondary heat source of the totem pole bridgeless PFC. From time t2 to time t4, the first switch device S1 and the second switch device S2 use the power frequency as the switching frequency, and there are only conduction losses. The third switch device S3 and the fourth switch device S4 use high frequency as the switching frequency, and there are both switching losses and conduction losses. Therefore, during the process from time t0 to time t4, the losses generated by the first switch device S1, the second switch device S2, the third switch device S3 and the fourth switch device S4 are equal, that is, the heat generated by the totem pole bridgeless PFC is balanced. Therefore, it can be seen from the loss summary table of Table 1 that when the totem pole bridgeless PFC is at a higher temperature or heavy load condition, the equivalent heat dissipation area increases, the local hot spots are eliminated, the thermal design is improved, and the product volume is optimized while the total loss remains unchanged.

[0251] It should be noted that when the temperature or load condition of the totem pole bridgeless PFC changes, the signal processing module will adjust the control signal according to the detection result, and then change the operating frequency and operating frequency of the first switch device S1 to the fourth switch device S4 through the switch control module.

[0252] It can be understood that the second timing control signal controls the operation process of the first switching device S1 to the fourth switching device S4, and can control the operation process of the first switching device S1 to the fourth switching device S4 with the first timing control signal.

[0253] like Fig.12As shown, exemplarily, the third timing control signal may include the following: from time t6 to time t10, the high-frequency bridge arm (i.e., the first switch device S1 and the second switch device S2) and the low-frequency bridge arm (i.e., the third switch device S3 and the fourth switch device S4) do not need to work in rotation. From time t6 to time t10, the first switch device S1 and the second switch device S2 always use high frequency as the switching frequency, and there are switching losses and conduction losses, which serve as the main heat source of the totem pole bridgeless PFC; the third switch device S3 and the fourth switch device S4 always use the power frequency as the switching frequency, and there are only conduction losses, which serve as the secondary heat source of the totem pole bridgeless PFC. That is to say, when the totem pole bridgeless PFC is in a light load or half load condition, under the action of the third timing control signal, the heat dissipation effect of the totem pole bridgeless PFC is the same as that of the traditional totem pole bridgeless PFC, and the local hot spots are not obvious, and there is no need to perform local hot spot cooling treatment.

[0254] It should be noted that under light load or half load conditions, the operating frequency of the switching device is generally reduced to meet the normal voltage output, and can even enter the frequency hopping mode under light load or no load. Under this condition, the switching device has a shorter working time, smaller losses, and lower system heat, so under non-heavy load conditions, there is no need to rotate the high-frequency bridge arm and the low-frequency bridge arm.

[0255] Fig.21 Schematic diagram of the structure of a charging and discharging device provided in an embodiment of the present application. Fig.21 As shown, the charging and discharging device 300 includes a control circuit 40 of a power factor corrector and a power factor corrector. The power factor corrector includes a high-frequency switching device and a low-frequency switching device; both the high-frequency switching device and the low-frequency switching device are connected to the control circuit 40 of the power factor corrector; the high-frequency switching device is configured to be turned on or off under the action of the control circuit of the power factor corrector; the low-frequency switching device is configured to be turned on or off under the action of the control circuit of the power factor corrector. The control circuit 40 of the power factor corrector is used to obtain the temperature of the power factor corrector. When the detected temperature is greater than the preset detected temperature, the power factor corrector is controlled to work through a first timing control signal. Then, the feedback voltage of the power factor corrector is obtained. When the feedback voltage is greater than the preset feedback voltage, the power factor corrector is controlled to work through a second timing control signal. Otherwise, the power factor corrector is controlled to work through a third timing control signal. This reduces the local hot spots of high-frequency switching devices in the power factor corrector, makes heat generation more balanced, makes device layout easier, makes the thermal design of the switching power supply simpler, makes the product smaller, and has higher power density, effectively improving the peak power output time and user experience of charging and discharging equipment during the charging process.

[0256] It should be noted that the above-mentioned charging and discharging device 300 is embodied in the form of a functional module. The term "module" here can be implemented in the form of software and / or hardware, and is not specifically limited to this.

[0257] For example, a "module" may be a software program, a hardware circuit, or a combination of the two that implements the above functions. The hardware circuit may include an application specific integrated circuit (ASIC), an electronic circuit, a processor (such as a shared processor, a dedicated processor, or a group processor, etc.) and a memory for executing one or more software or firmware programs, a combined logic circuit, and / or other suitable components that support the described functions.

[0258] Therefore, the units of each example described in the embodiments of the present application can be implemented by electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present application.

[0259] Fig. 22 The present application provides a schematic structural diagram of a charging and discharging device. Fig. 22 The dotted line in the figure indicates that the unit or the module is optional; the charging and discharging device 400 can be used to implement the control method of the power factor corrector described in the above method embodiment.

[0260] The charging and discharging device 400 includes one or more processors 401, which can support the control method in the embodiment of the charging and discharging device 400 implementation method. The processor 401 can be a general-purpose processor or a special-purpose processor. For example, the processor 401 can be a central processing unit (CPU), a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA), or other programmable logic devices, such as discrete gates, transistor logic devices, or discrete hardware components.

[0261] Optionally, the processor 401 can be used to control the charging and discharging device 400, execute the software program, and process the data of the software program. The charging and discharging device 400 can also include a communication unit 405 to implement signal input (reception) and output (transmission).

[0262] For example, the charging and discharging device 400 may be a chip, and the communication unit 405 may be an input and / or output circuit of the chip, or the communication unit 405 may be a communication interface of the chip, and the chip may be a component of a terminal device or other electronic devices.

[0263] For another example, the charging and discharging device 400 may be a terminal device, and the communication unit 405 may be a transceiver of the charging and discharging device 400, or the communication unit 405 may include one or more memories 402 on which a program 404 is stored. The program 404 may be executed by the processor 401 to generate instructions 403, so that the processor 401 executes the control method of the power factor corrector described in the above method embodiment according to the instructions 403.

[0264] Optionally, data may also be stored in the memory 402 .

[0265] Optionally, the processor 401 may also read data stored in the memory 402 . The data may be stored at the same storage address as the program 404 , or may be stored at a different storage address from the program 404 .

[0266] Optionally, the processor 401 and the memory 402 may be provided separately or integrated together, for example, integrated on a system on chip (SOC) of the terminal device.

[0267] Exemplarily, the memory 402 can be used to store the related program 404 of the control method of the power factor corrector provided in the embodiment of the present application, and the processor 401 can be used to call the related program 404 of the control method of the power factor corrector stored in the memory 402 when executing the control method of the power factor corrector, and execute the control method of the power factor corrector of the embodiment of the present application; for example, obtaining the detection temperature of the power factor corrector; when the detection temperature is greater than the preset temperature, outputting a first timing control signal; obtaining the feedback voltage of the power factor corrector; when the feedback voltage is greater than the preset feedback voltage, outputting a second timing control signal, and when the feedback voltage is not greater than the preset feedback voltage, outputting a third timing control signal; wherein, the first timing control signal controls the operating frequency of the high-frequency switching device to be not greater than the operating frequency of the high-frequency switching device controlled by the second timing control signal, and the second timing control signal controls the operating frequency of the high-frequency switching device to be not greater than the operating frequency of the high-frequency switching device controlled by the third timing control signal.

[0268] Optionally, the present application further provides a computer program product, which, when executed by the processor 401, implements the control method of the power factor corrector in any method embodiment of the present application.

[0269] For example, the computer program product may be stored in the memory 402 , such as a program 404 , which is finally converted into an executable target file that can be executed by the processor 401 after preprocessing, compiling, assembling, and linking.

[0270] Optionally, the present application further provides a computer-readable storage medium on which a computer program is stored, and when the computer program is executed by a computer, the control method of the power factor corrector described in any method embodiment of the present application is implemented. The computer program can be a high-level language program or an executable target program.

[0271] For example, the computer-readable storage medium is, for example, memory 402. Memory 402 may be a volatile memory or a non-volatile memory, or memory 402 may include both a volatile memory and a non-volatile memory. Among them, the non-volatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory may be a random access memory (RAM), which is used as an external cache. By way of example and not limitation, many forms of RAM are available, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous link DRAM (SLDRAM), and direct rambus RAM (DR RAM).

[0272] Those of ordinary skill in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0273] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0274] In the several embodiments provided in the present application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the embodiments of the electronic device described above are only schematic. For example, the division of the modules is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interfaces, devices or units, which can be electrical, mechanical or other forms.

[0275] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0276] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0277] It should be understood that in the various embodiments of the present application, the size of the serial number of each process does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0278] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application can be essentially or partly embodied in the form of a software product that contributes to the prior art. The computer software product is stored in a storage medium and includes several instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods described in the various embodiments of the present application. The aforementioned storage media include: various media that can store program codes, such as USB flash drives, mobile hard disks, read-only memories (ROM), random access memories (RAM), magnetic disks or optical disks.

[0279] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims. In short, the above is only a preferred embodiment of the technical solution of the present application, and is not used to limit the protection scope of the present application. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application should be included in the protection scope of the present application.

Claims

1. A control circuit of a power factor corrector, the power factor corrector comprising a high-frequency switching device and a low-frequency switching device, characterized in that: The control circuit of the power factor corrector includes a temperature detection module, a signal processing module, a feedback detection module and a switch control module; the signal processing module is connected to the temperature detection module, the feedback detection module and the switch control module respectively; The temperature detection module is configured to obtain a detected temperature of the power factor corrector; The feedback detection module is configured to obtain a feedback voltage of the power factor corrector; The signal processing module is configured to output a first timing control signal when the detected temperature is greater than a preset temperature; and is also configured to output a second timing control signal when the feedback voltage is greater than a preset feedback voltage, and output a third timing control signal when the feedback voltage is not greater than the preset feedback voltage; The switch control module is electrically connected to the signal processing module and is configured to control the high-frequency switch device and the low-frequency switch device to work according to the first timing control signal, the second timing control signal or the third timing control signal; The operating frequency of the high-frequency switch device controlled by the first timing control signal is less than or equal to the operating frequency of the high-frequency switch device controlled by the second timing control signal, and the operating frequency of the high-frequency switch device controlled by the second timing control signal is less than the operating frequency of the high-frequency switch device controlled by the third timing control signal.

2. The control circuit of the power factor corrector according to claim 1, characterized in that: The signal processing module includes a temperature comparator and a first controller; The temperature comparator is electrically connected to the temperature detection module and is configured to compare the detected temperature with the preset temperature, and output a first high level when the detected temperature is greater than the preset temperature; and output a first low level when the detected temperature is not greater than the preset temperature; The first controller is electrically connected to the temperature comparator, and is configured to output the first timing control signal according to the first high level.

3. The control circuit of the power factor corrector according to claim 2, characterized in that: The first controller includes an OR gate.

4. The control circuit of the power factor corrector according to any one of claims 1 to 3, characterized in that: The feedback detection module includes an input voltage detection unit and a feedback voltage detection unit; The input voltage detection unit is electrically connected to the signal processing module and is configured to obtain the input voltage of the power factor corrector; The feedback voltage detection unit is electrically connected to the signal processing module and is configured to obtain the feedback voltage of the power factor corrector.

5. The control circuit of the power factor corrector according to claim 4, characterized in that: The signal processing module also includes an input voltage comparator, a feedback voltage comparator, a D flip-flop and a second controller; The input voltage comparator is electrically connected to the input voltage detection unit and is configured to output a second high level when the input voltage is greater than a preset input voltage; and output a second low level when the input voltage is not greater than the preset input voltage; The D flip-flop is electrically connected to the input voltage comparator and is configured to output an enable signal when the second low level is converted to the second high level; The feedback voltage comparator is electrically connected to the feedback voltage detection unit and is configured to output a third high level when the feedback voltage is greater than a preset feedback voltage; and output a third low level when the feedback voltage is not greater than the preset feedback voltage; the third high level is a feedback signal; The second controller is electrically connected to the D flip-flop and the feedback voltage comparator, respectively, and is configured to output the second timing control signal according to the enable signal and the feedback signal, and vice versa, output the third timing control signal.

6. The control circuit of the power factor corrector according to claim 5, characterized in that: The second controller includes an AND gate.

7. The control circuit of the power factor corrector according to claim 5, characterized in that: The signal processing module also includes a digital filter; The digital filter is electrically connected to the input voltage comparator and the D flip-flop respectively, and is configured to perform filtering processing on the second high level and the second low level.

8. The control circuit of the power factor corrector according to claim 5, characterized in that: The control circuit of the power factor corrector also includes a zero-crossing detection unit; The zero-crossing detection unit is electrically connected to the signal processing module, and is configured to obtain the input voltage of the power factor corrector, and when the input voltage passes through a zero point, switch the second high level to the second low level.

9. A control method for a power factor corrector, characterized in that: A control circuit applied to a power factor corrector, wherein the power factor corrector comprises a high-frequency switching device and a low-frequency switching device; and a control method of the power factor corrector comprises: Acquiring a detected temperature of the power factor corrector; When the detected temperature is greater than a preset temperature, a first timing control signal is output; Obtaining a feedback voltage of the power factor corrector; When the feedback voltage is greater than a preset feedback voltage, a second timing control signal is output, and when the feedback voltage is not greater than the preset feedback voltage, a third timing control signal is output; wherein the operating frequency of the high-frequency switching device controlled by the first timing control signal is less than or equal to the operating frequency of the high-frequency switching device controlled by the second timing control signal, and the operating frequency of the high-frequency switching device controlled by the second timing control signal is less than the operating frequency of the high-frequency switching device controlled by the third timing control signal.

10. The control method of the power factor corrector according to claim 9, characterized in that: Also includes: Obtaining an input voltage of the power factor corrector; When the feedback voltage is greater than a preset feedback voltage, outputting a second timing control signal comprises: When the input voltage is greater than the preset input voltage, a second high level is output; when the input voltage is not greater than the preset input voltage, a second low level is output; When the second low level is converted to the second high level, an enable signal is output; When the feedback voltage is greater than the preset feedback voltage, a third high level is output; the third high level is a feedback signal; The second timing control signal is output according to the enable signal and the feedback signal.

11. The control method of the power factor corrector according to claim 9, characterized in that: Also includes: Obtaining an input voltage of the power factor corrector; When the feedback voltage is greater than a preset feedback voltage, outputting a second timing control signal comprises: When the input voltage is greater than the preset input voltage, a second high level is output; when the input voltage is not greater than the preset input voltage, a second low level is output; Counting the second high level and the second low level, and when the number of the second high level and the second low level is an even number, outputting an enable signal; When the feedback voltage is greater than the preset feedback voltage, a third high level is output; the third high level is a feedback signal; The second timing control signal is output according to the enable signal and the feedback signal.

12. The control method of the power factor corrector according to claim 10 or 11, characterized in that: When the second low level is converted to the second high level, before outputting the enable signal, the method further includes: The second high level and the second low level are filtered.

13. The control method of the power factor corrector according to claim 10 or 11, characterized in that: The control method of the power factor corrector also includes: When the input voltage passes through a zero point, the second high level is switched to the second low level.

14. The control method of a power factor corrector according to any one of claims 9 to 11, characterized in that: The high-frequency switch device includes a first switch device and a second switch device, and the low-frequency switch device includes a third switch device and a fourth switch device; The first timing control signal includes: When the input voltage waveform is in the first cycle, the first switching device and the second switching device are both in a high-frequency switching state, the third switching device and the fourth switching device are both in a low-frequency switching state, and the duty cycle of the driving waveform of the first switching device is complementary to the duty cycle of the driving waveform of the second switching device, and the duty cycle of the driving waveform of the third switching device is complementary to the duty cycle of the driving waveform of the fourth switching device; When the input voltage waveform is in the second cycle, the first switching device and the second switching device are both in a low-frequency switching state, the third switching device and the fourth switching device are both in a high-frequency switching state, and the duty cycle of the driving waveform of the first switching device is complementary to the duty cycle of the driving waveform of the second switching device, and the duty cycle of the driving waveform of the third switching device is complementary to the duty cycle of the driving waveform of the fourth switching device.

15. The control method of a power factor corrector according to any one of claims 9 to 11, characterized in that: The high-frequency switch device includes a first switch device and a second switch device, and the low-frequency switch device includes a third switch device and a fourth switch device; The second timing control signal includes: When the input voltage waveform is in the first cycle, the first switching device and the second switching device are both in a high-frequency switching state, the third switching device and the fourth switching device are both in a low-frequency switching state, and the duty cycle of the driving waveform of the first switching device is complementary to the duty cycle of the driving waveform of the second switching device, and the duty cycle of the driving waveform of the third switching device is complementary to the duty cycle of the driving waveform of the fourth switching device; When the input voltage waveform is in the second cycle, the first switching device and the second switching device are both in a low-frequency switching state, the third switching device and the fourth switching device are both in a high-frequency switching state, and the duty cycle of the driving waveform of the first switching device is complementary to the duty cycle of the driving waveform of the second switching device, and the duty cycle of the driving waveform of the third switching device is complementary to the duty cycle of the driving waveform of the fourth switching device.

16. The control method of a power factor corrector according to any one of claims 9 to 11, characterized in that: The high-frequency switch device includes a first switch device and a second switch device, and the low-frequency switch device includes a third switch device and a fourth switch device; The third timing control signal includes: When the input voltage waveform is in the first cycle, the first switching device and the second switching device are both in a high-frequency switching state, the third switching device and the fourth switching device are both in a low-frequency switching state, and the duty cycle of the driving waveform of the first switching device is complementary to the duty cycle of the driving waveform of the second switching device, and the duty cycle of the driving waveform of the third switching device is complementary to the duty cycle of the driving waveform of the fourth switching device; When the input voltage waveform is in the second cycle, the first switching device and the second switching device are both in a high-frequency switching state, the third switching device and the fourth switching device are both in a low-frequency switching state, and the duty cycle of the driving waveform of the first switching device is complementary to the duty cycle of the driving waveform of the second switching device, and the duty cycle of the driving waveform of the third switching device is complementary to the duty cycle of the driving waveform of the fourth switching device.

17. A charging and discharging device, characterized in that: A control circuit for a power factor corrector according to any one of claims 1 to 8 and a power factor corrector, wherein the power factor corrector comprises a high-frequency switching device and a low-frequency switching device; the high-frequency switching device and the low-frequency switching device are both connected to the control circuit of the power factor corrector; The high frequency switch device is configured to be turned on or off under the control of the control circuit of the power factor corrector; The low-frequency switching device is configured to be turned on or off under the control of the control circuit of the power factor corrector.

18. A charging and discharging device, characterized in that: The charging and discharging device includes: one or more processors, and a memory; The memory is coupled to the one or more processors, and the memory is used to store computer program codes, wherein the computer program codes include computer instructions, and the one or more processors call the computer instructions to enable the charging and discharging device to perform the method according to any one of claims 9 to 16.

19. A chip system, characterized in that: The chip system is applied to a charging and discharging device, and the chip system includes one or more processors, and the one or more processors are used to call computer instructions so that the charging and discharging device executes the method as described in any one of claims 9 to 16.

20. A computer-readable storage medium, characterized in that: The computer-readable storage medium includes instructions, and when the instructions are executed on the charging and discharging device, the charging and discharging device performs the method according to any one of claims 9 to 16.

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