Dual-mode signal controller, signal processing method and storage medium

Abstract

The present invention relates to the field of signal processing, and particularly to a dual-mode signal controller, a signal processing method, and a storage medium. The dual-mode signal controller includes: a signal processing unit, configured to match an input pulse signal according to a first signal intensity threshold and a first pulse width threshold corresponding to a target pulse signal obtained from a control unit to obtain the target pulse signal; split the target pulse signal into a first pulse signal and a second pulse signal, and transmit them to a delay adjustment branch and a frequency division adjustment branch respectively; the delay adjustment branch is configured to perform delay adjustment on the first pulse signal and output it; the frequency division adjustment branch is configured to perform frequency division adjustment on the second pulse signal and output it; an output unit, configured to perform a logical OR operation on the pulse signals output by the delay adjustment branch and the frequency division adjustment branch and output the result. The present invention effectively improves the noise reduction effect of the overall system and the accuracy of signal detection.

Description

Technical Field

[0001] The present invention relates to the field of signal processing, and in particular to a dual-mode signal controller, a signal processing method, and a storage medium. Background Art

[0002] A single-photon avalanche diode (SPAD) is an ultra-low-noise device, and its enhanced sensitivity enables it to detect photons. Single-photon avalanche diodes have been widely used in biophotonics, medical imaging, non-destructive material inspection, security and surveillance, vision and navigation, quantum imaging, and encryption systems. Existing detectors have the following problems in gating capabilities:

[0003] 1. Some near-infrared detectors or lasers have no gating capabilities or require an external gating controller, especially for miniaturized detection devices.

[0004] For example, when using a laser with a repetition rate of 10 MHz, in order to precisely control the emission time of the laser and ensure its match with the receiving window of the detector, it must be synchronized with an external gating controller of the same frequency. Since the detector is easily saturated, existing technologies usually use an external gating controller. In the application of non-line-of-sight near-infrared detection, if the first echo is too strong, subsequent echoes cannot be detected. Specifically, when the SPAD detector receives each laser pulse, it can only detect 0 or 1 photon and enters a dead time during which the detector cannot detect other photons. This dead time is caused by the avalanche event triggered by photons, and the detector needs time to recover. Since the SPAD is based on the Poisson statistical model, not the fluctuation model, a strong initial optical signal (the first echo) may cause the detector to saturate, so that subsequent weaker echoes (the third echo) arrive before the detector recovers, and thus cannot be detected. As a result, the detected signal may not be entirely composed of the third echo.

[0005] 2. Lack of down-conversion processing capabilities.

[0006] Existing detectors, such as the models provided by Aurea and MPD, usually do not have built-in down-conversion processing capabilities. These detectors may face challenges when dealing with high-repetition-rate lasers, especially when the repetition rate of the laser approaches or exceeds the maximum response rate of the detector. Due to the inherent dead time of the detector, it needs a short recovery period after each detected photon, during which new photons cannot be detected. Therefore, if the repetition rate of the laser is too high, it may mismatch with the dead time of the detector, causing a small time difference, which may result in some laser signals being missed during the dead time, increasing the background noise and affecting the accuracy of signal detection.

[0007] Problems with the down-conversion processing capabilities of the detector:

[0008] Existing detectors such as Aurea and MPD do not have the function of down - frequency processing. This means that they cannot automatically adjust to match the repetition frequency of the incident laser.

[0009] Problem of mismatch between the laser repetition frequency and the detector dead time:

[0010] For the repetition frequency of a laser, such as 10 MHz, the corresponding period is 100 ns, while the detector has a relatively long dead time, such as 5 μs, that is, 5000 ns. During the dead time of the detector, the laser still emits pulses, but since the detector cannot detect any signals during this period, these extra pulses will turn into background noise, affecting the overall signal clarity.

[0011] 3. Lack of fine - control ability.

[0012] The gating module of existing detectors lacks fine - control ability and usually can only uniformly control the overall detection signal. For example, adjusting the gate width or delay, but cannot achieve individual control of each single - shot signal. Summary of the Invention

[0013] Embodiments of the present invention provide a dual - mode signal controller, a signal processing method, and a storage medium to at least partially solve the above - mentioned problems existing in the detector.

[0014] On the one hand, the present invention provides a dual - mode signal controller, and the dual - mode signal controller includes a signal processing unit, a control unit, a delay adjustment branch, a frequency - division adjustment branch, and an output unit:

[0015] The signal processing unit is configured to match the input pulse signal according to the first signal intensity threshold and the first pulse width threshold corresponding to the target pulse signal obtained from the control unit to obtain the target pulse signal; split the target pulse signal into a first pulse signal and a second pulse signal, and transmit them to the delay adjustment branch and the frequency - division adjustment branch respectively;

[0016] The delay adjustment branch is configured to perform delay adjustment on the first pulse signal and output it;

[0017] The frequency - division adjustment branch is configured to perform frequency - division adjustment on the second pulse signal and output it;

[0018] The output unit is configured to perform logical OR processing on the pulse signals output by the delay adjustment branch and the frequency - division adjustment branch and output the result.

[0019] Optionally, the signal processing unit is provided with a comparator circuit and a trigger circuit; a digital potentiometer is provided between the signal processing unit and the control unit; the control unit outputs two different voltages through a first digital potentiometer, and loads the two different voltages onto the comparator circuit to control the first signal strength threshold and controls the first pulse width threshold through the trigger circuit.

[0020] Optionally, the delay adjustment branch includes a first delay adjustment module and a first waveform adjustment module;

[0021] The first delay adjustment module is used to perform delay processing on the first pulse signal according to the delay value corresponding to the target pulse signal obtained from the control unit and output it;

[0022] The first waveform adjustment module is used to adjust and output the pulse signal output by the first delay adjustment module according to the second signal strength threshold and the second pulse width threshold corresponding to the target pulse signal obtained from the control unit; the output pulse signal is the pulse signal output by the delay adjustment branch.

[0023] Optionally, the first delay adjustment module includes two delay chips; the delay value range is set to 40 - 170 ns through the two delay chips.

[0024] Optionally, the first waveform adjustment module is provided with a comparator circuit and a trigger circuit.

[0025] Optionally, the frequency division adjustment branch includes a frequency division processing module, a second delay adjustment module, and a second waveform adjustment module;

[0026] The frequency division processing module is used to perform frequency division processing on the second pulse signal according to the frequency division multiple corresponding to the target pulse signal obtained from the control unit and output it;

[0027] The second delay adjustment module is used to perform delay processing on the pulse signal output by the frequency division processing module according to the delay value corresponding to the target pulse signal obtained from the control unit and output it;

[0028] The second waveform adjustment module is used to adjust and output the pulse signal output by the second delay adjustment module according to the second signal strength threshold and the second pulse width threshold corresponding to the target pulse signal obtained from the control unit; the output pulse signal is the pulse signal output by the frequency division adjustment branch.

[0029] Optionally, the dual-mode signal controller includes an instruction mode and a pulse mode; a parameter configuration table is provided in the control unit;

[0030] In the instruction mode, the control unit is configured to receive an external interaction instruction and set control parameters of a target pulse signal according to the interaction instruction;

[0031] In the pulse mode, the control unit is configured to detect and record the number of pulses input through a pulse input interface, and when each pulse is accumulated, call the configuration parameters associated with the number of pulses in the parameter configuration table to set the control parameters of the target pulse signal; the control parameters include a first signal strength threshold, a first pulse width threshold, a second signal strength threshold, a second pulse width threshold, a frequency division multiple, and a delay value.

[0032] On the other hand, the present invention further provides a signal processing method for a dual-mode signal controller, and the signal processing method for the dual-mode signal controller includes:

[0033] Match the input pulse signal according to the obtained first signal strength threshold and first pulse width threshold corresponding to the target pulse signal to obtain the target pulse signal; split the target pulse signal into a first pulse signal and a second pulse signal;

[0034] Perform delay adjustment on the first pulse signal and output it;

[0035] Perform frequency division adjustment on the second pulse signal and output it;

[0036] Perform logical OR processing on the pulse signal after delay adjustment and output and the pulse signal after frequency division adjustment and output and output it.

[0037] Optionally, the dual-mode signal controller includes an instruction mode and a pulse mode; the signal processing method for the dual-mode signal controller further includes:

[0038] In the instruction mode, receive an external interaction instruction and set control parameters of a target pulse signal according to the interaction instruction;

[0039] In the pulse mode, detect and record the number of pulses input through a pulse input interface, and when each pulse is accumulated, call the configuration parameters associated with the number of pulses in the parameter configuration table to set the control parameters of the target pulse signal; the control parameters include a first signal strength threshold, a first pulse width threshold, a second signal strength threshold, a second pulse width threshold, a frequency division multiple, and a delay value.

[0040] On yet another aspect, the present invention provides a computer-readable storage medium, on which a signal processing program for a dual-mode signal controller is stored, and the signal processing program for the dual-mode signal controller can be executed by at least one processor to implement the steps of the signal processing method for a dual-mode signal controller as described in any one of the above.

[0041] Through the cooperation of a signal processing unit, a control unit, a delay adjustment branch, a frequency division adjustment branch, and an output unit, the present invention realizes the delay and frequency division capabilities of an input signal, which helps to make the operating frequencies of supporting devices consistent, and can also synchronize a pulse signal emitted by, for example, a laser with a pre-set pulse width signal, and can also reduce the repetition frequency of the laser to adapt to, for example, the dead time of a detector, thereby achieving the purpose of noise reduction.

[0042] The above description is only an overview of the technical solution of the present invention. In order to be able to understand the technical means of the present invention more clearly, it can be implemented according to the content of the specification. And in order to make the above and other purposes, features, and advantages of the present invention more obvious and understandable, the following specifically illustrates the specific embodiments of the present invention. Description of the Drawings

[0043] By reading the following detailed description of the preferred embodiments, various other advantages and benefits will become clear to those of ordinary skill in the art. The drawings are only for the purpose of showing the preferred embodiments and are not considered to be a limitation of the present invention. Moreover, throughout the drawings, the same reference numerals are used to represent the same components. In the drawings:

[0044] Figure 1 is the architecture diagram of the dual-mode signal controller provided by the embodiment of the present invention;

[0045] Figure 2 is the signal processing method flowchart of the dual-mode signal controller provided by the embodiment of the present invention. Detailed Embodiments

[0046] Hereinafter, exemplary embodiments of the present disclosure will be described in more detail with reference to the drawings. Although the exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure can be implemented in various forms and should not be limited by the embodiments set forth herein. On the contrary, these embodiments are provided so that the present disclosure can be more thoroughly understood and the scope of the present disclosure can be fully conveyed to those skilled in the art.

[0047] In the following description, suffixes such as "module", "component", or "unit" used to represent elements are only for the convenience of description of the present invention and have no specific meaning in themselves. Therefore, "module", "component", or "unit" can be used interchangeably. Expressions such as "first", "second", etc. are only used to distinguish technical terms.

[0048] The dual-mode signal controller provided by the embodiments of the present invention can be used, but not limited to, photon detection gating elements, and provides two working modes: gating mode and pulse mode. In the command mode, the user can adjust the pulse width and delay of the pulse signal, thereby controlling the characteristics of the signal. The pulse mode focuses on the precise control of each channel and each pulse signal, and uses a dual matrix structure to achieve this function. This structure includes the clock signal of the laser pulse and a preset delay matrix, enabling the device to effectively adjust the delay time of the signal. By precisely controlling the arrival time of each signal, the element ensures the accuracy and repeatability of the detection system. In addition, the user can also flexibly control the pulse width, delay, and frequency division multiple (frequency division factor) to meet the requirements of different application scenarios.

[0049] The dual-mode signal controller may include: a pulse signal input interface, two SMA output interfaces, a clock signal (control pulse) input interface, a USB interface, a signal processing unit, a delay adjustment branch, a frequency division adjustment branch, a control unit (micro control unit MCU), etc. The delay adjustment branch may include a first delay adjustment module and a first waveform adjustment module. The frequency division adjustment branch may include a frequency division processing module, a second delay adjustment module, and a second waveform adjustment module.

[0050] In some embodiments, the dual-mode signal controller includes a signal processing unit, a control unit, a delay adjustment branch, a frequency division adjustment branch, and an output unit.

[0051] The signal processing unit is configured to match the input pulse signal according to the first signal intensity threshold and the first pulse width threshold corresponding to the target pulse signal obtained from the control unit to obtain the target pulse signal; split the target pulse signal into a first pulse signal and a second pulse signal, and transmit them to the delay adjustment branch and the frequency division adjustment branch respectively;

[0052] The delay adjustment branch is configured to perform delay adjustment on the first pulse signal and output it;

[0053] The frequency division adjustment branch is configured to perform frequency division adjustment on the second pulse signal and output it;

[0054] The output unit is configured to perform a logical OR operation on the pulse signals output by the delay adjustment branch and the frequency division adjustment branch and output the result.

[0055] The embodiments of the present invention achieve the ability to delay and frequency divide input signals, which helps to make the operating frequencies of supporting devices consistent, and can also synchronize the pulse signals emitted by, for example, lasers with the pre-set pulse width signals, and can also reduce the repetition frequency of the laser to adapt to the dead time of detectors, thereby achieving the purpose of noise reduction.

[0056] Optionally, the delay adjustment branch includes a first delay adjustment module and a first waveform adjustment module;

[0057] The first delay adjustment module is configured to perform delay processing on the first pulse signal according to the delay value corresponding to the target pulse signal obtained from the control unit and output the result;

[0058] The first waveform adjustment module is configured to adjust and output the pulse signal output by the first delay adjustment module according to the second signal intensity threshold and the second pulse width threshold corresponding to the target pulse signal obtained from the control unit; the output pulse signal is the pulse signal output by the delay adjustment branch.

[0059] The frequency division adjustment branch includes a frequency division processing module, a second delay adjustment module, and a second waveform adjustment module;

[0060] The frequency division processing module is configured to perform frequency division processing on the second pulse signal according to the frequency division multiple corresponding to the target pulse signal obtained from the control unit and output the result;

[0061] The second delay adjustment module is configured to perform delay processing on the pulse signal output by the frequency division processing module according to the delay value corresponding to the target pulse signal obtained from the control unit and output the result;

[0062] The second waveform adjustment module is configured to adjust and output the pulse signal output by the second delay adjustment module according to the second signal intensity threshold and the second pulse width threshold corresponding to the target pulse signal obtained from the control unit; the output pulse signal is the pulse signal output by the frequency division adjustment branch.

[0063] In some embodiments, the dual-mode signal controller includes an instruction mode and a pulse mode; a parameter configuration table is set in the storage medium of the control unit; the control unit can set a pulse input interface;

[0064] In the instruction mode, the control unit is configured to receive an external interaction instruction and set the control parameters of the target pulse signal according to the interaction instruction;

[0065] In the pulse mode, the control unit is configured to detect and record the number of pulses input through the pulse input interface, and when each pulse is accumulated, call the configuration parameters associated with the number of pulses in the parameter configuration table to set the control parameters of the target pulse signal; the control parameters include a first signal intensity threshold, a first pulse width threshold, a second signal intensity threshold, a second pulse width threshold, a frequency division multiple, and a delay value.

[0066] Based on the above-provided dual-mode signal controller, its signal processing method may include:

[0067] Match the input pulse signal according to the obtained first signal intensity threshold and first pulse width threshold corresponding to the target pulse signal to obtain the target pulse signal; split the target pulse signal into a first pulse signal and a second pulse signal, and transmit them to the delay adjustment branch and the frequency division adjustment branch respectively;

[0068] Perform delay adjustment on the first pulse signal and output it;

[0069] Perform frequency division adjustment on the second pulse signal and output it;

[0070] Perform logical OR processing on the pulse signal output after delay adjustment and the pulse signal output after frequency division adjustment and output it.

[0071] Optionally, performing delay adjustment on the first pulse signal and outputting it includes:

[0072] Perform delay processing on the first pulse signal according to the obtained delay value corresponding to the target pulse signal and output it;

[0073] Adjust and output the pulse signal output after delay processing according to the obtained second signal intensity threshold and second pulse width threshold corresponding to the target pulse signal from the control unit.

[0074] Optionally, performing frequency division adjustment on the second pulse signal and outputting it includes:

[0075] Perform frequency division processing on the second pulse signal according to the obtained frequency division multiple corresponding to the target pulse signal and output it;

[0076] Perform delay processing on the pulse signal output after frequency division processing according to the obtained delay value corresponding to the target pulse signal and output it;

[0077] Adjust and output the pulse signal output after delay processing according to the obtained second signal intensity threshold and second pulse width threshold corresponding to the target pulse signal.

[0078] In some embodiments, the dual-mode signal controller includes an instruction mode and a pulse mode; the signal processing method of the dual-mode signal controller further includes:

[0079] In the instruction mode, receive an external interaction instruction and set the control parameters of the target pulse signal according to the interaction instruction;

[0080] In the pulse mode, the number of pulses input through the pulse input interface is detected and recorded. When each pulse is accumulated, the configuration parameters associated with the number of pulses in the parameter configuration table are called to set the control parameters of the target pulse signal; the control parameters include a first signal strength threshold, a first pulse width threshold, a second signal strength threshold, a second pulse width threshold, a frequency division multiple, and a delay value.

[0081] In addition, an embodiment of the present invention further provides a computer-readable storage medium, on which a signal processing program of a dual-mode signal controller is stored. The signal processing program of the dual-mode signal controller can be executed by at least one processor to implement the steps of the signal processing method of the dual-mode signal controller as described in any one of the above.

[0082] The following uses a specific example to describe in detail the dual-mode signal controller, signal processing method, and storage medium provided by the embodiments of the present invention.

[0083] Each module of the dual-mode signal controller is mainly used to complete the following tasks:

[0084] 1) A signal processing unit, configured to match an input pulse signal according to a first signal strength threshold and a first pulse width threshold corresponding to a target pulse signal obtained from a control unit to obtain a target pulse signal, and split the target pulse signal into a first pulse signal, a second pulse signal, and a third pulse signal.

[0085] Among them, the obtaining methods of the first signal strength threshold and the first pulse width threshold include pre-setting and obtaining from an MCU (micro control unit). For example, a first digital potentiometer (digital potentiometer 1) is provided between the MCU and the signal processing unit. The signal processing unit can be composed of a processor and peripheral circuits. The processor can be selected according to actual needs and is not specifically limited here. Among them, the peripheral circuits mainly include a comparator circuit and a trigger circuit. A digital potentiometer is provided between the signal processing unit and the control unit; the control unit outputs two different voltages through the first digital potentiometer, and loads the two different voltages onto the comparator circuit to control the first signal strength threshold; the first pulse width threshold is controlled through the trigger circuit.

[0086] Perform amplitude limiting, shaping, and splitting on the pulse signal (i.e., analog signal) input through the SMA interface. Then the signal is divided into 3 paths, namely a first pulse signal, a second pulse signal, and a third pulse signal. Optionally, the 3 path pulse signals can be shaped into standard TTL / NIM signals. This processing can effectively solve the problems of signal amplitude decline, noise enhancement, and other situations that affect signal discrimination. The following refers to the first pulse signal, the second pulse signal, and the third pulse signal as signal 1, signal 2, and signal 3 respectively. Of course, in the specific implementation process, an interface other than the SMA interface can also be used.

[0087] RMS Jitter (Root Mean Square Jitter) refers to the root mean square value of the jitter in a clock signal or pulse signal. Jitter refers to the periodic or random fluctuations of a signal, which may cause timing errors in the signal. RMS Jitter is a commonly used statistical metric to describe the magnitude of such fluctuations. Specifically, RMS Jitter represents the standard deviation of the jitter, and its calculation process involves measuring the time series data of the jitter and obtaining the square root value through the method of sum of squares and mean to represent the intensity of the jitter. This process introduces the notation of RMS Jitter as J 1 , that is, the RMS Jitter of the target pulse signal is denoted as J 1 .

[0088] In the specific implementation process, the signal output by the laser in the detector is divided into two paths according to the intensity and input to the SMA interface. One path is the above-mentioned pulse signal, and the other path belongs to the reference signal. The analog signal is the signal used to detect the target object and is the signal on the main optical path. The intensity of the reference signal is weaker than that of the analog signal, and other attributes are the same. The reference signal is used to align with the pulse signal for detecting the target object; in other words, the dual-mode signal controller can determine the time of the pulse signal output by the laser, the time of the first echo of the pulse signal, etc. based on the reference signal.

[0089] Among them, the first signal intensity threshold and the first pulse width threshold can be set according to the target echo signal. For example, if it is necessary to match the second echo, it can be set according to the intensity and pulse width of the second echo signal; if it is necessary to match the third echo, it can be set according to the intensity and pulse width of the third echo signal.

[0090] For example, if it is necessary to detect a target object behind a wall through a detector and an analog signal is output by a laser, at this time, the wall will return a first echo, and the target object will return a second echo. Of course, there can also be a matching situation for the third echo. Since the detector is easily saturated, in the application of non-line-of-sight near-infrared detection, if the first echo is too strong, subsequent echoes cannot be detected. Specifically, when the SPAD detector receives each laser pulse, it can only detect 0 or 1 photon and enters a dead time during which the detector cannot detect other photons. This dead time is caused by the avalanche event triggered by photons, and the detector needs time to recover. Since the SPAD is based on the Poisson statistical model, not the fluctuation model, a stronger first echo may cause the detector to saturate, so that subsequent weaker third echoes and the like arrive before the detector recovers, and thus cannot be detected. As a result, the detected signal may not be completely composed of the third echo. The embodiment of the present invention can effectively solve this problem by setting a signal processing unit. In addition, by pulse width modulation, it is also possible to effectively avoid situations such as signal amplitude decrease and noise enhancement that will affect signal discrimination.

[0091] Among them, the third pulse signal formed by splitting the target pulse signal (signal 1) is directly output using an SMA interface. The signal output parameters satisfy Vmin>100mV, Vmax<5V, pulse width>0.5ns, and impedance matching 50Ω. For the pulse width control of the first pulse signal (signal 2), the optional range is 1-50ns, and the step size is 500ps.

[0092] 2) The first delay adjustment module is used to delay-adjust the first pulse signal according to the delay value corresponding to the target pulse signal obtained from the micro-control unit and output a fourth pulse signal. Among them, the acquisition methods of the delay value and the first pulse width threshold include presetting and obtaining from the MCU (micro-control unit).

[0093] Optionally, for the pulse width control of the first pulse signal, the adjustment range is 0-3300mV, and the resolution is 100mV; and for the delay adjustment, the delay value range for delay adjustment is 40-170ns, and the resolution is 500ps. The output signal is called the fourth pulse signal (signal 4). Optionally, in order to solve the problem that causes obvious changes in the output waveform (such as signal amplitude decrease, noise enhancement, etc. that will affect signal discrimination), the second pulse signal is shaped into a standard TTL / NIM signal and output. This process introduces RMS Jitter denoted as J 2 That is, the RMS Jitter of the pulse signal output by the first delay adjustment module is denoted as J 2 .

[0094] The first delay adjustment module includes two cascaded delay chips.

[0095] In some embodiments, the delay value can be set according to the first echo of the reference signal. The detection timing of the detector can be set by the delay value, further solving the problem that the detector is prone to saturation, and effectively solving the following problem: in the application of non-line-of-sight near-infrared detection, if the first echo is too strong, subsequent echoes cannot be detected. Specifically, when the SPAD detector receives each laser pulse, it can only detect 0 or 1 photon and enters a dead time during which the detector cannot detect other photons. This dead time is caused by the avalanche event triggered by photons, and the detector needs time to recover. Since the SPAD is based on the Poisson statistical model, not the fluctuation model, a stronger first echo may cause the detector to saturate, so that subsequent weaker third echoes, etc., arrive before the detector recovers, and thus cannot be detected. As a result, the detected signal may not be entirely composed of the third echo.

[0096] 3) The frequency division processing module is used to perform frequency division processing on the second pulse signal (Signal 3) according to the frequency division multiple corresponding to the target pulse signal obtained from the control unit, and output the fifth pulse signal (Signal 5). Among them, the acquisition method of the frequency division multiple includes pre-setting and obtaining from the MCU (Micro Control Unit). Optionally, for the down-conversion processing of Signal 3, the down-conversion multiple is 1 - 4096 times, the pulse width control, the adjustment range is 0 - 3300 mV, and the resolution is 100 mV; and the delay adjustment, the adjustment range is 47 - 170 ns, and the resolution is 500 ps.

[0097] The frequency division processing module can be composed of a frequency divider, and the MCU sets the frequency division multiple of the frequency divider through the SPI interface.

[0098] Existing detectors such as Aurea and MPD do not have the function of down-conversion processing. This means that they cannot automatically adjust to match the repetition frequency of the incident laser. The embodiment of the present invention effectively solves the problem of mismatch between the laser repetition frequency and the detector dead time through the frequency division processing module:

[0099] The repetition frequency of the laser, for example, 10 MHz, corresponds to a period of 100 ns, while the dead time of the detector is relatively long, for example, 5 μs, that is, 5000 ns. During the dead time of the detector, the laser still emits pulses, but since the detector cannot detect any signals during this period, these additional pulses will turn into background noise, affecting the overall signal clarity.

[0100] 4) The second delay adjustment module is used to perform delay adjustment on the fifth pulse signal according to the delay value corresponding to the target pulse signal obtained from the micro control unit, and output the sixth pulse signal (Signal 6). Among them, the acquisition methods of the delay value and the first pulse width threshold include pre-setting and obtaining from the MCU (Micro Control Unit).

[0101] Optionally, the delay value ranges from 40 to 170 ns, with a step size of 500 ps.

[0102] 5) The first waveform adjustment module is configured to adjust the fifth pulse signal according to the second signal intensity threshold and the second pulse width threshold corresponding to the target pulse signal obtained from the microcontroller unit, and output a seventh pulse signal.

[0103] The second waveform adjustment module is configured to adjust the sixth pulse signal according to the second signal intensity threshold and the second pulse width threshold corresponding to the target pulse signal obtained from the microcontroller unit, and output an eighth pulse signal.

[0104] Among them, the acquisition methods of the second signal intensity threshold and the second pulse width threshold include presetting and obtaining from the MCU (microcontroller unit).

[0105] For the specific implementation of the first waveform adjustment module and the second waveform adjustment module, reference can be made to the signal processing unit. A comparator circuit and a trigger circuit can be set up.

[0106] Optionally, the pulse width control range is 1 - 50 ns, with a step size of 500 ps. Optionally, if the seventh pulse signal and the eighth pulse signal are amplitude-limited and shaped, it can effectively avoid obvious changes in the output waveform (such as situations where signal amplitude decreases, noise increases, etc. that affect signal discrimination). Optionally, it should be shaped into a standard TTL / NIM signal for output, and the RMS Jitter introduced in this process is denoted as J 3 That is, the RMS Jitter of the pulse signals output by the first waveform adjustment module and the second waveform adjustment module is denoted as J 3 .

[0107] 6) The output unit is configured to perform logical OR and shaping on the seventh pulse signal and the eighth pulse signal through an OR gate, and output the output signal as the tenth pulse signal. The parameters of the tenth pulse signal satisfy Vmin > 100 mV, Vmax < 3.3 V, impedance matching of 50 Ω, and optionally shaped into a standard TTL signal. The RMS Jitter introduced in this process is denoted as J 4 , and is output to the detector using an SMA interface. The RMS Jitter of the pulse signal output by the output unit is denoted as J 4 .

[0108] 7) The MCU is provided with a parameter configuration table, in which control parameters for each received target pulse signal are set in the delay adjustment branch and the frequency division adjustment branch. The control parameters for each target pulse signal include the first signal strength threshold and the first pulse width threshold of the second, third, fourth, fifth, sixth, seventh, eighth, and eighth pulse signals, the delay value, the frequency division multiple, the second signal strength threshold, the second pulse width threshold, etc.

[0109] Among them, the MCU is used to set the control parameters of each target pulse signal in the parameter configuration table, count the number of pulses input through the pulse input interface according to the interaction instruction of the host computer or detect and record, and when each pulse is accumulated, call the configuration parameters associated with the pulse number in the parameter configuration table to set the control parameters of the target pulse signal in the delay adjustment branch and the frequency division adjustment branch respectively according to the called control parameters.

[0110] The MCU receives the clock signal from the clock signal (control pulse) input interface and receives the interaction instruction of the host computer from the USB interface.

[0111] In specific implementation, two data tables are pre-written in the storage medium of the MCU, and each table should have two columns. The first column corresponds to the cumulative number of received pulses, and the second column corresponds to the specific configuration parameter values corresponding to the pulse number. The number of rows in the data table is 1024 (1K). The two data tables can be constructed in the form of matrix A / B or array in the MCU.

[0112] After switching to the pulse control mode, the control unit will detect and record the number of pulses input through the pulse input interface in real time. Whenever a pulse is accumulated, the control unit will configure the configuration parameters associated with the corresponding pulse number into the relevant functional unit modules. With this as a constraint condition, when the number of pulses accumulates to 1024, the controller will reset the pulse count value, start recording from 0 again, and respond to the corresponding configuration parameters.

[0113] The response period of the pulse instruction of the controller should not be greater than 1 ms.

[0114] In the embodiment of the present invention, by adopting a parameter configuration table, especially in the form of a double matrix / double array, the fine control ability is realized. It effectively solves the problem that the gating module of the existing detector lacks the fine control ability and usually can only uniformly control the overall detection signal. For example, adjusting the gate width or delay, but it is impossible to individually control each point-shot signal.

[0115] 8) Equip a host computer to realize flexible control of the pulse width, delay, and frequency reduction multiple, and modify the values in matrix A / B;

[0116] In some embodiments, through the indicators, the matching effect of the dual-mode signal controller can be effectively guaranteed, and the above indicators need to be satisfied:

[0117] ;

[0118] ;

[0119] 。

[0120] In addition, priority should be given to ensuring that J 1 is as small as possible.

[0121] It should be noted that, in this document, the terms "include", "comprise" or any other variant thereof are intended to cover non-exclusive inclusion, such that a process, method, article or apparatus that includes a series of elements includes not only those elements but also other elements not expressly listed, or elements that are inherent to such process, method, article or apparatus. Without further limitation, an element defined by the phrase "including an..." does not exclude the presence of additional identical elements in the process, method, article or apparatus that includes such element.

[0122] The serial numbers of the embodiments of the present invention above are only for description and do not represent the superiority or inferiority of the embodiments.

[0123] The embodiments of the present invention have been described above in conjunction with the accompanying drawings. However, the present invention is not limited to the specific embodiments described above. The above specific embodiments are merely illustrative and not restrictive. Those of ordinary skill in the art, under the inspiration of the present invention and without departing from the spirit and scope protected by the present invention and its claims, can still make many forms, and all of these fall within the protection scope of the present invention.

Claims

1. A dual-mode signal controller, characterized in that: The dual-mode signal controller includes a signal processing unit, a control unit, a delay adjustment branch, a frequency division adjustment branch and an output unit: The signal processing unit is used to match the input pulse signal according to the first signal strength threshold and the first pulse width threshold corresponding to the target pulse signal obtained from the control unit to obtain the target pulse signal; Splitting the target pulse signal into a first pulse signal and a second pulse signal, and transmitting them to the delay adjustment branch and the frequency division adjustment branch respectively; The delay adjustment branch is used to delay and output the first pulse signal; the delay adjustment branch includes a first delay adjustment module and a first waveform adjustment module; The frequency division adjustment branch is used to perform frequency division adjustment on the second pulse signal and output it; the frequency division adjustment branch includes a second waveform adjustment module; The output unit is used to perform logical OR processing on the pulse signals output by the delay adjustment branch and the frequency division adjustment branch and output them; Among them, the RMS value of the jitter of the target pulse signal is recorded as J 1. The jitter root mean square value of the pulse signal output by the first delay adjustment module is recorded as J 2. The jitter root mean square value of the pulse signal output by the first waveform adjustment module and the second waveform adjustment module is recorded as J 3. The RMS value of the jitter of the pulse signal output by the output unit is recorded as J 4; J 1. J 2. J 3 and J 4 Satisfaction: ； ； 。 2. The dual-mode signal controller according to claim 1, characterized in that: The signal processing unit is provided with a comparator circuit and a trigger circuit; a digital potentiometer is provided between the signal processing unit and the control unit; the control unit outputs two different voltages through the first digital potentiometer, and loads the two different voltages to the comparator circuit to control the first signal strength threshold and controls the first pulse width threshold through the trigger circuit.

3. The dual-mode signal controller according to claim 1, characterized in that: The first delay adjustment module is used to delay the first pulse signal and output it according to the delay value corresponding to the target pulse signal obtained from the control unit; The first waveform adjustment module is used to adjust and output the pulse signal output by the first delay adjustment module according to the second signal strength threshold and the second pulse width threshold corresponding to the target pulse signal obtained from the control unit; the output pulse signal is the pulse signal output by the delay adjustment branch.

4. The dual-mode signal controller according to claim 3, characterized in that: The first delay adjustment module includes two delay chips; the delay value range is set to 40-170ns through the two delay chips.

5. The dual-mode signal controller according to claim 3, characterized in that: The first waveform adjustment module is provided with a comparator circuit and a trigger circuit.

6. The dual-mode signal controller according to claim 1, characterized in that: The frequency division adjustment branch also includes a frequency division processing module and a second delay adjustment module; The frequency division processing module is used to perform frequency division processing on the second pulse signal and output it according to the frequency division multiple corresponding to the target pulse signal obtained from the control unit; The second delay adjustment module is used to delay the pulse signal output by the frequency division processing module and output it according to the delay value corresponding to the target pulse signal obtained from the control unit; The second waveform adjustment module is used to adjust and output the pulse signal output by the second delay adjustment module according to the second signal strength threshold and the second pulse width threshold corresponding to the target pulse signal obtained from the control unit; the output pulse signal is the pulse signal output by the frequency division adjustment branch.

7. The dual-mode signal controller according to any one of claims 1 to 6, characterized in that: The dual-mode signal controller includes a command mode and a pulse mode; a parameter configuration table is provided in the control unit; In the command mode, the control unit is used to receive external interactive commands and set the control parameters of the target pulse signal according to the interactive commands; In pulse mode, the control unit is used to detect and record the number of pulses input by the pulse input interface. When each pulse is accumulated, the configuration parameters associated with the number of pulses in the parameter configuration table are called to set the control parameters of the target pulse signal; the control parameters include a first signal strength threshold, a first pulse width threshold, a second signal strength threshold, a second pulse width threshold, a frequency division multiple and a delay value.

8. A signal processing method for a dual-mode signal controller, characterized in that: The signal processing method of the dual-mode signal controller includes: Matching the input pulse signal according to the obtained first signal strength threshold and first pulse width threshold corresponding to the target pulse signal to obtain the target pulse signal; splitting the target pulse signal into a first pulse signal and a second pulse signal; Delay-adjusting and outputting the first pulse signal; Performing frequency division adjustment on the second pulse signal and outputting the signal; Performing logical OR processing on the pulse signal outputted by delay adjustment and the pulse signal outputted by frequency division adjustment and outputting them; Among them, the RMS value of the jitter of the target pulse signal is recorded as J 1, the jitter root mean square value of the pulse signal output after delay adjustment of the first pulse signal is recorded as J 2. The jitter root mean square value of the pulse signal output by frequency division adjustment of the second pulse signal is recorded as J 3. The RMS value of the jitter of the pulse signal processed and output by logical OR is recorded as J 4; J 1. J 2. J 3 and J 4 Satisfaction: ； ； 。 9. The signal processing method of the dual-mode signal controller according to claim 8, characterized in that: The dual-mode signal controller includes a command mode and a pulse mode, and the dual-mode signal controller also has a parameter configuration table; the signal processing method of the dual-mode signal controller also includes: In the command mode, external interactive commands are received and control parameters of the target pulse signal are set according to the interactive commands; In pulse mode, the number of pulses input from the pulse input interface is detected and recorded. When each pulse is accumulated, the configuration parameters associated with the number of pulses in the parameter configuration table are called to set the control parameters of the target pulse signal; the control parameters include a first signal strength threshold, a first pulse width threshold, a second signal strength threshold, a second pulse width threshold, a frequency division multiple and a delay value.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a signal processing program of a dual-mode signal controller, and the signal processing program of the dual-mode signal controller can be executed by at least one processor to implement the steps of the signal processing method of a dual-mode signal controller as claimed in any one of claims 8 to 9.

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