Data encryption method and device based on SM3 algorithm with configurable parallelism

Abstract

The application provides a data encryption method and device based on a parallelism-configurable SM3 algorithm, and relates to the technical field of data encryption. The method comprises the following steps: grouping a padded message obtained after message padding of a to-be-encrypted message to obtain a plurality of message groups; performing message expansion on each message group based on a pre-configured first parallelism to obtain a plurality of message words corresponding to each message group; wherein the first parallelism indicates that at least one message expansion module is cascaded, and the message expansion module is used for generating the message word; and performing data encryption on the to-be-encrypted message based on each message word corresponding to each message group to obtain encrypted data. Through the pre-configured first parallelism, message expansion of each message group is realized, and the pre-configured first parallelism can be adjusted according to actual conditions, thereby realizing data encryption and improving the throughput rate of hardware design.

Description

Technical Field

[0001] This invention relates to the field of data encryption technology, and in particular to a data encryption method and apparatus based on the SM3 algorithm with configurable parallelism. Background Technology

[0002] In recent years, with the rapid development of my country's digital economy and the explosive growth of the total amount of data in society, there has been a high demand for improving computing power, i.e., improving data processing capabilities and increasing data storage speed. Similarly, information security cannot be ignored in the process of high-speed data transmission and processing. Therefore, improving the ability to ensure information security is of great significance.

[0003] Cryptographic technology is the core of the modern information security technology industry. Among them, the SM3 cryptographic hash algorithm is widely used in network security and digital signatures due to its security, efficiency, and applicability. With the continuous development of technology, the demand for hardware encryption efficiency of the SM3 algorithm is also increasing. Currently, the SM3 algorithm mainly relies on pipelining technology to improve execution efficiency and speed. However, due to the dependencies between adjacent iterative calculations, pipelining technology alone is insufficient to improve the throughput of hardware designs. Summary of the Invention

[0004] This invention provides a data encryption method and apparatus based on the SM3 algorithm with configurable parallelism, in order to solve the problem of difficulty in improving the throughput of hardware design.

[0005] This invention provides a data encryption method based on the SM3 algorithm with configurable parallelism, comprising:

[0006] After padding the encrypted message, the padded message is grouped to obtain multiple message groups;

[0007] Based on a pre-configured first degree of parallelism, message expansion is performed on each message group to obtain multiple message words corresponding to each message group; wherein, the first degree of parallelism indicates that at least one message expansion module is cascaded, and the message expansion module is used to generate the message words;

[0008] Based on the message words corresponding to each of the message groups, the message to be encrypted is encrypted to obtain encrypted data.

[0009] According to the present invention, a data encryption method based on the SM3 algorithm with configurable parallelism is provided, wherein the data encryption of the message to be encrypted is performed based on the message words corresponding to each message group to obtain encrypted data, including:

[0010] Based on the pre-configured second degree of parallelism and the message words corresponding to each message group, the message to be encrypted is encrypted to obtain the encrypted data; the second degree of parallelism indicates that at least one message iteration module is cascaded, and the message iteration module is used to generate the encrypted data.

[0011] According to the present invention, a data encryption method based on the SM3 algorithm with configurable parallelism is provided, wherein message expansion is performed on each message group based on a pre-configured first parallelism to obtain multiple message words corresponding to each message group, including:

[0012] For each message group, the message group is divided into multiple first message words;

[0013] The clock cycle required for message expansion is determined based on the number of cascaded message expansion modules represented by the first degree of parallelism.

[0014] Based on the clock cycle required for the message extension, each of the first message words, and the at least one message extension module represented by the pre-configured first parallelism, a plurality of second message words are obtained;

[0015] Each of the first message words and each of the second message words are determined as multiple message words corresponding to the message group.

[0016] According to a data encryption method based on the SM3 algorithm with configurable parallelism provided by the present invention, the at least one message extension module, based on the clock period, each of the first message words, and the pre-configured first parallelism, obtains a plurality of second message words, including:

[0017] Within the clock cycle required for the current message extension, each of the first message words is input to the first message extension module among the at least one message extension modules, to obtain a plurality of third message words output by the last message extension module among the at least one message extension modules;

[0018] During the clock cycle required for the next message extension, each of the third message words and each of the first message words are input to the first message extension module in the at least one message extension module to obtain a plurality of fourth message words output by the last message extension module in the at least one message extension module;

[0019] Repeat the above steps until all the clock cycles required for message expansion are completed, resulting in multiple fifth message words;

[0020] Each of the third message words, each of the fourth message words, and each of the fifth message words are determined as each of the second message words.

[0021] According to the present invention, a data encryption method based on the SM3 algorithm with configurable parallelism is provided, wherein the method encrypts the message to be encrypted based on a pre-configured second parallelism and the message words corresponding to each message group to obtain the encrypted data, including:

[0022] The clock cycle required for message iteration is determined based on the number of cascaded message iteration modules represented by the second degree of parallelism.

[0023] Based on the clock cycle required for the message iteration, the message words corresponding to each message group, and the at least one message iteration module representing the pre-configured second parallelism, the message to be encrypted is encrypted to obtain the encrypted data.

[0024] According to a data encryption method based on the SM3 algorithm with configurable parallelism provided by the present invention, the at least one message iteration module, based on the clock period required for the message iteration, the message words corresponding to each message group, and the pre-configured second parallelism, encrypts the message to be encrypted to obtain the encrypted data, including:

[0025] Within the clock cycle required for the current message iteration, the result of the previous iteration, the message words corresponding to each message group, and the addressing variables are input to the first message iteration module in the at least one message iteration module to obtain the iteration result output by the last message iteration module in the at least one message iteration module;

[0026] In the next clock cycle required for the message iteration, the iteration result of the previous clock cycle, the message words corresponding to each message group, and the new addressing variables are input to the first message iteration module in the at least one message iteration module to obtain the iteration result output by the last message iteration module in the at least one message iteration module;

[0027] Repeat the above steps until all the clock cycles required for message iterations are completed, and finally obtain the encrypted data.

[0028] The present invention also provides a data encryption device based on the SM3 algorithm with configurable parallelism, comprising:

[0029] The grouping module is used to group the padded messages obtained after the messages to be encrypted are padded, resulting in multiple message groups;

[0030] An extension module is used to perform message expansion on each message group based on a pre-configured first parallelism to obtain multiple message words corresponding to each message group; wherein, the first parallelism indicates that at least one message expansion module is cascaded, and the message expansion module is used to generate the message words;

[0031] The encryption module is used to encrypt the message to be encrypted based on the message words corresponding to each message group, so as to obtain encrypted data.

[0032] The present invention also provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement a data encryption method based on the parallelism-configurable SM3 algorithm as described above.

[0033] The present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements a data encryption method based on the parallelism-configurable SM3 algorithm as described above.

[0034] The present invention also provides a computer program product, including a computer program that, when executed by a processor, implements a data encryption method based on the parallelism-configurable SM3 algorithm as described above.

[0035] The present invention provides a data encryption method and apparatus based on the SM3 algorithm with configurable parallelism. The method involves grouping a message to be encrypted into multiple message groups after message padding; expanding each message group based on a pre-configured first parallelism to obtain multiple message words corresponding to each message group; wherein the first parallelism represents at least one cascaded message expansion module, which generates the message words; and encrypting the message to be encrypted based on the message words corresponding to each message group to obtain encrypted data. The pre-configured first parallelism enables message expansion of each message group, and this pre-configured first parallelism can be adjusted according to actual conditions, thereby achieving data encryption and improving the throughput of the hardware design. Attached Figure Description

[0036] To more clearly illustrate the technical solutions in this invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0037] Figure 1This is a flowchart of the SM3 algorithm provided by existing technology.

[0038] Figure 2 This is a flowchart illustrating the data encryption method based on the SM3 algorithm with configurable parallelism provided by the present invention.

[0039] Figure 3 This is a schematic diagram of message filling provided by the present invention.

[0040] Figure 4 This is a schematic diagram of the calculation process of the message extension module provided by the present invention.

[0041] Figure 5 This is a schematic diagram of the message iteration calculation process provided by the present invention.

[0042] Figure 6 This is a comparison diagram of the iterative calculation process of the message iteration module provided by the present invention with a second parallelism of 1 and 4.

[0043] Figure 7 This is a schematic diagram of the data encryption device based on the SM3 algorithm with configurable parallelism provided by the present invention.

[0044] Figure 8 This is a schematic diagram of the structure of the electronic device provided by the present invention. Detailed Implementation

[0045] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.

[0046] To facilitate a clearer understanding of the various embodiments of this application, the relevant knowledge is first introduced as follows.

[0047] The SM3 algorithm employs a block cipher structure, using nonlinear functions and shift / XOR logical operations to obfuscate and diffuse the input data, ensuring data security. The SM3 encryption process includes message padding, message expansion, and iterative encryption, ultimately generating a hash value as the encrypted result. SM3 contains numerous shift / XOR logical operations; its main advantage in hardware implementation is its ability to perform logical operations and assignments on a large number of variables simultaneously, enabling parallel computation.

[0048] 1. SM3 Algorithm Principle.

[0049] Figure 1This is a flowchart of the SM3 algorithm provided by existing technology, such as... Figure 1 As shown, the SM3 algorithm is implemented in three steps: message padding, message extension, and iterative process. The input (Input_data(m)) of the SM3 cryptographic hash algorithm is a string of length less than 2. 64 A bit message, after message padding, message expansion, and iterative compression, generates a hash value (output_data(V)). i+1 The length of the hash value is 256 bits.

[0050] (1) Message padding.

[0051] Hypothetical message The length is For bits, first add the bit "1" to the end of the message, then add... A "0", It is to satisfy Find the smallest non-negative integer, and then add a 64-bit bit string of length . The binary representation of .

[0052] (2) Message extension.

[0053] The padded messages are grouped into 512-bit groups, and the grouped messages are numbered to obtain... … ,in .

[0054] Grouping messages Expand and generate message words , … , , … Used for compression functions .

[0055] a) First, group the messages. Divided into 16 characters , … .

[0056] b) FOR j=16 TO 67

[0057] W j ←P1 (W) j-16 ⊕W j-9 ⊕(W j-3 <<<15))⊕(W j-13 <<<7)⊕Wj-6

[0058] ENDFOR

[0059] c) FOR j=0 TO 63

[0060] ←W j ⊕W j+4

[0061] ENDFOR

[0062] (3) Iterative process.

[0063] For group messages Perform iterations in the following manner:

[0064] FOR i=0 TO n -1

[0065] V i+1 =CF(V i B i )

[0066] ENDFOR

[0067] Where CF represents the compression function, and when i=0, V 0 This represents the initialization vector (IV) proposed in the SM3 algorithm, with a length of 256 bits. The result of the last iteration is V. n .

[0068] The compression function calculation process is as follows: ABCDEFGH←V i

[0069] FOR j=0 TO 63

[0070] SS1←((A<<<12)+E+(T j << <j))<<<7

[0071] SS2←SS1⊕(A<<<12)

[0072] TT1←FF j (A,B,C)+D+SS2+

[0073] TT2←GG j (E,F,G)+H+SS1+W j

[0074] D←C

[0075] C←B<<<9

[0076] B←A

[0077] A←TT1

[0078] H←G

[0079] G←F<<<19

[0080] F←E

[0081] E←P0 (TT2)

[0082] ENDFOR V i+1 ←ABCDEFGH⊕V i

[0083] In this array, A, B, C, D, E, F, G, and H are word registers, and SS1, SS2, TT1, and TT2 are intermediate variables. The words are stored in big-endian format. The final 256-bit hash value is y = ABCDEFGH.

[0084] The constant is:

[0085] The Boolean function is:

[0086]

[0087]

[0088] The permutation function is:

[0089]

[0090]

[0091] Among them, X, Y, and Z are all characters.

[0092] The following is combined with Figures 2-6 This invention describes a data encryption method based on the SM3 algorithm with configurable parallelism.

[0093] Figure 2 This is a flowchart illustrating the data encryption method based on the SM3 algorithm with configurable parallelism provided by this invention. Figure 2 As shown, the method includes the following steps 201-203.

[0094] Step 201: After filling the encrypted message, group the filled message into multiple message groups.

[0095] It should be noted that the data encryption method based on the SM3 algorithm with configurable parallelism provided by the present invention can be applied to scenarios that improve the throughput of hardware design. The method can be implemented on hardware devices using the Verilog hardware description language. The execution subject of the method can be a data encryption device based on the SM3 algorithm with configurable parallelism, such as an electronic device, or a control module in the data encryption device based on the SM3 algorithm with configurable parallelism for executing the data encryption method based on the SM3 algorithm with configurable parallelism.

[0096] Specifically, after receiving the message m to be encrypted, the message filling module can group the filled message m' obtained by filling the message m into multiple message groups. The value of i ranges from 0 to n-1.

[0097] Figure 3 This is a schematic diagram of message filling provided by the present invention, such as... Figure 3 As shown, message padding is performed on the 256-bit message m to be encrypted, that is, adding bits "1" to the end of the message m, and then adding... A "0", It is to satisfy The smallest non-negative integer, l =256, then add a 64-bit bit string, the length of which is... l The binary representation of .

[0098] Step 202: Based on the pre-configured first parallelism, perform message expansion on each message group to obtain multiple message words corresponding to each message group; wherein, the first parallelism indicates that at least one message expansion module is cascaded, and the message expansion module is used to generate the message words.

[0099] Specifically, each message extension module (Extend) is composed of combinational logic. The first degree of parallelism indicates that at least one message extension module is cascaded, meaning parallel computation is achieved through the cascading of multiple message extension modules. The first degree of parallelism is determined based on the number of instantiated message extension modules; for example, it can be set to 1, 2, 4, 8, 16, 32, or 64. The number of instantiated message extension modules can be passed as a parameter to the message extension modules of the SM3 algorithm.

[0100] Based on the pre-configured first degree of parallelism, message expansion can be performed on each message group to obtain multiple message words corresponding to each message group. , … , , … ).

[0101] Step 203: Based on the message words corresponding to each message group, encrypt the message to be encrypted to obtain encrypted data.

[0102] The present invention provides a data encryption method based on the SM3 algorithm with configurable parallelism. This method involves grouping the padded message (after filling the message to be encrypted) into multiple message groups; expanding each message group based on a pre-configured first parallelism to obtain multiple message words corresponding to each message group; wherein the first parallelism represents at least one cascaded message expansion module, which generates the message words; and encrypting the message to be encrypted based on the message words corresponding to each message group to obtain encrypted data. The pre-configured first parallelism enables message expansion of each message group, and this pre-configured first parallelism can be adjusted according to actual conditions, thereby achieving data encryption and improving the throughput of the hardware design.

[0103] Optionally, the specific implementation of step 202 above includes:

[0104] (1) For each message group, the message group is divided into a plurality of first message words.

[0105] Specifically, for each message group The message group can be divided into multiple first message words, that is, divided into 16 first message words. , … ).

[0106] (2) Determine the clock cycle required for message expansion based on the number of cascaded message expansion modules represented by the first parallelism.

[0107] Specifically, the number of cascaded message extension modules represented by the first degree of parallelism can be used to determine the clock cycles required for message extension. For example, if the number of cascaded message extension modules represented by the first degree of parallelism is 1, that is, only one message extension module is instantiated, then 64 clock cycles are required to complete the message extension; if the number of cascaded message extension modules represented by the first degree of parallelism is 4, that is, four message extension modules are instantiated, then 16 clock cycles are required to complete the message extension.

[0108] (3) Based on the clock cycle required for the message extension, each of the first message words and the at least one message extension module represented by the pre-configured first parallelism, a plurality of second message words are obtained.

[0109] Specifically, based on the clock cycles required for message expansion, each first message word ( , … ) and at least one message extension module representing a pre-configured first degree of parallelism, can obtain multiple second message words ( … , , … ).

[0110] (4) Each of the first message words and each of the second message words are determined as multiple message words corresponding to the message group.

[0111] Specifically, each first message character ( , … ) and each of the second message words ( … , , … ), identified as multiple message words corresponding to message groups ( , … , , … ).

[0112] Optionally, the at least one message extension module, based on the clock period, each of the first message words, and a pre-configured first degree of parallelism, obtains a plurality of second message words, including:

[0113] (3-1) Within the clock cycle required for the current message extension, each of the first message words is input to the first message extension module in the at least one message extension module to obtain a plurality of third message words output by the last message extension module in the at least one message extension module.

[0114] Specifically, within the clock cycles required for the current message expansion, each first message word ( , … The first message word is stored in register REG_0 of the design and used as the input of the first message extension module. , … The input is fed into the first message extension module in at least one message extension module. The output of the first message extension module is fed into the second message extension module. The output of the second message extension module is fed into the third message extension module, and so on, until the last message extension module, finally obtaining multiple third message words output by the last message extension module.

[0115] For example, when the number of cascaded message extension modules represented by the first parallelism is 1, each first message word ( , … The data is stored in register REG_0 of the design and used as the input to the message extension module. The output of the message extension module can then be obtained. and … .Will Stored in register REG_1 It will be stored in REG_0.

[0116] When the number of cascaded message extension modules represented by the first parallelism is 2, that is, the message extension module is instantiated twice between REG_0 and REG_1, that is, the output of the first message extension module Extend0 is connected to the input of Extend1 to obtain the output of Extend1. , .

[0117] (3-2) During the clock cycle required for the next message extension, each of the third message words and each of the first message words are input to the first message extension module in the at least one message extension module to obtain a plurality of fourth message words output by the last message extension module in the at least one message extension module.

[0118] Specifically, within the clock cycle required for the next message extension, each third message word and each first message word are input to the first message extension module in at least one message extension module, thereby obtaining multiple fourth message words output by the last message extension module in at least one message extension module.

[0119] (3-3) Repeat the above steps until all the clock cycles required for message expansion are completed, resulting in multiple fifth message words.

[0120] (3-4) Each of the third message words, each of the fourth message words and each of the fifth message words are determined as each of the second message words.

[0121] For example, Figure 4 This is a schematic diagram of the calculation process of the message extension module provided by the present invention, as shown below. Figure 4 As shown, when the number of cascaded message extension modules represented by the first parallelism is 1, that is, only Extend0 is instantiated, and within the clock cycle required for the current message extension, each first message word ( , … The data is stored in register REG_0 of the design and used as the input to the message extension module. The output of the message extension module can then be obtained. and … The third message received was and .Will Stored in register REG_1 It will be stored in REG_0. Within the clock cycles required for the next message extension, Incrementing the index by 1 will change the input of Extend0 to () … (The third message is coming soon) and each first message word ( , … The input is sent to Extend0, and the output of Extend0 is... and … The fourth message word received is and .Will Stored in register REG_1 This will be stored in REG_0. Repeat this process until all the clock cycles required for message expansion are completed, resulting in multiple fifth message words. The fifth message word is the one that is excluded from the previous one. , and , … Other than the above. It should be noted that when... When the subscript is greater than 67, it is no longer calculated. This means that Extend0 will ultimately be output by padding with zeros, and message expansion will be completed after 64 cycles. REG_0 has a bit width of 2176 bits, and REG_1 has a bit width of 2048 bits.

[0122] For example, when the number of cascaded message extension modules represented by the first parallelism is 2, that is, two message extension modules are instantiated between REG_0 and REG_1, that is, the output of the first message extension module Extend0 is connected to the input of Extend1 to obtain the output of Extend1. , This means that it is possible to calculate within one clock cycle. , In the next clock cycle, Adding 2 to the index will change the input of Extend0 to... … The output of Extend0 is connected to the input of Extend1 to obtain the output of Extend1. , That is, it can be calculated through two message extension modules. , Following this pattern, message expansion will be completed after 32 clock cycles. Then the next message can be input. This method implements the SM3 message expansion algorithm with configurable parallelism. With a parallelism of 2, the message processing interval is 32 clock cycles.

[0123] Optionally, the specific implementation of step 203 above includes:

[0124] Based on the pre-configured second degree of parallelism and the message words corresponding to each message group, the message to be encrypted is encrypted to obtain the encrypted data; the second degree of parallelism indicates that at least one message iteration module is cascaded, and the message iteration module is used to generate the encrypted data.

[0125] Specifically, the message iteration modules (Iterate) are still all composed of combinational logic. The second degree of parallelism indicates that at least one message iteration module is cascaded, that is, parallel computation is achieved by cascading multiple message iteration modules. The second degree of parallelism is determined based on the number of instantiated message iteration modules. For example, the second degree of parallelism can be set to 1, 2, 4, 8, 16, 32, or 64, and the number of instantiated message iteration modules can be passed as a parameter to the message iteration modules of the SM3 algorithm.

[0126] Based on the pre-configured second parallelism and each message word corresponding to each message group ( , … , , … The encrypted message is encrypted to obtain the encrypted data.

[0127] Optionally, the step of encrypting the message to be encrypted based on a pre-configured second degree of parallelism and the message words corresponding to each message group to obtain the encrypted data includes:

[0128] Based on the number of cascaded message iteration modules represented by the second degree of parallelism, the clock cycle required for message iteration is determined; based on the clock cycle required for message iteration, each message word corresponding to each message group, and the at least one message iteration module represented by the pre-configured second degree of parallelism, the message to be encrypted is encrypted to obtain the encrypted data.

[0129] Specifically, the number of cascaded message iteration modules represented by the second degree of parallelism can be used to determine the clock cycles required for message iteration. For example, if the number of cascaded message iteration modules represented by the second degree of parallelism is 1, that is, only one message iteration module is instantiated, then 64 clock cycles are required to complete message expansion; if the number of cascaded message iteration modules represented by the second degree of parallelism is 4, that is, four message iteration modules are instantiated, then 16 clock cycles are required to complete message expansion.

[0130] Based on the clock cycle required for message iteration, each message word corresponding to each message group, and at least one message iteration module representing a pre-configured second degree of parallelism, data encryption can be performed on the message to be encrypted to obtain encrypted data.

[0131] Optionally, the at least one message iteration module, based on the clock period required for the message iteration, the message words corresponding to each message group, and the pre-configured second parallelism, encrypts the message to be encrypted to obtain the encrypted data, including:

[0132] (1) Within the clock cycle required for the current message iteration, the result of the previous iteration, the message words and addressing variables corresponding to each message group are input to the first message iteration module in the at least one message iteration module to obtain the iteration result output by the last message iteration module in the at least one message iteration module.

[0133] Specifically, within the clock cycle required for the current message iteration, the results of the previous iteration are processed. Each message group corresponds to a message word ( and and addressing variables The input is fed into the first message iteration module in at least one message iteration module. The output of the first message iteration module is fed into the second message iteration module. The output of the second message iteration module is fed into the third message iteration module, and so on, until the iteration result is output by the last message iteration module.

[0134] It should be noted that when the number of cascaded message iteration modules represented by the second degree of parallelism is 1, that is, when only one message iteration module is instantiated, the first message iteration module and the last message iteration module are the same message iteration module.

[0135] (2) In the next clock cycle required for the message iteration, the iteration result of the previous clock cycle, the message words corresponding to each message group and the new addressing variables are input to the first message iteration module in the at least one message iteration module to obtain the iteration result output by the last message iteration module in the at least one message iteration module.

[0136] Specifically, in the next clock cycle required for message iteration, the iteration results of the previous clock cycle, each message word corresponding to each message group, and the new addressing variables (at this time, the new addressing variables) are... and If the subscript changes (e.g., j+1 or j+4), the input to the first message iteration module in at least one message iteration module can yield the iteration result output by the last message iteration module in at least one message iteration module.

[0137] (3) Repeat the above steps until all the clock cycles required for message iteration are completed, and finally obtain the encrypted data.

[0138] For example, Figure 5 This is a schematic diagram of the message iteration calculation process provided by the present invention, as shown below. Figure 5 As shown, it should be noted that the input to the Iterate module is... Output of the message iteration module and and addressing variables The output is Within one clock cycle, the Iterate module is responsible for one iterative calculation. After one calculation is completed, the addressing variables of the Iterate module will be updated in the next clock cycle. and Increment the index by 1, iterate the message a total of 64 times, and finally output the result. .

[0139] For example, when the number of cascaded message iteration modules represented by the second degree of parallelism is 4, that is, four Extend modules are instantiated, and the results of the round iterations are processed within the clock cycles required for the current message extension. Each message group corresponds to a message word ( and and addressing variables Inputting it into Iterate0, connecting its output to the input of Iterate1, connecting its output to the input of Iterate2, and connecting its output to the input of Iterate3, allows the calculation to be performed within one clock cycle. Addressing variables in the next clock cycle. and Adding 4 to the subscript, the input to Iterate0 will become The calculation can be completed in the next clock cycle. This process continues until the final output is completed 16 clock cycles after message iteration begins, achieving parallel computation of message iteration. This method implements the SM3 message iteration algorithm with configurable parallelism; with a parallelism of 4, the message processing interval is 16 clock cycles.

[0140] Figure 6 This is a comparison diagram of the iterative calculation process of the message iteration module provided by this invention with a second parallelism of 1 and 4, as shown in the figure. Figure 6 As shown, when the number of cascaded message iteration modules represented by the second degree of parallelism is 1, the input of Iterate0 in one clock cycle is , and And j=0, in the next clock cycle, the input of Iterate1 is the output of Iterate0. and And j=1, ..., during the last clock cycle, the input of Iterate63 is the output of Iterate62. and With j=63, after 64 iterations, the final output is obtained. When the number of cascaded message iteration modules represented by the second degree of parallelism is 4, the input of Iterate0 in one clock cycle is... , and With j=0, the output of Iterate0 is connected to the input of Iterate1, the output of Iterate1 is connected to the input of Iterate2, and the output of Iterate2 is connected to the input of Iterate3. This allows the calculation to be performed within one clock cycle. Addressing variables in the next clock cycle. and Adding 4 to the subscript, the input to Iterate0 will become The calculation can be completed in the next clock cycle. And so on, the final output will be completed 16 clock cycles after the message iteration begins. .

[0141] The method provided by this invention uses the Verilog hardware description language to implement a set of plaintext messages in parallel. The message expansion and iteration processes reduce computational latency and data processing intervals, improving data processing efficiency. Furthermore, the customizable parallelism of the message expansion and iteration modules allows for flexible configuration based on different hardware usage scenarios, making it more convenient and efficient for practical applications. This invention optimizes the parallel computation structure of a set of plaintext messages in the SM3 algorithm. Based on this invention, a pipelined design can be used to maximize the pipelined pattern, simultaneously processing multiple sets of messages in parallel to achieve high-throughput parallel encryption computation.

[0142] The following describes the data encryption device based on the SM3 algorithm with configurable parallelism provided by the present invention. The data encryption device based on the SM3 algorithm with configurable parallelism described below and the data encryption method based on the SM3 algorithm with configurable parallelism described above can be referred to in correspondence with each other.

[0143] Figure 7 This is a schematic diagram of the data encryption device based on the SM3 algorithm with configurable parallelism provided by the present invention, as shown below. Figure 7 As shown, the data encryption device 700 based on the SM3 algorithm with configurable parallelism includes: a grouping module 701, an extension module 702, and an encryption module 703; wherein,

[0144] The grouping module 701 is used to group the padded message obtained after the message to be encrypted is padded, so as to obtain multiple message groups;

[0145] Extension module 702 is used to perform message expansion on each message group based on a pre-configured first parallelism to obtain multiple message words corresponding to each message group; wherein, the first parallelism indicates that at least one message expansion module is cascaded, and the message expansion module is used to generate the message words;

[0146] The encryption module 703 is used to encrypt the message to be encrypted based on the message words corresponding to each message group, so as to obtain encrypted data.

[0147] The data encryption device based on the SM3 algorithm with configurable parallelism provided by this invention divides the padded message of the message to be encrypted into multiple message groups. Based on a pre-configured first parallelism, each message group is expanded to obtain multiple message words corresponding to each message group. The first parallelism represents at least one cascaded message expansion module, which generates the message words. Based on the message words corresponding to each message group, the message to be encrypted is encrypted to obtain encrypted data. The pre-configured first parallelism enables message expansion of each message group, and this pre-configured first parallelism can be adjusted according to actual conditions, thereby achieving data encryption and improving the throughput of the hardware design.

[0148] Optionally, the encryption module 703 is specifically used for:

[0149] Based on the pre-configured second degree of parallelism and the message words corresponding to each message group, the message to be encrypted is encrypted to obtain the encrypted data; the second degree of parallelism indicates that at least one message iteration module is cascaded, and the message iteration module is used to generate the encrypted data.

[0150] Optionally, the message extension module 702 is specifically used for:

[0151] For each message group, the message group is divided into multiple first message words;

[0152] The clock cycle required for message expansion is determined based on the number of cascaded message expansion modules represented by the first degree of parallelism.

[0153] Based on the clock cycle required for the message extension, each of the first message words, and the at least one message extension module represented by the pre-configured first parallelism, a plurality of second message words are obtained;

[0154] Each of the first message words and each of the second message words are determined as multiple message words corresponding to the message group.

[0155] Optionally, the expansion module 702 is further configured to:

[0156] Within the clock cycle required for the current message extension, each of the first message words is input to the first message extension module among the at least one message extension modules, to obtain a plurality of third message words output by the last message extension module among the at least one message extension modules;

[0157] During the clock cycle required for the next message extension, each of the third message words and each of the first message words are input to the first message extension module in the at least one message extension module to obtain a plurality of fourth message words output by the last message extension module in the at least one message extension module;

[0158] Repeat the above steps until all the clock cycles required for message expansion are completed, resulting in multiple fifth message words;

[0159] Each of the third message words, each of the fourth message words, and each of the fifth message words are determined as each of the second message words.

[0160] Optionally, the encryption module 703 is further configured to:

[0161] The clock cycle required for message iteration is determined based on the number of cascaded message iteration modules represented by the second degree of parallelism.

[0162] Based on the clock cycle required for the message iteration, the message words corresponding to each message group, and the at least one message iteration module representing the pre-configured second parallelism, the message to be encrypted is encrypted to obtain the encrypted data.

[0163] Optionally, the encryption module 703 is further configured to:

[0164] Within the clock cycle required for the current message iteration, the result of the previous iteration, the message words corresponding to each message group, and the addressing variables are input to the first message iteration module in the at least one message iteration module to obtain the iteration result output by the last message iteration module in the at least one message iteration module;

[0165] In the next clock cycle required for the message iteration, the iteration result of the previous clock cycle, the message words corresponding to each message group, and the new addressing variables are input to the first message iteration module in the at least one message iteration module to obtain the iteration result output by the last message iteration module in the at least one message iteration module;

[0166] Repeat the above steps until all the clock cycles required for message iterations are completed, and finally obtain the encrypted data.

[0167] Figure 8 This is a schematic diagram of the physical structure of an electronic device provided by the present invention, such as... Figure 8As shown, the electronic device may include a processor 810, a communications interface 820, a memory 830, and a communication bus 840, wherein the processor 810, the communications interface 820, and the memory 830 communicate with each other via the communication bus 840. The processor 810 can call logical instructions in the memory 830 to execute a data encryption method based on a parallelism-configurable SM3 algorithm. This method includes: grouping the padded message obtained after message padding of the message to be encrypted into multiple message groups; expanding each message group based on a pre-configured first parallelism to obtain multiple message words corresponding to each message group; wherein the first parallelism represents at least one cascaded message expansion module, the message expansion module being used to generate the message words; and encrypting the message to be encrypted based on each message word corresponding to each message group to obtain encrypted data.

[0168] Furthermore, the logical instructions in the aforementioned memory 830 can be implemented as software functional units and, when sold or used as independent products, can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0169] On the other hand, the present invention also provides a computer program product, which includes a computer program that can be stored on a non-transitory computer-readable storage medium. When the computer program is executed by a processor, the computer can execute the data encryption method based on the SM3 algorithm with configurable parallelism provided by the above methods. The method includes: grouping the padded message obtained after message padding of the message to be encrypted into multiple message groups; performing message expansion on each message group based on a pre-configured first parallelism to obtain multiple message words corresponding to each message group; wherein, the first parallelism represents at least one message expansion module cascaded, and the message expansion module is used to generate the message words; and encrypting the message to be encrypted based on each message word corresponding to each message group to obtain encrypted data.

[0170] In another aspect, the present invention also provides a non-transitory computer-readable storage medium storing a computer program thereon. When executed by a processor, the computer program implements a data encryption method based on the SM3 algorithm with configurable parallelism provided by the methods described above. The method includes: grouping a padded message obtained after message padding of a message to be encrypted into multiple message groups; performing message expansion on each message group based on a pre-configured first parallelism to obtain multiple message words corresponding to each message group; wherein the first parallelism represents at least one message expansion module cascaded, and the message expansion module is used to generate the message words; and encrypting the message to be encrypted based on each message word corresponding to each message group to obtain encrypted data.

[0171] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. Those skilled in the art can understand and implement this without any creative effort.

[0172] Through the above description of the embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus necessary general-purpose hardware platforms, and of course, it can also be implemented by hardware. Based on this understanding, the above technical solutions, in essence or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods described in the various embodiments or some parts of the embodiments.

[0173] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A data encryption method based on the SM3 algorithm with configurable parallelism, characterized in that, include: After padding the encrypted message, the padded message is grouped to obtain multiple message groups; Based on a pre-configured first degree of parallelism, message expansion is performed on each message group to obtain multiple message words corresponding to each message group; wherein, the first degree of parallelism represents the number of at least one message expansion module cascaded, and the message expansion module is used to generate the message words; Based on the message words corresponding to each message group, the message to be encrypted is encrypted to obtain encrypted data. Based on a pre-configured first degree of parallelism, message expansion is performed on each message group to obtain multiple message words corresponding to each message group, including: For each message group, the message group is divided into multiple first message words; The clock cycle required for message expansion is determined based on the number of cascaded message expansion modules represented by the first degree of parallelism. Based on the clock cycle required for the message extension, each of the first message words, and the at least one message extension module represented by the pre-configured first parallelism, a plurality of second message words are obtained; Each of the first message words and each of the second message words are determined as multiple message words corresponding to the message group; The at least one message extension module, based on the clock period, each of the first message words, and a pre-configured first parallelism, obtains a plurality of second message words, including: Within the clock cycle required for the current message extension, each of the first message words is input to the first message extension module among the at least one message extension modules, to obtain a plurality of third message words output by the last message extension module among the at least one message extension modules; During the clock cycle required for the next message extension, each of the third message words and each of the first message words are input to the first message extension module in the at least one message extension module to obtain a plurality of fourth message words output by the last message extension module in the at least one message extension module; Repeat the above steps until all the clock cycles required for message expansion are completed, resulting in multiple fifth message words; Each of the third message words, each of the fourth message words, and each of the fifth message words are determined as each of the second message words.

2. The data encryption method based on the SM3 algorithm with configurable parallelism according to claim 1, characterized in that, The step of encrypting the message to be encrypted based on the message words corresponding to each message group to obtain encrypted data includes: Based on the pre-configured second degree of parallelism and the message words corresponding to each message group, the message to be encrypted is encrypted to obtain the encrypted data; the second degree of parallelism represents the number of at least one message iteration module cascaded, and the message iteration module is used to generate the encrypted data.

3. The data encryption method based on the SM3 algorithm with configurable parallelism according to claim 2, characterized in that, The process of encrypting the message to be encrypted based on a pre-configured second parallelism and the message words corresponding to each message group, to obtain the encrypted data, includes: The clock cycle required for message iteration is determined based on the number of cascaded message iteration modules represented by the second degree of parallelism. Based on the clock cycle required for the message iteration, the message words corresponding to each message group, and the at least one message iteration module representing the pre-configured second parallelism, the message to be encrypted is encrypted to obtain the encrypted data.

4. The data encryption method based on the SM3 algorithm with configurable parallelism according to claim 3, characterized in that, The at least one message iteration module, based on the clock period required for the message iteration, the message words corresponding to each message group, and the pre-configured second parallelism, encrypts the message to be encrypted to obtain the encrypted data, including: Within the clock cycle required for the current message iteration, the result of the previous iteration, the message words corresponding to each message group, and the addressing variables are input to the first message iteration module in the at least one message iteration module to obtain the iteration result output by the last message iteration module in the at least one message iteration module; In the next clock cycle required for the message iteration, the iteration result of the previous clock cycle, the message words corresponding to each message group, and the new addressing variables are input to the first message iteration module in the at least one message iteration module to obtain the iteration result output by the last message iteration module in the at least one message iteration module; Repeat the above steps until all the clock cycles required for message iterations are completed, and finally obtain the encrypted data.

5. A data encryption device based on the SM3 algorithm with configurable parallelism, characterized in that, include: The grouping module is used to group the padded messages obtained after the messages to be encrypted are padded, resulting in multiple message groups; An extension module is used to perform message expansion on each message group based on a pre-configured first parallelism to obtain multiple message words corresponding to each message group; wherein, the first parallelism represents the number of cascaded message expansion modules, and the message expansion module is used to generate the message words; An encryption module is used to encrypt the message to be encrypted based on the message words corresponding to each message group, so as to obtain encrypted data. The extended module is specifically used for: For each message group, the message group is divided into multiple first message words; The clock cycle required for message expansion is determined based on the number of cascaded message expansion modules represented by the first degree of parallelism. Based on the clock cycle required for the message extension, each of the first message words, and the at least one message extension module represented by the pre-configured first parallelism, a plurality of second message words are obtained; Each of the first message words and each of the second message words are determined as multiple message words corresponding to the message group; The expansion module is also used for: Within the clock cycle required for the current message extension, each of the first message words is input to the first message extension module among the at least one message extension modules, to obtain a plurality of third message words output by the last message extension module among the at least one message extension modules; During the clock cycle required for the next message extension, each of the third message words and each of the first message words are input to the first message extension module in the at least one message extension module to obtain a plurality of fourth message words output by the last message extension module in the at least one message extension module; Repeat the above steps until all the clock cycles required for message expansion are completed, resulting in multiple fifth message words; Each of the third message words, each of the fourth message words, and each of the fifth message words are determined as each of the second message words.

6. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the data encryption method based on the parallelism-configurable SM3 algorithm as described in any one of claims 1 to 4.

7. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the data encryption method based on the parallelism-configurable SM3 algorithm as described in any one of claims 1 to 4.

8. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by a processor, it implements the data encryption method based on the parallelism-configurable SM3 algorithm as described in any one of claims 1 to 4.

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