Network ports connect to systems, devices, and clusters

Abstract

The present application provides a network port direct access system, device and cluster. The system includes: a processor, which is used to drive a data processor through a driver; a data processor, which is used to simulate a peripheral device interconnection expansion device, and the peripheral device interconnection expansion device includes a peripheral device interconnection expansion bridge device and a network card; the data processor can run in a first mode and a second mode, in which the data processor presents an original physical network port to the processor, and the data in the processor can directly pass through the original physical network port; in the second mode, the data processor presents a virtual network port to the processor, and the data in the processor can reach the virtual network port after being processed by the software running in the data processor; the data processor is also used to present a first physical network port to the processor in the second mode, and the data in the processor can directly pass through the first physical network port, and the first physical network port corresponds to the first network card.

Description

Technical Field

[0001] The present application relates to the field of data communication, and in particular to a network port direct access system, device and cluster. Background Art

[0002] "Network Interface Card", also known as network adapter, is a hardware device that connects a computer to a network. It is responsible for converting the data generated by the computer into network signals for transmission, and converting the received network signals into data that the computer can recognize. There are many types of network cards, such as Ethernet cards, wireless network cards, etc. Network cards can be used during installation or during business operations. However, the mode used during installation is different from the mode used during business operations, and switching modes requires a cold restart, which is very inconvenient to use. Summary of the invention

[0003] The present application provides a network port pass-through system, device and cluster, which can use physical network ports and virtual network ports at the same time without switching modes, thus eliminating the need for cold restart.

[0004] In a first aspect, a network port direct access system is provided, comprising:

[0005] A processor, used for driving a data processor through a driver;

[0006] A data processor, used for providing a peripheral device interconnection expansion device and a hardware logic of a topological relationship of the peripheral device interconnection expansion device, the data processor is further provided with a simulator, the simulator is used for providing a peripheral device interconnection expansion device and a software logic of a topological relationship of the peripheral device interconnection expansion device, and negotiates and interacts with the hardware logic to realize simulation of the peripheral device interconnection expansion device, the peripheral device interconnection expansion device includes a peripheral device interconnection expansion bridge device and a peripheral device interconnection expansion terminal device, and the peripheral device interconnection expansion terminal device includes a network card;

[0007] The data processor can run in a first mode and a second mode. In the first mode, the data processor presents an original physical network port to the processor, and the data in the processor can directly pass through the original physical network port. In the second mode, the data processor presents a virtual network port to the processor, and the data in the processor can reach the virtual network port after being processed by the software running in the data processor. The data processor is also used to present a first physical network port to the processor in the second mode, and the data in the processor can directly pass through the first physical network port, and the first physical network port corresponds to a first network card.

[0008] In the above scheme, in the second mode, the physical network port and the virtual network port can be used at the same time, and there is no need to switch modes, so there is no need to perform a cold start. Among them, the physical network port can be used to transmit installation data, and the virtual network port can be used to transmit business data. Therefore, in the same mode, business data can be transmitted through the virtual network port, and installation data can also be transmitted through the physical network port.

[0009] In some possible designs, the data processor is further configured to present a second physical network port to the processor in the second mode, and data in the processor can directly pass through the second physical network port;

[0010] The data processor is used for sending the first flow forwarding table entry corresponding to the first network card to the first physical network port, but not to the second physical network port, when there is no binding relationship between the first physical network port and the second physical network port;

[0011] The data processor is configured to send a first traffic forwarding table entry corresponding to the first network card to the first physical network port and the second physical network port when a binding relationship exists between the first physical network port and the second physical network port.

[0012] In the above scheme, binding does not need to be performed on the host, but can be achieved on the data processor, and two direct physical network ports are bound. If a direct physical network port fails during installation, transmission can also be performed through another direct physical network port.

[0013] In some possible designs, the data processor is further configured to delete the first network card in the second mode.

[0014] When there is no binding relationship between the first physical network port and the second physical network port, deleting the first traffic forwarding entry received by the first physical network port;

[0015] When a binding relationship exists between the first physical network port and the second physical network port, a first traffic forwarding entry received by the first physical network port and a first traffic forwarding entry received by the second physical network port are deleted.

[0016] In some possible designs, the data processor is further configured to:

[0017] When the binding relationship between the first physical network port and the second physical network port changes from no binding relationship to a binding relationship, sending the first traffic forwarding table entry to the second physical network port;

[0018] When the binding relationship between the first physical network port and the second physical network port changes from a binding relationship to a non-binding relationship, the first traffic forwarding entry received by the second physical network port is deleted.

[0019] In some possible designs, the data processor is further configured to present a second physical network port to the processor in the second mode, and data in the processor can directly pass through the second physical network port, and the second physical network port corresponds to a second network card.

[0020] The data processor is further configured to send the second traffic forwarding table entry corresponding to the second network card to the second physical network port instead of to the first physical network port when there is no binding relationship between the first physical network port and the second physical network port;

[0021] The data processor is further configured to send the second traffic forwarding table entry corresponding to the second network card to the first physical network port and the second physical network port when a binding relationship exists between the first physical network port and the second physical network port.

[0022] In some possible designs, the data processor is further configured to delete the second network card in the second mode;

[0023] The data processor is further configured to delete a second traffic forwarding entry received by the second physical network port when there is no binding relationship between the first physical network port and the second physical network port;

[0024] The data processor is further configured to delete, when a binding relationship exists between the first physical network port and the second physical network port, a second traffic forwarding entry received by the first physical network port and a second traffic forwarding entry received by the second physical network port.

[0025] In some possible designs, the data processor is further configured to:

[0026] When the binding relationship between the first physical network port and the second physical network port changes from no binding relationship to a binding relationship, sending the second traffic forwarding table entry to the first physical network port;

[0027] When the binding relationship between the first physical network port and the second physical network port changes from a binding relationship to a non-binding relationship, the second traffic forwarding entry received by the first physical network port is deleted.

[0028] In some possible designs, the software running in the data processor includes a virtual switch and a data plane development kit.

[0029] In a second aspect, a computing device is provided, including a network port direct communication system and a storage unit, wherein the network port direct communication system and the storage unit can communicate with each other, and the network port direct communication system is a system as described in any one of the first aspects.

[0030] In a third aspect, a computing device cluster is provided, including a network port direct communication system and a storage unit, wherein the network port direct communication system and the storage unit can communicate with each other, and the network port direct communication system is a system as described in any one of the first aspects. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the background technology, the drawings required for use in the embodiments of the present invention or the background technology will be described below.

[0032] Figure 1 It is a structural diagram of a network port direct access system provided by this application;

[0033] Figure 2 It is a structural diagram of a processor provided by the present application;

[0034] Figure 3 It is a structural diagram of a data processor provided by the present application;

[0035] Figure 4 It is a schematic diagram of mounting a network card provided by this application;

[0036] Figure 5 is a schematic diagram of a computing device provided by the present application. DETAILED DESCRIPTION

[0037] The embodiments of the present invention are described below in conjunction with the accompanying drawings in the embodiments of the present invention. The terms used in the implementation mode of the present invention are only used to explain the specific embodiments of the present invention, and are not intended to limit the present invention.

[0038] See also Figure 1 , Figure 1 This is a schematic diagram of the structure of a network port direct access system provided by this application. Figure 1 As shown, the network port direct access system provided in the present application includes: a processor (central processing unit, CPU) 11 and a data processor (Data Processing Unit, DPU) 12.

[0039] CPU11 is a computing core and a control core, and can handle complex situations. CPU11 can be a very large-scale integrated circuit. The main operating system and other software programs are installed in CPU11, so that CPU11 can access the memory and various PCIE devices. CPU11 can quickly access the local memory through the on-chip bus. CPU11 may include one or more processor cores. In one implementation, CPU11 may be a multi-core chip, that is, a chip containing multiple processing cores. In another implementation, CPU11 may include one or more processor cores. It can be a chip with one processing core.

[0040] See also Figure 2 , Figure 2 is a schematic diagram of the structure of a processor provided by this application. Figure 2 As shown, the CPU may include a memory address register 101, a memory data register 102, a program counter 103, an instruction register 104, an instruction decoder 105, a microcode read-only memory 106, an operation controller 107, a calculation unit 108, a general register group 109, an accumulator 110, a program status word register 111, a timing circuit 112, and a processor bus 120. The processor bus 120 may also be a data bus, a power bus, a control bus, or a status signal bus.

[0041] The CPU is used to process instructions and data stored in the memory 113. In some embodiments, the instructions may include one or more instruction formats. The instruction format may indicate various fields (number of bits, position of bits, etc.) to specify the operation of the data processing to be performed and the operand on which the operation will be performed. Some instruction formats may be further defined by instruction templates (or sub-formats).

[0042] In the CPU, the memory address register 101 is used to store the address of the memory that the CPU is currently accessing, and the memory data register 102 is used to store the data and instructions read or written by the CPU from the address, so as to make up for the difference in operating speed between the processor and the memory.

[0043] The timing circuit 112 provides a time reference for each component through a fixed clock. The time for the processor to execute an instruction is an instruction cycle. The program counter 103 is used to store the address of the next instruction. When the instructions are executed sequentially, the program counter 103 automatically adds the number of bytes of an instruction after each instruction is taken. When a transfer instruction is encountered, the program counter 103 specifies the address of the next instruction through the address code field in the transfer instruction. The instruction register 104 is used to save the instruction currently being executed. The instruction includes two fields, an operation code and an address code. The operation code part is decoded by the instruction decoder 105 to generate the control potential required by the instruction. The operation controller 107 can generate various operation control signals based on the control potential signal output by the instruction decoder and the timing signal generated by the timing circuit 112, and control the remaining components of the CPU to complete the operation of fetching and executing instructions.

[0044] A microinstruction is the smallest unit of instructions executed by a processor. An instruction can be a single microinstruction or composed of several microinstructions. An instruction composed of multiple microinstructions is called a complex instruction. Various mechanisms can be used to implement the decoding of complex instructions by the instruction decoder 105. Specific decoding mechanisms include, but are not limited to, lookup tables, hardware implementations, programmable logic arrays (PLA), microcode read-only memories (ROMs), and the like. In one embodiment, the steps of the microinstructions corresponding to the complex instructions can be stored in the microcode read-only memory 106. During the decoding process, the instruction decoder 105 can query and obtain the operation code and address code of the microinstructions constituting the complex instructions from the microcode read-only memory 106, and decode the operation code part of the microinstructions in turn to generate the control potential required by the microinstructions.

[0045] The operation controller 107 has multiple buffers, and can send the decoded instructions to their respective reservation stations for storage according to the types of instructions. After analyzing the status of the hardware circuit of the computing unit and the specific situation of whether each instruction can be executed in advance, the instructions that can be executed in advance are scheduled to the corresponding computing unit 108 for execution. During this period, the instruction stream is reordered so that the instruction pipeline can proceed and be smoothly scheduled. Exemplarily, for instructions of integer calculation, the operation controller 107 can use the integer reservation station to save instructions and assign them to the integer computing unit for calculation; for instructions of floating-point calculation, the operation controller 107 can use the floating-point reservation station to save instructions and assign them to the floating-point computing unit for calculation.

[0046] The general register group 109 is used to store the data corresponding to the address code according to the address code of the instruction. The calculation unit 108 is used to receive the operation control signal of the operation controller 107 and perform calculations on the data stored in the general register group 109, including arithmetic operations (including basic operations such as addition, subtraction, multiplication and additional operations) and logical operations (including shifting, logical testing or comparison of two values). The temporary variables generated in the calculation are stored in the accumulator 110, and the information of the generated status is stored in the program status word register 111, such as the operation result carry / borrow flag (C), the operation result overflow flag (O), the operation result zero flag (Z), the operation result negative flag (N), the operation result sign flag (S), etc. The program status word register is also used to save information such as interrupts and the working status of the computing device, so that the CPU can timely understand the machine operation status and program operation status.

[0047] The calculation unit 108 includes a variety of different circuit modules, which can be used to execute different instructions. For example, the integer calculation unit 1081 and the floating point calculation unit 1082 are used to perform arithmetic operations and logical operations on integers and floating point numbers, respectively.

[0048] It can be understood that the above-mentioned CPU is only a specific embodiment. In actual applications, it may have more or fewer components, which will not be described in detail here.

[0049] The DPU 12 includes multiple processing cores, which can process data in parallel. Therefore, the DPU 12 often has powerful computing capabilities. Figure 3, the DPU includes: multiple memories 121, multiple processing cores 122, and communication interfaces 123 and other hardware resources. For example, the processing core 122 may include a first processing core, a second processing core, ..., an Nth processing core, and the memory 121 includes a first memory, a second memory, ..., an Nth memory. In a possible embodiment, the computing power of the processing core 122 in the DPU12 is weaker than the computing power of the CPU11, and the storage capacity of the memory 121 in the DPU12 is weaker than the storage capacity of the memory in the CPU11. Therefore, the CPU11 is suitable for processing a small number of complex instructions, while the DPU12 is suitable for processing batches of simple instructions. The memory 121 may be a non-volatile solid-state memory. In a possible embodiment, the memory 121 includes a read-only memory ROM (Read-Only Memory). In appropriate cases, the ROM may be a mask-programmed ROM, a programmable ROM (PROM), an erasable PROM (EPROM), an electrically erasable PROM (EEPROM), an electrically alterable ROM (EAROM) or a flash memory, or a combination of two or more of these. A slave operating system may be installed on the DPU, and the slave operating system is used to manage the hardware resources on the DPU. In a possible embodiment, the function of the slave operating system in the DPU12 is weaker than the main operating system in the CPU11. The DPU12 may be used to simulate the topological relationship between at least one peripheral device interconnection expansion device and at least one PCIE device. The hardware resources of the DPU12 are used to provide the hardware logic of the topological relationship of the PCIE device and the PCIE device. A simulator may be installed in the DPU12, and the simulator is used to provide the software logic of the topological relationship of the PCIE device and the PCIE device. The DPU12 implements the simulation of the PCIE device through negotiation and interaction between the software logic and the hardware logic.

[0050] The PCIE devices simulated in DPU12 may include PCIE end devices and PCIE bridge devices. PCIE end devices may provide various functions. For example, the PCIE end device may be a network card for providing network data transmission functions, may be a remote direct memory access (RDMA) for providing remote direct memory access services, or may be a storage device for providing data storage services. The PCIE bridge device is used to connect multiple PCIE end devices to form different topological relationships. Specifically, the PCIE bridge device includes multiple end device slots, and each end device slot is used to mount a PCIE end device. It can be understood that the PCIE end device may include only a network card, or, in addition to the network card, other PCIE end devices are included. For example, the PCIE end device may include 3 network cards, or the PCIE end device may include 2 network cards, a storage device or an RDMA device, etc. The topological relationship of the PCIE device may include one or more of a star relationship, a tree relationship, a ring relationship, a bus relationship, etc. Figure 1 Taking the topological relationship of the PCIE devices as an example, the PCIE bridge device is the root node of the tree, and multiple PCIE end devices are respectively connected to the root node PCIE bridge device. Figure 4 As shown, the PCIE bridge device includes a first downstream port and a second downstream port, and the network card includes a first network card and a second network card, wherein the first network card is mounted on the first downstream port, and the second network card is mounted on the second downstream port.

[0051] The first network card can virtualize multiple virtual PCIE end devices from a single physical PCIE end device through Single Root I / O Virtualization (SR-IOV), and then pass the virtual PCIE end device directly to each virtual machine to achieve the application scenario of a single physical PCIE end device supporting multiple virtual machines. SR-IOV is implemented on the basis of the PCIE specification. The SR-IOV protocol introduces the concept of two types of functions: physical function (PF) and virtual function (VF). PF is used to support PCI functions of SR-IOV function, as defined in the SR-IOV specification. PF contains SR-IOV function configuration structure for managing SR-IOV function. PF is a full-featured PCIE function that can be discovered, managed and processed like any other PCIE end device. PF has full configuration resources and can be used to configure or control PCIE end devices; VF is a function associated with PF, a lightweight PCIE function that can share one or more physical resources with physical functions and other VFs associated with the same physical function. VF is only allowed to have configuration resources for its own behavior. The second network card is the same, so I will not repeat it here.

[0052] The data processor can operate in the first mode and the second mode, which will be described in detail below.

[0053] In the first mode, the data processor presents the original physical network port to the processor, and the data in the processor can directly pass through the original physical network port. Here, the first mode can be a standard card mode, that is, the original physical network port is presented to the processor, and the traffic of the original physical network port is directly bound to the physical Ethernet port. The processor can send it directly to the original physical network port without being processed by the software running in the data processor. The number of original physical network ports can be one or more. When the number of original physical network ports is two, the first original physical network port corresponds to the first network card, and the second original physical network port corresponds to the second network card.

[0054] In the second mode, the data processor presents a virtual network port to the processor, and the data in the processor can reach the virtual network port after being processed by the software running in the data processor; at least one of the first physical network port and the second physical network port is presented to the processor, and the data in the processor can directly pass through the first physical network port and the second physical network port. The first physical network port corresponds to the first network card, and the second physical network port corresponds to the second network card.

[0055] Here, the second mode can be a data processor mode, that is, the processor is presented with a virtual network port and a physical network port at the same time, wherein the traffic of the physical network port is directly bound to the physical Ethernet port, and the processor can be sent directly to the physical network port without being processed by the software running in the data processor, while the traffic of the virtual network port needs to be processed by the software running in the data processor, and the processor needs to be processed by the software running in the data processor (for example, a virtual switch, a data plane development kit) before it can be sent to the virtual network port. When the business is usually carried out, the data processor can be in the second mode, at which time, the business data can be transmitted through the virtual network port. In the process of business processing, if it is necessary to reinstall the machine, there is no need to switch the mode, and it is only necessary to use the physical network port (for example, the first physical network port and / or the second physical network port) for installation. After the installation is completed, the virtual network port can be used to transmit the business data, and there is no need to switch the mode.

[0056] The first physical network port and the second physical network port can be used separately. When there is no binding relationship between the first physical network port and the second physical network port, the data processor sends the first flow forwarding table item corresponding to the first network card to the first physical network port, but not to the second physical network port, and sends the second flow forwarding table item corresponding to the second network card to the second physical network port, but not to the first physical network port. If the first network card is deleted at this time, the first flow forwarding table item received by the first physical network port is deleted. If the second network card is deleted, the second flow forwarding table item received by the second physical network port is deleted. If the binding relationship between the first physical network port and the second physical network port is changed from no binding relationship to a binding relationship, the second flow forwarding table item needs to be sent to the first physical network port, and the first flow forwarding table item needs to be sent to the second physical network port.

[0057] In order to ensure the robustness of data transmission during installation, the first physical network port and the second physical network port can be bound. When there is a binding relationship between the first physical network port and the second physical network port, the data processor sends the first flow forwarding table item corresponding to the first network card to the first physical network port and the second physical network port, and sends the second flow forwarding table item corresponding to the second network card to the first physical network port and the second physical network port. If the first network card is deleted at this time, the first flow forwarding table item received by the first physical network port is deleted and the first flow forwarding table item received by the second physical network port is deleted. If the second network card is deleted, the second flow forwarding table item received by the second physical network port is deleted and the second flow forwarding table item received by the first physical network port is deleted. If the binding relationship between the first physical network port and the second physical network port is changed from a binding relationship to a non-binding relationship at this time, it is necessary to delete the first flow forwarding table item received by the second physical network port and delete the second flow forwarding table item received by the first physical network port.

[0058] In the above scheme, in the second mode, the physical network port and the virtual network port can be used at the same time, and there is no need to switch modes, so there is no need to perform a cold start. Among them, the physical network port can be used to transmit installation data, and the virtual network port can be used to transmit business data. Therefore, in the same mode, business data can be transmitted through the virtual network port, and installation data can also be transmitted through the physical network port.

[0059] See also Figure 5 , Figure 5 4 is a schematic diagram of a computing device provided by the present application. The computing device 400 includes: one or more processing units 410 , a communication interface 420 and a storage unit 430 .

[0060] The processing unit 410, the communication interface 420 and the storage unit 430 are interconnected via a bus 440. Optionally, the computing device 400 may also include an input / output interface 450, which is connected to an input / output device for receiving parameters set by a user, etc. The computing device 400 can be used to implement some or all of the functions of the device embodiment or system embodiment in the above-mentioned embodiment of the present application; the processing unit 410 can also be used to implement some or all of the operation steps of the method embodiment in the above-mentioned embodiment of the present application. For example, the specific implementation of the various operations performed by the computing device 400 can refer to the specific details in the above-mentioned embodiment, such as the processing unit 410 is used to perform some or all of the steps in the above-mentioned method embodiment or some or all of the operations in the above-mentioned method embodiment. For another example, in the embodiment of the present application, the computing device 400 can be used to implement some or all of the functions of one or more components in the above-mentioned device embodiment, and the communication interface 420 can be specifically used for the communication functions necessary to implement the functions of these devices and components, and the processing unit 410 can be specifically used for the processing functions necessary to implement the functions of these devices and components, etc.

[0061] Figure 5 The computing device 400 may include one or more processing units 410, and the multiple processing units 410 may provide processing capabilities in a coordinated manner in a parallel connection manner, a serial connection manner, a serial-parallel connection manner, or any connection manner, or the multiple processing units 410 may constitute a processor sequence or a processor array, or the multiple processing units 410 may be divided into a main processor and an auxiliary processor, or the multiple processing units 410 may have different architectures such as a heterogeneous computing architecture. In addition, Figure 5 The computing device 400 shown in the figure, and the related structural description and functional description are exemplary and non-limiting. In some exemplary embodiments, the computing device 400 may include Figure 5More or fewer components may be shown, or some components may be combined or separated, or may have a different arrangement of components.

[0062] The processing unit 410 may have a variety of specific implementation forms. For example, the processing unit 410 may include a processor (central processing unit, CPU), a graphic processing unit (graphic processing unit, GPU), a neural-network processing unit (neural-network processing unit, NPU), a tensor processing unit (tensor processing unit, TPU) or a data processing unit (data processing unit, DPU) and other combinations thereof, which are not specifically limited in the embodiments of the present application. The processing unit 410 may also be a single-core processor or a multi-core processor. The processing unit 410 may be a combination of a CPU and a hardware chip. The above-mentioned hardware chip may be an application-specific integrated circuit (application-specific integrated circuit, ASIC), a programmable logic device (programmable logic device, PLD) or a combination thereof. The above-mentioned PLD may be a complex programmable logic device (complex programmable logic device, CPLD), a field-programmable gate array (field-programmable gate array, FPGA), a generic array logic (generic array logic, GAL) or any combination thereof. The processing unit 410 may also be implemented using a logic device with built-in processing logic alone, such as an FPGA or a digital signal processor (digital signal processor, DSP), etc. The communication interface 420 may be a wired interface or a wireless interface for communicating with other modules or devices. The wired interface may be an Ethernet interface, a local interconnect network (LIN), etc., and the wireless interface may be a cellular network interface or a wireless local area network interface, etc.

[0063] The storage unit 430 may be a non-volatile memory, such as a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The storage unit 430 may also be a volatile memory, which may be a random access memory (RAM) used as an external cache. By way of example but not limitation, many forms of RAM are available, such as static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDRSDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous connection dynamic random access memory (SLDRAM), and direct rambus RAM (DR RAM). The storage unit 430 may also be used to store program codes and data, so that the processing unit 410 can call the program codes stored in the storage unit 430 to execute some or all of the operation steps in the above method embodiment, or to execute the corresponding functions in the above device embodiment. Figure 5 Show more or fewer components, or have different component configurations.

[0064] The bus 440 may be a peripheral component interconnect express (PCIe) bus, an extended industry standard architecture (EISA) bus, a unified bus (Ubus or UB), a compute express link (CXL), a cache coherent interconnect for accelerators (CCIX), etc. The bus 440 may be divided into an address bus, a data bus, a control bus, etc. In addition to the data bus, the bus 440 may also include a power bus, a control bus, and a status signal bus, etc. However, for the sake of clarity, Figure 5 Only one thick line is used in the diagram, but this does not mean that there is only one bus or only one type of bus.

[0065] The present application also provides a system, which includes multiple computing devices, and the structure of each computing device can refer to the structure of the computing device described above. The functions or operations that can be implemented by the system can refer to the specific implementation steps in the above method embodiment and / or the specific functions described in the above device embodiment, which will not be repeated here.

[0066] In the above embodiments, all or part of the embodiments can be implemented by software, hardware, firmware or any combination thereof. When implemented by software, all or part of the embodiments can be implemented in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, all or part of the processes or functions described in the embodiments of the present invention are generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network or other programmable device. The computer instructions can be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions can be transmitted from one network site, computer, server or data center to another network site, computer, server or data center by wired (e.g., coaxial cable, optical fiber, digital subscriber line) or wireless (e.g., infrared, microwave, etc.) means. The computer-readable storage medium can be any available medium that can be accessed by a computer, or it can be a data storage device such as a server or data center that includes one or more available media integrated. The available medium can be a magnetic medium (e.g., a floppy disk, a hard disk, a tape, etc.), an optical medium (e.g., a DVD, etc.), or a semiconductor medium (e.g., a solid-state hard disk), etc. In the above embodiments, the description of each embodiment has different emphases. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

Claims

1. A network port direct access system, characterized in that: include: A processor, used for driving a data processor through a driver; A data processor, used for providing a peripheral device interconnection expansion device and a hardware logic of a topological relationship of the peripheral device interconnection expansion device, the data processor is further provided with a simulator, the simulator is used for providing a peripheral device interconnection expansion device and a software logic of a topological relationship of the peripheral device interconnection expansion device, and negotiates and interacts with the hardware logic to realize simulation of the peripheral device interconnection expansion device, the peripheral device interconnection expansion device includes a peripheral device interconnection expansion bridge device and a peripheral device interconnection expansion terminal device, and the peripheral device interconnection expansion terminal device includes a network card; The data processor can run in a first mode and a second mode. In the first mode, the data processor presents an original physical network port to the processor, and data in the processor can directly pass through the original physical network port. In the second mode, the data processor presents a virtual network port to the processor, and data in the processor can reach the virtual network port after being processed by software running in the data processor; the data processor is also used to present a first physical network port to the processor in the second mode, and data in the processor can directly pass through the first physical network port, and the first physical network port corresponds to a first network card; the data processor is also used to present a second physical network port to the processor in the second mode, and data in the processor can directly pass through the second physical network port, and the second physical network port corresponds to a second network card; The data processor is used for sending the first flow forwarding table entry corresponding to the first network card to the first physical network port but not to the second physical network port, and sending the second flow forwarding table entry corresponding to the second network card to the second physical network port but not to the first physical network port when there is no binding relationship between the first physical network port and the second physical network port; The data processor is used to send the first traffic forwarding table entry corresponding to the first network card to the first physical network port and the second physical network port, and send the second traffic forwarding table entry corresponding to the second network card to the first physical network port and the second physical network port when a binding relationship exists between the first physical network port and the second physical network port.

2. The system according to claim 1, characterized in that The data processor is further configured to delete the first network card in the second mode, When there is no binding relationship between the first physical network port and the second physical network port, deleting the first traffic forwarding entry received by the first physical network port; When a binding relationship exists between the first physical network port and the second physical network port, a first traffic forwarding entry received by the first physical network port and a first traffic forwarding entry received by the second physical network port are deleted.

3. The system according to claim 1, characterized in that The data processor is also used to: When the binding relationship between the first physical network port and the second physical network port changes from no binding relationship to a binding relationship, sending the first traffic forwarding table entry to the second physical network port; When the binding relationship between the first physical network port and the second physical network port changes from a binding relationship to a non-binding relationship, the first traffic forwarding entry received by the second physical network port is deleted.

4. The system according to claim 1, characterized in that The data processor is further configured to delete the second network card in the second mode; The data processor is further configured to delete a second traffic forwarding entry received by the second physical network port when there is no binding relationship between the first physical network port and the second physical network port; The data processor is further configured to delete, when a binding relationship exists between the first physical network port and the second physical network port, a second traffic forwarding entry received by the first physical network port and a second traffic forwarding entry received by the second physical network port.

5. The system according to claim 4, characterized in that The data processor is also used to: When the binding relationship between the first physical network port and the second physical network port changes from no binding relationship to a binding relationship, sending the second traffic forwarding table entry to the first physical network port; When the binding relationship between the first physical network port and the second physical network port changes from a binding relationship to a non-binding relationship, the second traffic forwarding entry received by the first physical network port is deleted.

6. The system according to any one of claims 1 to 5, characterized in that: The software running in the data processor includes a virtual switch and a data plane development kit.

7. A computing device, characterized in that It comprises a network port direct communication system and a storage unit, the network port direct communication system and the storage unit can communicate with each other, and the network port direct communication system is the system according to any one of claims 1-6.

8. A computing device cluster, characterized in that: It comprises a network port direct communication system and a storage unit, the network port direct communication system and the storage unit can communicate with each other, and the network port direct communication system is the system according to any one of claims 1-6.

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