Automatic PCBA test system

Abstract

The invention discloses an automatic PCBA test system. The automatic PCBA test system comprises a transmission mechanism used for transmitting a welded circuit board to different simulation test point positions and then carrying out a cycle performance test; the image acquisition mechanism is used for performing image acquisition on the welding surface of the circuit board so as to identify a soldering tin structure on the welding surface of the circuit board and form change of the soldering tin structure on the welding surface of the circuit board after stripping test simulation; the performance testing mechanism is used for electrifying the circuit board and detecting circuit performance parameters of the circuit board; the test simulation mechanism is used for applying stripping friction to the circuit board; the circuit board subjected to the stripping friction test is driven by the transmission mechanism to move to the image acquisition mechanism, and the performance of the circuit board is tested through the performance test mechanism so as to determine the performance stability of the circuit board corresponding to different soldering tin structures; according to the invention, the relation between the deviation distance between the electronic element pin of the circuit board and the central position of the soldering tin structure and the anti-stripping performance of the welding spot of the circuit board is determined.

Description

Technical Field

[0001] The present invention relates to the technical field of PCBA, and in particular to an automatic PCBA testing system. Background Art

[0002] PCBA is the abbreviation of Printed Circuit Board Assembly, which is also the state of PCB circuit board after SMT soldering chips, resistors, capacitors and other electronic components, such as mobile phones and computer motherboards. PCBA testing includes voltage testing, current testing, power consumption testing, communication testing, signal testing, sensor testing, etc., but lacks an integrated system for anti-peeling, anti-vibration performance, voltage testing, and current testing. Summary of the invention

[0003] The object of the present invention is to provide an automated PCBA testing system to solve the technical problem in the prior art of lacking an integrated system for anti-peeling, anti-vibration performance, voltage testing, and current testing.

[0004] In order to solve the above technical problems, the present invention specifically provides the following technical solutions:

[0005] An automated PCBA testing system, comprising:

[0006] The transmission mechanism is a U-shaped head-to-tail connection structure, which is used to transmit the soldered circuit board to different simulation test points for cyclic performance testing;

[0007] An image acquisition mechanism is used to acquire images of the soldering surface of the soldered circuit board to identify the solder structure on the soldering surface of the circuit board and the morphological changes of the solder structure on the soldering surface of the circuit board after the peeling test simulation;

[0008] A performance testing mechanism, used to power on the circuit board and detect circuit performance parameters of the circuit board, and to implement performance testing of the circuit board by comparing the detected circuit performance parameters with set parameters respectively;

[0009] A test simulation mechanism, arranged behind the performance test mechanism, for applying peeling friction to the circuit board;

[0010] The circuit board that has undergone the peeling friction test is moved to the image acquisition mechanism under the drive of the transmission mechanism, and the changes in the solder structure of the welding surface of the circuit board are obtained through the image acquisition mechanism. The performance of the circuit board is tested by the performance testing mechanism to determine the performance stability of the circuit boards corresponding to different solder structures.

[0011] As a preferred solution of the present invention, the welding surface of the circuit board on the transmission mechanism faces upward, and the electronic component ends of the circuit board face downward. The image acquisition mechanism is arranged above the transmission mechanism, and the image acquisition mechanism obtains the welding surface image of the circuit board. The image acquisition mechanism is connected to a data processing system, and the data processing system extracts each pin on the welding surface of the circuit board and the solder structure around the pin, and determines the deviation value between the position of each pin and the center position of the solder structure around the pin.

[0012] As a preferred solution of the present invention, the data processing system is provided with an identification module, through which each pin of the soldering surface of the circuit board and the solder structure around the pin are extracted;

[0013] The recognition module includes a binarization processing unit, and the image processing unit is used to obtain a grayscale image of the welding surface of the circuit board and perform binarization processing on the grayscale image;

[0014] It also includes an edge detection unit, which performs edge detection on the binary image to identify each solder structure of the circuit board, and retains each solder structure of the welding surface through pixel screening;

[0015] It also includes a pixel screening unit for restoring the image that only retains the solder structure into a grayscale image, performing pixel screening on the surrounding area of ​​each solder structure based on the grayscale image, and obtaining the pin position in each solder structure.

[0016] As a preferred solution of the present invention, the data processing system analyzes the deviation between the position of each pin and the center position of the solder structure around the pin in a method as follows:

[0017] Constructing a two-dimensional coordinate system for the restored grayscale image, and identifying the coordinate value (x1, y1) corresponding to the center position of each solder structure and the coordinate value (x2, y2) corresponding to the pin position corresponding to each solder structure based on the two-dimensional coordinate system;

[0018] Calculate the deviation distance between the center position of each solder structure and the pin position corresponding to each solder structure

[0019] The deviation distances between all solder structures on each circuit board and their corresponding pins are counted, and the average pin deviation and the maximum pin deviation of the circuit board are obtained.

[0020] As a preferred solution of the present invention, after the circuit board has been peeled and rubbed by the test simulation mechanism, it is returned to the image acquisition mechanism under the drive of the transmission mechanism, and the data processing system uses the image corresponding to each circuit board passing through the image acquisition mechanism for the first time as a template image, and the data processing system compares the image taken each time after the circuit board has been peeled and rubbed by the test simulation mechanism with the template image, and first screens out the circuit boards that have not been broken;

[0021] The data processing system compares the circuit board image taken each time after the test simulation mechanism peels and rubs with the template image, and then screens out the solder structure with fault problems;

[0022] The performance testing mechanism performs a performance test on the circuit board after it has been stripped and rubbed by the test simulation mechanism for multiple times, so as to determine whether a performance failure occurs in the circuit board after it has been stripped and rubbed by the test simulation mechanism for multiple times.

[0023] As a preferred solution of the present invention, the number of tests of the test simulation mechanism is set, and the data processing system is used to count whether the circuit board that has undergone the set number of tests has any performance failure.

[0024] As a preferred solution of the present invention, when the deviation spacings between all corresponding solder structures on the circuit board and their corresponding pins are different, and the circuit board has no performance failure after a set number of tests, the deviation spacings corresponding to all circuit boards at this time are determined, the maximum deviation values ​​of the pins on all circuit boards are determined, and the maximum deviation values ​​of the pins of all circuit boards are compared, and the maximum pin deviation value obtained by comparison is used as the maximum pin deviation threshold for the circuit board to maintain stable performance;

[0025] When the deviation spacings between all corresponding solder structures on a circuit board and their corresponding pins are different, and a circuit board has a performance fault after a set number of tests, the deviation spacing corresponding to the circuit board with the performance fault is determined, and the minimum pin deviation maximum value corresponding to all circuit boards with performance faults is used as the pin deviation threshold for the circuit board to maintain stable performance.

[0026] As a preferred solution of the present invention, the data processing system screens out faulty circuit boards and non-faulty circuit boards with the same pin deviation maximum values, compares the pin deviation average values ​​corresponding to the faulty circuit boards and the non-faulty circuit boards at this time, and uses the minimum pin deviation average value corresponding to the non-faulty circuit boards as the pin deviation average threshold for the circuit board to maintain stable performance.

[0027] As a preferred solution of the present invention, the performance testing mechanism includes a power-on fixture and a test probe arranged on the power-on fixture, the circuit board on the transmission mechanism is transferred to the power-on fixture, and after the test is completed, the circuit board in the power-on fixture is transferred back to the transmission mechanism, the test probe is connected to a current collection unit and a voltage collection unit, and the current collection unit and the voltage collection unit are connected to a central processing system;

[0028] The central processing system compares the current information collected by the current collection unit with the set value to determine whether the current flowing through the circuit board meets the set value;

[0029] The central processing system compares the voltage information collected by the voltage collection unit with the set value to determine whether the circulating voltage of the circuit board meets the set value.

[0030] As a preferred solution of the present invention, the test simulation mechanism includes a scraping unit and a friction unit arranged above the scraping unit and capable of moving and rubbing on the surface of the circuit board. The scraping unit is used to clamp and fix the circuit board on the transmission mechanism, and the friction unit is used to generate friction force in the left and right directions on the welding surface of the circuit board to test the anti-peeling ability of the solder joints of the circuit board.

[0031] Compared with the prior art, the present invention has the following beneficial effects:

[0032] The present invention determines the relationship between the deviation spacing between the pins of electronic components of a circuit board and the center positions of their solder structures and the anti-peeling performance of the solder joints of the circuit board through the above-mentioned test system, determines the pin deviation maximum value corresponding to the circuit board that achieves anti-peeling fault-free within the number of performance tests, uses the pin deviation maximum value as the pin deviation threshold, defines a circuit board whose deviation spacing between the pins and the center positions of their solder structures is lower than the pin deviation threshold as a good board, or defines a circuit board whose deviation spacing between the pins and the center positions of their solder structures is higher than the pin deviation threshold, but whose pin deviation average value is lower than the pin deviation average threshold as a good board, and defines a circuit board whose deviation spacing between the pins and the center positions of their solder structures is higher than the pin deviation threshold as a bad board, so as to guide subsequent circuit board quality screening work. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] In order to more clearly illustrate the implementation methods of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for the implementation methods or the description of the prior art. Obviously, the drawings in the following description are only exemplary, and for ordinary technicians in this field, other implementation drawings can be derived from the provided drawings without creative work.

[0034] Figure 1 A schematic diagram of the structure of a test system according to an embodiment of the present invention;

[0035] The numbers in the figure represent the following:

[0036] 1-Transmission mechanism; 2-Image acquisition mechanism; 3-Performance testing mechanism; 4-Test simulation mechanism. DETAILED DESCRIPTION

[0037] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0038] like Figure 1 As shown, the present invention provides an automated PCBA testing system, comprising: a transmission mechanism 1, an image acquisition mechanism 2, a performance testing mechanism 3 and a test simulation mechanism 4.

[0039] The transmission mechanism 1 is a U-shaped end-to-end connection structure, which is used to transmit the soldered circuit board to different simulation test points for cyclic performance testing.

[0040] The image acquisition mechanism 2 is used to acquire images of the welding surface of the circuit board after welding, and to acquire images of the welding surface of the circuit board after the simulation experiment, so as to identify the solder structure on the welding surface of the circuit board, and the morphological changes of the solder structure on the welding surface of the circuit board after the peeling test simulation.

[0041] The performance testing mechanism 3 is used to power on the circuit board and detect the circuit performance parameters of the circuit board, and to implement the performance test of the circuit board by comparing the detected circuit performance parameters with the set parameters.

[0042] The test simulation mechanism 4 is arranged behind the performance test mechanism 3 and is used to apply peeling friction to the circuit board.

[0043] The circuit board that has passed the peeling friction test is moved to the image acquisition mechanism 2 by the transmission mechanism 1, and the changes in the solder structure of the welding surface of the circuit board are obtained by the image acquisition mechanism 2. The performance of the circuit board is tested by the performance testing mechanism 3 to determine the performance stability of the circuit board corresponding to different solder structures.

[0044] In this embodiment, the main test process is:

[0045] Different solder structures (here mainly refers to the different deviation spacings between the pins and the center positions of the corresponding solder joints) are passed through an image acquisition mechanism to identify the deviation spacings between the pins of each electronic component and the center positions of the corresponding solder joints. After determining the deviation spacings of the solder joints on each circuit board, a performance test is performed on the circuit board to test the voltage and current of the circuit board respectively to determine whether the circuit board can be turned on after power is applied, and whether the current value and voltage value after turning on meet expectations. Afterwards, the circuit board after the performance test is passed through a test simulation mechanism 4 and image acquisition and performance testing are performed again. After multiple cycles of test simulation, image acquisition and performance testing, it is determined whether each circuit board has a performance failure, and the relationship between the circuit board failure and the deviation spacing of the solder joints of each pin is determined.

[0046] Based on the relationship between the circuit board failure and the solder point deviation spacing of each pin obtained above, the qualified solder point parameters of the circuit board can be judged. Therefore, when subsequently judging whether there are quality problems in the mass-produced circuit boards, it is only necessary to capture images of the welding surfaces of the mass-produced circuit boards and determine the solder point deviation spacing of each pin on the welding surface. Based on the solder point deviation data of the welding surface of the circuit board, it is determined whether the circuit board is qualified.

[0047] Therefore, the test system of this embodiment is specifically used to test the relationship between the deviation between the pin and the center position of the solder structure corresponding to the pin, and the performance stability of the circuit board, determine the maximum pin deviation between the pin corresponding to the qualified circuit board and the center position of the solder structure corresponding to the pin, and use the maximum pin deviation as the pin deviation threshold for the circuit board to maintain stable performance. Therefore, when the maximum pin deviation of the circuit board is lower than the pin deviation threshold, the circuit board can be considered to be a qualified circuit board.

[0048] Furthermore, when the maximum pin deviation of the circuit board is greater than the pin deviation threshold, but the average pin deviation of the circuit board is small, the circuit board has great stability, so the average pin deviation threshold for the circuit board to maintain stable performance is determined, and the circuit board with an average pin deviation less than the average pin deviation threshold is considered to be a qualified circuit board.

[0049] Based on the above, the soldering surface of the circuit board on the transmission mechanism 1 faces upward, and the electronic component ends of the circuit board face downward. The image acquisition mechanism 2 is arranged above the transmission mechanism 1. The image acquisition mechanism 2 obtains the soldering surface image of the circuit board. The image acquisition mechanism 2 is connected to a data processing system. The data processing system extracts each pin on the soldering surface of the circuit board and the solder structure around the pin, and determines the position of each pin and the deviation value between the center position of the solder structure around the pin.

[0050] As a preferred embodiment of the present embodiment, the performance testing mechanism 3 includes a power-on fixture and a test probe arranged on the power-on fixture, and the circuit board on the transmission mechanism 1 is transferred to the power-on fixture. After the test is completed, the circuit board in the power-on fixture is transferred back to the transmission mechanism 1. The test probe is connected to a current collection unit and a voltage collection unit, and the current collection unit and the voltage collection unit are connected to the central processing system.

[0051] The central processing system compares the current information collected by the current collection unit with the set value to determine whether the current flowing through the circuit board meets the set value.

[0052] The central processing system compares the voltage information collected by the voltage collection unit with the set value to determine whether the circulating voltage of the circuit board meets the set value.

[0053] The test simulation mechanism 4 includes a scraping unit and a friction unit which is arranged above the scraping unit and can move and rub on the surface of the circuit board. The scraping unit is used to clamp and fix the circuit board on the transmission mechanism 1, and the friction unit is used to generate friction force in the left and right directions on the welding surface of the circuit board to test the anti-peeling ability of the solder joints of the circuit board.

[0054] That is to say, in this embodiment, there are multiple circuit boards upstream of the performance testing mechanism 3, and the number of circuit boards with the same solder structure (here mainly refers to the different deviation spacings between the center positions of the pins and their corresponding solder points) is multiple, in order to avoid the problem of test errors that may easily occur when there is only one circuit board with the same solder structure.

[0055] Multiple circuit boards with the same solder structure are passed through an image acquisition mechanism 2 to obtain the deviation distance between each pin and the center position of its solder structure, and then the circuit board on the transmission mechanism 1 is transferred to the power-on fixture, and the flow current of the circuit board is determined using a test probe and a current acquisition unit, and the flow voltage of the circuit board is determined using a test probe and a voltage acquisition unit. Based on whether the flow current meets the set value and whether the flow voltage meets the set value, it is determined whether the circuit board is a good board without faults.

[0056] At this time, if the circuit board is a faulty bad board, the pin deviation maximum value is determined based on the deviation distance between the pin of the circuit board and the center position of its solder structure, and is counted in the corresponding series between the bad board and the pin deviation maximum value.

[0057] If the circuit board is a good board without any faults, the good board will be further transmitted to the test simulation mechanism 4, and the extraction cycle operation of the test simulation mechanism 4-image acquisition mechanism 2-performance testing mechanism 3 will be carried out for many times to determine the circuit board material with faults detected within the number of tests, and the maximum pin deviation value will be determined based on the deviation distance between the pins of the circuit board and the center position of its solder structure, and the data will be counted in the corresponding series between the bad board and the maximum pin deviation value.

[0058] Based on the above, it is possible to determine the maximum deviation between the faulty circuit board and its corresponding pin within a limited number of tests, thereby determining the pin deviation threshold corresponding to the good board, and defining circuit boards below the pin deviation threshold as good boards, while circuit boards exceeding the pin deviation threshold are defined as bad boards for screening out.

[0059] The data processing system is provided with an identification module, through which each pin of the soldering surface of the circuit board and the solder structure around the pin are extracted.

[0060] The recognition module includes a binarization processing unit, and the image processing unit is used to obtain a grayscale image of the welding surface of the circuit board and perform binarization processing on the grayscale image.

[0061] It also includes an edge detection unit, which performs edge detection on the binary image to identify each solder structure of the circuit board, and retains each solder structure of the welding surface through pixel screening.

[0062] It also includes a pixel screening unit for restoring the image that only retains the solder structure into a grayscale image, performing pixel screening on the surrounding area of ​​each solder structure based on the grayscale image, and obtaining the pin position in each solder structure.

[0063] The data processing system analyzes the deviation between the position of each pin and the center position of the solder structure around the pin in the following way:

[0064] A two-dimensional coordinate system is constructed for the restored grayscale image, and the coordinate values ​​(x1, y1) corresponding to the center position of each solder structure and the coordinate values ​​(x2, y2) corresponding to the pin position of each solder structure are identified based on the two-dimensional coordinate system.

[0065] Calculate the deviation distance between the center position of each solder structure and the pin position corresponding to each solder structure

[0066] The deviation distances between all solder structures on each circuit board and their corresponding pins are counted, and the average pin deviation and the maximum pin deviation of the circuit board are obtained.

[0067] In this embodiment, by calculating the deviation spacing between each solder structure on the circuit board and its corresponding pin and by comparing the deviation spacings of all solder structures, the maximum pin deviation of the circuit board can be obtained, and by accumulating and averaging the deviation spacings of all solder structures, the average pin deviation of the circuit board can be obtained.

[0068] After being peeled and rubbed by the test simulation mechanism 4, the circuit board is returned to the image acquisition mechanism 2 under the drive of the transmission mechanism 1. The data processing system uses the image taken when each circuit board passes through the image acquisition mechanism 2 for the first time as a template image, and the data processing system compares the image taken each time after the circuit board is peeled and rubbed by the test simulation mechanism 4 with the template image to first screen out the circuit boards that are not broken.

[0069] The data processing system compares the circuit board image taken each time after the peeling and friction by the test simulation mechanism 4 with the template image to screen out the solder structure with fault problems.

[0070] The performance testing mechanism 3 performs a performance test on the circuit board after it has been stripped and rubbed by the test simulation mechanism 4 for multiple times, so as to determine whether the circuit board after it has been stripped and rubbed by the test simulation mechanism 4 for multiple times has a performance failure.

[0071] Specifically, since the present embodiment is mainly used to measure the relationship between the soldering structure and the performance failure, the performance failure caused by the problem of the board material itself must be eliminated first, and then the relationship between the deviation spacing between the soldering structure and the pin and the performance failure can be further determined. Therefore, the present embodiment first screens out the circuit boards with obvious board material failures.

[0072] This embodiment performs a performance test on a circuit board that has been subjected to multiple peeling and friction by the test simulation mechanism 4 to determine the relationship between the deviation spacing between the center position of the circuit board's welding structure and the pins and the performance failure. The specific implementation method is as follows:

[0073] The number of tests of the test simulation mechanism 4 is set, and statistics are made through the data processing system to see whether performance failures occur in the circuit boards that have undergone the set number of tests. For example, based on the degree of damage to the solder joints by the test simulation mechanism 4, the number of tests of the test simulation mechanism 4 is set to 10 times, and then circuit boards of all welding types (i.e., circuit boards with different deviation spacings between the center position of the solder structure and the pins) are placed on the transmission mechanism 1 in turn. After ≤10 tests, the circuit boards with performance failures and their corresponding number of tests by the test simulation mechanism 4 are determined.

[0074] When the deviation spacings between all corresponding solder structures on the circuit board and their corresponding pins are different, and no performance failure occurs on the circuit board after a set number of tests, the deviation spacings corresponding to all circuit boards at this time are determined, the maximum pin deviations on all circuit boards are determined, the maximum pin deviations of all circuit boards are compared, and the maximum pin deviation maximum value obtained by comparison is used as the pin deviation threshold for the circuit board to maintain stable performance. At this time, the circuit board with a deviation spacing between each pin and its corresponding solder structure less than or equal to the pin deviation threshold is regarded as a qualified microcontroller, and the circuit board with a deviation spacing between each pin and its corresponding solder structure greater than the pin deviation threshold is regarded as an unqualified microcontroller.

[0075] When the deviation spacings between all corresponding solder structures on the circuit board and their corresponding pins are different, and the circuit board has a performance fault after a set number of tests, the deviation spacing corresponding to the circuit board with the performance fault is determined, and the minimum pin deviation maximum value corresponding to all circuit boards with performance faults is used as the pin deviation threshold for the circuit board to maintain stable performance. Similarly, at this time, the circuit board with a deviation spacing between each pin and its corresponding solder structure less than or equal to the pin deviation threshold is regarded as a qualified microcontroller, and the circuit board with a deviation spacing between each pin and its corresponding solder structure greater than the pin deviation threshold is regarded as an unqualified microcontroller.

[0076] For circuit boards with the same pin deviation maximum value, but divided into faulty circuit boards and non-faulty circuit boards, the data processing system screens out the faulty circuit boards and non-faulty circuit boards with the same pin deviation maximum value, compares the pin deviation average values ​​corresponding to the faulty circuit boards and the non-faulty circuit boards at this time, and takes the minimum pin deviation average value corresponding to the non-faulty circuit boards as the pin deviation average threshold for the circuit board to maintain stable performance.

[0077] This embodiment uses the above-mentioned test system to test the relationship between the deviation spacing between the pins of electronic components of the circuit board and the center position of their solder structure and the anti-peeling performance of the solder joints of the circuit board, and determines the maximum pin deviation corresponding to the circuit board that achieves anti-peeling fault-free within the number of performance tests. The maximum pin deviation is used as the pin deviation threshold, and the circuit board whose deviation spacing between the pins and the center position of the solder structure is lower than the pin deviation threshold is defined as a good board, or the circuit board whose deviation spacing between the pins and the center position of the solder structure is higher than the pin deviation threshold, but the circuit board whose pin deviation average value is lower than the pin deviation average threshold is defined as a good board, and the circuit board whose deviation spacing between the pins and the center position of the solder structure is higher than the pin deviation threshold is defined as a bad board, so as to guide the subsequent circuit board quality screening work.

[0078] The above embodiments are only exemplary embodiments of the present application and are not intended to limit the present application. The protection scope of the present application is defined by the claims. Those skilled in the art may make various modifications or equivalent substitutions to the present application within the essence and protection scope of the present application, and such modifications or equivalent substitutions shall also be deemed to fall within the protection scope of the present application.

Claims

1. An automated PCBA testing system, characterized in that: include: The transmission mechanism (1) is a U-shaped end-to-end connection structure, used to transmit the soldered circuit board to different simulation test points for cyclic performance testing; An image acquisition mechanism (2) is used to acquire an image of the soldering surface of the soldered circuit board, identify the solder structure on the soldering surface of the circuit board, and the morphological change of the solder structure on the soldering surface of the circuit board after being simulated by a peeling test; A performance testing mechanism (3) is used to power on the circuit board and detect circuit performance parameters of the circuit board, and to perform performance testing on the circuit board by comparing the detected circuit performance parameters with set parameters; A test simulation mechanism (4), arranged behind the performance test mechanism (3), for applying peeling friction to the circuit board; The circuit board that has undergone the peeling friction test is moved to the image acquisition mechanism (2) under the drive of the transmission mechanism (1), and the change of the solder structure of the soldering surface of the circuit board is obtained through the image acquisition mechanism (2). The performance of the circuit board is tested by the performance testing mechanism (3) to determine the performance stability of the circuit board corresponding to different solder structures.

2. An automated PCBA testing system according to claim 1, characterized in that: The soldering surface of the circuit board on the transmission mechanism (1) faces upwards, and the electronic component ends of the circuit board face downwards. The image acquisition mechanism (2) is arranged above the transmission mechanism (1). The image acquisition mechanism (2) acquires an image of the soldering surface of the circuit board. The image acquisition mechanism (2) is connected to a data processing system. The data processing system extracts each pin on the soldering surface of the circuit board and the solder structure around the pin, and determines the deviation value between the position of each pin and the center position of the solder structure around the pin.

3. An automated PCBA testing system according to claim 2, characterized in that: The data processing system is provided with an identification module, through which each pin of the soldering surface of the circuit board and the solder structure around the pin are extracted; The recognition module includes a binarization processing unit, and the image processing unit is used to obtain a grayscale image of the welding surface of the circuit board and perform binarization processing on the grayscale image; It also includes an edge detection unit, which performs edge detection on the binary image to identify each solder structure of the circuit board, and retains each solder structure of the welding surface through pixel screening; It also includes a pixel screening unit for restoring the image that only retains the solder structure into a grayscale image, performing pixel screening on the surrounding area of ​​each solder structure based on the grayscale image, and obtaining the pin position in each solder structure.

4. An automated PCBA testing system according to claim 3, characterized in that: The data processing system analyzes the deviation between the position of each pin and the center position of the solder structure around the pin in the following way: Constructing a two-dimensional coordinate system for the restored grayscale image, and identifying the coordinate value (x1, y1) corresponding to the center position of each solder structure and the coordinate value (x2, y2) corresponding to the pin position corresponding to each solder structure based on the two-dimensional coordinate system; Calculate the deviation distance between the center position of each solder structure and the pin position corresponding to each solder structure The deviation distances between all solder structures on each circuit board and their corresponding pins are counted, and the average pin deviation and the maximum pin deviation of the circuit board are obtained.

5. An automated PCBA testing system according to claim 4, characterized in that: After the circuit board has been peeled and rubbed by the test simulation mechanism (4), it is driven by the transmission mechanism (1) to return to the image acquisition mechanism (2), and the data processing system uses the image corresponding to each circuit board passing through the image acquisition mechanism (2) for the first time as a template image, and the data processing system compares the image taken each time after the circuit board has been peeled and rubbed by the test simulation mechanism (4) with the template image, and first selects the circuit board without any breakage; The data processing system compares the circuit board image taken each time after the test simulation mechanism (4) peels off and rubs with the template image, and then screens out the solder structure with fault problems; The performance testing mechanism (3) performs a performance test on the circuit board after it has been stripped and rubbed by the test simulation mechanism (4) for multiple times, so as to determine whether a performance failure occurs in the circuit board after it has been stripped and rubbed by the test simulation mechanism (4) for multiple times.

6. An automated PCBA testing system according to claim 5, characterized in that: The number of tests of the test simulation mechanism (4) is set, and statistics are collected through a data processing system to determine whether performance failures occur in the circuit boards that have undergone the set number of tests.

7. An automated PCBA testing system according to claim 6, characterized in that: When the deviation spacings between all corresponding solder structures and their corresponding pins on the circuit board are different, and no performance failure occurs in the circuit board after the set number of tests, the deviation spacings corresponding to all circuit boards at this time are determined, the maximum deviation values ​​of the pins on all circuit boards are determined, and the maximum deviation values ​​of the pins of all circuit boards are compared, and the maximum pin deviation value obtained by comparison is used as the maximum pin deviation threshold for the circuit board to maintain stable performance; When the deviation spacings between all corresponding solder structures on a circuit board and their corresponding pins are different, and a circuit board has a performance fault after a set number of tests, the deviation spacing corresponding to the circuit board with the performance fault is determined, and the minimum pin deviation maximum value corresponding to all circuit boards with performance faults is used as the pin deviation threshold for the circuit board to maintain stable performance.

8. An automated PCBA testing system according to claim 7, characterized in that: The data processing system screens out faulty circuit boards and non-faulty circuit boards with the same pin deviation maximum values, compares the pin deviation average values ​​corresponding to the faulty circuit boards and the non-faulty circuit boards at this time, and uses the minimum pin deviation average value corresponding to the non-faulty circuit board as the pin deviation average threshold for the circuit board to maintain stable performance.

9. The automated PCBA testing system according to claim 1, characterized in that: The performance testing mechanism (3) comprises a power-on fixture and a test probe arranged on the power-on fixture, and the circuit board on the transmission mechanism (1) is transferred to the power-on fixture. After the test is completed, the circuit board in the power-on fixture is transferred back to the transmission mechanism (1), and the test probe is connected to a current collection unit and a voltage collection unit, and the current collection unit and the voltage collection unit are connected to a central processing system; The central processing system compares the current information collected by the current collection unit with the set value to determine whether the current flowing through the circuit board meets the set value; The central processing system compares the voltage information collected by the voltage collection unit with the set value to determine whether the circulating voltage of the circuit board meets the set value.

10. The automated PCBA testing system according to claim 1, characterized in that: The test simulation mechanism (4) comprises a scraping unit and a friction unit arranged above the scraping unit and capable of moving and rubbing on the surface of the circuit board. The scraping unit is used to clamp and fix the circuit board on the transmission mechanism (1). The friction unit is used to generate friction force in the left and right directions on the welding surface of the circuit board to test the anti-peeling ability of the solder joints of the circuit board.

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