Pre-reading method and electronic equipment

Abstract

The invention provides a pre-reading method and electronic equipment, and the method comprises the steps: in an application starting process, obtaining a pre-reading calculation parameter based on a memory residual space, and obtaining pre-reading collection information of an application based on the pre-reading calculation parameter; the pre-reading collection information comprises N access addresses corresponding to each file needing to be accessed when the application is started, the N value is smaller than the number of the access addresses corresponding to the files in the file access information, and the N access addresses cover a plurality of access addresses originally needing to be accessed by each file. Thus, in the pre-reading process of next starting of the application, the electronic equipment can perform pre-reading based on the N access addresses corresponding to each file, the IO access frequency is effectively reduced, the pre-reading duration is shortened, the application starting efficiency is further improved, and the user experience is improved.

Description

Technical Field

[0001] The present application relates to the field of terminal equipment, and in particular to a pre-reading method and electronic equipment. Background Art

[0002] As electronic devices become more powerful, more and more applications are installed in them. Users can use the functions provided by these applications based on the applications installed in the electronic devices. At present, in the process of using user scenarios such as application startup and transition, due to memory size limitations, memory usually adopts a memory recycling mechanism. Due to the influence of this mechanism, page fault exceptions may occur when the application accesses the memory again, resulting in a longer application startup time and affecting the user experience. Summary of the invention

[0003] In order to solve the above technical problems, the present application provides a pre-reading method and an electronic device to effectively improve the efficiency of application access to memory.

[0004] In the first aspect, the present application provides a pre-reading method, which is applied to an electronic device, and the method includes: in the process of application startup, obtaining file access information of the application, the file access information includes multiple files that need to be accessed when the application is started and multiple access addresses corresponding to each file. Based on the current memory remaining space status, obtain the pre-reading calculation parameters. Based on the pre-reading calculation parameters and the file access information, obtain the pre-reading acquisition information corresponding to the application; the pre-reading acquisition information includes the access address information of at least one file among the multiple files, the access address information includes N access addresses, N is an integer greater than 0, and the N value is less than the number of access addresses corresponding to the file in the file access information, and the N access addresses corresponding to each file cover the multiple access addresses of the corresponding file. In the next startup process of the application, based on the pre-reading acquisition information, read the data corresponding to the N access addresses corresponding to each file in at least one file. In this way, the present application can effectively reduce the number of IO accesses by processing the access addresses of the files required for application startup and converting multiple access addresses into N access addresses. Moreover, in the present application, the remaining memory space is associated with the pre-reading calculation parameters, and the pre-reading calculation parameters can be adjusted according to the size of the remaining memory space, thereby improving the coverage accuracy of the N access addresses of each file in the pre-reading collection information and improving the data reading speed during data pre-reading. This effectively speeds up the pre-reading rate of the next application startup scenario, improves the efficiency of application startup, shortens the application startup time, and improves the user experience.

[0005] Exemplarily, N is a smaller value, such as a value between 3 and 5. Usually, the number of multiple access addresses corresponding to a file is large, for example, it may be dozens to thousands. By setting a smaller N value, the excessive access addresses are converted into a smaller number of access addresses, which can effectively reduce the number of IO accesses in the data reading process, reduce storage pressure, and increase the data reading rate.

[0006] In a possible implementation, the pre-read calculation parameters include an N value and a step threshold. Thus, in the present application, based on the N value and the step threshold obtained based on the remaining memory space, two values ​​associated with the size of the remaining memory space can be obtained, so that the two values ​​can be adjusted according to the change of the remaining memory space to achieve dynamic adjustment of the conditions for address aggregation to adapt to different usage scenarios.

[0007] In a possible implementation, based on the current memory remaining space status, the pre-reading calculation parameters are obtained, including: calculating the N value based on the memory remaining space status; calculating the step threshold based on the memory remaining space status. In this way, the N value and the step threshold obtained based on the memory remaining space in this application can obtain two values ​​associated with the size of the memory remaining space, so that the two values ​​can be adjusted according to the change of the memory remaining space to achieve dynamic adjustment of the conditions for address aggregation to adapt to different usage scenarios.

[0008] In a possible implementation, based on the pre-read calculation parameters and the file access information, the pre-read collection information corresponding to the application is obtained, including: based on the step threshold, the multiple access addresses of each file are aggregated to obtain N access addresses corresponding to each file. In this way, after the application calculates the step threshold through the remaining memory space, the address can be further aggregated based on the step threshold, so as to reduce the number of file access addresses and achieve the effect of reducing the number of IO accesses, thereby effectively speeding up the pre-read rate of the next application startup scenario, improving the efficiency of application startup, shortening the application startup time, and improving the user experience.

[0009] In one possible implementation, multiple access addresses of each file are aggregated based on a step threshold to obtain N access addresses corresponding to each file, including: aggregating the access addresses in the address range that satisfies the step threshold among the multiple access addresses in each file. In an embodiment of the present application, "the address range that satisfies the step threshold" means that the step between the access address of this traversal and the access address of the previous traversal is less than the step threshold. Among them, the step between the access addresses refers to the difference between the starting address of the current access address and the ending address of the previous access address. In this way, by setting the step threshold as a condition for address aggregation, the access addresses that meet the condition can be merged, thereby reducing the number of access addresses to reduce the number of IO accesses when reading data.

[0010] In a possible implementation, based on the pre-read calculation parameters and the file access information, obtaining the pre-read collection information corresponding to the application includes: obtaining the access address information of m files among the multiple files based on the pre-read calculation parameters and the file access information; sorting the m files based on the access times corresponding to the m files; and retaining the access address information of at least one file in the sorted m files. In this way, by sorting the access times, the pre-read collection information corresponding to the files with more access times can be retained, thereby reducing memory usage.

[0011] In a possible implementation, based on the pre-reading collection information, reading data corresponding to N access addresses corresponding to each file in at least one file includes: based on the merged pre-reading collection information, reading data corresponding to N access addresses corresponding to each file in at least one file, wherein the merged pre-reading collection information is obtained based on the pre-reading collection information and the pre-reading collection information corresponding to the application acquired the most recently. In this way, by merging the pre-reading collection information of this time and the previous time, the accuracy of the pre-reading collection information can be improved, so as to speed up the data reading rate of the next pre-reading.

[0012] In a second aspect, the present application provides an electronic device, comprising: one or more processors, a memory; and one or more computer programs, wherein the one or more computer programs are stored in the memory, and when the computer programs are executed by the one or more processors, the electronic device performs the following steps: during the application startup process, obtaining file access information of the application, the file access information including multiple files that need to be accessed when the application is started and multiple access addresses corresponding to each file; based on the current memory remaining space status, obtaining pre-read calculation parameters; based on the pre-read calculation parameters and the file access information, obtaining pre-read collection information corresponding to the application; the pre-read collection information includes access address information of at least one file among the multiple files, the access address information includes N access addresses, N is an integer greater than 0, and the N value is less than the number of access addresses corresponding to the file in the file access information, and the N access addresses corresponding to each file cover multiple access addresses of the corresponding file; during the next startup of the application, based on the pre-read collection information, read the data corresponding to the N access addresses corresponding to each file in at least one file.

[0013] In a possible implementation, the pre-reading calculation parameters include an N value and a step threshold.

[0014] In one possible implementation, when the computer program is executed by one or more processors, the electronic device performs the following steps: calculating the N value based on the remaining memory space status; and calculating the step threshold based on the remaining memory space status.

[0015] In one possible implementation, when the computer program is executed by one or more processors, the electronic device executes the following steps: based on a step threshold, perform address aggregation on multiple access addresses of each file to obtain N access addresses corresponding to each file.

[0016] In a possible implementation, when the computer program is executed by one or more processors, the electronic device executes the following steps: performing address aggregation on access addresses that meet the address range indicated by the step threshold among multiple access addresses in each file.

[0017] In one possible implementation, when the computer program is executed by one or more processors, the electronic device performs the following steps: based on pre-read calculation parameters and file access information, obtain access address information of m files among n files; based on the number of accesses corresponding to the m files, sort the m files; and retain the access address information of at least one file in the sorted m files.

[0018] In one possible implementation, when the computer program is executed by one or more processors, the electronic device performs the following steps: based on the merged pre-read acquisition information, read the data corresponding to N access addresses corresponding to each file in at least one file, wherein the merged pre-read acquisition information is obtained based on the pre-read acquisition information and the pre-read acquisition information corresponding to the application most recently acquired.

[0019] The second aspect and any implementation of the second aspect correspond to the first aspect and any implementation of the first aspect respectively. The technical effects corresponding to the second aspect and any implementation of the second aspect can refer to the technical effects corresponding to the above-mentioned first aspect and any implementation of the first aspect, which will not be repeated here.

[0020] In a third aspect, the present application provides a computer-readable medium for storing a computer program, wherein the computer program includes instructions for executing the method in the first aspect or any possible implementation of the first aspect.

[0021] In a fourth aspect, the present application provides a computer program, comprising instructions for executing the method in the first aspect or any possible implementation of the first aspect.

[0022] In a fifth aspect, the present application provides a chip, the chip comprising a processing circuit and a transceiver pin, wherein the transceiver pin and the processing circuit communicate with each other through an internal connection path, and the processing circuit executes the method in the first aspect or any possible implementation of the first aspect to control the receiving pin to receive a signal and control the sending pin to send a signal. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 is a schematic diagram of the hardware structure of an electronic device shown as an example;

[0024] Figure 2 A schematic diagram of the software structure of an electronic device is shown as an example;

[0025] Figure 3 is a schematic diagram of memory access shown as an example;

[0026] Figure 4 The following is a schematic diagram of an exemplary page fault exception handling process;

[0027] Figure 5 The figure is a schematic diagram of a pre-reading method flow chart shown as an example;

[0028] Figure 6 is a schematic diagram of a data structure shown as an example;

[0029] Figure 7 A flowchart of steps performed by a kernel node is shown as an example;

[0030] Figure 8 The figure is a schematic diagram of an exemplary process of obtaining pre-read calculation parameters;

[0031] Fig. 9 The figure is a schematic diagram of an exemplary process of obtaining pre-reading collected information;

[0032] Fig.10 The figure is a schematic diagram of a pre-reading method flow chart shown as an example;

[0033] Fig.11 Schematic diagram of the structure of the device shown as an example. DETAILED DESCRIPTION

[0034] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0035] The term "and / or" in this article is merely a description of the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone.

[0036] The terms "first" and "second" in the description and claims of the embodiments of the present application are used to distinguish different objects rather than to describe a specific order of objects. For example, a first target object and a second target object are used to distinguish different target objects rather than to describe a specific order of target objects.

[0037] In the embodiments of the present application, words such as "exemplary" or "for example" are used to indicate examples, illustrations or descriptions. Any embodiment or design described as "exemplary" or "for example" in the embodiments of the present application should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of words such as "exemplary" or "for example" is intended to present related concepts in a specific way.

[0038] In the description of the embodiments of the present application, unless otherwise specified, the meaning of "multiple" refers to two or more than two. For example, multiple processing units refer to two or more processing units; multiple systems refer to two or more systems.

[0039] Optionally, in the embodiment of the present application, the terminal device may be a mobile terminal with a shooting function, such as a mobile phone, a tablet computer, a wearable device, a vehicle-mounted device, an augmented reality (AR) / virtual reality (VR) device, a laptop computer, an ultra-mobile personal computer (UMPC), a netbook, a personal digital assistant (PDA), etc. The embodiment of the present application does not limit the specific type of the terminal device.

[0040] Figure 1 1 shows a schematic diagram of the structure of the electronic device 100. It should be understood that Figure 1 The illustrated electronic device 100 is merely one example of an electronic device, and the electronic device 100 may have more or fewer components than those shown in the figure, may combine two or more components, or may have a different configuration of components. Figure 1 The various components shown in the EMBODIMENTS 2000 may be implemented in hardware, software, or a combination of hardware and software, including one or more signal processing and / or application specific integrated circuits.

[0041] The electronic device 100 may include: a processor 110, an external memory interface 120, an internal memory 121, a universal serial bus (USB) interface 130, a charging management module 140, a power management module 141, a battery 142, an antenna 1, an antenna 2, a mobile communication module 150, a wireless communication module 160, an audio module 170, a speaker 170A, a receiver 170B, a microphone 170C, an earphone interface 170D, a sensor module 180, a button 190, a motor 191, an indicator 192, a camera 193, a display screen 194, and a subscriber identification module (SIM) card interface 195, etc.

[0042] The processor 110 may include one or more processing units, for example, the processor 110 may include an application processor (AP), a modem processor, a graphics processor (GPU), an image signal processor (ISP), a controller, a memory, a video codec, a digital signal processor (DSP), a baseband processor, and / or a neural-network processing unit (NPU), etc. Different processing units may be independent devices or integrated into one or more processors.

[0043] The controller may be the nerve center and command center of the electronic device 100. The controller may generate an operation control signal according to the instruction operation code and the timing signal to complete the control of fetching and executing instructions.

[0044] The processor 110 may also be provided with a memory for storing instructions and data. In some embodiments, the memory in the processor 110 is a cache memory. The memory may store instructions or data that the processor 110 has just used or cyclically used. If the processor 110 needs to use the instruction or data again, it may be directly called from the memory. This avoids repeated access, reduces the waiting time of the processor 110, and thus improves the efficiency of the system.

[0045] In some embodiments, the processor 110 may include one or more interfaces. The interface may include an inter-integrated circuit (I2C) interface, an inter-integrated circuit sound (I2S) interface, a pulse code modulation (PCM) interface, a universal asynchronous receiver / transmitter (UART) interface, a mobile industry processor interface (MIPI), a general-purpose input / output (GPIO) interface, a subscriber identity module (SIM) interface, and / or a universal serial bus (USB) interface, etc.

[0046] The charging management module 140 is used to receive charging input from a charger. The charger may be a wireless charger or a wired charger. In some wired charging embodiments, the charging management module 140 may receive charging input from a wired charger through the USB interface 130. In some wireless charging embodiments, the charging management module 140 may receive wireless charging input through a wireless charging coil of the electronic device 100. While the charging management module 140 is charging the battery 142, it may also power the electronic device through the power management module 141.

[0047] The power management module 141 is used to connect the battery 142, the charging management module 140 and the processor 110. The power management module 141 receives input from the battery 142 and / or the charging management module 140, and supplies power to the processor 110, the internal memory 121, the external memory, the display screen 194, the camera 193, and the wireless communication module 160. The power management module 141 can also be used to monitor parameters such as battery capacity, battery cycle number, battery health status (leakage, impedance), etc. In some other embodiments, the power management module 141 can also be set in the processor 110. In other embodiments, the power management module 141 and the charging management module 140 can also be set in the same device.

[0048] The wireless communication function of the electronic device 100 can be implemented through the antenna 1, the antenna 2, the mobile communication module 150, the wireless communication module 160, the modem processor and the baseband processor.

[0049] Antenna 1 and antenna 2 are used to transmit and receive electromagnetic wave signals. Each antenna in electronic device 100 can be used to cover a single or multiple communication frequency bands. Different antennas can also be reused to improve the utilization of antennas. For example, antenna 1 can be reused as a diversity antenna for a wireless local area network. In some other embodiments, the antenna can be used in combination with a tuning switch.

[0050] The mobile communication module 150 can provide solutions for wireless communications including 2G / 3G / 4G / 5G, etc., applied to the electronic device 100. The mobile communication module 150 may include at least one filter, a switch, a power amplifier, a low noise amplifier (LNA), etc. The mobile communication module 150 can receive electromagnetic waves from the antenna 1, and filter, amplify, and process the received electromagnetic waves, and transmit them to the modulation and demodulation processor for demodulation. The mobile communication module 150 can also amplify the signal modulated by the modulation and demodulation processor, and convert it into electromagnetic waves for radiation through the antenna 1. In some embodiments, at least some of the functional modules of the mobile communication module 150 can be set in the processor 110. In some embodiments, at least some of the functional modules of the mobile communication module 150 can be set in the same device as at least some of the modules of the processor 110.

[0051] The modem processor may include a modulator and a demodulator. Among them, the modulator is used to modulate the low-frequency baseband signal to be sent into a medium-high frequency signal. The demodulator is used to demodulate the received electromagnetic wave signal into a low-frequency baseband signal. The demodulator then transmits the demodulated low-frequency baseband signal to the baseband processor for processing. After the low-frequency baseband signal is processed by the baseband processor, it is passed to the application processor. The application processor outputs a sound signal through an audio device (not limited to a speaker 170A, a receiver 170B, etc.), or displays an image or video through a display screen 194. In some embodiments, the modem processor may be an independent device. In other embodiments, the modem processor may be independent of the processor 110 and be set in the same device as the mobile communication module 150 or other functional modules.

[0052] The wireless communication module 160 can provide wireless communication solutions including wireless local area networks (WLAN) (such as wireless fidelity (Wi-Fi) networks), bluetooth (BT), global navigation satellite system (GNSS), frequency modulation (FM), near field communication (NFC), infrared (IR), etc., which are applied to the electronic device 100. The wireless communication module 160 can be one or more devices integrating at least one communication processing module. The wireless communication module 160 receives electromagnetic waves via the antenna 2, modulates the frequency of the electromagnetic wave signal and performs filtering, and sends the processed signal to the processor 110. The wireless communication module 160 can also receive the signal to be sent from the processor 110, modulate the frequency of it, amplify it, and convert it into electromagnetic waves for radiation through the antenna 2.

[0053] In some embodiments, the antenna 1 of the electronic device 100 is coupled to the mobile communication module 150, and the antenna 2 is coupled to the wireless communication module 160, so that the electronic device 100 can communicate with the network and other devices through wireless communication technology. The wireless communication technology may include global system for mobile communications (GSM), general packet radio service (GPRS), code division multiple access (CDMA), wideband code division multiple access (WCDMA), time-division code division multiple access (TD-SCDMA), long term evolution (LTE), BT, GNSS, WLAN, NFC, FM, and / or IR technology. The GNSS may include a global positioning system (GPS), a global navigation satellite system (GLONASS), a Beidou navigation satellite system (BDS), a quasi-zenith satellite system (QZSS) and / or a satellite based augmentation system (SBAS).

[0054] The electronic device 100 implements the display function through a GPU, a display screen 194, and an application processor. The GPU is a microprocessor for image processing, which connects the display screen 194 and the application processor. The GPU is used to perform mathematical and geometric calculations for graphics rendering. The processor 110 may include one or more GPUs that execute program instructions to generate or change display information.

[0055] The display screen 194 is used to display images, videos, etc. The display screen 194 includes a display panel. The display panel can be a liquid crystal display (LCD), an organic light-emitting diode (OLED), an active-matrix organic light-emitting diode or an active-matrix organic light-emitting diode (AMOLED), a flexible light-emitting diode (FLED), Miniled, MicroLed, Micro-oLed, a quantum dot light-emitting diode (QLED), etc. In some embodiments, the electronic device 100 may include 1 or N display screens 194, where N is a positive integer greater than 1.

[0056] The electronic device 100 can realize the shooting function through ISP, camera 193, video codec, GPU, display screen 194 and application processor.

[0057] ISP is used to process the data fed back by camera 193. For example, when taking a photo, the shutter is opened, and the light is transmitted to the camera photosensitive element through the lens. The light signal is converted into an electrical signal, and the camera photosensitive element transmits the electrical signal to ISP for processing and converts it into an image visible to the naked eye. ISP can also perform algorithm optimization on the noise, brightness, and skin color of the image. ISP can also optimize the exposure, color temperature and other parameters of the shooting scene. In some embodiments, ISP can be set in camera 193.

[0058] The camera 193 is used to capture still images or videos. The object generates an optical image through the lens and projects it onto the photosensitive element. The photosensitive element can be a charge coupled device (CCD) or a complementary metal-oxide-semiconductor (CMOS) phototransistor. The photosensitive element converts the optical signal into an electrical signal, and then passes the electrical signal to the ISP to be converted into a digital image signal. The ISP outputs the digital image signal to the DSP for processing. The DSP converts the digital image signal into an image signal in a standard RGB, YUV or other format. In some embodiments, the electronic device 100 may include 1 or N cameras 193, where N is a positive integer greater than 1.

[0059] The digital signal processor is used to process digital signals, and can process not only digital image signals but also other digital signals. For example, when the electronic device 100 is selecting a frequency point, the digital signal processor is used to perform Fourier transform on the frequency point energy.

[0060] Video codecs are used to compress or decompress digital videos. The electronic device 100 may support one or more video codecs. Thus, the electronic device 100 may play or record videos in a variety of coding formats, such as Moving Picture Experts Group (MPEG) 1, MPEG2, MPEG3, MPEG4, etc.

[0061] NPU is a neural network (NN) computing processor. By drawing on the structure of biological neural networks, such as the transmission mode between neurons in the human brain, it can quickly process input information and can also continuously self-learn. Through NPU, applications such as intelligent cognition of electronic device 100 can be realized, such as image recognition, face recognition, voice recognition, text understanding, etc.

[0062] The external memory interface 120 can be used to connect an external memory card, such as a Micro SD card, to expand the storage capacity of the electronic device 100. The external memory card communicates with the processor 110 through the external memory interface 120 to implement a data storage function, such as storing music, video and other files in the external memory card.

[0063] The internal memory 121 can be used to store computer executable program codes, which include instructions. The processor 110 executes various functional applications and data processing of the electronic device 100 by running the instructions stored in the internal memory 121. The internal memory 121 may include a program storage area and a data storage area. Among them, the program storage area may store an operating system, an application required for at least one function (such as a sound playback function, an image playback function, etc.), etc. The data storage area may store data created during the use of the electronic device 100 (such as audio data, a phone book, etc.), etc. In addition, the internal memory 121 may include a high-speed random access memory, and may also include a non-volatile memory, such as at least one disk storage device, a flash memory device, a universal flash storage (UFS), etc.

[0064] The electronic device 100 can implement audio functions such as music playing and recording through the audio module 170, the speaker 170A, the receiver 170B, the microphone 170C, the headphone jack 170D, and the application processor.

[0065] The audio module 170 is used to convert digital audio information into analog audio signal output, and is also used to convert analog audio input into digital audio signals. The audio module 170 can also be used to encode and decode audio signals. In some embodiments, the audio module 170 can be arranged in the processor 110, or some functional modules of the audio module 170 can be arranged in the processor 110.

[0066] The software system of the electronic device 100 may adopt a layered architecture, an event-driven architecture, a micro-core architecture, a micro-service architecture, or a cloud architecture. The embodiment of the present application takes the Android system of the layered architecture as an example to exemplify the software structure of the electronic device 100.

[0067] Figure 2 It is a software structure block diagram of the electronic device 100 according to an embodiment of the present application.

[0068] The layered architecture of the electronic device 100 divides the software into several layers, each with clear roles and division of labor. The layers communicate with each other through software interfaces. In some embodiments, the Android system is divided into four layers, from top to bottom, namely, the application layer, the application framework layer, the Android runtime (Android runtime) and the system library, and the kernel layer.

[0069] The application layer can include a series of application packages.

[0070] like Figure 2 As shown, the application package may include camera, gallery, calendar, call, map, navigation, WLAN, Bluetooth, music, video, short message and other applications.

[0071] The application framework layer provides an application programming interface (API) and a programming framework for the applications in the application layer. The application framework layer includes some predefined functions.

[0072] like Figure 2 As shown, the application framework layer may include a window manager, a content provider, a view system, a phone manager, a resource manager, a notification manager, and the like.

[0073] The window manager is used to manage window programs. The window manager can obtain the display screen size, determine whether there is a status bar, lock the screen, capture the screen, etc.

[0074] Content providers are used to store and retrieve data and make it accessible to applications. The data may include videos, images, audio, calls made and received, browsing history and bookmarks, phone books, etc.

[0075] The view system includes visual controls, such as controls for displaying text, controls for displaying images, etc. The view system can be used to build applications. A display interface can be composed of one or more views. For example, a display interface including a text notification icon can include a view for displaying text and a view for displaying images.

[0076] The phone manager is used to provide communication functions of the electronic device 100, such as management of call status (including connecting, hanging up, etc.).

[0077] The resource manager provides various resources for applications, such as localized strings, icons, images, layout files, video files, and so on.

[0078] The notification manager enables applications to display notification information in the status bar. It can be used to convey notification-type messages and can disappear automatically after a short stay without user interaction. For example, the notification manager is used to notify download completion, message reminders, etc. The notification manager can also be a notification that appears in the system top status bar in the form of a chart or scroll bar text, such as notifications of applications running in the background, or a notification that appears on the screen in the form of a dialog window. For example, a text message is displayed in the status bar, a prompt sound is emitted, an electronic device vibrates, an indicator light flashes, etc.

[0079] Android Runtime includes core libraries and virtual machines. Android runtime is responsible for scheduling and management of the Android system.

[0080] The core library consists of two parts: one part is the function that needs to be called by the Java language, and the other part is the Android core library.

[0081] The application layer and the application framework layer run in a virtual machine. The virtual machine executes the Java files of the application layer and the application framework layer as binary files. The virtual machine is used to perform functions such as object life cycle management, stack management, thread management, security and exception management, and garbage collection.

[0082] The system library may include multiple functional modules, such as surface manager, media library, 3D graphics processing library (such as OpenGL ES), 2D graphics engine (such as SGL), etc.

[0083] The surface manager is used to manage the display subsystem and provide the fusion of 2D and 3D layers for multiple applications.

[0084] The media library supports playback and recording of a variety of commonly used audio and video formats, as well as static image files, etc. The media library can support a variety of audio and video encoding formats, such as: MPEG4, H.264, MP3, AAC, AMR, JPG, PNG, etc.

[0085] The 3D graphics processing library is used to implement 3D graphics drawing, image rendering, compositing, and layer processing.

[0086] A 2D graphics engine is a drawing engine for 2D drawings.

[0087] The kernel layer is the layer between hardware and software. The kernel layer contains at least display driver, camera driver, audio driver, sensor driver, kernel node and pre-reading module, etc.

[0088] Understandably, Figure 2 The layers in the software structure shown and the components included in each layer do not constitute a specific limitation on the electronic device 100. In other embodiments of the present application, the electronic device 100 may include more or fewer layers than shown, and each layer may include more or fewer components, which is not limited in the present application.

[0089] The embodiment of the present application does not particularly limit the specific structure of the execution subject of a method for pre-reading data, as long as the code recording the method for pre-reading data of the embodiment of the present application can be run to communicate according to the method for pre-reading data provided by the embodiment of the present application. For example, the execution subject of the method for pre-reading data provided by the embodiment of the present application can be a functional module in an electronic device that can call and execute a program, or a communication device applied to an electronic device, such as a chip.

[0090] Before introducing the technical solutions in the embodiments of the present application, a brief introduction to the background technologies that may be involved in the present application is first given:

[0091] In paged memory management, the operating system can allocate virtual memory to a process. For example, in a 32-bit operating system, the maximum space of virtual memory allocated to each process is 4GB. Virtual memory can be divided into pages of fixed size, each page is a page. For example, virtual memory can be divided into pages of 4KB (or 8KB, 16KB, etc.). At the same time, the kernel can also divide the physical memory of the electronic device into pages of the same size, and the pages in the physical memory can be recorded as physical pages.

[0092] In this way, whether it is virtual memory or physical memory, the page is the smallest allocation unit.

[0093] The data corresponding to the user program (for example, the code segment, data segment, and stack segment, etc.) is stored in the physical memory. The user program cannot directly access or view the physical memory. However, the user program can directly access or view the virtual memory. Therefore, it is necessary to establish a mapping relationship between the virtual memory and the physical memory, that is, the mapping relationship from the virtual memory to the physical memory.

[0094] As mentioned earlier, the smallest allocation unit in virtual memory and physical memory is a page. Each page in virtual memory has a virtual address, and each page in physical memory has a physical address. Therefore, the mapping relationship between virtual memory and physical memory can be represented by recording the mapping relationship between the virtual address of virtual memory and the physical address of physical memory.

[0095] Reference Figure 3 , a flow diagram from virtual address to physical address provided by an embodiment of the present application. When the central processing unit (CPU) needs to access data or obtain instructions, it sends the virtual address corresponding to the data or instruction to the memory management unit (MMU), and the memory management unit is responsible for finding the physical address corresponding to the virtual address according to the above mapping relationship. The memory management unit sends the found physical address to the physical memory, and the physical memory reads or writes the relevant data or instructions after performing corresponding access according to the physical address.

[0096] The memory management unit saves a page table for each user program. The page table stores the mapping relationship between virtual pages (the virtual pages correspond to virtual addresses) and physical pages (the physical pages correspond to physical addresses). When a physical page is assigned to a virtual page, a record is added to the page table to save the mapping relationship between the virtual page and the physical page. Subsequently, the received virtual address can be converted into a physical address based on the mapping relationship between the virtual page and the physical page saved in the page table.

[0097] Of course, after receiving a virtual address, the memory management unit first needs to determine whether the virtual address is valid, whether it is in physical memory, and whether it is protected. If the virtual address is valid, and there is a corresponding physical address in physical memory, and it is not protected (that is, accessible), the virtual address can be used as an index to find the physical address corresponding to the virtual address in the page table.

[0098] However, there may also be the following situation that triggers a page fault exception: the virtual address is valid, but the physical address corresponding to the virtual address does not exist in the physical memory.

[0099] This may be due to the lazy allocation mechanism, that is, when a user program is started, virtual memory will be allocated for the user program, but physical memory will not be allocated at this time, so there is naturally no mapping relationship between virtual memory and physical memory. When the user program needs to access certain data during operation, it will search for the physical address corresponding to the virtual address in the physical memory according to the virtual address corresponding to the data. However, since the physical memory has not been allocated yet, the physical address corresponding to the virtual address cannot be found in the physical memory, which will trigger a page fault (PF). This page fault exception often occurs during the cold start process of the application.

[0100] This situation may also be caused by the access data being swapped out of the physical memory. For example, after the user program switches to the background, due to limited physical memory resources, the operating system will start memory page replacement and put the physical pages that have not been used for a long time (for example, anonymous pages) into the swap partition to give the freed physical memory resources to other user programs. If the data accessed by the user program is located in the swap partition, the physical address corresponding to the virtual address will not be found in the physical memory, which will trigger a page fault exception. The operating system may also recycle physical pages that have not been used for a long time (for example, file pages) to give the freed physical memory resources to other user programs. If the data accessed by the user program has been recycled from the physical memory to the disk, the physical address corresponding to the virtual address will not be found in the physical memory, which will trigger a page fault exception. This page fault exception occurs more frequently during the hot start of an application.

[0101] Regardless of the type of page fault exception, it may be necessary to read data from the disk or swap partition (for example, read file page data from the disk, read anonymous page data from the swap partition) to the physical memory, establish a mapping relationship between the virtual address of the read memory page data (including file page data and anonymous page data) and the current physical address of the read data, fill in the PTE, and the user program can continue to run. This situation seriously blocks the operation of the user program.

[0102] Of course, in actual applications, there may be other abnormal situations. The embodiment of the present application does not focus on the causes of page fault exceptions, so they will not be listed one by one.

[0103] After a page fault exception occurs, the operating system will put the user program into the blocking queue until the page fault exception problem is resolved, and then the user program will be put into the ready queue and continue to run. Therefore, after a page fault exception occurs, the operation of the user program will be blocked.

[0104] During the application startup process, the above-mentioned page fault exception may occur more frequently, resulting in a slower application startup process and a poor user experience.

[0105] The application startup methods include cold startup and hot startup. When the application is started, if the process of the application does not exist in the system, the system needs to create a process for the application, indicating that the application is started cold this time.

[0106] As an example of application cold start, after the electronic device is turned on, the user clicks the application icon on the system desktop to start the application. This startup process of the application is a cold start.

[0107] As another example of application cold start, after the user starts the application, the user switches the application to background operation, and the system kills the application process due to resource recovery. When the user starts the application again, the current startup process of the application is a cold start.

[0108] Reference Figure 4 , is a schematic diagram of a page fault exception during an application cold start process provided by an embodiment of the present application. In this diagram, the horizontal axis represents the various stages during an application cold start process, among which several stages are highlighted:

[0109] ApplicationStart, BindApplication, ActivityStart, Choreographer and DoFrame. For details of these stages, please refer to the description of the subsequent embodiments. Black vertical lines indicate that a page fault exception has occurred. The thicker the black vertical lines, the more page fault exceptions have occurred in a short period of time. Figure 4 It can be understood that during the cold start process of the application, more page fault exceptions occurred in the BindApplication phase, and a small number of page fault exceptions also occurred in the ActivityStart phase. These page fault exceptions will cause the cold start process of the application to be slower.

[0110] In order to solve the problem of application startup or transition delay under page fault exception, a pre-reading method is currently generally used to improve the data loading speed under page fault exception. Pre-reading can also be called preloading, which can be understood as starting a pre-reading thread in scenarios such as application startup or transition, and reading the file data used by the main thread through the pre-reading thread. The prior art provides a pre-reading method, in which, after the application startup is completed, the information of the missing page during the application startup process can be recorded through a page table entry (Page Table Entry, PTE) snapshot to generate a PTE snapshot, and the PTE snapshot is stored in the disk (it can also be stored in the physical memory during hot start). When the application is subsequently started, the memory page data corresponding to the recorded missing page information can be pre-loaded in the physical memory based on the PTE snapshot stored in the disk (or physical memory). However, in the above-mentioned pre-reading method through the PTE snapshot, during the pre-reading process, the pre-reading thread still needs to perform a large number of IO (input and output, input / output) operations, and the speed of data preloading is limited in the case of page fault exception.

[0111] The present application provides a pre-reading method, which clusters and merges files and their access addresses based on the access status of files (or data), which can effectively reduce the number of IO accesses, thereby improving the data reading efficiency in the case of page fault exceptions, shortening the processing time of page fault exceptions, and improving user experience.

[0112] Figure 5 For an exemplary flowchart of the pre-reading method, please refer to Figure 5 , including but not limited to the following steps:

[0113] S501, the monitoring module sends an application startup notification to the kernel node.

[0114] Exemplary, take the video application startup as an example. After the video application is started in response to the received user operation, the monitoring module detects that the video application is started, and the monitoring module sends an application startup notification to the kernel node (also referred to as the kernel module, etc., which is not limited in this application). The application startup notification includes but is not limited to: the application identification information (such as the application name, etc.) of the video application and the application startup event information, and the application startup event information is used to indicate that the video reference is started. In the embodiment of the present application, the application operation process includes multiple events, and the application startup start event and the application startup end event are involved in the embodiment of the present application, wherein the application startup start event is used to indicate that the application starts to start, and the application startup end event is used to indicate that the application startup process ends. It can also be understood that the application startup is a whole event, including the start of the event and the end of the event, and the monitoring module can obtain the application startup start event and the application startup end event through the upper module. For example, the mobile phone starts the video application in response to the received user operation, and starts from this node, that is, the application startup starts. The video application calls a series of data during the startup process and performs operations such as rendering. The video application startup is completed (i.e., the time node corresponding to the application startup end event), that is, the application interface of the video application is displayed.

[0115] S502, obtaining pre-reading calculation parameters.

[0116] In the embodiment of the present application, the kernel node can start multiple threads such as the main thread and the Render thread (rendering thread). The main thread can also be called the main interface thread, which is used to display the main interface of the application. The Render thread is used to perform operations such as rendering to draw the main interface.

[0117] For example, if a page fault exception occurs, the main thread is interrupted and the kernel completes the page fault exception processing. The same is true for the Render thread. It can be understood that if the data required by the main thread or the Render thread fails to hit the physical memory, the thread will be interrupted and the corresponding data will be obtained from the disk or other storage. The description of the page fault exception can be referred to above and will not be repeated here.

[0118] In the embodiment of the present application, the main thread and the Render thread correspond to multiple files respectively. Taking the main thread as an example, Figure 6 For an exemplary data structure diagram, please refer to Figure 6, the main thread corresponds to multiple access files (that is, the files that the main thread needs to access when starting (also called file data)), for example, including but not limited to file 1, file 2...file n. The kernel node records the file access information of each file corresponding to the main thread. The file access information is not limited to: file identification information (such as file name, file ID, etc.), file size, access address, etc. Optionally, the access address corresponding to each file may include multiple consecutive addresses. The addresses involved in the embodiments of the present application can be understood as virtual addresses (refer to the above for the concept) or logical addresses, which will not be repeated below. Figure 6 As shown, the file access information of file 1 includes but is not limited to address 1, address 2...address n. It should be noted that the addresses involved in the embodiments of the present application are only illustrative examples and are not limited in the present application. It can be understood that during the operation of the main thread, the data corresponding to the file stored in the logical space indicated by the access address corresponding to each file information needs to be obtained.

[0119] For example: still taking the main thread as an example, the files accessed by the main thread include files 1 to 200, wherein the file access information of file 1 includes but is not limited to: the identification information of file 1 is: / apex / com.android.runtime / bin / linkder64, the file size is 200M, and the access address includes but is not limited to: 0-13, 21, 23, 70-75, 208-210, 217, 510, 512-528, 1020, 1526-1590, 2006-2014, 2069-2090 (all in KB). It should be noted that the above address identification method is only an illustrative example. In other examples, it can also be represented by the starting address + offset, which is not limited in this application.

[0120] The Render thread is the same as the main thread, and also corresponds to multiple files and file access information, which will not be repeated here.

[0121] For example, Figure 7 For an exemplary flowchart of the steps executed by the kernel node, please refer to Figure 7 , including but not limited to:

[0122] S701, checking whether the application information has been recorded in the List.

[0123] Exemplarily, the kernel node stores a list, and the list records application information. The application information includes but is not limited to application identification. The application recorded in the list indicates that memory has been allocated for it.

[0124] The kernel node queries whether the List includes the application identifier based on the application identifier information in the received application startup notification.

[0125] Exemplarily, if the list does not include the application identifier, then execute s702. If the list includes the application identifier, then execute s703.

[0126] S702, apply for memory and add List members.

[0127] Exemplarily, the kernel node applies for memory for the application and adds the application identifier to the List.

[0128] S703, recording file access information of the main thread and the Render thread.

[0129] For example, the kernel node records the file access information of each file corresponding to the main thread and / or the Render file. It can also be understood as the file access information of the main thread and / or the file access information of the Render file.

[0130] Exemplarily, the kernel node obtains a memory state, and based on the memory state, obtains a pre-read calculation parameter. Figure 8 For an exemplary diagram of the pre-reading calculation parameter acquisition process, please refer to Figure 8 , including but not limited to the following steps:

[0131] S801, obtaining memory information.

[0132] Exemplarily, the kernel node obtains memory information, including but not limited to the size of the remaining available memory space.

[0133] S802, calculating the address step threshold.

[0134] Exemplarily, the kernel node calculates the address step threshold based on the memory information. Exemplarily, the address step can also be called the continuous address step, which is used to indicate the length (i.e., the difference) between the address location of the next access and the end address of the previous access. The address step threshold is used to indicate the maximum value of the address step, and the address step threshold will be used as the address aggregation condition in the following example, and the specific implementation will be described below.

[0135] For example, the address step threshold Step (in KB) is calculated as follows:

[0136] In one example, if Mem_available (ie, available memory space)>4GB, then Step=2048KB.

[0137] In another example, if Mem_available≤4GB and Mem_available>2GB, set A (ie, the step calculation coefficient)=log2(((4096-available) / 4096)*100), then Step=128*(2*A+2).

[0138] In another example, if Mem_available<2GB, Step=128.

[0139] It should be noted that the above numerical values ​​are only illustrative examples and can be set according to actual needs, and this application does not limit them.

[0140] It can be understood that in the embodiment of the present application, the address step threshold and the access address reserved number N value are both associated with the remaining memory space. When the remaining memory space is sufficient, the N value and the step threshold are increased accordingly, and more access addresses can be saved, so that the coverage rate of the N access addresses corresponding to each file in the acquired pre-read collection data is higher and the hit rate is more accurate. Further, the hit rate of the data acquired based on the pre-read collection data is higher at the next startup, thereby improving the pre-reading efficiency.

[0141] S803, calculating the value of the reserved number N of access addresses.

[0142] Exemplarily, the kernel node calculates the reserved number N of access addresses based on the memory information. Exemplarily, Figure 6 As described in , each file corresponds to a plurality of continuous addresses. In the embodiment of the present application, by setting the N value, N continuous addresses are reserved for each file. For example, file 1 corresponds to 20 access addresses. If N is 3, then in the embodiment of the present application, N (for example, 3) continuous addresses are reserved for each file by the access address aggregation method described below.

[0143] In the embodiment of the present application, the calculation method of the reserved number N of access addresses is as follows:

[0144] In one example, if Mem_available>4GB, then N=5. In another example, if Mem_available≤4GB and Mem_available>2GB, then N=4. In yet another example, if Mem_available<2GB, then N=3.

[0145] It should be noted that the above numerical values ​​are only illustrative examples and can be set according to actual needs, and this application does not limit them.

[0146] S503: Send a pre-reading collection instruction.

[0147] Exemplarily, the kernel node sends a pre-reading collection indication to the pre-reading module, and the indication information includes but is not limited to: file access information of the main thread (i.e., file access information of each file corresponding to the main thread, which will not be repeated below), file access information of the Render thread, pre-reading calculation parameters (including address step threshold Step and access address reservation number N value), etc. The pre-reading collection indication is used to instruct the pre-reading module to obtain the pre-reading collection information.

[0148] S504, based on the pre-reading calculation parameters, obtaining pre-reading collection information

[0149] Exemplarily, the pre-reading module starts a pre-reading collection thread to obtain the pre-reading collection information.

[0150] Fig. 9 For an exemplary diagram of the pre-reading information acquisition process, please refer to Fig. 9 , including but not limited to the following steps:

[0151] S901, traverse the files and determine whether the number of files is greater than the file quantity threshold.

[0152] Exemplarily, after receiving the pre-reading acquisition instruction, the pre-reading acquisition thread is started, and the TOPN continuous addresses corresponding to each file of the main thread and the TOPN continuous addresses corresponding to each file of the Render thread are obtained through the pre-reading acquisition thread. Among them, TOPN is the reserved number of access addresses mentioned above. That is to say, in the embodiment of the present application, the pre-reading acquisition information obtained by the pre-reading module reserves a specified number (i.e., N value, for example, 3) of access addresses for each file of the main thread and the Render thread to reduce the number of accesses. The following is an example of the processing of the main thread by the pre-reading module. The processing flow of the Render thread is the same, and this application will not repeat the example.

[0153] Exemplarily, after the pre-reading module obtains the access file information and N value and step threshold corresponding to each file of the main thread, it initializes the above parameters, that is, substitutes each parameter into the existing computer program for execution.

[0154] Exemplarily, the pre-reading module traverses each file of the main thread, that is, the pre-reading module will execute each file sequentially. Fig. 9 The steps in are repeated until the traversal is completed.

[0155] Exemplarily, the pre-read module is provided with a file quantity threshold, which is used to indicate the maximum number of files processed by the pre-read acquisition thread for each thread. In the embodiment of the present application, the file quantity threshold is set to 100, and can also be set to other values ​​in other embodiments, which can be set according to actual needs and is not limited.

[0156] In one example, if the pre-reading module determines that the number of files currently traversed (which can also be understood as the number of files processed) is greater than the file number threshold, the current file is not processed. It can also be understood that the pre-reading collection information does not include the information corresponding to the file.

[0157] In another example, if the number of files currently traversed by the pre-reading module is less than or equal to the file quantity threshold, S902 is executed.

[0158] For example, take the case where the main thread corresponds to 200 files. When the pre-reading acquisition thread traverses each of the first 100 files, it determines that the number of files currently processed is less than or equal to the file number threshold (i.e. 100), that is, each file is processed after S902. When traversing to the 101st file, the pre-reading module does not process the file if the number of files currently processed is greater than the file number threshold, and the process ends.

[0159] S902, check whether the address to be accessed this time is within the address step threshold range corresponding to the TOPN consecutive addresses.

[0160] Exemplarily, the pre-reading module (specifically, it may be a pre-reading acquisition thread, which will not be described again below) traverses each access address corresponding to the currently traversed file until the access address traversal is completed, and then re-executes S901 to traverse the next file.

[0161] Exemplarily, the pre-reading module determines whether the currently traversed access address is within the address step threshold range corresponding to the TOPN continuous addresses. Exemplarily, as described above, after the pre-reading module obtains the N value and initializes, it is determined to reserve N continuous addresses (i.e., access addresses) for each file, which are referred to as TOPN continuous addresses in the embodiment of the present application. And, as described above, the pre-reading module obtains the step threshold Step. The pre-reading module compares the currently traversed access address with the step range of the reserved TOPN addresses. In one example, if the current access address is within the step range of any one of the TOPN continuous addresses, S903 is executed. In another example, if it is not within the step range of any one of the continuous addresses, S903 is executed.

[0162] Exemplarily, the step range of the continuous address is the continuous address starting address to the continuous address ending address plus the step threshold. For example, assuming that the continuous address is 0 to 31 and the step threshold is 128, the step range of the continuous address is: 0 to (31+128), that is, 0 to 159.

[0163] Optionally, the pre-reading module may also first determine whether the currently traversed access address is within the Top n continuous address range, and if so, execute S905. If not, it may further determine whether the step length between the current access address and the TOPN continuous addresses (i.e., the difference between the starting address of the current access address and the ending address of each address in the TOPN continuous addresses) is less than the step length threshold. If less than or equal to, execute S905, and if greater than, execute S903.

[0164] The following takes the file 1 of the main thread as an example for explanation. The pre-reading module traverses to the file 1. As mentioned above, the pre-reading module has obtained the file access information corresponding to the file 1. The file name is: / apex / com.android.runtime / bin / linkder64, the file size is 200M, and the access address includes but is not limited to: 0-13, 21, 23, 70-75, 208-210, 217, 510, 512-528, 1020, 1526-1590, 2006-2014, 2016-2059, 2069-2090 (all in KB). The above content is only an illustrative example and is not limited to this application.

[0165] Since the pre-reading module can now create a TOPN address chain list and a temporary address chain list, of course, this is only an illustrative example, and the pre-reading module can also create a new address chain list when it needs to be created, and this application does not limit it. Table 1 is an exemplary address chain list:

[0166] Table 1

[0167]

[0168] Exemplarily, the pre-reading module traverses to access addresses 0 to 13 (in KB, which will not be repeated below). The pre-reading module detects the currently reserved TOPN. Since TOPN are all empty, it is determined that the current access address is not within the step range of the TOPN continuous address, and S904 is executed. It should be noted that Table 1 is only an illustrative example. In the embodiment of the present application, the pre-reading module may not create an address linked list before the address linked list is used, that is, Table 1 may be an empty list.

[0169] S903, whether the number of existing TOPN continuous address linked lists is greater than or equal to the N value.

[0170] Exemplarily, the pre-reading module further determines whether the number of currently occupied TOP continuous address linked lists is greater than or equal to the N value.

[0171] In one example, if it is greater than or equal to the value N, S906 is executed. In another example, if it is less than the value N, S904 is executed.

[0172] For example, still taking the above example as an example, as described above, Table 1 is an empty list, and the pre-reading module detects that the number of TOP continuous address linked lists currently used is 0, then S904 is executed, that is, the address linked list is increased.

[0173] S904, add an access address linked list.

[0174] Exemplarily, the pre-reading module creates an access address list, fills the current access address into a new address linked list, and increases the number of accesses corresponding to the address linked list by 1.

[0175] Still using the above example, the pre-reading module adds the TOP1 address list, fills 0 to 13 into the TOP1 address list, and increases the number of accesses by 1. The updated list is shown in Table 2:

[0176] Table 2

[0177]

[0178] S905, based on the current access address, expand the continuous address range.

[0179] Exemplarily, the pre-reading module uses the end address of the current access address to amplify the access address last filled into TOPN (ie, the access address last traversed), and increases the corresponding access count by 1.

[0180] For example, the pre-reading module continues to traverse the next access address, which is 21KB. The pre-reading module executes S902, determines that the current access address (i.e., 21) is within the step range of 0 to (13+128) of the previous access address, and executes S905. It should be noted that, usually, the access address is incremental. Optionally, when executing S902, the pre-reading module can compare the currently traversed access address with the step range of the previous access address without comparing other continuous addresses in the address linked list. Of course, in some examples, if the access address is non-increasing, it can be compared with each address in the address linked list.

[0181] Exemplarily, the pre-reading module will expand the last access address filled in the address chain based on the current access address (i.e., 21), that is, update the end address of the last access address to the end address of the current access address (e.g., 21), and increase the number of accesses by 1. After the update, the following is shown:

[0182] Table 3

[0183]

[0184] The pre-reading module continues to traverse the next access address, which is 23, and executes S902. The pre-reading module determines that the current traversal access address (23) is within the access address step range (0 to (21+128)) filled in last time, and the step proceeds to S905.

[0185] Exemplarily, the pre-reading module will expand the last access address filled in the address chain based on the current access address (i.e., 23), that is, update the end address of the last access address to the end address of the current access address (e.g., 23), and increase the number of accesses by 1. After the update, the following is shown:

[0186] Table 4

[0187]

[0188] Exemplarily, the pre-reading module continues to traverse the access address of file 1, and updates the address chain list in the above manner. When the access address is 510-528, the address chain list is updated as follows:

[0189] Table 5

[0190]

[0191] Exemplarily, the pre-reading module traverses to the access address 1020, executes S902, determines that the access address 1020 is not within the step range 510 to (528+128) of the access address filled in last time, and executes S903. Based on Table 5, the pre-reading module can determine that the current number of TOPN continuous address chains (i.e., 3) is greater than or equal to the N value (i.e., 3), and executes S906.

[0192] S906: Whether the current access address is within the address step threshold range corresponding to the continuous addresses in the temporary address access linked list.

[0193] Exemplarily, the pre-reading module determines whether the current access address is within an address step threshold range corresponding to the continuous addresses in the temporary address access linked list.

[0194] In an example, if the pre-reading module determines that the current access address is within the address step threshold range corresponding to the continuous addresses in the temporary address access linked list, S907 is executed.

[0195] In another example, if the address accessed by the pre-reading module this time is not within the address step threshold range corresponding to the continuous addresses in the temporary address access linked list, S908 is executed.

[0196] Continuing with the above scenario, in this example, since the temporary address linked list is not currently reserved, the pre-reading module can determine that the current access address is not within the continuous address step range of the temporary address linked list, and the pre-reading module creates a temporary address linked list and executes S907. The pre-reading module creates a temporary address linked list, as shown in Table 6:

[0197] Table 6

[0198]

[0199] S907, based on the current access address, update the temporary address access linked list.

[0200] Exemplarily, if the pre-reading module determines that the currently traversed access address is not within the continuous address step range of the temporary address linked list, the current access address will overwrite the continuous address in the original temporary address linked list.

[0201] For example, when the pre-reading module traverses to 1020, the current access address overwrites the data in the temporary address list (the current data is empty or 0), and the access count is set to 1 (that is, the access count remains 1 after each replacement). The updated address list is as follows:

[0202] Table 7

[0203]

[0204] The pre-reading module traverses to access addresses 1526-1590, and the steps go through S902-S903-S906. The pre-reading module determines that the currently traversed access address (1526-1590) is not within the continuous address step range (1020+128) of the temporary address linked list, and the step proceeds to S907. Based on the currently traversed access address (1526-1590), the pre-reading module overwrites the data in the temporary address linked list with the current access address (the current data is 1020), and the access count is still set to 1 (that is, the access count is still 1 after each replacement). The updated address linked list is as follows:

[0205] Table 8

[0206]

[0207] The pre-reading module continues to traverse the access address. When it traverses to the access address 2016-2059, the current list is as follows:

[0208] Table 9

[0209]

[0210] The pre-reading module detects that the current access address 2016-2059 is within the continuous address step range (2006-(2014+128)) of the temporary address linked list, and the step proceeds to S908.

[0211] S908, based on the current access address, expand the continuous address range.

[0212] Exemplarily, the pre-reading module may expand the continuous address range in the temporary address linked list based on the current access address, and the access count is increased by 1. The expansion method may refer to S905 and will not be described in detail here.

[0213] For example, still taking the above scenario, the pre-reading module expands the continuous address range of the temporary address list based on the current access address 2016-2059. The expanded address range is 2006-2059, and the access count is increased by 1. The updated list is as follows:

[0214] Table 10

[0215]

[0216] S909, traverse TOPN, replace the continuous address data whose access times are less than the temporary address linked list

[0217] Exemplarily, after the pre-reading module updates the temporary address list and its corresponding access count, it traverses the access counts corresponding to the continuous addresses in TOPN. In one example, if it exists, the continuous addresses in the temporary address list replace the continuous addresses in the TOPN address list. In another example, if it does not exist, it continues to traverse the next access address.

[0218] For example, still in the above scenario, after the pre-reading module updates Table 10, based on the current access count of the temporary address linked list (i.e., the number is 2), it detects whether there is a linked list in TOPN with an access count less than the access count of the temporary address linked list. The current access counts of TOPN are: 4, 2, 2, which are all greater than or equal to the access count corresponding to the temporary address linked list. No processing is performed, and the next access address is traversed. The pre-reading module traverses to access addresses 2069 to 2090, and the steps are S902-S903-S906-S908. The pre-reading module expands the continuous address range, and the number of accesses to the temporary address linked list is increased by 1. The updated list is as follows:

[0219] Table 11

[0220]

[0221] The pre-reading module traverses the access count in the TOPN address list based on the access count of the temporary address list (i.e. 3), and detects that the access counts of TOP2 and TOP3 are both less than the access count of the temporary address list. The pre-reading module can choose any one to replace. For example, the pre-reading module replaces the continuous addresses in the TOP2 address list with the continuous addresses in the temporary address list. The updated list is as follows:

[0222] Table 12

[0223]

[0224] The pre-reading module continues to traverse the access address until the access address traversal is completed, and then repeats S901 to continue traversing the next file of the main thread.

[0225] The pre-read module executes 100 files of the main thread Fig. 9 After that, the TOP3 consecutive addresses corresponding to each of the 100 files of the main thread are obtained. For example, the TOP3 consecutive addresses corresponding to / apex / com.android.runtime / bin / linkder64 include: 0-75, 2006-2090, 510-528.

[0226] Exemplarily, the monitoring module may obtain an application startup end event from the upper layer module to determine that the application startup event ends. The monitoring module sends an application startup end notification to the pre-reading module to indicate that the application startup ends. The pre-reading module determines that the application startup event ends in response to the application startup end notification. Fig.10 For an exemplary diagram of the pre-reading information acquisition process, please refer to Fig.10 , including but not limited to the following steps:

[0227] S1001, the pre-reading module obtains M files based on the number of file accesses.

[0228] Exemplarily, the pre-reading module can determine the number of accesses of each file of the main thread (the same as the Render thread) based on this access, which can also be called the number of IO reads and writes, which can be understood as the number of consecutive addresses corresponding to the file. The pre-reading module sorts the 100 files based on the number of accesses and obtains the first M files. In one example, M can be equal to N. In another example, M can be any value set according to actual needs, such as 5. In another example, the M value can also be set according to the state of the remaining available space in the memory, which is not limited in this application.

[0229] S1002: The pre-reading module merges the current pre-reading collection information with the previous pre-reading collection information.

[0230] Exemplarily, the pre-reading module saves the pre-reading acquisition information obtained this time, including but not limited to the pre-reading acquisition information of the main thread and the pre-reading acquisition information of the Render thread. The pre-reading acquisition information of the main thread includes but is not limited to: the identification information of the file of the main thread, and the TOPN continuous addresses corresponding to each file of the M files of the main thread.

[0231] Exemplarily, the pre-reading module merges the pre-reading collection information of the application startup event corresponding to the video application obtained this time with the pre-reading collection information of the application startup event corresponding to the video application obtained last time. The merging method can be to merge the continuous addresses of each file. The merging method can be set according to actual needs, and this application does not limit it. For example, in an embodiment of the present application, assuming that the TOP3 continuous addresses corresponding to / apex / com.android.runtime / bin / linkder64 obtained last time include: 3~88, 2006~2090, 510~528, the pre-reading module can expand the addresses where the continuous addresses partially overlap, for example, merging 3~88 and 0~75, and the merging result is 0~88.

[0232] That is, in the embodiment of the present application, the pre-reading module stores two pre-reading collection information, one of which is the pre-reading collection information obtained this time, and the other is the merged pre-reading collection information. To distinguish the above information, the merged pre-reading collection information is called merged pre-reading collection information.

[0233] Optionally, the pre-reading module may clear the pre-reading collection information saved last time and the combined pre-reading collection information saved last time to reduce memory usage.

[0234] S505, the monitoring module sends an application startup notification to the kernel node.

[0235] Exemplarily, in a scenario where the application is started again, the monitoring module sends an application start notification to the kernel node.

[0236] S506: The kernel node sends a pre-reading instruction to the pre-reading module.

[0237] Exemplarily, the kernel node sends a pre-reading instruction to the pre-reading module, where the pre-reading instruction includes identification information of the main thread and the Render thread and corresponding file access information, and is used to instruct the pre-reading module to pre-read the current access data of the main thread and / or the Render thread.

[0238] S507: The pre-reading module obtains data based on the pre-reading collection information.

[0239] Exemplarily, the pre-reading module starts a pre-reading thread, and the pre-reading thread can obtain the merged pre-reading acquisition information corresponding to the main thread and / or the Render thread. For example, after obtaining the merged pre-reading acquisition information corresponding to the main thread and / or the Render thread, the pre-reading acquisition thread can save the merged pre-reading acquisition information corresponding to the main thread and / or the Render thread to a designated storage space, and the pre-reading thread can obtain the merged pre-reading acquisition information corresponding to the main thread and / or the Render thread from the designated storage space based on the identification information of the main thread and / or the Render thread.

[0240] The pre-read thread can pre-read the data required for the main thread to run based on the TOPN continuous addresses stored in the merged pre-read acquisition information corresponding to the main thread (the same as the Render thread). Thereby reducing the number of IO accesses and reducing the storage burden while increasing the rate of data pre-reading. It can be understood that, compared with the existing technology, taking the same file as an example, in the process of reading the file by the pre-read thread of the existing technology, the program executed by the main thread may need the data, and the reading rate of the pre-read thread will affect the execution efficiency of the main thread. If the pre-read thread has not yet prepared the data required by the main thread, the main thread will be interrupted. The present application aggregates the access addresses, which can effectively shorten the pre-reading time while reducing the number of accesses, so that the data required by the main thread can be read in advance as much as possible to avoid the main thread from stalling.

[0241] That is to say, in the embodiment of the present application, the pre-reading process for a visit is actually divided into a pre-reading acquisition information acquisition process and a pre-reading process, that is, the pre-reading module obtains the pre-reading acquisition information corresponding to this visit through the pre-reading acquisition thread, and when the application is started next time, it performs pre-reading based on the acquired pre-reading acquisition information. It should be understood that the above embodiment only illustrates the order of pre-reading acquisition information and pre-reading process. In fact, for a visit, the pre-reading module starts the pre-reading acquisition thread and the pre-reading thread to execute in parallel, that is, the pre-reading thread can pre-read this visit based on the pre-reading acquisition information acquired last time, and the pre-reading acquisition thread obtains the corresponding pre-reading acquisition information based on this visit for use at the next startup.

[0242] It should be noted that the application startup is used as an example in the embodiments of the present application. In other embodiments, the technical solutions in the embodiments of the present application can also be applied to scenarios such as application transitions, and the present application will no longer give examples one by one.

[0243] It is understandable that, in order to realize the above functions, the electronic device includes hardware and / or software modules corresponding to the execution of each function. In combination with the algorithm steps of each example described in the embodiments disclosed herein, the present application can be implemented in the form of hardware or a combination of hardware and computer software. Whether a function is executed in the form of hardware or computer software driving hardware depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application in combination with the embodiments, but such implementation should not be considered to be beyond the scope of the present application.

[0244] In one example, Fig.11 A schematic block diagram of a device 1100 according to an embodiment of the present application is shown. The device 1100 may include: a processor 1101 and a transceiver / transceiver pin 1102 , and optionally, a memory 1103 .

[0245] The various components of the device 1100 are coupled together via a bus 1104, wherein the bus 1104 includes a power bus, a control bus, and a status signal bus in addition to a data bus. However, for the sake of clarity, various buses are referred to as bus 1104 in the figure.

[0246] Optionally, the memory 1103 may be used for the instructions in the aforementioned method embodiment. The processor 1101 may be used to execute the instructions in the memory 1103, and control the receiving pin to receive a signal, and control the sending pin to send a signal.

[0247] The apparatus 1100 may be the electronic device or a chip of the electronic device in the above method embodiment.

[0248] Among them, all relevant contents of each step involved in the above method embodiment can be referred to the functional description of the corresponding functional module, and will not be repeated here.

[0249] This embodiment further provides a computer storage medium, in which computer instructions are stored. When the computer instructions are executed on an electronic device, the electronic device executes the above-mentioned related method steps to implement the method in the above-mentioned embodiment.

[0250] This embodiment also provides a computer program product. When the computer program product is run on a computer, the computer is enabled to execute the above-mentioned related steps to implement the method in the above-mentioned embodiment.

[0251] In addition, an embodiment of the present application also provides a device, which may specifically be a chip, component or module, and the device may include a connected processor and memory; wherein the memory is used to store computer-executable instructions, and when the device is running, the processor may execute the computer-executable instructions stored in the memory so that the chip executes the methods in the above-mentioned method embodiments.

[0252] Among them, the electronic device, computer storage medium, computer program product or chip provided in this embodiment is used to execute the corresponding method provided above. Therefore, the beneficial effects that can be achieved can refer to the beneficial effects in the corresponding method provided above and will not be repeated here.

[0253] As described above, the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A method for pre-reading data, characterized in that: Applied to electronic equipment, the method comprises: During the application startup process, obtaining file access information of the application, the file access information including multiple files that need to be accessed when the application is started and multiple access addresses corresponding to each file; Based on the current remaining memory space status, obtain pre-reading calculation parameters; Based on the pre-read calculation parameter and the file access information, obtaining pre-read collection information corresponding to the application; the pre-read collection information includes access address information of at least one file among the multiple files, the access address information includes N access addresses, N is an integer greater than 0, and the N value is less than the number of access addresses corresponding to the files in the file access information, and the N access addresses corresponding to each of the files cover multiple access addresses of the corresponding file; During the next startup of the application, data corresponding to the N access addresses corresponding to each file in the at least one file is read based on the pre-read collection information.

2. The method according to claim 1, characterized in that The pre-reading calculation parameters include the N value and the step size threshold.

3. The method according to claim 2, characterized in that The step of obtaining the pre-reading calculation parameters based on the current remaining memory space state includes: Calculate the N value based on the remaining space status of the memory; The step size threshold is calculated based on the remaining memory space status.

4. The method according to claim 2, characterized in that: The acquiring the pre-reading collection information corresponding to the application based on the pre-reading calculation parameter and the file access information includes: Based on the step threshold, multiple access addresses of each of the files are aggregated to obtain N access addresses corresponding to each of the files.

5. The method according to claim 4, characterized in that The step of aggregating the multiple access addresses of each of the files based on the step threshold to obtain N access addresses corresponding to each of the files includes: Address aggregation is performed on access addresses that meet the address range indicated by the step threshold among the multiple access addresses in each of the files.

6. The method according to claim 1, characterized in that The acquiring the pre-reading collection information corresponding to the application based on the pre-reading calculation parameter and the file access information includes: Based on the pre-read calculation parameter and the file access information, obtaining access address information of M files among the multiple files; M is an integer greater than 0; Sorting the M files based on the number of accesses corresponding to the M files; The access address information of the at least one file in the M file sortings is retained.

7. The method according to claim 1, characterized in that The step of reading data corresponding to N access addresses corresponding to each file in the at least one file based on the pre-read collection information includes: Based on the merged pre-reading acquisition information, data corresponding to N access addresses corresponding to each file in the at least one file is read, wherein the merged pre-reading acquisition information is obtained based on the pre-reading acquisition information and the most recently acquired pre-reading acquisition information corresponding to the application.

8. An electronic device, characterized in that: include: One or more processors, memory; and one or more computer programs, wherein the one or more computer programs are stored in the memory, and when the computer programs are executed by the one or more processors, the electronic device performs the following steps: During the application startup process, obtaining file access information of the application, the file access information including multiple files that need to be accessed when the application is started and multiple access addresses corresponding to each file; Based on the current remaining memory space status, obtain pre-reading calculation parameters; Based on the pre-read calculation parameter and the file access information, obtaining the pre-read collection information corresponding to the application; The pre-read collection information includes access address information of at least one file among the multiple files, the access address information includes N access addresses, N is an integer greater than 0, and the value of N is less than the number of access addresses corresponding to the files in the file access information, and the N access addresses corresponding to each file cover multiple access addresses of the corresponding file; During the next startup of the application, data corresponding to the N access addresses corresponding to each file in the at least one file is read based on the pre-read collection information.

9. The electronic device according to claim 8, characterized in that: The pre-reading calculation parameters include the N value and the step size threshold.

10. The electronic device according to claim 9, characterized in that: When the computer program is executed by the one or more processors, the electronic device performs the following steps: Calculate the N value based on the remaining space status of the memory; The step size threshold is calculated based on the remaining memory space status.

11. The electronic device according to claim 9, characterized in that: When the computer program is executed by the one or more processors, the electronic device performs the following steps: Based on the step threshold, multiple access addresses of each of the files are aggregated to obtain N access addresses corresponding to each of the files.

12. The electronic device according to claim 11, characterized in that: When the computer program is executed by the one or more processors, the electronic device performs the following steps: Address aggregation is performed on access addresses that meet the address range indicated by the step threshold among the multiple access addresses in each of the files.

13. The electronic device according to claim 8, characterized in that: When the computer program is executed by the one or more processors, the electronic device performs the following steps: Based on the pre-read calculation parameter and the file access information, obtaining access address information of M files among the multiple files; Sorting the M files based on the number of accesses corresponding to the M files; The access address information of the at least one file in the M file sortings is retained.

14. The electronic device according to claim 8, characterized in that: When the computer program is executed by the one or more processors, the electronic device performs the following steps: Based on the merged pre-reading acquisition information, data corresponding to N access addresses corresponding to each file in the at least one file is read, wherein the merged pre-reading acquisition information is obtained based on the pre-reading acquisition information and the most recently acquired pre-reading acquisition information corresponding to the application.

15. A computer storage medium, characterized in that The method comprises computer instructions, and when the computer instructions are executed on an electronic device, the electronic device executes the method according to any one of claims 1 to 8.

16. A computer program product, characterized in that When the computer program product is executed on a computer, the computer is enabled to execute the method according to any one of claims 1 to 8.

17. A chip, characterized in that: It comprises one or more interface circuits and one or more processors; the interface circuit is used to receive a signal from a memory of an electronic device and send the signal to the processor, the signal comprising a computer instruction stored in the memory; when the processor executes the computer instruction, the electronic device executes the method described in any one of claims 1 to 8.

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