A signal processing circuit and a display

Abstract

Embodiments of the present application provide a signal processing circuit and a display, the signal processing circuit comprising: a level conversion control module and an output control module; the output control module is configured to output a high-level signal to a subsequent circuit and transmit the high-level signal to a control end of the level conversion control module when an input end of the output control module is at a high level; wherein a signal source is configured to output a high-level voltage signal; the level conversion control module is configured to pull down the level of the input end of the output control module when the control end of the level conversion control module receives the high-level signal; the output control module is further configured to output a low-level signal to the subsequent circuit and transmit the low-level signal to the control end of the level conversion control module when the input end of the output control module is at a low level; the level conversion control module is further configured to be in an off state when the control end of the level conversion control module receives the low-level signal; and the high-level signal and the low-level signal constitute a pulse signal.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of electronics, and in particular to a signal processing circuit and a display. BACKGROUND

[0002] With the development of integration and intelligence in the display field, more and more TFT (Thin Film Transistor) sensing circuits are integrated into the display screen, such as In-cell (a method of embedding touch panel functions into liquid crystal pixels) touch sensing circuits, in-screen light sensing circuits, under-screen camera sensing circuits, etc. Currently, an external processor such as a CPU (Central Processing Unit), an MPU (Microprocessor Unit), an MCU (Microcontroller Unit), etc. is usually used to receive analog signals of the TFT sensing circuits, process the received analog signals, and convert them into pulse signals that can be recognized by the processor itself, as shown in FIG. 1. Figure 1 Because the processor needs to perform a large amount of signal processing work, the heat generated inside the processor correspondingly increases, which may reduce the reliability of the processor. SUMMARY

[0003] The purpose of the embodiments of the present application is to provide a signal processing circuit and a display to improve the reliability of the processor. The specific technical solutions are as follows:

[0004] In a first aspect, the embodiments of the present application provide a signal processing circuit, which comprises:

[0005] a level conversion control module and an output control module;

[0006] An input end of the output control module is connected with a signal source and an output end of the level conversion control module, respectively, and an output end of the output control module is connected with a post-stage circuit and a control end of the level conversion control module, respectively;

[0007] The output control module is configured to output a high-level signal to the post-stage circuit and transmit the high-level signal to the control end of the level conversion control module when the input end of the output control module is at a high level, and the signal source is configured to output a high-level voltage signal;

[0008] The level conversion control module is configured to pull down the level of the input end of the output control module when the control end of the level conversion control module receives the high-level signal;

[0009] The output control module is further configured to output a low-level signal to the subsequent circuit and transmit the low-level signal to a control end of the level conversion control module when an input end of the output control module is at a low level.

[0010] The level conversion control module is further configured to be in an off state when the control end of the level conversion control module receives the low-level signal.

[0011] The high-level signal and the low-level signal form a pulse signal.

[0012] In a possible implementation, the circuit further includes a charging and discharging module.

[0013] The charging and discharging module is connected to the signal source, the level conversion control module, and the output control module.

[0014] The charging and discharging module is configured to control a width of the high-level signal of the pulse signal.

[0015] In a possible implementation, the circuit further includes a detection module.

[0016] An input end of the detection module is connected to an output end of the signal source, an output end of the level conversion control module, and an input end of the output control module, and an output end of the detection module is connected to a subsequent module.

[0017] The detection module is configured to output a level signal opposite to a current level state of the input end of the output control module when the signal source is in normal operation, and continuously output a high-level signal when the signal source is in abnormal operation, so that the subsequent module determines a working state of the signal source according to the received level signal.

[0018] In a possible implementation, the output control module includes a first switch tube, a second switch tube, a third switch tube, and a fourth switch tube.

[0019] A control end of the first switch tube is connected to the signal source, an output end of the level conversion control module, an input end of the output control module, and a control end of the second switch tube, a first end of the first switch tube is connected to a first end of the third switch tube and a positive end of a first power supply, and a second end of the first switch tube is connected to a first end of the second switch tube, a control end of the third switch tube, and a control end of the fourth switch tube.

[0020] A second end of the second switch tube is grounded.

[0021] The second end of the third switch tube is respectively connected to the first end of the fourth switch tube, the output end of the output control module, and the control end of the level conversion control module;

[0022] The second end of the fourth switch tube is grounded.

[0023] In a possible implementation, the level conversion control module includes a fifth switch tube;

[0024] The control end of the fifth switch tube is respectively connected to the control end of the level conversion control module, the second end of the third switch tube, the first end of the fourth switch tube, and the output end of the output control module;

[0025] The first end of the fifth switch tube is respectively connected to the signal source, the output end of the level conversion control module, the input end of the output control module, the control end of the first switch tube, and the control end of the second switch tube;

[0026] The second end of the fifth switch tube is grounded.

[0027] In a possible implementation, the charging and discharging module includes a first capacitor;

[0028] The first end of the first capacitor is connected to the signal source, the output end of the level conversion control module, and the input end of the output control module respectively;

[0029] The second terminal of the first capacitor is grounded.

[0030] In a possible implementation, the detection module includes a sixth switching tube and a seventh switching tube;

[0031] The control end of the sixth switch tube is respectively connected to the signal source, the input end of the detection module, and the control end of the seventh switch tube; the first end of the sixth switch tube is connected to the positive end of the second power supply; and the second end of the sixth switch tube is respectively connected to the first end of the seventh switch tube and the output end of the detection module;

[0032] The second end of the seventh switch tube is grounded.

[0033] In a second aspect, an embodiment of the present application provides a display, comprising a signal source and the signal processing circuit described in any one of the first aspects above.

[0034] In one possible implementation,

[0035] The signal source is a sensing circuit;

[0036] The sensing circuit and the signal processing circuit are integrated on a same printed circuit board of the display.

[0037] In a possible implementation form,

[0038] The sensing circuit comprises an eighth switch tube;

[0039] The control end of the eighth switch tube is connected with the positive end of the third power supply, the first end of the eighth switch tube is connected with the positive end of the fourth power supply, and the second end of the eighth switch tube is connected with the input end of the output control module and the output end of the level conversion control module respectively.

[0040] The embodiments of the present application have the following beneficial effects:

[0041] The signal processing circuit and the display provided by the embodiments of the present application comprise a level conversion control module and an output control module. The input end of the output control module is connected with a signal source and the output end of the level conversion control module. The output end of the output control module is connected with a subsequent circuit and the control end of the level conversion control module. The output control module is configured to output a high-level signal to the subsequent circuit and transmit the high-level signal to the control end of the level conversion control module when the input end of the output control module is at a high level. The signal source is configured to output a high-level voltage signal. The level conversion control module is configured to pull down the level of the input end of the output control module when the control end of the level conversion control module receives a high-level signal. The output control module is further configured to output a low-level signal to the subsequent circuit and transmit the low-level signal to the control end of the level conversion control module when the input end of the output control module is at a low level. The level conversion control module is further configured to be in an off state when the control end of the level conversion control module receives a low-level signal. The high-level signal and the low-level signal constitute a pulse signal. The level conversion control module pulls down the level of the input end of the output control module, so that the input end of the output control module alternates between high and low levels. The output control module outputs a pulse signal in which a high-level signal and a low-level signal alternate to the subsequent circuit (a processor), that is, the voltage signal (an analog signal) output by the signal source is converted into a pulse signal that can be recognized by the processor. The processor does not need to perform conversion processing from an analog signal to a pulse signal, which reduces the signal processing work of the processor, reduces the heat generation of the processor, and improves the reliability of the processor.

[0042] Of course, implementing any product or method of the present application does not necessarily require all the advantages described above to be achieved at the same time. BRIEF DESCRIPTION OF DRAWINGS

[0043] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the accompanying drawings needed to be used in the embodiments or prior art description will be briefly introduced. Obviously, the accompanying drawings in the following description only represent some embodiments of the present application, and other embodiments can be obtained by those skilled in the art based on these drawings.

[0044] Figure 1 A structural diagram of a structure for processing analog signals of a TFT sensing circuit in the related art;

[0045] Figure 2 A first structural diagram of a signal processing circuit provided by the embodiments of the present application;

[0046] Figure 3 A second structural diagram of a signal processing circuit provided by the embodiments of the present application;

[0047] Figure 4 A third structural diagram of a signal processing circuit provided by the embodiments of the present application;

[0048] Figure 5 A fourth structural diagram of a signal processing circuit provided by the embodiments of the present application;

[0049] Figure 6 A fifth structural diagram of a signal processing circuit provided by the embodiments of the present application;

[0050] Figure 7 A first structural diagram of a display provided by the embodiments of the present application;

[0051] Figure 8 A second structural diagram of a display provided by the embodiments of the present application. DETAILED DESCRIPTION

[0052] The technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments only represent some of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art based on the present application belong to the scope of protection of the present application.

[0053] With the development of integration and intelligence in the display field, more and more TFT (Thin Film Transistor) sensing circuits are integrated into the display screen, such as In-cell (a method of embedding touch panel function into liquid crystal pixels) touch sensing circuit, in-screen light sensing circuit, under-screen camera sensing circuit, etc. Currently, an external processor such as CPU (Central Processing Unit), MPU (Microprocessor Unit), MCU (Microcontroller Unit), etc. is usually used to receive analog signals of the TFT sensing circuit, process the received analog signals, and convert them into pulse signals that can be recognized by the processor itself, as shown in Figure 1 Due to the large amount of signal processing work required by the processor, the heat generated inside the processor increases accordingly, which may reduce the reliability of the processor and reduce the signal processing efficiency of the processor, which may cause the system performance of the processor to decline.

[0054] To solve at least one of the above problems, embodiments of the present application provide a signal processing circuit and a display. Next, the signal processing circuit 1 provided by the embodiments of the present application will be described in detail, referring to Figure 2 The first structure diagram of the signal processing circuit 1 provided by the embodiments of the present application is shown in FIG. 1. The signal processing circuit 1 includes:

[0055] a level conversion control module 11 and an output control module 12;

[0056] The input end of the output control module 12 is connected with a signal source and the output end of the level conversion control module 11 respectively, and the output end of the output control module 12 is connected with a post-stage circuit and the control end of the level conversion control module 11 respectively;

[0057] The output control module 12 is configured to output a high-level signal to the post-stage circuit and transmit the high-level signal to the control end of the level conversion control module 11 when the input end of the output control module 12 is at a high level, and the signal source is configured to output a high-level voltage signal;

[0058] The level conversion control module 11 is configured to pull down the level of the input end of the output control module 12 when the control end of the level conversion control module 11 receives the high-level signal;

[0059] The output control module 12 is further configured to output a low-level signal to the post-stage circuit and transmit the low-level signal to the control end of the level conversion control module 11 when the input end of the output control module 12 is at a low level;

[0060] The level conversion control module 11 is also configured to be in an off state when the low-level signal is received at the control end thereof.

[0061] The high-level signal and the low-level signal form a pulse signal.

[0062] The signal source can be a sensing circuit in a display screen, which is configured to output a high-level voltage signal (analog signal). In one example, the signal source is an In-cell touch TFT sensing circuit in a display screen. The In-cell touch TFT sensing circuit converts a touch position into a voltage signal for output after detecting the touch position. The touch TFT sensing circuit does not output when no touch position is detected.

[0063] When the signal source outputs a high-level voltage signal to the input end of the output control module 12, the output control module 12 outputs a high-level signal to a subsequent circuit (a processor) and also feeds back the high-level signal to the control end of the level conversion control module 11, so as to pull down the level of the input end of the output control module 12. When the input end of the output control module 12 is at a low level, the output control module 12 outputs a low-level signal to the subsequent circuit and also feeds back the low-level signal to the control end of the level conversion control module 11, so as to turn off the level conversion control module 11. The level of the input end of the output control module 12 returns to a high level, the output control module 12 outputs a high-level signal again, the level conversion control module 11 is pulled down again, the output control module 12 outputs a low-level signal again, and so on. In this way, the output control module 12 outputs a pulse signal in which a high-level signal and a low-level signal are alternated to the subsequent circuit (the processor).

[0064] In order to form the duration of the high-level signal and the duration of the low-level signal, a capacitor can be arranged in the signal processing circuit 1. The duration of the high-level signal and the duration of the low-level signal are maintained by the charging and discharging characteristics of the capacitor.

[0065] In the embodiment of the present application, the level conversion control module 11 pulls down the level of the input end of the output control module 12, so that the input end of the output control module 12 alternates between high and low levels, and outputs a pulse signal in which a high level signal and a low level signal are alternated to the subsequent circuit (processor), that is, the voltage signal (analog signal) output by the signal source is converted into a pulse signal recognizable by the processor, without the processor itself performing the conversion processing of the analog signal into the pulse signal, reducing the signal processing work of the processor, thereby reducing the heat generation of the processor, improving the reliability of the processor, and improving the signal processing efficiency of the processor, thereby improving the system performance of the processor; and compared with directly transmitting the voltage signal to the processor, the voltage signal output by the signal source is first converted into a pulse signal and then transmitted to the processor, which can reduce the signal distortion problem (for a longer transmission path, the stability of the pulse signal is higher than that of the analog signal), and at the same time, the demand for signal transmission can be reduced, and the speed and efficiency of signal transmission can be improved.

[0066] In a possible implementation, referring to Figure 3 , the signal processing circuit 1 further includes a charging and discharging module 13.

[0067] The charging and discharging module 13 is connected with the signal source, the level conversion control module 11, and the output control module 12 respectively.

[0068] The charging and discharging module 13 is configured to control the width of the high level signal of the pulse signal.

[0069] By adjusting the parameter setting of the charging and discharging module 13, the pulse width (width of the high level signal) of the pulse signal can be controlled, so that the processor can recognize different signals through different pulse frequencies.

[0070] In one example, the charging and discharging module 13 can include a capacitor, and the pulse width of the pulse signal can be adjusted by adjusting the capacitance of the capacitor.

[0071] In the embodiment of the present application, by setting the charging and discharging module 13, the pulse width of the pulse signal can be controlled by adjusting the parameter setting of the charging and discharging module 13, so that the processor can recognize different signals through different pulse frequencies.

[0072] In a possible implementation, referring to Figure 4 , the signal processing circuit 1 further includes a detection module 14.

[0073] The input end of the detection module 14 is connected with the signal source, the output end of the level conversion control module 11, and the input end of the output control module 12 respectively, and the output end of the detection module 14 is connected with a subsequent module.

[0074] The detection module 14 is used to output a level signal opposite to the current level state of the input end of the output control module 12 when the signal source is working normally, and continuously output a high level signal when the signal source is working abnormally, so that the subsequent module can judge the working state of the signal source based on the received level signal.

[0075] The specific working process of the detection module 14 will be described in detail later.

[0076] In the embodiment of the present application, the working status of the signal source can be judged based on the level signal output by the detection module 14. By setting up the detection module 14, the working status of the signal source is monitored, which makes it convenient for engineers to take relevant measures to correct it when an abnormality occurs in the signal source, so as to ensure the normal operation of the signal source.

[0077] In one possible implementation, see Figure 5 The output control module 12 includes a first switch tube M1, a second switch tube M2, a third switch tube M3, and a fourth switch tube M4;

[0078] The control end of the first switch tube M1 is respectively connected to the signal source, the output end of the level conversion control module 11, the input end of the output control module 12, and the control end of the second switch tube M2; the first end of the first switch tube M1 is respectively connected to the first end of the third switch tube M3 and the first positive power supply terminal VDD1; the second end of the first switch tube M1 is respectively connected to the first end of the second switch tube M2, the control end of the third switch tube M3, and the control end of the fourth switch tube M4;

[0079] The second end of the second switch tube M2 is grounded to GND;

[0080] The second end of the third switch tube M3 is respectively connected to the first end of the fourth switch tube M4, the output end of the output control module 12, and the control end of the level conversion control module 11;

[0081] A second terminal of the fourth switch tube M4 is grounded GND.

[0082] In one possible implementation, see Figure 5 , the level conversion control module 11 includes a fifth switch tube M5;

[0083] The control end of the fifth switch tube M5 is respectively connected to the control end of the level conversion control module 11, the second end of the third switch tube M3, the first end of the fourth switch tube M4, and the output end of the output control module 12;

[0084] The first end of the fifth switch tube M5 is respectively connected to the signal source, the output end of the level conversion control module 11, the input end of the output control module 12, the control end of the first switch tube M1, and the control end of the second switch tube M2;

[0085] A second terminal of the fifth switch tube M5 is grounded GND.

[0086] In one possible implementation, see Figure 5 , the charging and discharging module 13 includes a first capacitor C1;

[0087] The first end of the first capacitor C1 is connected to the signal source, the output end of the level conversion control module 11, and the input end of the output control module 12 respectively;

[0088] A second terminal of the first capacitor C1 is grounded GND.

[0089] exist Figure 5 In the signal processing circuit 1 shown, the signal source is used to output a high-level voltage signal VIN, the first switch tube M1 is a P-type switch tube, the second switch tube M2 is an N-type switch tube, the third switch tube M3 is a P-type switch tube, the fourth switch tube M4 is an N-type switch tube, and the fifth switch tube M5 is an N-type switch tube. The following will combine the above information to explain Figure 5 The working process of the signal processing circuit 1 shown is described in detail.

[0090] The signal source outputs a high-level voltage signal VIN to charge the first capacitor C1. The control end of the first switch tube M1 is at a high level, and the first switch tube M1 is turned off. The control end of the second switch tube M2 is at a high level, and the second switch tube M2 is turned on. The low level of the ground GND is transmitted to the N3 node. The control end of the fourth switch tube M4 is at a low level, and the fourth switch tube M4 is turned off. The control end of the third switch tube M3 is at a low level, and the third switch tube M3 is turned on. The high level of the first power supply positive terminal VDD1 is transmitted to the N4 node, and the output control module 12 outputs a high-level signal to the processor.

[0091] Meanwhile, the high level signal output by the output control module 12 is fed back to the control end of the fifth switch tube M5, the fifth switch tube M5 is turned on, and the level of the input end of the output control module 12 is pulled low. However, due to the existence of the first capacitor C1, the high level will be pulled low to the low level after a period of time. The greater the capacitance of the first capacitor C1, the longer the discharge time of the first capacitor C1. When the input end of the output control module 12 is pulled low to the low level, the control end of the second switch tube M2 is low, the second switch tube M2 is turned off, the control end of the first switch tube M1 is low, the first switch tube M1 is turned on, the high level of the first power supply positive end VDD1 is transmitted to the N3 node, the control end of the third switch tube M3 is high, the third switch tube M3 is turned off, the control end of the fourth switch tube M4 is high, the fourth switch tube M4 is turned on, and the low level of the ground GND is transmitted to the N4 node. The output control module 12 outputs a low level signal to the processor.

[0092] Meanwhile, the low level signal output by the output control module 12 is fed back to the control end of the fifth switch tube M5, the fifth switch tube M5 is turned off, and the high level voltage signal VIN output by the signal source charges the first capacitor C1, so that the input end of the output control module 12 returns to the high level (the low level will return to the high level after a period of time. The greater the capacitance of the first capacitor C1, the longer the charging time of the first capacitor C1)… Such a process, the output control module 12 outputs a pulse signal with high level signal and low level signal to the processor alternately.

[0093] In a possible implementation, referring to Figure 6 , the detection module 14 includes a sixth switch tube M6 and a seventh switch tube M7.

[0094] The control end of the sixth switch tube M6 is connected with the signal source, the input end of the detection module 14 and the control end of the seventh switch tube M7 respectively, the first end of the sixth switch tube M6 is connected with the second power supply positive end VDD2, and the second end of the sixth switch tube M6 is connected with the first end of the seventh switch tube M7 and the output end of the detection module 14 respectively.

[0095] The second end of the seventh switch tube M7 is grounded GND.

[0096] In Figure 6 , the sixth switch tube M6 is a P-type switch tube, and the seventh switch tube M7 is an N-type switch tube. The working process of the detection module 14 shown in Figure 6 will be described in detail below in combination with the above information.

[0097] When the signal source is in normal operation, the level at the input of the output control module 12 alternates between high and low levels. When the level at the input of the output control module 12 is high, the control terminal of the sixth switch M6 is high, the sixth switch M6 is off, the control terminal of the seventh switch M7 is high, the seventh switch M7 is on, the low level of ground GND is transmitted to node N5, and the detection module 14 outputs a low level to the subsequent module. When the level at the input of the output control module 12 is low, the control terminal of the seventh switch M7 is low, the seventh switch M7 is off, the control terminal of the sixth switch M6 is low, the sixth switch M6 is on, the high level of the second positive power supply terminal VDD2 is transmitted to node N5, and the detection module 14 outputs a high level to the subsequent module. Therefore, when the signal source is in normal operation, the detection module 14 outputs a signal with a level opposite to the current level at the input of the output control module 12.

[0098] When the signal source is in an abnormal working state, the signal source has no output or outputs a low-level signal, the seventh switch tube M7 is always turned off, the sixth switch tube M6 is always turned on, the high level of the second power supply positive terminal VDD2 is always transmitted to the N5 node, and the detection module 14 continues to output a high-level signal.

[0099] In summary, the post-stage module can determine the working status of the signal source based on the level signal output by the detection module 14. Through the sixth switch tube M6 and the seventh switch tube M7, the working status of the signal source is monitored, which makes it convenient for engineers to take relevant measures to correct it when an abnormality occurs in the signal source, so as to ensure the normal operation of the signal source.

[0100] The present application also provides a display 2, see Figure 7 The display 2 includes a signal source 21 and the signal processing circuit 1 described in any one of the above embodiments.

[0101] In one possible implementation,

[0102] The signal source 21 is a sensor circuit;

[0103] The sensing circuit and the signal processing circuit 1 are integrated on the same printed circuit board of the display 2 .

[0104] The sensing circuit can be an in-cell touch sensing circuit, an in-screen light sensing circuit, an under-screen camera sensing circuit, etc. The above sensing circuits are all TFT sensing circuits integrated in the display screen. Integrating the signal processing circuit 1 and the sensing circuit on the same printed circuit board (PCB) can save PCB layout area and save costs.

[0105] In one possible implementation, seeFigure 8 ,

[0106] The sensing circuit includes an eighth switch tube M8;

[0107] The control end of the eighth switch tube M8 is connected to the third power positive terminal VDD3, the first end of the eighth switch tube M8 is connected to the fourth power positive terminal VDD4, and the second end of the eighth switch tube M8 is respectively connected to the input end of the output control module 12 and the output end of the level conversion control module 11.

[0108] The eighth switch tube M8 is an N-type switch tube.

[0109] It is understandable that Figure 8 The sensor circuit structure shown is only a schematic and does not represent the actual sensor circuit structure.

[0110] It is understood that for any switch in the circuit of this application, the switch can be an N-type switch or a P-type switch, and the specific selection can be made according to the actual situation; the control terminal of the switch is the gate, the first terminal of the switch is the source or drain, and the second terminal of the switch is the drain or source corresponding to the first terminal. It is understood that the switch can be a P-type switch or an N-type switch, and the specific selection can be made according to the actual situation, but the device coupling method of the circuit needs to be adjusted accordingly. Such replacement solutions are still within the scope of protection of this application.

[0111] It can be understood that the switching tube used in the circuit of this application can be a MOS tube (Metal-Oxide-Semiconductor Field-Effect Transistor), or a TFT tube (Thin Film Transistor) or other types of switching tubes. The specific selection can be made according to actual conditions, and the replacement scheme is still within the scope of protection of this application.

[0112] It is to be understood that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting; it is not intended to exclude myriad other embodiments of the present application that other inventors can develop based on the description herein. It must be stressed, however, that any combination of the components or features taught according to any of the embodiments herein can be important to the working of the application. In this document, relational terms such as first and second and the like can be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises", "comprising", or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but can include other elements not expressly listed or inherent to such process, method, article, or apparatus. An element proceeded by "comprises... a" does not, without more constraints, exclude the presence of additional identical elements in the process, method, article, or apparatus that comprises the element.

[0113] Each of the embodiments described in this specification has been contemplated in relation to the other embodiments, and parts common to each of the embodiments can be mutually referred to. Each of the embodiments focuses on the difference from the other embodiments. In particular, the system embodiments are described simply because they are substantially similar to the method embodiments, and the relevant parts can be referred to the description of the method embodiments.

[0114] The preferred embodiments of the present application are described above in detail. The above description includes specific details for the purpose of providing a thorough understanding of the present application. However, it will be apparent to those skilled in the art that the present application can be practiced without these specific details. In other instances, well-known structures and functions have not been described in detail in order to avoid obscuring the concept of the present application. The sole purpose of the above description is to enable the person skilled in the art to make and use the present application. The descriptions of the preferred embodiments are not intended to limit the scope of the present application, but merely to describe the preferred embodiments of the present application.

Claims

1. A signal processing circuit, characterized in that: The circuit comprises: Level conversion control module and output control module; The input end of the output control module is connected to the signal source and the output end of the level conversion control module respectively, and the output end of the output control module is connected to the subsequent circuit and the control end of the level conversion control module respectively; The output control module is configured to output a high-level signal to the subsequent circuit when its input terminal is at a high level, and transmit the high-level signal to the control terminal of the level conversion control module; wherein the signal source is configured to output a high-level voltage signal; The level conversion control module is configured to pull down the level of the input terminal of the output control module when the control terminal thereof receives the high level signal; The output control module is further configured to output a low-level signal to the subsequent circuit when its input terminal is at a low level, and transmit the low-level signal to the control terminal of the level conversion control module; The level conversion control module is further configured to be in a shutdown state when its control terminal receives the low-level signal; Wherein, the high level signal and the low level signal form a pulse signal; The output control module includes a first switch tube, a second switch tube, a third switch tube, and a fourth switch tube; The control end of the first switching tube is respectively connected to the signal source, the output end of the level conversion control module, the input end of the output control module, and the control end of the second switching tube; the first end of the first switching tube is respectively connected to the first end of the third switching tube and the positive end of the first power supply; and the second end of the first switching tube is respectively connected to the first end of the second switching tube, the control end of the third switching tube, and the control end of the fourth switching tube; The second end of the second switch tube is grounded; The second end of the third switch tube is respectively connected to the first end of the fourth switch tube, the output end of the output control module, and the control end of the level conversion control module; The second end of the fourth switch tube is grounded.

2. The circuit according to claim 1, wherein: The circuit further comprises: a charge and discharge module; The charging and discharging module is connected to the signal source, the level conversion control module, and the output control module respectively; The charge and discharge module is used to control the width of the high-level signal of the pulse signal.

3. The circuit according to claim 1, wherein: The circuit further includes: a detection module; The input end of the detection module is connected to the signal source, the output end of the level conversion control module, and the input end of the output control module respectively, and the output end of the detection module is connected to the subsequent module; The detection module is used to output a level signal opposite to the current level state of the input end of the output control module when the signal source is working normally, and continuously output a high level signal when the signal source is working abnormally, so that the subsequent module can judge the working state of the signal source based on the received level signal.

4. The circuit according to claim 1, wherein: The level conversion control module includes a fifth switch tube; The control end of the fifth switch tube is respectively connected to the control end of the level conversion control module, the second end of the third switch tube, the first end of the fourth switch tube, and the output end of the output control module; The first end of the fifth switch tube is respectively connected to the signal source, the output end of the level conversion control module, the input end of the output control module, the control end of the first switch tube, and the control end of the second switch tube; The second end of the fifth switch tube is grounded.

5. The circuit according to claim 2, characterized in that The charging and discharging module includes a first capacitor; The first end of the first capacitor is connected to the signal source, the output end of the level conversion control module, and the input end of the output control module respectively; The second terminal of the first capacitor is grounded.

6. The circuit according to claim 3, characterized in that The detection module includes a sixth switching tube and a seventh switching tube; The control end of the sixth switch tube is respectively connected to the signal source, the input end of the detection module, and the control end of the seventh switch tube; the first end of the sixth switch tube is connected to the positive end of the second power supply; and the second end of the sixth switch tube is respectively connected to the first end of the seventh switch tube and the output end of the detection module; The second end of the seventh switch tube is grounded.

7. A display, characterized in that: The display comprises a signal source and the signal processing circuit according to any one of claims 1 to 6.

8. The display according to claim 7, wherein: The signal source is a sensing circuit; The sensing circuit and the signal processing circuit are integrated on a same printed circuit board of the display.

9. The display according to claim 8, characterized in that The sensing circuit includes an eighth switching tube; The control end of the eighth switch tube is connected to the positive end of the third power supply, the first end of the eighth switch tube is connected to the positive end of the fourth power supply, and the second end of the eighth switch tube is respectively connected to the input end of the output control module and the output end of the level conversion control module.

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