A frequency coupling suppression method for grid-connected inverters taking into account dynamic performance

Abstract

The present invention belongs to the field of new energy grid-connected converter stability, and specifically discloses a grid-connected inverter frequency coupling suppression method that takes into account dynamic performance. First, a frequency coupling suppression method including a dynamic improver G c (s) and a coupling suppressor Q is proposed; modular modeling is carried out on the improved DC voltage loop and AC current loop, and its multi-harmonic linearization model is established; based on the proposed frequency coupling control method, considering multiple coupling factors, a grid-connected inverter output admittance model is established. Compared with the prior art, the present invention can significantly reduce the content of disturbance harmonic current and coupling harmonic current in the grid-side current, making the grid-side current distortion rate meet the requirements of the grid connection criterion, improving the system robustness, and also reducing the overshoot of the grid-side current and shortening the adjustment time, improving the dynamic performance of the system.

Description

Technical Field

[0001] The present invention relates to the field of stability of new energy grid-connected converters, and in particular to a method for suppressing frequency coupling of grid-connected inverters taking into account dynamic performance. Background Art

[0002] With the increasing scarcity of traditional fossil energy around the world, and with the support of the "carbon peak" and "carbon neutrality" policies, new energy distributed power sources such as photovoltaics have been vigorously developed. As an important interface between distributed power sources and the public power grid, the penetration rate of grid-connected inverters in new power systems is also increasing. Due to the asymmetry of the control link of the grid-connected inverter on the dq axis, the grid-connected inverter system will present a "single input and dual output" frequency coupling characteristic: that is, when there is a voltage harmonic disturbance at the grid connection point voltage, the grid-side current will not only produce a disturbance current response of the same frequency, but also another coupled current response component, posing a serious threat to system stability.

[0003] Some existing frequency coupling suppression methods often only focus on the suppression effect of current harmonics, while ignoring the damage caused by the introduced suppression method to the dynamic performance of the system. In order to suppress the frequency coupling phenomenon while improving the deterioration of the system dynamic performance caused by the frequency coupling suppression link, it is urgent to propose a frequency coupling suppression method for grid-connected inverters that takes into account dynamic performance. Summary of the invention

[0004] In order to solve the above technical problems, the present invention provides a frequency coupling suppression method for a grid-connected inverter taking into account dynamic performance.

[0005] To achieve the above object, the present invention is implemented according to the following technical solutions:

[0006] A method for suppressing frequency coupling of a grid-connected inverter taking into account dynamic performance comprises the following steps:

[0007] S1. Propose a method including a dynamic improver G c (s) and the frequency coupling suppression method of the coupling suppressor Q;

[0008] S2. Modular modeling of the improved DC voltage loop and AC current loop is carried out to establish their multi-harmonic linearization models;

[0009] S3. Based on the proposed frequency coupling control method and considering multiple coupling factors, an output admittance model of the grid-connected inverter is established.

[0010] Furthermore, the step S1 comprises:

[0011] S11, Dynamic Improver G c (s):

[0012] Dynamic Improver Gc (s) is introduced into the DC voltage loop, the DC bus voltage V dc With the DC bus voltage given value V dc0 For comparison, the DC voltage loop PI controller G dc (s), and then through the dynamic improver G c (s) Get the output current d-axis component reference value I dr ; Dynamic Improver G c The expression of (s) is:

[0013]

[0014] In formula (1), g c and α are the dynamic improvement gain coefficient and correction coefficient respectively; λ is the dynamic improver time constant;

[0015] S12, coupling suppressor Q:

[0016] The coupling suppressor Q is a proportional link, which is introduced into the AC current loop through the output current. Taking the d-axis current loop as an example, the d-axis component I d The feedback coefficient is 1, and the coupling suppressor Q is introduced in parallel, and then compared with the output current d-axis component reference value I dr By comparison, the current loop d-axis PI controller H di (s), the output is the modulated signal d-axis component m d .

[0017] Furthermore, the step S2 comprises:

[0018] S21. Establish a DC voltage loop harmonic linearization model to improve dynamic performance:

[0019] Based on the single-input dual-output characteristics of the frequency coupling effect, the multi-harmonic linearization method is used for modeling. The DC voltage loop harmonic linearization model for improving dynamic performance is:

[0020]

[0021] In formula (2), V1 and I1 represent the fundamental frequency phasors of the grid-connected point voltage and output current; V p is the positive sequence harmonic disturbance of the grid-connected point voltage; I p Represents the output current positive sequence harmonic disturbance; V n is the negative sequence harmonic disturbance of the grid-connected point voltage; I n represents the negative sequence harmonic disturbance of the output current; the superscript '*' represents the conjugate of the phasor; s is the Laplace operator; L represents the filter inductance; I L represents the output current of the DC current source; C is the DC bus capacitance value; V dc0Indicates the given value of DC bus voltage; f represents frequency; f p is the positive sequence harmonic frequency; f1 is the fundamental frequency; j is an imaginary number; π represents pi;

[0022] S22. AC current loop harmonic linearization model for suppressing frequency coupled harmonics:

[0023] After the coupling suppressor Q is introduced, the improved AC current loop harmonic linearization model is:

[0024]

[0025] In formula (3), m d is the d-axis component of the modulation signal, m q is the q-axis component of the modulation signal; I qr is the reference value of the q-axis component of the output current; Q is the coupling inhibitor coefficient; I d and I q Represents the d-axis and q-axis components of the output current; H di (s) and H qi (s) are the PI controllers of the current loop d and q axes respectively; K d is the decoupling coefficient.

[0026] Furthermore, the step S3 comprises:

[0027] Based on the proposed frequency coupling suppression method, the output admittance model of the grid-connected inverter considering multiple coupling factors[Y inv ] 2×2 :

[0028]

[0029] In formula (4), Y 11 is the grid-connected inverter output admittance model [Y inv ] 2×2 Subsystem 1, used to characterize the positive sequence harmonic disturbance of the grid connection point voltage V p The positive sequence harmonic disturbance of the output current I p The impact of Y 12 is the grid-connected inverter output admittance model [Y inv ] 2×2 Subsystem 2, used to characterize the negative sequence harmonic disturbance V of the grid connection point voltage n The positive sequence harmonic disturbance of the output current I p The impact of Y 21 is the grid-connected inverter output admittance model [Y inv ] 2×2 Subsystem 3, used to characterize the positive sequence harmonic disturbance of the grid connection point voltage V p Negative sequence harmonic disturbance of output current I n The impact of Y22 is the grid-connected inverter output admittance model [Y inv ] 2×2 Subsystem 4, used to characterize the negative sequence harmonic disturbance of the grid connection point voltage V n Negative sequence harmonic disturbance of output current I n The impact of

[0030] In formula (4), W ip , W in , W vp , W vn , H p , H n Represents the expression associated with the DC voltage loop in the inverter admittance model; W ip It reflects the output current positive sequence harmonic disturbance I p DC voltage disturbance V dcp The expression affected; W in It reflects the negative sequence harmonic disturbance of the output current I n DC voltage disturbance V dcp The expression affected; W vp It reflects the positive sequence harmonic disturbance of the grid connection point voltage V p DC voltage disturbance V dcp The expression affected; W vn It reflects the negative sequence harmonic disturbance of the grid connection point voltage V n DC voltage disturbance V dcp The expression affected; W ip , W in , W vp , W vn The expression is:

[0031]

[0032] In formula (4), H p It reflects the DC voltage disturbance V dcp For frequency f p The inverter port output voltage v i Positive sequence harmonic disturbance V ip The expression of influence; H n It reflects the DC voltage disturbance V dcp For frequency f n The inverter port output voltage v i Negative sequence harmonic disturbance V in The expression of influence; H p , H n The expression is:

[0033]

[0034] In formula (6), K m is the modulation coefficient; m1 represents the fundamental frequency component of the modulation signal, and m1* is the conjugate value of m1;

[0035] In formula (4), B 11 , B 12 , B 21 , B 22 is the expression of the phase-locked loop in the inverter admittance model; B 11 Used to characterize the positive sequence harmonic disturbance of the grid connection point voltage V p The output voltage of the inverter port is v i Positive sequence harmonic disturbance V ip The impact of 12 Used to characterize the negative sequence harmonic disturbance of the grid connection point voltage V n The output voltage of the inverter port is v i Positive sequence harmonic disturbance V ip The impact of 21 Used to characterize the positive sequence harmonic disturbance of the grid connection point voltage V p The output voltage of the inverter port is v i Negative sequence harmonic disturbance V in The impact of 22 Used to characterize the negative sequence harmonic disturbance of the grid connection point voltage V n The output voltage of the inverter port is v i Negative sequence harmonic disturbance V in The impact of 11 , B 12 , B 21 , B 22 The expression is:

[0036]

[0037] In formula (7), T PLL (s) is the phase-locked loop PI controller transfer function;

[0038] In formula (4), Q 11 , Q 12 , Q 21 , Q 22 is a set of expressions for the AC current loop in the inverter admittance model; Q 11 Reflects the output current positive sequence harmonic disturbance I p The output voltage of the inverter port is v i Positive sequence harmonic disturbance V ip The impact of Q 12 Reflects the output current negative sequence harmonic disturbance I n The output voltage of the inverter port is v i Positive sequence harmonic disturbance V ip The impact of Q21 Reflects the output current positive sequence harmonic disturbance I p The output voltage of the inverter port is v i Negative sequence harmonic disturbance V in The impact of Q 22 Reflects the output current negative sequence harmonic disturbance I n The output voltage of the inverter port is v i Negative sequence harmonic disturbance V in The impact of Q 11 , Q 12 , Q 21 , Q 22 The expression is:

[0039]

[0040] In formula (8), ω1 is the fundamental angular frequency.

[0041] Compared with the prior art, the present invention can significantly reduce the content of disturbing harmonic current and coupled harmonic current in the grid-side current, so that the grid-side current distortion rate meets the grid-connected criterion requirements, improves the system robustness, and can also reduce the overshoot of the grid-side current and shorten the adjustment time, thereby improving the dynamic performance of the system. c (s) and coupling suppressor Q can not only be used in grid-connected inverters, but also can play a role in frequency coupling suppression and dynamic performance improvement in other converters with dual closed-loop control of DC voltage loop and AC current loop, and have strong applicability. The grid-connected inverter output admittance model considering multiple coupling factors based on the proposed frequency coupling suppression method can provide a theoretical and model basis for the stability analysis of grid-connected inverters taking into account frequency coupling effects. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] Figure 1 The flowchart is a method for suppressing frequency coupling of a grid-connected inverter taking into account dynamic performance in an embodiment of the present invention;

[0043] Figure 2 The topological structure and control block diagram of the grid-connected inverter system in an embodiment of the present invention;

[0044] Figure 3 : is the grid-side a-phase current waveform under conventional control in an embodiment of the present invention;

[0045] Figure 4 This is the FFT analysis result of the grid-side a-phase current under traditional control in an embodiment of the present invention;

[0046] Figure 5 : is the grid-side a-phase current waveform in the embodiment of the present invention when only the coupling inhibitor Q is applied;

[0047] Figure 6 This is the FFT analysis result of the grid-side a-phase current when only the coupling inhibitor Q is applied in the embodiment of the present invention;

[0048] Figure 7 1 is a grid-side a-phase current waveform under the grid-connected inverter frequency coupling suppression method taking into account dynamic performance in an embodiment of the present invention;

[0049] Figure 8 This is the FFT analysis result of the grid-side a-phase current under the proposed grid-connected inverter frequency coupling suppression method taking into account dynamic performance in an embodiment of the present invention. DETAILED DESCRIPTION

[0050] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with embodiments. The specific embodiments described herein are only used to explain the present invention and are not used to limit the invention.

[0051] like Figure 1 As shown, this embodiment exemplarily shows a method for suppressing frequency coupling of a grid-connected inverter taking into account dynamic performance, and the specific process is as follows:

[0052] S1. Propose a method including a dynamic improver G c The frequency coupling suppression method of (s) and coupling suppressor Q, the specific process of which is as follows:

[0053] S11, Dynamic Improver G c (s):

[0054] Dynamic Improver G c (s) is introduced into the DC voltage loop, the DC bus voltage V dc With the DC bus voltage given value V dc0 For comparison, the DC voltage loop PI controller G dc (s), and then through the dynamic improver G c (s) Get the output current d-axis component reference value I dr ; Dynamic Improver G c The expression of (s) is:

[0055]

[0056] In formula (9), g c and α are the dynamic improvement gain coefficient and correction coefficient respectively; λ is the dynamic improver time constant;

[0057] S12, coupling suppressor Q:

[0058] The coupling suppressor Q is a proportional link, which is introduced into the AC current loop through the output current. Taking the d-axis current loop as an example, the d-axis component Id The feedback coefficient is 1, and the coupling suppressor Q is introduced in parallel, and then compared with the output current d-axis component reference value I dr By comparison, the current loop d-axis PI controller H di (s), the output is the modulated signal d-axis component m d ;

[0059] S2. Modular modeling is performed on the improved DC voltage loop and AC current loop to establish their multi-harmonic linearization model. The specific process is as follows:

[0060] S21. Establish a DC voltage loop harmonic linearization model to improve dynamic performance:

[0061] Based on the single-input dual-output characteristics of the frequency coupling effect, the multi-harmonic linearization method is used for modeling. The DC voltage loop harmonic linearization model for improving dynamic performance is:

[0062]

[0063] In formula (10), V1 and I1 represent the fundamental frequency phasors of the grid-connected point voltage and output current; V p is the positive sequence harmonic disturbance of the grid-connected point voltage; I p Represents the output current positive sequence harmonic disturbance; V n is the negative sequence harmonic disturbance of the grid-connected point voltage; I n represents the negative sequence harmonic disturbance of the output current; the superscript '*' represents the conjugate of the phasor; s is the Laplace operator; L represents the filter inductance; I L represents the output current of the DC current source; C is the DC bus capacitance value; V dc0 Indicates the given value of DC bus voltage; f represents frequency; f p is the positive sequence harmonic frequency; f1 is the fundamental frequency; j is an imaginary number; π represents pi;

[0064] S22. AC current loop harmonic linearization model for suppressing frequency coupled harmonics:

[0065] After the coupling suppressor Q is introduced, the improved AC current loop harmonic linearization model is:

[0066]

[0067] In formula (11), m d is the d-axis component of the modulation signal, m q is the q-axis component of the modulation signal; I qr is the reference value of the q-axis component of the output current; Q is the coupling inhibitor coefficient; I d and I q Represents the d-axis and q-axis components of the output current; H di(s) and H qi (s) are the PI controllers of the current loop d and q axes respectively; K d is the decoupling coefficient;

[0068] S3. Based on the proposed frequency coupling control method, considering multiple coupling factors, the output admittance model of the grid-connected inverter is established; the specific process is as follows:

[0069] The output admittance model of the grid-connected inverter considering multiple coupling factors based on the proposed frequency coupling suppression method is:

[0070]

[0071] In formula (12), Y 11 is the grid-connected inverter output admittance model [Y inv ] 2×2 Subsystem 1, used to characterize the positive sequence harmonic disturbance of the grid connection point voltage V p The positive sequence harmonic disturbance of the output current I p The impact of Y 12 is the grid-connected inverter output admittance model [Y inv ] 2×2 Subsystem 2, used to characterize the negative sequence harmonic disturbance V of the grid connection point voltage n The positive sequence harmonic disturbance of the output current I p The impact of Y 21 is the grid-connected inverter output admittance model [Y inv ] 2×2 Subsystem 3, used to characterize the positive sequence harmonic disturbance of the grid connection point voltage V p Negative sequence harmonic disturbance of output current I n The impact of Y 22 is the grid-connected inverter output admittance model [Y inv ] 2×2 Subsystem 4, used to characterize the negative sequence harmonic disturbance of the grid connection point voltage V n Negative sequence harmonic disturbance of output current I n The impact of

[0072] In formula (12), W ip , W in , W vp , W vn , H p , H n Represents the expression associated with the DC voltage loop in the inverter admittance model; W ip It reflects the output current positive sequence harmonic disturbance I p DC voltage disturbance V dcp The expression affected; W in It reflects the negative sequence harmonic disturbance of the output current I nDC voltage disturbance V dcp The expression affected; W vp It reflects the positive sequence harmonic disturbance of the grid connection point voltage V p DC voltage disturbance V dcp The expression affected; W vn It reflects the negative sequence harmonic disturbance of the grid connection point voltage V n DC voltage disturbance V dcp The expression affected; W ip , W in , W vp , W vn The expression is:

[0073]

[0074] In formula (12), H p It reflects the DC voltage disturbance V dcp For frequency f p The inverter port output voltage v i Positive sequence harmonic disturbance V ip The expression of influence; H n It reflects the DC voltage disturbance V dcp For frequency f n The inverter port output voltage v i Negative sequence harmonic disturbance V in The expression of influence; H p , H n The expression is:

[0075]

[0076] In formula (14), K m is the modulation coefficient; m1 represents the fundamental frequency component of the modulation signal, and m1* is the conjugate value of m1;

[0077] In formula (12), B 11 , B 12 , B 21 , B 22 is the expression of the phase-locked loop in the inverter admittance model; B 11 Used to characterize the positive sequence harmonic disturbance of the grid connection point voltage V p The output voltage of the inverter port is v i Positive sequence harmonic disturbance V ip The impact of 12 Used to characterize the negative sequence harmonic disturbance of the grid connection point voltage V n The output voltage of the inverter port is v i Positive sequence harmonic disturbance V ip The impact of 21Used to characterize the positive sequence harmonic disturbance of the grid connection point voltage V p The output voltage of the inverter port is v i Negative sequence harmonic disturbance V in The impact of 22 Used to characterize the negative sequence harmonic disturbance of the grid connection point voltage V n The output voltage of the inverter port is v i Negative sequence harmonic disturbance V in The impact of 11 , B 12 , B 21 , B 22 The expression is:

[0078]

[0079] In formula (15), T PLL (s) is the phase-locked loop PI controller transfer function;

[0080] In formula (12), Q 11 , Q 12 , Q 21 , Q 22 is a set of expressions for the AC current loop in the inverter admittance model; Q 11 Reflects the output current positive sequence harmonic disturbance I p The output voltage of the inverter port is v i Positive sequence harmonic disturbance V ip The impact of Q 12 Reflects the output current negative sequence harmonic disturbance I n The output voltage of the inverter port is v i Positive sequence harmonic disturbance V ip The impact of Q 21 Reflects the output current positive sequence harmonic disturbance I p The output voltage of the inverter port is v i Negative sequence harmonic disturbance V in The impact of Q 22 Reflects the output current negative sequence harmonic disturbance I n The output voltage of the inverter port is v i Negative sequence harmonic disturbance V in The impact of Q 11 , Q 12 , Q 21 , Q 22 The expression is:

[0081]

[0082] In formula (16), ω1 is the fundamental angular frequency.

[0083] In order to verify the effectiveness of the frequency coupling suppression method for grid-connected inverters taking into account dynamic performance, a simulation model was built in Matlab / Simulink software. Figure 2 The grid-connected inverter system simulation model is shown, where the system power P = 0.5MW, the DC bus capacitance C = 15mF, the filter inductance L = 0.42mH, and the grid voltage v g =690V, base frequency f1 = 50Hz, phase-locked loop PI controller transfer function T PLL (s) = 0.0158 + 0.99 / s, DC bus voltage set value V dc0 =1150V, DC voltage loop PI controller G dc (s) = 2.23 + 280.29 / s, dynamic improvement gain coefficient g c =1, dynamic improvement correction coefficient α=3, dynamic improver time constant λ=0.00457, coupling inhibitor Q=4, current loop d-axis PI controller H di (s) = 0.48 + 603.36 / s, current loop q-axis PI controller H qi (s) = 0.32 + 603.36 / s, decoupling coefficient K d =0.1319, PWM modulation carrier frequency f s =10kHz.

[0084] When a 30Hz harmonic voltage with 20% fundamental frequency content is injected into the grid-connected point voltage, the simulation waveforms under different control are as follows: Figure 3-Figure 8 As shown. Under the traditional control, the grid-side a-phase current waveform is as follows Figure 3 As shown, the FFT analysis results of the grid-side a phase current are as follows Figure 4 As shown. Figure 4 It can be seen that when there is a 30Hz harmonic voltage at the grid-connected point voltage, there is a 6.75% 30Hz disturbance harmonic current and an 8.52% 70Hz coupling harmonic current in the grid-side current, proving the existence of frequency coupling. At this time, the total distortion rate of the grid-side current is 9.30%, which does not meet the grid-connected current criterion of a distortion rate of less than 5%. Based on traditional control, when only the coupling suppressor Q is applied, the grid-side a phase current waveform is as follows: Figure 5 As shown, the FFT analysis results of the grid-side a phase current are as follows Figure 6 As shown. Figure 6 It can be seen that when the coupling suppressor Q is introduced, the disturbance harmonic current content of 30Hz drops to 0.81%, and the coupling harmonic current content of 70Hz drops to 2.03%, both of which drop significantly. At this time, the total distortion rate of the grid-side current is 3.34%, which meets the 5% grid-connected standard requirement, verifying the good suppression effect of the coupling suppressor Q on the frequency coupling effect. Figure 3 and Figure 5By comparison, it can be seen that the introduction of the coupling suppressor Q will increase the adjustment time to 0.52s, and the dynamic performance of the system will deteriorate. After applying the proposed frequency coupling suppression method that takes into account dynamic performance, the grid-side a phase current waveform is as follows: Figure 7 As shown, the FFT analysis results of the grid-side a phase current are as follows Figure 8 As shown. Figure 8 It can be seen that at this time, the 30Hz disturbance harmonic current content is 1.14%, and the 70Hz coupling harmonic current content is 3.01%. Although the disturbance harmonic current and coupling harmonic current content are slightly increased compared to when only the coupling suppressor Q is applied, the 30Hz harmonic content is reduced by 83.1%, and the 70Hz harmonic content is reduced by 67.6% compared to the traditional control, and it still has a significant frequency coupling suppression effect; and at this time, the total distortion rate of the grid-side current is further reduced to 3.18% compared to when only the coupling suppressor Q is applied, meeting the grid connection criteria. And, by Figure 7 It can be seen that compared with the traditional control, the grid current waveform has a lower overshoot at this time. Compared with the case of adding only the coupling suppressor Q, the adjustment time is reduced from 0.52s to 0.24s, which verifies the dynamic improver G c (s) Improvement of the dynamic performance of the system. In summary, the frequency coupling suppression method for grid-connected inverters taking into account the dynamic performance of the present invention can effectively suppress the frequency coupling effect while taking into account the dynamic performance of the system.

[0085] The technical solution of the present invention is not limited to the above-mentioned specific embodiments. All technical variations made according to the technical solution of the present invention fall within the protection scope of the present invention.

Claims

1. A method for suppressing frequency coupling of a grid-connected inverter taking into account dynamic performance, characterized in that: The following steps are involved: S1. Propose a method including a dynamic improver G c (s) and the frequency coupling suppression method of the coupling suppressor Q; S2. Modular modeling of the improved DC voltage loop and AC current loop is carried out to establish their multi-harmonic linearization models; S3. Based on the proposed frequency coupling control method, considering multiple coupling factors, the output admittance model of the grid-connected inverter is established; The specific steps of step S1 are as follows: S11, Dynamic Improver G c (s): Dynamic Improver G c (s) is introduced into the DC voltage loop, the DC bus voltage V dc With the DC bus voltage given value V dc0 For comparison, the DC voltage loop PI controller G dc (s), and then through the dynamic improver G c (s) Get the output current d-axis component reference value I dr ; Dynamic Improver G c The expression of (s) is: In formula (1), g c and α are the dynamic improvement gain coefficient and correction coefficient respectively; λ is the dynamic improver time constant; S12, coupling suppressor Q: The coupling suppressor Q is a proportional link, which is introduced in the AC current loop through the output current; Taking the d-axis current loop as an example, the d-axis component of the output current I d The feedback coefficient is 1, and the coupling suppressor Q is introduced in parallel, and then compared with the output current d-axis component reference value I dr By comparison, the current loop d-axis PI controller H di (s), the output is the modulated signal d-axis component m d ; The specific steps of step S2 are as follows: S21. Establish a DC voltage loop harmonic linearization model to improve dynamic performance: Based on the single-input dual-output characteristics of the frequency coupling effect, the multi-harmonic linearization method is used for modeling. The DC voltage loop harmonic linearization model for improving dynamic performance is: In formula (2), V1 and I1 represent the fundamental frequency phasors of the grid-connected point voltage and output current; V p is the positive sequence harmonic disturbance of the grid-connected point voltage; I p Represents the output current positive sequence harmonic disturbance; V n is the negative sequence harmonic disturbance of the grid-connected point voltage; I n Represents the negative sequence harmonic disturbance of the output current; the superscript '*' represents the conjugate of the phase quantity; s is the Laplace operator; L represents the filter inductance; I L represents the output current of the DC current source; C is the DC bus capacitance value; V dc0 Indicates the given value of DC bus voltage; f represents frequency; f p is the positive sequence harmonic frequency; f1 is the fundamental frequency; j is an imaginary number; π represents pi; S22. AC current loop harmonic linearization model for suppressing frequency coupled harmonics: After the coupling suppressor Q is introduced, the improved AC current loop harmonic linearization model is: In formula (3), m d is the d-axis component of the modulation signal, m q is the q-axis component of the modulation signal; I qr is the reference value of the q-axis component of the output current; Q is the coupling inhibitor coefficient; I d and I q Represents the d-axis and q-axis components of the output current; H di (s) and H qi (s) are the PI controllers of the current loop d and q axes respectively; K d is the decoupling coefficient; The specific steps of step S3 are as follows: Based on the proposed frequency coupling suppression method, the output admittance model of the grid-connected inverter considering multiple coupling factors[Y inv ] 2×2 : In formula (4), Y 11 is the grid-connected inverter output admittance model [Y inv ] 2×2 Subsystem 1, used to characterize the positive sequence harmonic disturbance of the grid connection point voltage V p The positive sequence harmonic disturbance of the output current I p The impact of Y 12 is the grid-connected inverter output admittance model [Y inv ] 2×2 Subsystem 2, used to characterize the negative sequence harmonic disturbance V of the grid connection point voltage n The positive sequence harmonic disturbance of the output current I p The impact of Y 21 is the grid-connected inverter output admittance model [Y inv ] 2×2 Subsystem 3, used to characterize the positive sequence harmonic disturbance of the grid connection point voltage V p Negative sequence harmonic disturbance of output current I n The impact of Y 22 is the grid-connected inverter output admittance model [Y inv ] 2×2 Subsystem 4, used to characterize the negative sequence harmonic disturbance of the grid connection point voltage V n Negative sequence harmonic disturbance of output current I n The impact of In formula (4), W ip , W in , W vp , W vn , H p , H n Represents the expression associated with the DC voltage loop in the inverter admittance model; W ip It reflects the output current positive sequence harmonic disturbance I p DC voltage disturbance V dcp The expression affected; W in It reflects the negative sequence harmonic disturbance of the output current I n DC voltage disturbance V dcp The expression affected; W vp It reflects the positive sequence harmonic disturbance of the grid connection point voltage V p DC voltage disturbance V dcp The expression affected; W vn It reflects the negative sequence harmonic disturbance of the grid connection point voltage V n DC voltage disturbance V dcp The expression affected; W ip , W in , W vp , W vn The expression is: In formula (4), H p It reflects the DC voltage disturbance V dcp For frequency f p The inverter port output voltage v i Positive sequence harmonic disturbance V ip The expression of influence; H n It reflects the DC voltage disturbance V dcp For frequency f n The inverter port output voltage v i Negative sequence harmonic disturbance V in The expression of influence; H p , H n The expression is: In formula (6), K m is the modulation coefficient; m1 represents the fundamental frequency component of the modulation signal, and m1* is the conjugate value of m1; In formula (4), B 11 , B 12 , B 21 , B 22 is the expression of the phase-locked loop in the inverter admittance model; B 11 Used to characterize the positive sequence harmonic disturbance of the grid connection point voltage V p The output voltage of the inverter port is v i Positive sequence harmonic disturbance V ip The impact of 12 Used to characterize the negative sequence harmonic disturbance of the grid connection point voltage V n The output voltage of the inverter port is v i Positive sequence harmonic disturbance V ip The impact of 21 Used to characterize the positive sequence harmonic disturbance of the grid connection point voltage V p The output voltage of the inverter port is v i Negative sequence harmonic disturbance V in The impact of 22 Used to characterize the negative sequence harmonic disturbance of the grid connection point voltage V n The output voltage of the inverter port is v i Negative sequence harmonic disturbance V in The impact of 11 , B 12 , B 21 , B 22 The expression is: In formula (7), T PLL (s) is the phase-locked loop PI controller transfer function; In formula (4), Q 11 , Q 12 , Q 21 , Q 22 is a set of expressions for the AC current loop in the inverter admittance model; Q 11 Reflects the output current positive sequence harmonic disturbance I p The output voltage of the inverter port is v i Positive sequence harmonic disturbance V ip The impact of Q 12 Reflects the output current negative sequence harmonic disturbance I n The output voltage of the inverter port is v i Positive sequence harmonic disturbance V ip The impact of Q 21 Reflects the output current positive sequence harmonic disturbance I p The output voltage of the inverter port is v i Negative sequence harmonic disturbance V in The impact of Q 22 Reflects the output current negative sequence harmonic disturbance I n The output voltage of the inverter port is v i Negative sequence harmonic disturbance V in The impact of Q 11 , Q 12 , Q 21 , Q 22 The expression is: In formula (8), ω1 is the fundamental angular frequency.

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