Addressing Circuit, Battery Management Unit, Battery Management System, and Energy Storage System

Abstract

The present application provides an addressing circuit, a battery management unit, a battery management system, and an energy storage system. The addressing circuit includes: a control module; a first addressing module coupled to the control module, the first addressing module providing a first addressing interface; a second addressing module coupled to the control module, the second addressing module providing a second addressing interface; wherein, the control module responds to a high level input at one of the first addressing interface and the second addressing interface, performs an addressing operation, uses one as the input end of the battery management unit, and uses the other as the output end of the battery management unit. The output end of the battery management unit is used to connect to the input ends of the remaining battery management units. In the above manner, by using the first addressing module and the second addressing circuit, the input and output of the battery management unit are automatically identified and set, and the battery management unit is automatically addressed to avoid misconnection for any port plugging and unplugging and improve the addressing efficiency of the battery management unit.

Description

Technical Field

[0001] This application mainly relates to the technical field of energy storage systems, and particularly to addressing circuits, battery management units, battery management systems, and energy storage systems. Background Art

[0002] Energy storage systems are all developing towards high-voltage and large-capacity platforms. A system contains numerous battery modules, and each battery module requires a corresponding Battery Management Unit (BMU), abbreviated as BMU, to manage analog quantities such as voltage, temperature, and current. Therefore, an energy storage system often requires multiple BMUs. How to uniformly address and manage these BMUs is an important issue faced in system design. Moreover, during production line production, subsequent application, debugging, and maintenance, it is difficult to distinguish due to a large number of sockets. Therefore, it is also necessary to conduct a separate anti-fooling design for the docking connectors to avoid the risk that the system cannot work properly or even damage the BMU caused by improper manual insertion, which increases the hardware and design costs and brings inconvenience in use at the same time. Summary of the Invention

[0003] The main purpose of this application is to provide an addressing circuit, a battery management unit, a battery management system, and an energy storage system to solve the problems of low addressing efficiency for multiple battery management units in an energy storage system and the need for anti-fooling design for docking connectors to avoid misinsertion, so as to enable the battery management unit to perform two-way automatic addressing without the need for manual distinction between the input end and the output end, thereby realizing arbitrary insertion of the addressing interface, avoiding system anomalies caused by misinsertion of the input end and the output end, and automatically addressing it when detecting an input, greatly improving the addressing efficiency.

[0004] To solve the above problems, this application provides an addressing circuit, a battery management unit, a battery management system, and an energy storage system. The addressing circuit includes: a control module; a first addressing module, coupled to the control module, the first addressing module provides a first addressing interface; a second addressing module, coupled to the control module, the second addressing module provides a second addressing interface; wherein, the control module responds to a high level input on one of the first addressing interface and the second addressing interface, performs an addressing operation, and uses one of them as the input end of the battery management unit and the other as the output end of the battery management unit. The output end of the battery management unit is used to connect to the input ends of the remaining battery management units.

[0005] In one embodiment, the first addressing module or the second addressing module includes: a bidirectional module; a primary side, with the first end of the primary side connected to the first end of the bidirectional module, the second end of the primary side connected to the second end of the bidirectional module, and the third end of the primary side connected to the third end of the bidirectional module; a secondary side, with the first end of the secondary side connected to the fourth end of the bidirectional module, the second end of the secondary side connected to the fifth end of the bidirectional module, and the third end of the secondary side connected to the sixth end of the bidirectional module; wherein, the second end of the bidirectional module is connected to the control module through the primary side, and the fifth end of the bidirectional module is connected to the control module through the secondary side; the sixth end of the bidirectional module serves as the first addressing interface or the second addressing interface through the secondary side.

[0006] In one embodiment, the first addressing module and the second addressing module have the same structure.

[0007] In one embodiment, the primary side includes: a first resistor, with the first end of the first resistor connected to the second end of the bidirectional module and the second end of the first resistor grounded; a first capacitor, with the first end of the first capacitor connected to the first end of the bidirectional module and the second end of the first capacitor grounded; wherein, the third end of the bidirectional module is grounded.

[0008] In one embodiment, the secondary side includes: a second capacitor, with the first end of the second capacitor connected to the fourth end of the bidirectional module and the second end of the second capacitor grounded; a pull-down unit, with the first end of the pull-down unit connected to the fifth end of the bidirectional module, the second end of the pull-down unit connected to the sixth end of the bidirectional module, and the third end of the pull-down unit grounded; a filtering unit, with the first end of the filtering unit connected to the sixth end of the bidirectional module and the second end of the filtering unit grounded; a protection unit, with the first end of the protection unit connected to the third end of the filtering unit, the second end of the protection unit connected to the first addressing interface or the second addressing interface, and the third end of the protection unit grounded; wherein, the control module is connected to the fifth end of the bidirectional module through the pull-down unit.

[0009] In one embodiment, the pull-down unit includes: a second resistor, with the first end of the second resistor connected to the fifth end of the bidirectional module and the second end of the second resistor grounded; a third resistor, with the first end of the third resistor connected to the sixth end of the bidirectional module and the second end of the third resistor grounded.

[0010] In one embodiment, the filtering unit includes: a fourth resistor, with the first end of the fourth resistor connected to the sixth end of the bidirectional module; a third capacitor, with the first end of the third capacitor connected to the second end of the fourth resistor and the second end of the third capacitor grounded.

[0011] In one embodiment, the protection unit includes: a bead, with the first end of the bead connected to the second end of the filtering unit and the second end of the bead connected to the first addressing interface or the second addressing interface; an anti-reverse diode, with the anode of the anti-reverse diode grounded and the cathode of the anti-reverse diode connected to the second end of the bead.

[0012] To solve the above problems, the present application also provides a battery management unit, which includes an addressing circuit as described in any one of the above embodiments.

[0013] To solve the above problems, the present application also provides a battery management system, which includes: a main control module and at least one slave control module, the main control module and at least one slave control module are connected in sequence; each slave control module includes: N communication interfaces, which are used to connect to the main control module for data transmission, or are used to couple to the previous slave control module for data transmission; where N is greater than or equal to 2; an addressing circuit, and the addressing circuit is an addressing circuit as described in any one of the above embodiments.

[0014] To solve the above problems, the present application also provides an energy storage system, which includes: a battery cluster, the battery cluster includes N battery packs, and the N battery packs are connected in series; a battery management system, and the battery management system is a battery management system as described in any one of the above embodiments.

[0015] The present application provides an addressing circuit, a battery management unit, a battery management system, and an energy storage system. The addressing circuit includes: a control module; a first addressing module, coupled to the control module, and the first addressing module provides a first addressing interface; a second addressing module, coupled to the control module, and the second addressing module provides a second addressing interface; where the control module responds to a high level input at one of the first addressing interface and the second addressing interface, performs an addressing operation, and uses one of them as the input end of the battery management unit and the other as the output end of the battery management unit. The output end of the battery management unit is used to connect to the input ends of the remaining battery management units. In this way, the input end and the output end of the battery management unit are determined according to the high level. The addressing interface with the high level input is used as the input end of the battery management unit, and the other addressing interface is used as the output end of the battery management unit, and the addressing circuit is addressed. There is no need to manually distinguish the input end and the output end, so that the addressing interface can be inserted arbitrarily, avoiding system anomalies caused by incorrect insertion of the input end and the output end, and automatically addressing it when an input is detected, greatly improving the efficiency of addressing. Description of the Drawings

[0016] To more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the following drawings are only some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained according to these drawings. Among them:

[0017] Figure 1 It is a schematic structural diagram of the first embodiment of the addressing circuit provided by the present application;

[0018] Figure 2 It is a schematic structural diagram of the first addressing module or the first embodiment of the second addressing module provided by this application;

[0019] Figure 3 It is a schematic structural diagram of the second embodiment of the first addressing module or the second addressing module provided by this application;

[0020] Figure 4 It is a schematic structural diagram of the third embodiment of the first addressing module or the second addressing module provided by this application;

[0021] Figure 5 It is a schematic structural diagram of the fourth embodiment of the first addressing module or the second addressing module provided by this application;

[0022] Figure 6 It is a schematic structural diagram of the fifth embodiment of the first addressing module or the second addressing module provided by this application;

[0023] Figure 7 It is a schematic structural diagram of an embodiment of the battery management unit provided by this application;

[0024] Figure 8 It is a schematic structural diagram of an embodiment of the battery management system provided by this application;

[0025] Figure 9 It is a schematic structural diagram of an embodiment of the energy storage system provided by this application;

[0026] Figure 10 It is a schematic diagram of the first control logic step in an embodiment of the energy storage system provided by this application;

[0027] Figure 11 It is a schematic diagram of the second control logic step in an embodiment of the energy storage system provided by this application.

[0028] Reference numerals in the drawings:

[0029] Addressing circuit 100; control module 10; single-chip microcomputer 11; memory 12; first addressing module 20a; second addressing module 20b; bidirectional module 21; primary side 22; secondary side 23; pull-down unit 231; filtering unit 232; protection unit 233; first resistor R1; second resistor R2; third resistor R3; fourth resistor R4; first capacitor C1; second capacitor C2; third capacitor C3; magnetic bead L; reverse protection diode D1; battery management unit 200; battery management system 300; main control module 310; slave control module 320; energy storage system 400; battery cluster 410; battery pack 420. Detailed implementation manners

[0030] The following will clearly and completely describe the technical solutions in the embodiments of the present application with reference to the accompanying drawings in the embodiments of the present application. It can be understood that the specific embodiments described herein are only used to explain the present application, rather than limiting the present application. Additionally, it should be noted that for the convenience of description, only the parts related to the present application rather than all the structures are shown in the accompanying drawings. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in the present application without making creative efforts fall within the scope of protection of the present application.

[0031] The terms "first", "second", etc. in the present application are used to distinguish different objects, rather than to describe a specific order. In addition, the terms "comprising" and "having" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device that includes a series of steps or units is not limited to the listed steps or units, but optionally further includes steps or units not listed, or optionally further includes other steps or units inherent to these processes, methods, products, or devices.

[0032] Referring to "embodiments" herein means that the specific features, structures, or characteristics described in connection with the embodiments may be included in at least one embodiment of the present application. The phrase appears in various places in the specification and does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment mutually exclusive with other embodiments. Those skilled in the art will explicitly and implicitly understand that the embodiments described herein may be combined with other embodiments.

[0033] In related technologies, a controller of a battery management system for energy storage usually consists of large-scale integrated circuits such as a central processing unit, a memory, an input / output interface, an analog-to-digital converter, an integer circuit, a driving circuit, etc. The automatic addressing module of a slave control module (BATTERY MANAGEMENT UNIT, BMU) of a common battery management system (BMS) uses hard-wired connections. The general structure is that the hard-wired connection of the master control module (BATTERYCLUSTER UNIT, BCU) of the battery management system is connected to the first slave control module of the battery management system, and the remaining slave control modules are connected in sequence to form a "string" in the physical structure, and then the hard-wired connection of the last slave control module is connected back to the master control module to form a "loop". Based on this connection structure, under the leadership of the master control module, the starting point of the automatic addressing of the slave control module must be the first slave control module that receives signals directly connected to the master control module. Limited by the physical connection sequence, if a specific slave control module in the string needs to be specified as the addressing starting point, it is difficult to implement the automatic addressing module under this connection structure. It can be seen from this that in the prior art, the process of automatic addressing of the slave control module of the battery management system is not flexible enough. Moreover, in subsequent application, maintenance, debugging and other processes, flexible adjustment of the plug-ins is required. Therefore, when facing multiple plug-in interfaces, there may be human errors, such as reversing the input and output ends, which may cause system anomalies. Therefore, physical anti-fooling designs are usually made for the interfaces of the plug-ins to avoid misoperations by users, but this will increase the trouble of hardware design and the inconvenience in use.

[0034] Therefore, the present application provides an addressing circuit, a battery management unit, a battery management system and an energy storage system to solve the above problems.

[0035] Refer to Figure 1 as shown Figure 1 is a schematic structural diagram of a first embodiment of the addressing circuit provided by the present application; specifically, the addressing circuit 100 includes: a control module 10, a first addressing module 20a and a second addressing module 20b; wherein, the first addressing module 20a is coupled to the control module 10, and the first addressing module 20a provides a first addressing interface; the second addressing module 20b is coupled to the control module 10, and the second addressing module 20b provides a second addressing interface; wherein, the control module 10 responds to a high level input from one of the first addressing interface and the second addressing interface, performs an addressing operation, and uses one of them as the input end of the battery management unit and the other as the output end of the battery management unit. The output end of the battery management unit is used to connect to the input ends of the remaining battery management units.

[0036] In the above solution, both the first addressing module 20a and the second addressing module 20b in the addressing circuit 100 can implement the input function when no signal is connected. However, when any one of the first addressing module 20a or the second addressing module 20b receives a high level input from the outside, the control module 10 is used to address the addressing circuit 100, and the other addressing module is controlled by the control module 10 to act as an output. Thus, the insertion of any input and output ends of the two interfaces is realized. The addressing circuit 100 will perform automatic conversion according to the input level signal, thereby avoiding the misinsertion of the interface and realizing any plugging and unplugging of the plug-in, which facilitates the subsequent after-sales service and use of personnel; further, when a high level is input at one of the first addressing interface and the second addressing interface, the control module 10 is used to perform the addressing operation on it, which can facilitate the realization of the automatic addressing function in the test environment and greatly improve the programming efficiency.

[0037] For the above solution, the specific implementation solutions of the first addressing module 20a and the second addressing module 20b are further described in detail in other embodiments. The specific solutions are as follows:

[0038] In one embodiment, as Figure 2 shown, Figure 2 is a schematic structural diagram of an embodiment of the first addressing module or the second addressing module provided by the present application; wherein, the first addressing module 20a or the second addressing module 20b includes: a bidirectional module 21, a primary side 22 and a secondary side 23; specifically, the first end of the primary side 22 is connected to the first end of the bidirectional module 21, the second end of the primary side 22 is connected to the second end of the bidirectional module 21, and the third end of the primary side 22 is connected to the third end of the bidirectional module 21; the first end of the secondary side 23 is connected to the fourth end of the bidirectional module 21, the second end of the secondary side 23 is connected to the fifth end of the bidirectional module 21, and the third end of the secondary side 23 is connected to the sixth end of the bidirectional module 21; wherein, the second end of the bidirectional module 21 is connected to the control module 10 through the primary side 22, and the fifth end of the bidirectional module 21 is connected to the control module 10 through the secondary side 23; the sixth end of the bidirectional module 21 serves as the first addressing interface or the second addressing interface through the secondary side 23.

[0039] Among them, the bidirectional module 21 combines with the control module 10 to realize the change of the data direction, as Figure 2As shown, in the initial state: when no external signal (high level) is received at the sixth terminal of the bidirectional module 21, that is, the first addressing interface or the second addressing interface, the second, fifth, and sixth terminals of the bidirectional module 21 are all at low level. At this time, the data flow direction of the bidirectional module 21 is from the sixth terminal to the second terminal. The control module 10 monitors the input status of the first addressing interface or the second addressing interface in real time by reading the level of the second terminal of the bidirectional module 21. At this time, both the first addressing interface and the second addressing interface are inputs. When a signal is input: when an external signal (high level) is received at the sixth terminal of the bidirectional module 21, that is, the first addressing interface or the second addressing interface, when the control module 10 reads that the second terminal of the bidirectional module 21 is at high level, it writes its address into the memory. At the same time, the control module 10 controls the fifth terminal of the bidirectional module 21 in another addressing module to be at high level, and sets the data flow direction of its bidirectional module 21 to be from the second terminal to the sixth terminal, and sets the second terminal to be at high level. Thus, the addressing interface of this addressing module becomes a high-level output. The bidirectional module 21 can be a COMOS device in one embodiment, used for bidirectional logic control. The bidirectional module 21 can also be an integrated gate circuit device with the function of level conversion, powered by 3.3V on the primary side and 5V on the secondary side. In another embodiment, discrete devices such as triodes can also be used to implement it.

[0040] In one embodiment, the first addressing module 20a and the second addressing module 20b have the same structure. From the above embodiment solution, it can be seen that by using the bidirectional module 21 in combination with the primary and secondary sides, and then controlling the bidirectional module 21 through the control module 10 to realize the commutation of the data flow. Therefore, in one embodiment solution, the first addressing module 20a and the second addressing module 20b have the same structure and can also implement the above technical solution.

[0041] The primary side 22 and the secondary side 23 in the first addressing module 20a or the second addressing module 20b are described in the following in another embodiment solution:

[0042] In one embodiment, as Figure 3 shown, Figure 3 is a schematic structural diagram of the second embodiment of the first addressing module or the second addressing module provided by the present application; the primary side 22 includes: a first resistor R1 and a first capacitor C1; the first end of the first resistor R1 is connected to the second terminal of the bidirectional module 21, and the second end of the first resistor R1 is grounded; the first end of the first capacitor C1 is connected to the first terminal of the bidirectional module 21, and the second end of the first capacitor C1 is grounded; wherein, the third terminal of the bidirectional module 21 is grounded.

[0043] Among them, the first capacitor C1 is the primary side power decoupling capacitor of the bidirectional module 21, and the first resistor R1 is a pull-down resistor. By the first capacitor C1 and the first resistor R1, it can be ensured that in the initial state, the second terminal network of the bidirectional module 21 is at low level.

[0044] In one embodiment, as Figure 4 shown, Figure 4 is a schematic structural diagram of the third embodiment of the first addressing module or the second addressing module provided by the present application; the secondary side 23 includes: a second capacitor C2, a pull-down unit 231, a filtering unit 232, and a protection unit 233; the first end of the second capacitor C2 is connected to the fourth end of the bidirectional module 21, and the second end of the second capacitor C2 is grounded; the first end of the pull-down unit 231 is connected to the fifth end of the bidirectional module 21, the second end of the pull-down unit 231 is connected to the sixth end of the bidirectional module 21, and the third end of the pull-down unit 231 is grounded; the first end of the filtering unit 232 is connected to the sixth end of the bidirectional module 21, and the second end of the filtering unit 232 is grounded; the first end of the protection unit 233 is connected to the third end of the filtering unit 232, the second end of the protection unit 233 is connected to the first addressing interface or the second addressing interface, and the third end of the protection unit 233 is grounded; wherein, the control module 10 is connected to the fifth end of the bidirectional module 21 through the pull-down unit 231.

[0045] Similarly, the second capacitor C2 and the pull-down unit 231 can ensure that the network at the sixth end of the bidirectional module 21 is at a low level in the initial state. The filtering unit 232 is used to eliminate the transient interference generated during the data stream switching of the bidirectional module 21, while the protection unit 233 is used for electrostatic protection to avoid damage to components caused by electrostatic discharge at the port.

[0046] Among them, the specific implementation solutions for the unit structures in the above embodiments are as follows:

[0047] As Figure 5 shown, Figure 5 is a schematic structural diagram of the fourth embodiment of the first addressing module or the second addressing module provided by the present application. In one embodiment, the pull-down unit 231 includes: a second resistor R2 and a third resistor R3. The first end of the second resistor R2 is connected to the fifth end of the bidirectional module 21, and the second end of the second resistor R2 is grounded; the first end of the third resistor R3 is connected to the sixth end of the bidirectional module 21, and the second end of the third resistor R3 is grounded.

[0048] It can be understood that both the second resistor R2 and the third resistor R3 are used as pull-down resistors to ensure that the port is at a low level in the initial state.

[0049] In one embodiment, as Figure 5 , the filtering unit 232 includes: a fourth resistor R4 and a third capacitor C3; the first end of the fourth resistor R4 is connected to the sixth end of the bidirectional module 21; the first end of the third capacitor C3 is connected to the second end of the fourth resistor R4, and the second end of the third capacitor C3 is grounded.

[0050] A low-pass filter is formed by the fourth resistor R4 and the third capacitor C3 in the above to eliminate the instantaneous interference caused by the circuit state switching in the circuit, thereby affecting the signals in the circuit.

[0051] In one embodiment, as Figure 5 , the protection unit 233 includes: a magnetic bead L and an anti-reverse diode D1; the first end of the magnetic bead L is connected to the second end of the filtering unit 232, and the second end of the magnetic bead L is connected to the first addressing interface or the second addressing interface; the anode of the anti-reverse diode D1 is grounded, and the cathode of the anti-reverse diode D1 is connected to the second end of the magnetic bead L.

[0052] In the above embodiment, the magnetic bead L combined with the anti-reverse diode D1 is used for electrostatic protection; among them, the magnetic bead L (Ferrite Bead): The magnetic bead L is a passive component used to suppress high-frequency noise in the circuit. Among them, the anti-reverse diode D1 uses a TVS. TVS (Transient Voltage Suppressor) is a high-efficiency circuit protection device made by semiconductor technology and usually includes a single PN junction or multiple PN junctions.

[0053] Combined with the above solution and Figure 6 as shown, Figure 6 is a schematic structural diagram of the fifth embodiment of the first addressing module or the second addressing module provided by the present application; the upper part of the figure is the first addressing module 20a or the second addressing module 20b, and the lower part of the figure is the control module 10; the TVS is one of the embodiments of the above anti-reverse diode D1; among them, in one embodiment, the control module 10 in the above embodiment includes: a single-chip microcomputer 11 and a memory 12; specifically, the first end of the single-chip microcomputer 11 is connected to the second end of the bidirectional module 21, and the second end of the single-chip microcomputer 11 is connected to the fifth end of the bidirectional module 21; the memory 12 is connected to the single-chip microcomputer 11; among them, the single-chip microcomputer 11 controls the reverse transmission of the data stream of its bidirectional module 21, and the addressing information of the addressing module is stored in the memory 12 therein. Among them, IIC usually refers to "Inter-Integrated Circuit", that is, the I²C (Inter-IC) bus protocol, which is a widely used serial communication protocol for connecting microcontrollers and other integrated circuits.

[0054] Among them, MCU_IO and MCU_DIR are correspondingly connected to two ports of the single-chip microcomputer 11; the specific implementation process is as follows: The bidirectional module 21 includes six ports on the primary side 22 and the secondary side 23. Among them, the first end and the fourth end of the bidirectional module 21 are the power supply 3.3V and 5V network numbers, the second end and the sixth end are the input / output networks, and the third end and the fifth end are the DIR and GND networks (the DIR end is connected to the control module 10, and GND is grounded). Further, the primary side 22 (3.3V) is grounded through the first capacitor C1; the second end is grounded through the first resistor R1 and is simultaneously connected to the control module 10; the secondary side 23 (5V) is grounded through the second capacitor C2, the sixth end is grounded through the third resistor R3, and at the same time, one end of the fourth resistor R4 is connected in series. The other end of the fourth resistor R4 is grounded through the third capacitor C3, and at the same time, the other end of the fourth resistor R4 is connected in series with the magnetic bead L, and the other end of the magnetic bead L is connected to the automatic addressing interface (that is, the first addressing interface or the second addressing interface, Addr_IO); among them, the third resistor R3 and the third capacitor C3 constitute an RC filter circuit, the magnetic bead L is used to improve EMI (electromagnetic interference), and the anti-reverse diode D1 is used to protect the interface from static electricity.

[0055] Regarding the control of the input or output of the data stream by the bidirectional module 21, it is implemented through software configuration and is determined by the level value of the fifth end of the bidirectional module 21. Specifically: when the fifth end is at a low level, the data stream is from right to left, from the B end to the A end, that is, the sixth end of the bidirectional module 21 (the part connected to the addressing interface) is the input, and the second end of the bidirectional module 21 (the part connected to the control module 10) is the input; when the fifth end is at a high level, the data stream is from left to right, from the A end to the B end, that is, the sixth end of the bidirectional module 21 (the part connected to the addressing interface) is the output, and the second end of the bidirectional module 21 (the part connected to the control module 10) is the output.

[0056] To solve the above problems, the present application also provides a battery management unit 200. Refer to Figure 7 as shown in Figure 7 is a schematic structural diagram of an embodiment of the battery management unit provided by the present application; the battery management unit 200 includes the addressing circuit 100 described in any one of the above embodiments.

[0057] By the above method, the input end and the output end of the battery management unit 200 are determined according to the high level. The addressing interface with the input high level is used as the input end of the battery management unit 200, and the other addressing interface is used as the output end of the battery management unit 200, and the addressing circuit 100 is addressed. There is no need to manually distinguish the input end and the output end, thus realizing the arbitrary insertion of the addressing interface, avoiding system anomalies caused by the misinsertion of the input end and the output end, and automatically addressing it when the input is detected, greatly improving the addressing efficiency.

[0058] To solve the above problems, the present application also provides a battery management system 300, as shown in Figure 8 shown. Figure 8 FIG. Figure 8 is a schematic structural diagram of an embodiment of the battery management system provided by the present application; the battery management system 300 includes: a main control module 310 and at least one slave control module 320, and the main control module 310 and the at least one slave control module 320 are connected in sequence; each slave control module 320 includes: N communication interfaces, which are used to connect to the main control module 310 for data transmission, or are used to be coupled to the previous slave control module 320 for data transmission; wherein, N is greater than or equal to 2; an addressing circuit 100, and the addressing circuit 100 is the addressing circuit 100 described in any one of the above embodiments.

[0059] It can be understood that the slave control module 320 therein is the BMU described above, wherein the BMU power supply and CAN communication are connected, and the automatic assembly ports of the slave control module 320 are connected end to end, and the automatic assembly ports of the first and slave control modules 320 are connected to the IO output interface of the main control, as shown in Figure 8 shown; adjacent slave control modules 320 are coupled to transmit data through communication interfaces, and the slave control modules 320 are arranged inside or on the surface of the battery cluster, and are connected to the battery cells in the PACK through a wire harness, and are used to collect information such as the voltage and temperature of the battery cells in the PACK.

[0060] The main control unit is connected to the slave control module 320 through the power supply / CAN and the addressing interface (i.e., the first addressing interface or the second addressing interface), and is used to address the slave control module 320, and collect information such as voltage and temperature in the slave control module 320 through CAN, and perform estimations such as SOC and SOH. Among them, CAN (Controller Area Network) is a commonly used serial communication protocol, which is used to connect each module in the battery management system 300 (BMS), such as the battery monitoring unit (BMU), the energy management system (EMS), etc. The CAN communication protocol supports distributed control or real-time control, and provides an effective way to monitor and control the state of the battery system. SOC (State of Charge) is a key parameter in the battery management system 300, which represents the percentage of the current remaining battery charge. SOC is an important parameter for the battery management system 300 to estimate the remaining battery charge and predict the battery life, usually expressed as a percentage, ranging from 0% (fully discharged) to 100% (fully charged). SOH (State of Health) is another important battery parameter, which reflects the health status and remaining life of the battery. SOH is usually used to estimate the state of the battery's capacity, internal resistance, power, and energy, etc., and is the basis for the battery management system 300 to predict the battery performance and maintenance plan.

[0061] Combined with the solutions of the above embodiments, regarding the automatic addressing process: when the high-level output of the master control module 310 is connected to any one of the addressing interfaces of the first slave control module 320 (i.e., the first slave control module 320), the addressing interface is configured as an input, and the address is written into the memory 12 of the control module 10 in the slave control module 320 through CAN communication. At the same time, the other addressing interface of the slave control module 320 is set as an output, and the second slave control module 320 is addressed through CAN communication, and so on, until the addressing of the last slave control module 320 is completed.

[0062] To solve the above problems, the present application also provides an energy storage system 400, refer to Figure 9 as shown in Figure 9 is a schematic structural diagram of an embodiment of the energy storage system provided by the present application; the energy storage system 400 includes: a battery cluster 410, the battery cluster 410 includes N battery packs 420, and the N battery packs 420 are connected in series; a battery management system 300, and the battery management system 300 is the battery management system 300 described in any one of the above embodiments.

[0063] Among them, a battery PACK (i.e., the battery cluster 410) is formed by connecting multiple battery cells (i.e., battery packs 420) in series. Optionally, the battery cells are lithium-ion monomer battery cells, and the materials of the monomer battery cells include, but are not limited to, lithium iron phosphate or ternary lithium and other materials; in one embodiment, the total voltage of the battery cluster 410 is as high as 1500V.

[0064] When applying the above solutions to the energy storage system 400, for its automatic addressing process:

[0065] It can be understood that the addressing circuit 100 in the slave control module 320 includes a first addressing interface and a second addressing interface, and the wiring harnesses therein can be plugged and unplugged arbitrarily, that is, the high level (5V) output by the master control module 310 can be connected to any one of the addressing interfaces in the addressing circuit 100 in the slave control module 320, that is, the first addressing interface or the second addressing interface, and the other interface is set as an output. Correspondingly, in the next-level slave control module 320, similarly, the interface set as an output last can be connected to any one of the addressing interfaces of this slave control module 320, that is, the first addressing interface and the second addressing interface can be plugged and unplugged arbitrarily between each other.

[0066] In the initial state: due to the function of the pull-down resistor in the circuit, the second, fifth, and sixth ends of the bidirectional module 21 are all at a low level, and the data flow direction of the bidirectional module 21 is transmitted from the sixth end to the second end. The single-chip microcomputer 11 in the control module 10 monitors the input state of the sixth end (i.e., the addressing interface) in real time by reading the level value of the second end; similarly, the corresponding two ports in the other addressing module are also inputs.

[0067] When receiving a high level (5V) from the master control module 310: When the high level output by the master control module 310 is connected to any addressing interface of the first slave control module 320, it is recorded as the first addressing module 20a and the first addressing interface, and the first address of the first slave control module 320 is written into the memory 12 in the control module 10 through CAN communication (i.e., the communication interface). At the same time, the single-chip microcomputer 11 in the control module 10 controls the fifth end of the bidirectional module 21 in another addressing module (i.e., the second addressing module 20b corresponding to the first addressing module 20a) to be set to a high level, where the data flow direction is from the second end to the sixth end, and the second end is set to a high level through software, and the sixth end (i.e., the second addressing interface) of the second addressing module 20b becomes a high level output.

[0068] In the above manner, when the second slave control module 320 receives the high level output by the first slave control module 320, the master control module 310 addresses the second slave control module 320 through CAN communication; then addresses the subsequent slave control modules 320 in sequence until all the slave control modules 320 are correctly addressed.

[0069] It can be understood that, among them, the master control module 310 outputting a high level (5V) can also be output by a 5V power supply, independent of the master control module 310. In the subsequent actual test environment, only one 5V voltage source is required to complete the addressing of N BMU (slave control modules 320), greatly improving the convenience of addressing the slave control modules 320, and having certain popularization value and economic benefits in practical applications.

[0070] As Figure 10 shown, Figure 10 is a schematic diagram of the first control logic step in an embodiment of the energy storage system provided by the present application; among them, it mainly includes the following steps:

[0071] During the start of the automatic addressing program, the master control or the power supply outputs a low level (0V), and the system is in the initial state at this time, that is, in the first addressing module 20a and the second addressing module 20b, the fifth end of the bidirectional module 21 is set to a low level, and the first addressing interface and the second addressing interface are set to inputs.

[0072] When the master control module 310 or the power supply outputs a high level (5V), in response to different addressing modules receiving signals, there are different step flows as follows:

[0073] Step S10: In response to the first addressing interface of the first addressing module 20a receiving an input high level, the control module 10 reads the fifth end of the bidirectional module 21 coupled to one side through the secondary side 23 as a high level.

[0074] Step S20: Write the address into the memory 12 in the control module 10 through CAN communication, and display that the addressing of #m(n) is successful.

[0075] Step S30: Set the fifth terminal and the second terminal of the bidirectional module 21 in the second addressing module 20b to high level, and set the second terminal of the bidirectional module 21 in the first addressing module 20a to output.

[0076] Step S40: When m is greater than n, the addressing ends; where n is the number of slave control modules 320, and m is the serial number increasing sequentially starting from 1.

[0077] Step S50: Set the fifth terminal and the second terminal of the bidirectional module 21 in the first addressing module 20a and the second addressing module 20b to low level, that is, restore the initial state.

[0078] It can be understood that for the case where the second addressing module 20b is accessed at the beginning (that is, in response to the second addressing interface of the second addressing module 20b receiving the input high level, the control module 10 reads the high level through the side of the fifth terminal of the bidirectional module 21 coupled by the secondary side 23), the process flow is the same, only the setting order is different. As Figure 11 shown, Figure 11 is the schematic diagram of the second control logic steps in an embodiment of the energy storage system provided by the present application; specifically including the following steps:

[0079] Step S11: In response to the second addressing interface of the second addressing module 20b receiving the input high level, the control module 10 reads the high level through the side of the fifth terminal of the bidirectional module 21 coupled by the secondary side 23.

[0080] Step S21: Write the address into the memory 12 in the control module 10 through CAN communication, and display that the addressing of #m(n) is successful.

[0081] Step S31: Set the fifth terminal and the second terminal of the bidirectional module 21 in the first addressing module 20a to high level, and set the second terminal of the bidirectional module 21 in the second addressing module 20b to output.

[0082] Step S41: When m is greater than n, the addressing ends; where n is the number of slave control modules 320, and m is the serial number increasing sequentially starting from 1.

[0083] Step S51: Set the fifth terminal and the second terminal of the bidirectional module 21 in the first addressing module 20a and the second addressing module 20b to low level, that is, restore the initial state.

[0084] Among them, the high level (5V) output by the main control module 310 in the above implementation can be output from the IO port of the main control module 310 or directly output 5V by the power supply; in the above real-time example, the main control module 310 can be implemented by a secondary main control board with CAN communication or by a PC with a CAN tool.

[0085] The present application provides an addressing circuit 100, which includes: a control module 10, a first addressing module 20a, and a second addressing module; wherein, the first addressing module 20a is coupled to the control module 10, and the first addressing module 20a provides a first addressing interface; the second addressing module 20b is coupled to the control module 10, and the second addressing module 20b provides a second addressing interface; wherein, the control module 10 responds to a high level input from one of the first addressing interface and the second addressing interface, performs an addressing operation, uses one as the input end of the battery management unit 200, and uses the other as the output end of the battery management unit 200. The output end of the battery management unit 200 is used to connect to the input ends of the remaining battery management units 200.

[0086] In the above manner, when an input signal is received through any addressing interface of the first addressing module 20a or the second addressing module 20b, the addressing interface of the other addressing module is controlled to be the output, and the addressing circuit 100 is addressed, so as to realize the insertion of the interface at any end, avoid the system abnormality caused by the misinsertion of the input and output ends caused by humans, and automatically address it when an input is detected, greatly improving the addressing efficiency. During actual production or test maintenance, the cables of the first or second addressing ports can be plugged in arbitrarily without special anti-fooling treatment, which can improve production efficiency and prevent safety risks caused by incorrect connection; and any 5V power supply output can be used to replace the 5V output of the main control unit, without relying on the main control unit, which can simplify the test environment and improve the test efficiency.

[0087] The above has introduced the embodiments of the present application in detail. Specific examples are used in this article to elaborate on the principle and implementation manner of the present application. The description of the above embodiments is only used to help understand the method and its core idea of the present application; at the same time, for those skilled in the art, according to the idea of the present application, there will be changes in the specific implementation manner and application scope. In summary, the content of this specification should not be construed as a limitation to the present application.

Claims

1. An addressing circuit, characterized in that, Applied to a battery management unit, the addressing circuit includes: A control module; A first addressing module, coupled to the control module, the first addressing module providing a first addressing interface; A second addressing module, coupled to the control module, the second addressing module providing a second addressing interface; Wherein, the control module responds to a high level input at one of the first addressing interface and the second addressing interface, performs an addressing operation, and uses the one as the input end of the battery management unit and the other as the output end of the battery management unit. The output end of the battery management unit is used to connect to the input ends of the remaining battery management units; The first addressing module or the second addressing module includes: a bidirectional module; a primary side, the primary side includes: a first resistor, a first end of the first resistor is connected to a second end of the bidirectional module, and a second end of the first resistor is grounded; a first capacitor, a first end of the first capacitor is connected to a first end of the bidirectional module, and a second end of the first capacitor is grounded; wherein, a third end of the bidirectional module is grounded; a secondary side, the secondary side includes: a second capacitor, a first end of the second capacitor is connected to a fourth end of the bidirectional module, and a second end of the second capacitor is grounded; a pull-down unit, a first end of the pull-down unit is connected to a fifth end of the bidirectional module, a second end of the pull-down unit is connected to a sixth end of the bidirectional module, and a third end of the pull-down unit is grounded; a filtering unit, a first end of the filtering unit is connected to the sixth end of the bidirectional module, and a second end of the filtering unit is grounded; a protection unit, a first end of the protection unit is connected to a third end of the filtering unit, a second end of the protection unit is connected to the first addressing interface or the second addressing interface, and a third end of the protection unit is grounded; wherein, the control module is connected to the fifth end of the bidirectional module through the pull-down unit.

2. The addressing circuit according to claim 1, wherein The first addressing module and the second addressing module have the same structure.

3. The addressing circuit according to claim 1, wherein The pull-down unit includes: A second resistor, a first end of the second resistor is connected to the fifth end of the bidirectional module, and a second end of the second resistor is grounded; A third resistor, a first end of the third resistor is connected to the sixth end of the bidirectional module, and a second end of the third resistor is grounded.

4. The addressing circuit according to claim 1, wherein The filtering unit includes: A fourth resistor, a first end of the fourth resistor is connected to the sixth end of the bidirectional module; A third capacitor, a first end of the third capacitor is connected to a second end of the fourth resistor, and a second end of the third capacitor is grounded.

5. The addressing circuit according to claim 1, wherein The protection unit includes: A bead, a first end of the bead is connected to a second end of the filtering unit, and a second end of the bead is connected to the first addressing interface or the second addressing interface; An anti-reverse diode, an anode end of the anti-reverse diode is grounded, and a cathode end of the anti-reverse diode is connected to a second end of the bead.

6. A battery management unit, characterized in that, The battery management unit includes the addressing circuit according to any one of claims 1-5.

7. A battery management system, characterized in that, The battery management system includes: a main control module and at least one slave control module, the main control module and the at least one slave control module are connected in sequence; Each of the slave control modules includes: N communication interfaces, which are used to connect to the master control module for data transmission or to couple to the previous slave control module for data transmission; where N is greater than or equal to 2; An addressing circuit, where the addressing circuit is the addressing circuit according to any one of claims 1-5.

8. A energy storage system, characterized in that, The energy storage system includes: A battery cluster, where the battery cluster includes N battery packs, and the N battery packs are connected in series; A battery management system, where the battery management system is the battery management system according to claim 7.

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