A chip temperature dynamic control system and chip

Abstract

The present invention discloses a chip temperature dynamic control system and a chip. The system is configured on the chip to be controlled, and includes: a processor, a clock module, an interrupt control module, a storage module and a task issuing module; the processor is respectively connected to the clock module, the interrupt control module, the storage module and the task issuing module, and the storage module is connected to the task issuing module. In the embodiment of the present invention, three frequency modulation and voltage regulation methods are provided to dynamically control the chip power consumption. By defining the frequency gear, the interrupt mask bit and the synchronization flag bit in the descriptor, the frequency modulation and voltage regulation process is limited in three stages, which provides the possibility for the subsequent expansion of the system; the chip working state is mastered by polling and reading the temperature and voltage module to ensure that the chip works in a safe temperature and voltage environment; the interrupt signal is generated by real-time monitoring of the change situation, and the real-time dynamic frequency modulation and voltage regulation is realized, which improves the safety and reliability of the chip.

Description

Technical Field

[0001] The present invention relates to the field of integrated circuit control technology, and in particular to a chip temperature dynamic control system and a chip. Background Art

[0002] In recent years, with the development of integrated circuit technology, the nominal operating voltage of the chip has become unchanged, but the number of transistors in a single chip is still gradually increasing, which leads to higher and higher chip power consumption. At the same time, the power consumption problem brings about the chip temperature problem. Excessive chip temperature will have a serious impact on the chip, and will also increase the chip heat dissipation cost and packaging cost.

[0003] The high power consumption and high short-term peak power consumption of the chip make its power consumption and heat dissipation control face great challenges. The chip dynamic voltage and frequency scaling (DVFS) technology is a power management technology used to dynamically manage chip voltage and frequency. Although DVFS technology provides the potential for energy saving and temperature control, reducing frequency and voltage will lead to performance degradation. Summary of the invention

[0004] Based on this, the present invention provides a chip temperature dynamic control system and a chip to solve the problem of chip performance degradation caused by traditional chip dynamic voltage frequency scaling (DVFS) technology when managing chip power consumption.

[0005] In a first aspect, an embodiment of the present invention provides a chip temperature dynamic control system, which is configured on a chip to be controlled, and the system includes: a processor, a clock module, an interrupt control module, a storage module, and a task issuing module;

[0006] The processor is connected to the clock module, the interrupt control module, the storage module and the task issuing module in communication with each other, and the storage module is connected to the task issuing module in communication with each other;

[0007] A storage module is used to store tasks to be calculated, wherein the tasks include a dynamic voltage frequency adjustment DVFS descriptor, and the DVFS descriptor defines three gears, including the frequency gear required for the task, an interrupt mask bit, and a synchronization flag bit;

[0008] The task issuing module is used to obtain tasks from the storage module and issue them to the task processing module of the chip to be regulated in sequence. If the frequency regulation condition is determined to be met according to the difference between the frequency level required for the current task to be issued and the most recently issued task, a first type of interrupt signal is generated;

[0009] An interrupt control module, for reporting a first-class interrupt matching the first-class interrupt signal to the processor when the first-class interrupt signal is detected, so that the processor performs frequency modulation processing;

[0010] The processor is used to determine the first type of clock frequency adjustment strategy according to the required frequency gear of the current task to be issued obtained from the task issuing module when the first type of interrupt is detected, and adjust the frequency of the clock module according to the first type of clock frequency adjustment strategy;

[0011] The clock module is used to control the chip to be regulated to operate at a matching clock frequency in response to the frequency adjustment of the processor.

[0012] Further, the target state value of the interrupt mask bit is used to describe whether reporting of the first type of interrupt signal is allowed;

[0013] Correspondingly, the task issuing module is specifically used to: if it is detected that the frequency gear required for the current task to be issued is different from the frequency gear required for the most recently completed task to be issued, and the interrupt mask bit of the current task to be issued is at the target state value, it is determined that the frequency modulation condition is met.

[0014] Furthermore, the first state value of the synchronization flag is used to describe that synchronization waiting is required, and the second state value of the synchronization flag is used to describe that synchronization waiting is not required;

[0015] The task issuing module is further used to: after generating the first type of interrupt signal, set the matching DVFS interrupt register to 1;

[0016] The processor is further configured to: after completing the frequency adjustment of the clock module, clear the DVFS interrupt register;

[0017] The task sending module is also used to: after generating the first type of interrupt signal, detect whether the state value of the synchronization flag bit of the current task to be sent is the first state value: if so, when it is determined that the DVFS interrupt register is cleared, send the current task to be sent to the task processing module of the chip to be regulated; otherwise, directly send the current task to be sent to the task processing module of the chip to be regulated.

[0018] Furthermore, the system may also include: a plurality of temperature voltage modules and an adaptive voltage module respectively connected to the processor;

[0019] Among them, each temperature and voltage module is set at a different position on the chip to be regulated, and the adaptive voltage module is used to connect with the power management module on the chip to be regulated; each temperature and voltage module contains a sensor for temperature and voltage in the surrounding environment;

[0020] Each temperature and voltage module is used to monitor the temperature and voltage of the chip to be regulated in real time, and generate a second type of interrupt signal when the real-time temperature value exceeds the first threshold, and generate a third type of interrupt signal when the real-time voltage value exceeds the second threshold;

[0021] The interrupt control module is further used to report the second type of interrupt matching the second type of interrupt signal to the server when the second type of interrupt signal is detected, so that the processor can perform frequency modulation processing; when the third type of interrupt signal is detected, report the third type of interrupt matching the third type of interrupt signal to the server, so that the processor can perform voltage regulation processing;

[0022] The processor is further configured to execute the second type of clock frequency adjustment strategy on the clock module when the second type of interrupt signal reported by the interrupt controller is detected, and adjust the frequency of the clock module according to the second type of clock frequency adjustment strategy; and send the first type of voltage adjustment strategy to the adaptive voltage module when the third type of interrupt signal reported by the interrupt controller is detected;

[0023] The adaptive voltage module is used to receive the first type of voltage adjustment strategy sent by the processor and forward it to the power management module of the chip to be regulated, so that the power management module can perform voltage adjustment on the chip to be regulated.

[0024] Furthermore, the temperature and voltage module also includes a power consumption detection unit;

[0025] The power consumption detection unit is used to respond to the power consumption timing detection instruction issued by the processor and report the current target temperature and target voltage to the processor;

[0026] The processor is used to compare the target temperature with the temperature threshold, determine the third type of clock frequency adjustment strategy when the target temperature exceeds the temperature threshold, and adjust the frequency of the clock module according to the third type of clock frequency adjustment strategy; it is also used to compare the target voltage with the voltage threshold, determine the second type of voltage adjustment strategy when the target voltage exceeds the voltage threshold, and send the second type of voltage adjustment strategy to the adaptive voltage module.

[0027] Furthermore, the temperature and voltage module also includes a temperature monitoring unit, a voltage monitoring unit and a determination unit;

[0028] The temperature monitoring unit is composed of a temperature sensor that can monitor the temperature state of the chip to be regulated;

[0029] The voltage monitoring unit is composed of a voltage sensor that can monitor the voltage state of the chip to be regulated, and is used to monitor the voltage state of the chip to be regulated;

[0030] The determination unit is used to compare the real-time temperature with the first threshold, and the real-time voltage with the second threshold, and to generate a second type of interrupt signal when the real-time temperature is greater than the first threshold, and to generate a third type of interrupt signal when the real-time voltage is greater than the second threshold.

[0031] Furthermore, the processor is also used to monitor the load status of the chip to be regulated in real time;

[0032] When it is detected that the load state of the chip to be regulated is empty, a low-power execution strategy is sent to the clock module;

[0033] When it is detected that the load state of the chip to be regulated is not empty, a high power consumption execution strategy is sent to the clock module.

[0034] Furthermore, the system also includes a bus for establishing a communication connection between the processor and the clock module, the interrupt control module, the storage module, the temperature and voltage module, and the adaptive voltage module.

[0035] In a second aspect, an embodiment of the present invention provides a chip, the chip comprising: a chip temperature dynamic control system and a task processing module;

[0036] Wherein, the task processing module is in communication connection with the task issuing module in the chip temperature dynamic control system;

[0037] The task processing module is used to execute calculation of the task whenever receiving a task sent by the task sending module.

[0038] Furthermore, the chip also includes a power management module, and the power management module is communicatively connected with the adaptive voltage module in the chip temperature dynamic control system;

[0039] The power management module is used to execute matching power control in response to the voltage adjustment strategy of the adaptive voltage module.

[0040] The technical solution of the embodiment of the present invention provides three frequency and voltage modulation methods to dynamically control the power consumption of the chip. First, by defining the frequency gear, interrupt mask bit and synchronization flag bit in the DVFS descriptor respectively, the frequency and voltage modulation process is limited in three stages, which provides the possibility for subsequent expansion of the system, that is, the bit field in the descriptor is flexibly defined according to new requirements to adapt to different frequency and voltage modulation strategies; secondly, when executing the task, the temperature and voltage module is read by polling to grasp the working status of the chip, ensuring that the chip works in a safe temperature and voltage environment; finally, the temperature and voltage module generates an interrupt signal by real-time monitoring of changes, realizing real-time dynamic frequency and voltage modulation, and improving the safety and reliability of the chip.

[0041] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present invention, nor are they intended to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0043] Figure 1 It is a schematic diagram of the overall connection relationship of a chip temperature dynamic control system provided according to the first embodiment of the present invention.

[0044] Figure 2 It is a reference diagram of the execution process of the first type of clock frequency adjustment strategy provided according to the first embodiment of the present invention.

[0045] Figure 3 It is an internal schematic diagram of a DVFS descriptor provided according to the first embodiment of the present invention.

[0046] Figure 4 The present invention provides a flow chart of abnormal reporting of a temperature and voltage module according to the first embodiment of the present invention.

[0047] Figure 5 A power consumption control flow chart in response to a power consumption detection instruction is provided according to the first embodiment of the present invention.

[0048] Figure 6 It is a reference diagram of the connection relationship between internal and external functional modules of a chip temperature dynamic control system provided according to the second embodiment of the present invention. DETAILED DESCRIPTION

[0049] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0050] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0051] Embodiment 1:

[0052] Figure 1 A schematic diagram of a chip temperature dynamic control system provided in Embodiment 1 of the present invention, the system comprising:

[0053] Processor (S1), clock module (S2), interrupt control module (S3), storage module (S4) and task issuing module (S5);

[0054] The processor (S1) is respectively connected to the clock module (S2), the interrupt control module (S3), the storage module (S4) and the task issuing module (S5), and the storage module (S4) is connected to the task issuing module (S5);

[0055] A storage module (S4) is used to store a task to be calculated, wherein the task includes a dynamic voltage frequency adjustment DVFS descriptor, and the DVFS descriptor defines three gears, including a frequency gear required for the task, an interrupt mask bit, and a synchronization flag bit;

[0056] A task sending module (S5) is used to obtain tasks from the storage module (S4) and send them to the task processing module of the chip to be regulated in sequence. If the frequency regulation condition is determined to be met according to the difference between the frequency level required for the current task to be sent and the most recently completed task, a first type of interrupt signal is generated;

[0057] An interrupt control module (S3) is used to report a first-class interrupt matching the first-class interrupt signal to the processor (S1) when the first-class interrupt signal is detected, so that the processor (S1) can perform frequency modulation processing;

[0058] The processor (S1) is used to determine a first-type clock frequency adjustment strategy according to the required frequency gear of the current task to be issued obtained from the task issuing module (S5) when a first-type interrupt is detected, and adjust the frequency of the clock module (S2) according to the first-type clock frequency adjustment strategy;

[0059] The clock module (S2) is used to control the chip to be regulated to operate at a matching clock frequency in response to the frequency adjustment of the processor (S1).

[0060] The system provided by the embodiment of the present invention provides a variety of frequency and voltage regulation methods based on chip dynamic voltage and frequency adjustment (DVFS) technology. The processor provides DVFS support and intelligently controls each functional module in the chip temperature dynamic control system.

[0061] Specifically, the storage module stores tasks to be calculated arranged in a certain execution order. Generally, the descriptor is a data structure item used to provide the processor with size information about the location of a segment and access control status information. The dynamic voltage frequency adjustment DVFS descriptor described in the embodiment of the present invention first predefines the frequency gear required for the execution of each task to be calculated.

[0062] The task issuing module is responsible for reading the frequency level in the most recently completed task descriptor, and reading the frequency level in the task descriptor to be issued through the storage module, and comparing them. The frequency modulation condition can be a pre-set frequency modulation rule. In a specific example, if the frequency level of the most recently completed task is consistent with the frequency level in the task descriptor to be issued, it is obvious that the frequency modulation condition is not met, and no frequency modulation processing is required at this time; on the contrary, if the frequency level of the most recently completed task is inconsistent with the frequency level in the task descriptor to be issued, the frequency modulation condition can be met, wherein the frequency modulation condition is described in more detail in the subsequent embodiments. At this time, the task issuing module will generate a signal, that is, a first type of interrupt signal, and the first type of interrupt signal corresponds to the comparison of the frequency level.

[0063] The interrupt control module can be an interrupt controller, which is used to detect the interrupt signal inside the chip and transmit the interrupt signal to the processor after conversion, which is also the first type of interrupt. When the processor receives the first type of interrupt, it will combine the frequency level of the most recently completed task and the frequency level in the task descriptor to be sent to determine the frequency level adjustment strategy, which is also the first type of clock frequency adjustment strategy. In a specific example, if the frequency level of the most recently completed task is lower than the frequency level of the task to be sent, the clock frequency adjustment strategy at this time can increase the clock frequency to the frequency level of the task to be sent.

[0064] The clock frequency adjustment strategy acts on the clock module, and adjusts the operating frequency inside the chip in response to the specific content of the strategy issued by the processor.

[0065] Easy to understand, Figure 2This is a reference diagram of the execution process of the first type of clock frequency adjustment strategy, which shows the communication process among the storage module, task issuing module, interrupt control module, processor and clock module.

[0066] The technical solution of the embodiment of the present invention provides three frequency and voltage modulation methods to dynamically control the power consumption of the chip. First, by defining the frequency gear, interrupt mask bit and synchronization flag bit in the DVFS descriptor respectively, the frequency and voltage modulation process is limited in three stages, which provides the possibility for subsequent expansion of the system, that is, the bit field in the descriptor is flexibly defined according to new requirements to adapt to different frequency and voltage modulation strategies; secondly, when executing the task, the temperature and voltage module is read by polling to grasp the working status of the chip, ensuring that the chip works in a safe temperature and voltage environment; finally, the temperature and voltage module generates an interrupt signal by real-time monitoring of changes, realizing real-time dynamic frequency and voltage modulation, and improving the safety and reliability of the chip.

[0067] Optionally, the target state value of the interrupt mask bit is used to describe whether reporting of the first type of interrupt signal is allowed;

[0068] Correspondingly, the task issuing module is specifically used to: if it is detected that the frequency gear required for the current task to be issued is different from the frequency gear required for the most recently completed task to be issued, and the interrupt mask bit of the current task to be issued is at the target state value, it is determined that the frequency modulation condition is met.

[0069] In the DVFS descriptor, in addition to the preset frequency level for each task, an interrupt mask bit is also additionally defined. The pre-defined interrupt mask bit is one of the reporting conditions for the interrupt signal. Specifically, the interrupt mask bit has two status values ​​0 and 1, which correspond to reporting the interrupt signal and not reporting the interrupt signal, respectively. Based on the status value of the interrupt mask bit in the current task descriptor, it can be determined whether to report the interrupt signal when the frequency level of the most recently completed task is inconsistent with the frequency level in the task descriptor to be issued.

[0070] If the status value of the target interrupt mask bit is to allow reporting of the interrupt status, then the frequency modulation condition is met at this time. Conversely, if the status value of the target interrupt mask bit is to not allow reporting of the interrupt status, then the frequency modulation condition is not met at this time, that is, there is no need to perform frequency modulation operation when the frequency gears of the two tasks are inconsistent.

[0071] Furthermore, the first state value of the synchronization flag is used to describe that synchronization waiting is required, and the second state value of the synchronization flag is used to describe that synchronization waiting is not required;

[0072] The task issuing module is further used to: after generating the first type of interrupt signal, set the matching DVFS interrupt register to 1;

[0073] The processor is further configured to: after completing the frequency adjustment of the clock module, clear the DVFS interrupt register;

[0074] The task sending module is also used to: after generating the first type of interrupt signal, detect whether the state value of the synchronization flag bit of the current task to be sent is the first state value: if so, when it is determined that the DVFS interrupt register is cleared, send the current task to be sent to the task processing module of the chip to be regulated; otherwise, directly send the current task to be sent to the task processing module of the chip to be regulated.

[0075] The synchronization flag bit is the third bit field predefined in the DVFS descriptor in the embodiment of the present invention. That is, the embodiment of the present invention defines three bit fields in the DVFS descriptor, which are: frequency gear, interrupt mask bit and synchronization flag bit, see Figure 3 The state value of the synchronization flag bit can be 0 and 1, that is, the first state value and the second state value, corresponding to the need for synchronization waiting and the need for synchronization waiting, respectively.

[0076] For ease of understanding, the need for synchronous waiting means that after the task issuing module generates an interrupt signal, the synchronization flag status value in the DVFS descriptor is read. If it is the second status value, the task instruction of the task issuing module can be immediately issued to the task processing module; if it is the first status value, the task instruction of the task issuing module cannot be immediately issued to the task processing module.

[0077] Specifically, the interrupt signal generated by the task delivery module is transmitted to the processor through the interrupt control module. At this time, the interrupt register state of the task delivery module is changed to 1, indicating that it is necessary to wait for the processor frequency modulation processing. After the processor receives the interrupt signal and performs frequency modulation processing according to a certain frequency modulation strategy, it clears the state of the interrupt register. When the interrupt register state returns to the initial value, the task delivery module sends the task instruction to the task processing module.

[0078] Optionally, the system may further include: a plurality of temperature voltage modules and an adaptive voltage module respectively connected to the processor;

[0079] Wherein, each temperature voltage module is arranged at a different position on the chip to be regulated, and the adaptive voltage module is used to be connected to the power management module on the chip to be regulated;

[0080] Each temperature and voltage module is used to monitor the temperature and voltage of the chip to be regulated in real time, and generate a second type of interrupt signal when the real-time temperature value exceeds the first threshold, and generate a third type of interrupt signal when the real-time voltage value exceeds the second threshold;

[0081] The interrupt control module is further used to report the second type of interrupt matching the second type of interrupt signal to the server when the second type of interrupt signal is detected, so that the processor can perform frequency modulation processing; when the third type of interrupt signal is detected, report the third type of interrupt matching the third type of interrupt signal to the server, so that the processor can perform voltage regulation processing;

[0082] The processor is further configured to execute the second type of clock frequency adjustment strategy on the clock module when the second type of interrupt signal reported by the interrupt controller is detected, and adjust the frequency of the clock module according to the second type of clock frequency adjustment strategy; and send the first type of voltage adjustment strategy to the adaptive voltage module when the third type of interrupt signal reported by the interrupt controller is detected;

[0083] The adaptive voltage module is used to receive the first type of voltage adjustment strategy sent by the processor and forward it to the power management module of the chip to be regulated, so that the power management module can perform voltage adjustment on the chip to be regulated.

[0084] The system described in the embodiment of the present invention also includes a temperature voltage module and an adaptive voltage module. Specifically, during the operation of the chip to be regulated, the temperature voltage module needs to detect the power consumption of the chip to be regulated, and the power consumption is specifically manifested as temperature and operating voltage. A first threshold is set for the temperature value and a second threshold is set for the voltage value in advance. When the real-time temperature exceeds the first threshold or the real-time voltage exceeds the second threshold, it indicates that the power consumption of the chip to be regulated has reached a peak value in a short period of time.

[0085] At this time, the temperature and voltage module needs to actively report the temperature and / or voltage conditions to the processor. When the real-time temperature exceeds the first threshold, a second-type interrupt signal is generated, and when the real-time voltage exceeds the second threshold, a third-type interrupt signal is generated. The second-type clock frequency adjustment strategy corresponding to the second-type interrupt signal can be to lower the clock frequency, and the first-type voltage adjustment strategy corresponding to the third-type interrupt signal can be to lower the operating voltage. The abnormal reporting flow chart of the temperature and voltage module is shown in Figure 4 .

[0086] In the embodiment of the present invention, the adaptive voltage module cannot directly act on the voltage regulation of the chip, but forwards the first type of voltage adjustment strategy to the power management module outside the system, and the power management module performs specific voltage adjustment.

[0087] Furthermore, the temperature and voltage module also includes a power consumption detection unit;

[0088] The power consumption detection unit is used to respond to the power consumption timing detection instruction issued by the processor and report the current target temperature and target voltage to the processor;

[0089] The processor is used to compare the target temperature with the temperature threshold, determine the third type of clock frequency adjustment strategy when the target temperature exceeds the temperature threshold, and adjust the frequency of the clock module according to the third type of clock frequency adjustment strategy; it is also used to compare the target voltage with the voltage threshold, determine the second type of voltage adjustment strategy when the target voltage exceeds the voltage threshold, and send the second type of voltage adjustment strategy to the adaptive voltage module.

[0090] In the system described in the embodiment of the present invention, the management terminal supports custom power consumption detection initiated by the management terminal. The power consumption timing monitoring instruction can be a polling instruction of a certain period. When the temperature and voltage module receives the power consumption timing detection instruction, the target temperature and target voltage collected at the current moment are reported to the processor. At the same time, the pre-set temperature threshold and voltage threshold are used for comparison with the target temperature and target voltage. The third type of clock frequency adjustment strategy refers to lowering the clock frequency when the target temperature is higher than the temperature threshold. The second type of voltage adjustment strategy refers to lowering the voltage when the target voltage is higher than the voltage threshold. The above-mentioned power consumption control flow chart in response to the power consumption detection instruction is shown as follows: Figure 5 shown.

[0091] Similarly, the adaptive voltage module forwards the received second type of voltage adjustment strategy to the power management module, and the power management module performs voltage adjustment processing on the chip.

[0092] Optionally, the temperature and voltage module further includes a temperature monitoring unit, a voltage monitoring unit and a determination unit;

[0093] The temperature monitoring unit is composed of a temperature sensor that can monitor the temperature state of the chip to be regulated;

[0094] The voltage monitoring unit is composed of a voltage sensor that can monitor the voltage state of the chip to be regulated, and is used to monitor the voltage state of the chip to be regulated;

[0095] The determination unit is used to compare the real-time temperature with the first threshold, and the real-time voltage with the second threshold, and to generate a second type of interrupt signal when the real-time temperature is greater than the first threshold, and to generate a third type of interrupt signal when the real-time voltage is greater than the second threshold.

[0096] In the temperature and voltage module, sensors for monitoring temperature and voltage are respectively included and deployed in different parts of the chip to be regulated. At the same time, since it is necessary to make a decision on whether to generate an interrupt signal in the temperature and voltage module, the determination module is used to compare the real-time value with the preset threshold value, and generate a corresponding interrupt signal when the real-time value exceeds the preset threshold value.

[0097] Furthermore, the processor is also used to monitor the load status of the chip to be regulated in real time;

[0098] When it is detected that the load state of the chip to be regulated is empty, a low-power execution strategy is sent to the clock module;

[0099] When it is detected that the load state of the chip to be regulated is not empty, a high power consumption execution strategy is sent to the clock module.

[0100] When the chip load is empty, it means that the chip to be regulated currently has no tasks. At this time, the clock module is used to reduce the clock frequency to keep the chip to be regulated in a low-power standby state; when the chip load is not empty, it means that the chip to be regulated has tasks to process. At this time, the clock module is used to adjust the clock frequency to the highest frequency to maintain the high performance of the chip. While maintaining the highest frequency operation, the temperature and voltage module is used to monitor the temperature and voltage inside the chip in real time. When the power consumption is found to increase, the frequency and voltage adjustment are carried out in time.

[0101] Optionally, the system further includes a bus for establishing a communication connection between the processor and the clock module, the interrupt control module, the storage module, the temperature and voltage module, and the adaptive voltage module.

[0102] Embodiment 2:

[0103] Figure 6 A reference diagram of the connection relationship between the internal and external functional modules of a chip provided in the second embodiment of the present invention is shown in FIG. Figure 6 As shown, the chip includes:

[0104] A chip temperature dynamic control system, and a task processing module; wherein the task processing module is communicatively connected with a task issuing module in the chip temperature dynamic control system;

[0105] The task processing module is used to execute calculation of the task whenever receiving a task sent by the task sending module.

[0106] The chip temperature dynamic control system described in the embodiment of the present invention acts inside the chip, and the task processing module, as a specific calculation module of the task, is not the research focus of the embodiment of the present invention. The task issuing module sends the task instructions to the task processing module, thereby realizing the functional closed loop of this system.

[0107] Optionally, the chip may further include: a power management module, the power management module being communicatively connected to an adaptive voltage module in the chip temperature dynamic control system;

[0108] The power management module is used to execute matching power control in response to the voltage adjustment strategy of the adaptive voltage module.

[0109] The power management module is another functional module in the chip to be regulated. It is used to receive the voltage adjustment strategy forwarded by the adaptive voltage module and specifically adjust the internal voltage of the chip. The specific means of adjusting the voltage is not the research focus of the embodiment of the present invention. Similarly, the adaptive voltage module forwards the voltage adjustment strategy to the power management module, thereby realizing a closed loop of another function of the system.

[0110] In the system constructed by the embodiment of the present invention, by establishing a communication connection between the task issuing module and the task processing module outside the system, the tasks are issued in a controlled manner under the premise of considering the power consumption of the chip; at the same time, by establishing a communication connection with the power management module outside the system through the adaptive voltage module, the voltage regulation of the chip based on certain voltage regulation rules is realized, and the voltage fluctuation under various operating conditions is reduced. Overall, the chip provided by the embodiment of the present invention, based on a chip temperature dynamic control system, can ensure the highest performance under the premise of saving power consumption, extend the working life, and reduce the heat dissipation cost.

[0111] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps described in the present invention can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solution of the present invention can be achieved, and this document does not limit this.

[0112] The above specific implementations do not constitute a limitation on the protection scope of the present invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A chip temperature dynamic control system, configured on a chip to be controlled, characterized in that: The system includes: a processor, a clock module, an interrupt control module, a storage module and a task issuing module; The processor is connected to the clock module, the interrupt control module, the storage module and the task issuing module in communication with each other, and the storage module is connected to the task issuing module in communication with each other; A storage module is used to store tasks to be calculated, wherein the tasks include a dynamic voltage frequency adjustment DVFS descriptor, and three gears are defined in the DVFS descriptor, including the frequency gear required for the task, an interrupt mask bit, and a synchronization flag bit; the target state value of the interrupt mask bit is used to describe that the reporting of the first type of interrupt signal is allowed; the first state value of the synchronization flag bit is used to describe that synchronization waiting is required, and the second state value of the synchronization flag bit is used to describe that synchronization waiting is not required; The task issuing module is used to obtain tasks from the storage module and issue them to the task processing module of the chip to be regulated in sequence. If the frequency regulation condition is determined to be met according to the difference between the frequency level required for the current task to be issued and the most recently issued task, a first type of interrupt signal is generated; An interrupt control module, for reporting a first-class interrupt matching the first-class interrupt signal to the processor when the first-class interrupt signal is detected, so that the processor performs frequency modulation processing; The processor is used to determine the first type of clock frequency adjustment strategy according to the required frequency gear of the current task to be issued obtained from the task issuing module when the first type of interrupt is detected, and adjust the frequency of the clock module according to the first type of clock frequency adjustment strategy; The clock module is used to control the chip to be regulated to operate at a matching clock frequency in response to the frequency adjustment of the processor.

2. The system according to claim 1, characterized in that Correspondingly, the task issuing module is specifically used to: if it is detected that the frequency gear required for the current task to be issued is different from the frequency gear required for the most recently completed task to be issued, and the interrupt mask bit of the current task to be issued is at the target state value, it is determined that the frequency modulation condition is met.

3. The system according to claim 1, characterized in that The task issuing module is further used to: after generating the first type of interrupt signal, set the matching DVFS interrupt register to 1; The processor is further configured to: after completing the frequency adjustment of the clock module, clear the DVFS interrupt register; The task issuing module is also used for: after generating the first type of interrupt signal, detecting whether the state value of the synchronization flag bit of the current task to be issued is the first state value; if so, when it is determined that the DVFS interrupt register is cleared, issuing the current task to be issued to the task processing module of the chip to be regulated; Otherwise, the current task to be sent is directly sent to the task processing module of the chip to be controlled.

4. The system according to claim 1, characterized in that The system further comprises: a plurality of temperature voltage modules and an adaptive voltage module respectively connected to the processor; Wherein, each temperature voltage module is arranged at a different position on the chip to be regulated, and the adaptive voltage module is used to be connected to the power management module on the chip to be regulated; Each temperature and voltage module is used to monitor the temperature and voltage of the chip to be regulated in real time, and generate a second type of interrupt signal when the real-time temperature value exceeds the first threshold, and generate a third type of interrupt signal when the real-time voltage value exceeds the second threshold; The interrupt control module is further used to report the second type of interrupt matching the second type of interrupt signal to the server when the second type of interrupt signal is detected, so that the processor can perform frequency modulation processing; when the third type of interrupt signal is detected, report the third type of interrupt matching the third type of interrupt signal to the server, so that the processor can perform voltage regulation processing; The processor is further configured to execute the second type of clock frequency adjustment strategy on the clock module when the second type of interrupt signal reported by the interrupt controller is detected, and adjust the frequency of the clock module according to the second type of clock frequency adjustment strategy; and send the first type of voltage adjustment strategy to the adaptive voltage module when the third type of interrupt signal reported by the interrupt controller is detected; The adaptive voltage module is used to receive the first type of voltage adjustment strategy sent by the processor and forward it to the power management module of the chip to be regulated, so that the power management module can perform voltage adjustment on the chip to be regulated.

5. The system according to claim 4, characterized in that The temperature and voltage module also includes a power consumption detection unit; The power consumption detection unit is used to respond to the power consumption timing detection instruction issued by the processor and report the current target temperature and target voltage to the processor; The processor is used to compare the target temperature with the temperature threshold, determine the third type of clock frequency adjustment strategy when the target temperature exceeds the temperature threshold, and adjust the frequency of the clock module according to the third type of clock frequency adjustment strategy; it is also used to compare the target voltage with the voltage threshold, determine the second type of voltage adjustment strategy when the target voltage exceeds the voltage threshold, and send the second type of voltage adjustment strategy to the adaptive voltage module.

6. The system according to claim 4, characterized in that The temperature and voltage module also includes a temperature monitoring unit, a voltage monitoring unit and a determination unit; The temperature monitoring unit is composed of a temperature sensor that can monitor the temperature state of the chip to be regulated; The voltage monitoring unit is composed of a voltage sensor that can monitor the voltage state of the chip to be regulated, and is used to monitor the voltage state of the chip to be regulated; The determination unit is used to compare the real-time temperature with the first threshold, and the real-time voltage with the second threshold, and to generate a second type of interrupt signal when the real-time temperature is greater than the first threshold, and to generate a third type of interrupt signal when the real-time voltage is greater than the second threshold.

7. The system according to claim 1, characterized in that The processor is also used to monitor the load status of the chip to be regulated in real time; When it is detected that the load state of the chip to be regulated is empty, a low-power execution strategy is sent to the clock module; When it is detected that the load state of the chip to be regulated is not empty, a high power consumption execution strategy is sent to the clock module.

8. The system according to any one of claims 1 to 7, characterized in that: The system also includes a bus for establishing a communication connection between the processor and the clock module, the interrupt control module, the storage module, the temperature and voltage module, and the adaptive voltage module.

9. A chip, comprising the chip temperature dynamic control system according to any one of claims 4 to 7, and a task processing module; in, The task processing module is communicatively connected with the task issuing module in the chip temperature dynamic control system; The task processing module is used to execute calculation of the task whenever receiving a task sent by the task sending module.

10. The chip according to claim 9, characterized in that: The chip further comprises: a power management module, the power management module being communicatively connected to an adaptive voltage module in the chip temperature dynamic control system; The power management module is used to execute matching power control in response to the voltage adjustment strategy of the adaptive voltage module.

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