Wafer detection method and device, electronic device and storage medium

Abstract

The present invention provides a wafer detection method and device, electronic equipment and storage medium. The above method includes: in the image to be tested of the wafer, determining the target wafer grain area and the defect area in each target wafer grain area, for each target wafer grain area, determining the defect type of the defect area in the target wafer grain area through the detection model corresponding to the defect area in the target wafer grain area; based on the defect type of the defect area in each target wafer grain area, determining the detection result of the wafer. The present invention can generate defect types for different defect areas in the wafer through the corresponding detection models, so for wafer grains belonging to different defect types, the defect types generated by the present invention are more accurate, which is conducive to improving the representativeness of the wafer detection results.

Description

Technical Field

[0001] The present invention relates to the field of image processing technology, and more specifically to a wafer detection method, a wafer detection device, an electronic device, a storage medium and a computer program product. Background Art

[0002] In the industrial field, with the continuous development of production technology, people have put forward higher requirements for the production quality and production efficiency of industrial products. With the development of image processing, more and more product inspections are based on images. If the inspection accuracy is low, the practicality of the image-based inspection method will also be reduced.

[0003] For example, in the process of wafer inspection, the related technology usually uses automated optical inspection (AOI) equipment to perform appearance inspection on the wafer to determine the type of defects on the wafer. However, the different defects on the wafer are highly random, complex and changeable. Therefore, how to accurately inspect the wafer is a technical problem that technicians in this field urgently need to solve. Summary of the invention

[0004] The present invention is proposed in view of the above problems. The present invention provides a wafer detection method, a wafer detection device, an electronic device, a storage medium and a computer program product.

[0005] According to one aspect of the present invention, a wafer detection method is provided, the detection method comprising:

[0006] In the image to be tested of the wafer, determining a target wafer die region and a defect region in each target wafer die region, wherein the defect region exists in the target wafer die region;

[0007] For each target wafer die region, determining the defect type of the defect region in the target wafer die region by using a detection model corresponding to the defect region in the target wafer die region, wherein the detection model corresponding to the defect region is related to the position of the defect region in the target wafer die region;

[0008] Based on the defect type of the defect area in each target wafer die area, the inspection result of the wafer is determined.

[0009] Exemplarily, the above detection method further includes:

[0010] Based on first position information of a target wafer grain region, determining wafer grain distribution data of the image to be tested, wherein the first position information is used to indicate the position of the target wafer grain region in the image to be tested, the wafer grain distribution data is used to indicate the position information of each wafer grain in the wafer, and in the wafer grain distribution data, an identifier corresponding to the target wafer grain region is different from identifiers corresponding to other wafer grain regions;

[0011] Determine, by means of a first model, a defect label of each target wafer die region based on the wafer die distribution data, wherein the defect label is used to indicate whether the target wafer die region has a defect;

[0012] Based on the defect type of the defect area in each target wafer die area, the inspection results of the wafer are determined, including:

[0013] The inspection results of the wafer are determined based on the defect type and defect label of each target wafer die area.

[0014] Exemplarily, based on the defect type and defect label of each target wafer die region, determining the inspection result of the wafer includes:

[0015] For each target wafer grain region, based on the defect type of the target wafer grain region and the position information corresponding to the target wafer grain region in the wafer grain distribution data, generate a first result of the target wafer grain region;

[0016] Based on the respective first results and defect labels of each target wafer die region, an inspection result of the wafer is determined.

[0017] Exemplarily, the above detection method further includes:

[0018] determining a pad area within each target wafer die area;

[0019] For each target wafer die region, the defect type of the defect region in the target wafer die region is determined by using a detection model corresponding to the defect region in the target wafer die region, including:

[0020] For each defect area,

[0021] In the case that there is no position intersection between the defective area and any pad area, determining the defect type of the defective area by using a first detection model corresponding to the defective area;

[0022] In the case where there is a position intersection between the defective region and any pad region, the defect type of the defective region is determined by using a second detection model corresponding to the defective region.

[0023] Exemplarily, the above detection method further includes:

[0024] For each defect area, when there is no position intersection between the defect area and any pad area, the image to be tested is cropped according to the size of the defect area to obtain an image of the defect area;

[0025] Determining the defect type of the defect area by using a first detection model corresponding to the defect area includes:

[0026] The defect area image is input into the first detection model to obtain the defect type of the defect area.

[0027] Exemplarily, the above detection method further includes:

[0028] For each defect area, when there is a position intersection between the defect area and any pad area, the image to be tested is cropped according to the size of the pad area with the position intersection to obtain a pad area image;

[0029] Determining the defect type of the defect area by using a second detection model corresponding to the defect area includes:

[0030] The pad area image is input into the second detection model to obtain the defect type of the defect area.

[0031] Exemplarily, based on the defect type of the defect area in each target wafer die area, determining the inspection result of the wafer includes:

[0032] Based on the defect type of each defect area and the second position information of the defect area, generating a second result of the defect area, wherein the second position information is used to indicate the position of the defect area in the target wafer die area;

[0033] Based on the second result of each defective area, an inspection result of the wafer is determined.

[0034] Exemplarily, based on the defect type of the defect area in each target wafer die area, determining the inspection result of the wafer includes:

[0035] For each defect region, the encoder in the language model generates a defect type code and a position information code of the defect region based on the defect type and position information of the defect region respectively;

[0036] Inputting the defect type code and location information code of each defect area into the prompt learning module to obtain the wafer description code;

[0037] Inputting the query information input by the user into the encoder in the language model to obtain the query encoding;

[0038] The wafer description code and the query code are input into a decoder in the language model to generate a detection result of the wafer corresponding to the query information.

[0039] According to another aspect of an embodiment of the present invention, a wafer detection device is provided. The detection device includes: a region determination module, a defect type generation module, and a detection result generation module.

[0040] A region determination module is used to determine a target wafer grain region and a defect region in each target wafer grain region in the image to be tested of the wafer, wherein the defect region exists in the target wafer grain region;

[0041] A defect type generating module is used to determine, for each target wafer grain region, the defect type of the defect region in the target wafer grain region by using a detection model corresponding to the defect region in the target wafer grain region, wherein the detection model corresponding to the defect region is related to the position of the defect region in the target wafer grain region;

[0042] The detection result generating module is used to determine the detection result of the wafer based on the defect type of the defect area in each target wafer grain area.

[0043] According to another aspect of the present invention, an electronic device is provided, comprising: a processor and a memory, wherein the memory stores computer program instructions, and the computer program instructions are used to execute the above-mentioned wafer detection method when the processor is running.

[0044] According to another aspect of the present invention, a storage medium is provided, on which program instructions are stored, and the program instructions are used to execute the above-mentioned wafer detection method when running.

[0045] According to another aspect of the present invention, a computer program product is further provided, wherein the computer program product comprises computer program instructions, and the computer program instructions are used to execute the above-mentioned wafer detection method when running.

[0046] According to the above scheme of the embodiment of the present invention, the target wafer grain area and the defect area in each target wafer grain area can be determined in the image to be tested of the wafer. Then, for each target wafer grain area, the defect type of the defect area in the target wafer grain area is determined by the detection model corresponding to the defect area in the target wafer grain area. Finally, based on the defect type of the defect area in each target wafer grain area, the inspection result of the wafer is determined. The above scheme can generate defect types for different defect areas in the wafer through the corresponding detection models. Therefore, for wafer grains belonging to different defect types, the defect types generated by the above scheme are more accurate, which is conducive to improving the representativeness of the inspection results of the wafer. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] The above and other purposes, features and advantages of the present invention will become more apparent by describing the embodiments of the present invention in more detail in conjunction with the accompanying drawings. The accompanying drawings are used to provide a further understanding of the embodiments of the present invention and constitute a part of the specification. Together with the embodiments of the present invention, they are used to explain the present invention and do not constitute a limitation of the present invention. In the accompanying drawings, the same reference numerals generally represent the same components or steps.

[0048] Figure 1 A schematic flow chart of a wafer detection method according to an embodiment of the present invention is shown;

[0049] Figure 2 A schematic diagram showing a wafer detection method according to an embodiment of the present invention is shown;

[0050] Figure 3 A schematic diagram showing a wafer die having defects in a pad area according to an embodiment of the present invention is shown;

[0051] Figure 4 A schematic diagram showing a wafer die having defects in the surface area according to an embodiment of the present invention;

[0052] Figure 5 A schematic diagram showing a wafer detection method according to an embodiment of the present invention is shown;

[0053] Figure 6 A schematic block diagram showing a wafer inspection device according to an embodiment of the present invention; and

[0054] Figure 7 A schematic block diagram of an electronic device according to an embodiment of the present invention is shown. DETAILED DESCRIPTION

[0055] In order to make the purpose, technical scheme and advantages of the present invention more obvious, the exemplary embodiments according to the present invention will be described in detail with reference to the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all the embodiments of the present invention, and it should be understood that the present invention is not limited to the exemplary embodiments described herein. Based on the embodiments of the present invention described in the present invention, all other embodiments obtained by those skilled in the art without creative work should fall within the protection scope of the present invention.

[0056] In the field of component manufacturing, if defective industrial components (such as wafers) are packaged and tested, it will waste manpower and material resources, so it is necessary to inspect industrial components so that unqualified industrial components can be detected and eliminated. With the continuous advancement of component technology and the continuous development of industrial component manufacturing technology, the detection of defects on industrial components has become an indispensable part of the industrial component manufacturing process. With the continuous advancement of component technology, the device density and integration of industrial components are constantly increasing, and the requirements for the detection of defects on industrial components are also getting higher and higher.

[0057] In wafer inspection, manual inspection methods and automatic inspection methods based on image processing are usually used to detect defects on wafers. However, the above two inspection methods cannot efficiently and accurately identify various defects on the wafer. Among them, the manual inspection method relies on manual implementation, which is not only time-consuming and labor-intensive, but also the accuracy of the inspection results cannot be guaranteed, and the professional knowledge and experience of the inspectors are very high, which cannot be applied to large-scale wafer image defect detection. Although the existing automatic inspection method based on image processing does not need to rely on manual implementation, the existing automatic inspection method cannot accurately identify the defects on the wafer, and false detection may occur.

[0058] In summary, how to improve the efficiency and accuracy of defect detection on wafers has become an urgent problem to be solved in the field of component manufacturing.

[0059] In order to at least partially solve the above problems, an embodiment of the present invention provides a wafer detection method. Figure 1 FIG. 1 is a schematic flow chart of a wafer detection method according to an embodiment of the present invention. Figure 1 As shown, the method may include steps S110 to S130.

[0060] In step S110 , in the image of the wafer to be tested, a target wafer die region and a defect region in each target wafer die region are determined.

[0061] The wafer image to be tested can be a static image or any video frame in a dynamic video. The wafer image to be tested can be an original image acquired by an image acquisition device (for example, an original image acquired by an image sensor in a camera), or an image obtained after preprocessing the original image (such as digitization, normalization, smoothing, etc.). For example, see Figure 2 As shown, Figure 2 A schematic diagram of a wafer inspection method according to an embodiment of the present invention is shown. The wafer image to be inspected may be a grayscale image obtained by photographing the wafer with a black and white low-magnification camera.

[0062] There may be a defective region in the target wafer die region, that is, the wafer die region in which the defective region exists in the wafer may be used as the target wafer die region.

[0063] Optionally, the wafer grain area in the image to be tested can be determined by template matching. For example, the image to be tested can be matched with a wafer grain reference image without defects to obtain the wafer grain area in the image to be tested, and the wafer grain area can correspond to a wafer grain in the wafer. Then, the pixels in the wafer grain area with a difference degree higher than a threshold value from the wafer grain reference image can be used as pixels of the defective area. If it is determined that there is a defect in the wafer grain area, the wafer grain area can be used as the target wafer grain area. For example: the wafer grain reference image is placed at the upper left corner of the image to be tested of the wafer, and then slides on the image to be tested of the wafer, and compares each possible position. Then, for each position in the image to be tested of the wafer, the similarity or difference between the wafer grain reference image and the corresponding area of ​​the wafer image to be tested is calculated, which can be a pixel-by-pixel comparison, and finally a result matrix is ​​obtained. Among them, each element in the result matrix represents the matching degree of the wafer grain reference image at the corresponding position in the image to be tested of the wafer. When the result matrix is ​​obtained, the cv2.minMaxLoc() function can be used to analyze the result matrix to find the position in the wafer image to be tested that has the highest match with the above-mentioned wafer grain reference image. The position with the highest match can be used as the corresponding position of the wafer grain in the wafer image to be tested. Alternatively, the wafer grain area can be detected in the image to be tested through the trained area detection model, and then the target wafer grain that may have defects can be determined by means of an algorithm or model. If it is determined that there are defects in the wafer grain area, the wafer grain area can be used as the target wafer grain area.

[0064] In step S120 , for each target wafer die region, the defect type of the defect region in the target wafer die region is determined by using a detection model corresponding to the defect region in the target wafer die region.

[0065] The detection model corresponding to the defect area is related to the position of the defect area in the target wafer die area. For example, there are at least two different defect areas, each corresponding to a different detection model, such as Figure 2 As shown, when an image corresponding to a defective region of a target wafer grain region is obtained, the defective region is located in an image corresponding to a surface region (see Figure 2 The defect image of the surface area) and the image corresponding to the defect area in the pad area (refer to Figure 2 The defect images of the pad area in the reference image can be processed by different detection models to obtain their respective defect types (for example, Figure 2, the defect images of the surface area can be analyzed for defect types such as foreign matter and scratches, and the defect images of the pad area can be analyzed for defect types such as pin mark out of bounds and foreign matter). For example, the defect area in the target wafer grain area A may include the pad area, the surface area and the trimming area, etc. The image of the defect area corresponding to the pad area in the target wafer grain area A can be input into the detection model 1, and the image of the defect area corresponding to the trimming area in the target wafer grain area A and the image of the defect area corresponding to the surface area can be input into the detection model 2. For another example, the image of the defect area corresponding to the pad area in the target wafer grain area A is input into the detection model 1, the image of the defect area corresponding to the trimming area in the target wafer grain area A is input into the detection model 3, and the image of the defect area corresponding to the surface area in the target wafer grain area A is input into the detection model 4.

[0066] The detection model is used to output the defect type of the defect area according to the image of the defect area input to the detection model. Figure 3 As shown, Figure 3 A schematic diagram of a wafer die having defects in a pad region according to an embodiment of the present invention is shown, combined with Figure 3 For target wafers with defects in the pad area, the defect type of the target wafer can be determined by the detection model corresponding to the pad area (in this example, part or all of the defect area is located in the pad area, so the detection model corresponding to the pad area can be used as the detection model corresponding to the defect area). For example, the defect types in the pad area may include: needle mark deviation, foreign matter, pad scratches, shallow needle marks, etc. Figure 4 , Figure 4 A schematic diagram of a wafer having defects in the surface area according to an embodiment of the present invention is shown. Figure 4 For a target wafer with defects in the surface area, the defect type of the target wafer can be determined by the corresponding detection model of the surface area (in this example, the defect area is located in the surface area, so the detection model corresponding to the surface area can be used as the detection model corresponding to the defect area). For example, the defect type of the surface area may include: scratches on the surface area, other defects in the surface area (for example, solid foreign matter, transparent foreign matter, etc.), color difference, etc.

[0067] For the detection model for detecting the pad area, the image corresponding to the defect area can be input into the trained detection model (such as a trained convolutional neural network, a generative adversarial network, etc.) to output the defect type corresponding to the defect area. The embodiment of the present invention provides a training method for a detection model for detecting the pad area for reference. The training process of the detection model may include: obtaining a first training data set. Iteratively training the detection model through the first training data set, and adjusting the model parameters of the detection model through the loss function until the training is completed. The above-mentioned first training data set includes multiple images of the pad area, and the label of each image is the defect type corresponding to the pad area. The condition for completing the above-mentioned training may be that the loss value calculated by the loss function tends to be stable, the number of iterations reaches a preset number, etc. Based on the above-mentioned training process, a detection model for detecting the pad area can be obtained to determine the defect type corresponding to the pad area. It should be understood that the detection model for detecting other areas (such as trimming areas, surface areas, etc.) can refer to the above training process, replace the image in the first training data set with the image of the other area, and replace the label of the image with the defect type corresponding to the other area. The embodiment of the present invention will not be repeated here. It should be understood that, in combination with actual scenarios, users are usually more concerned about the defect type in the pad area, so one detection model can be used for detection in the pad area, and one detection model can be used for detection in all other areas to achieve lightweight deployment of the detection model.

[0068] In step S130 , based on the defect type of the defect region in each target wafer die region, the inspection result of the wafer is determined.

[0069] The inspection result of the wafer can be determined based on the defect area in each target wafer grain and the defect type of the defect area. In one example, the inspection result of the wafer can be expressed as an overall level result obtained by integrating the defect types of the target wafer grains. For example, if the target wafer grains detected with a defect type of foreign matter exceed the preset maximum value, the inspection result of the wafer may include a large number of target wafer grains with foreign matter in the wafer. In another example, the inspection result of the wafer can also be expressed as a composite result of the defect type of the target wafer grain. For example, there are target wafer grain area A1, target wafer grain area A2 and target wafer grain area A3 in wafer A. The defect area in the target wafer grain area A1 is a pad area, and its corresponding defect type is pin print out of bounds, the defect area in the target wafer grain area A2 is a trimming area, and its corresponding defect type is the presence of foreign matter, and the defect area in the target wafer grain area A3 is a surface area, and its corresponding defect type is the presence of foreign matter. According to the above content, the inspection result of wafer A may include that the pin print is out of bounds in the pad area of ​​wafer grain A1, foreign matter exists in the trimming area of ​​wafer grain A2, and foreign matter exists in the surface area of ​​wafer grain A3.

[0070] According to the above scheme of the embodiment of the present invention, the target wafer grain area and the defect area in each target wafer grain area can be determined in the image to be tested of the wafer. Then, for each target wafer grain area, the defect type of the defect area in the target wafer grain area is determined by the detection model corresponding to the defect area in the target wafer grain area. Finally, based on the defect type of the defect area in each target wafer grain area, the inspection result of the wafer is determined. The above scheme can generate defect types for different defect areas in the wafer through the corresponding detection models. Therefore, for wafer grains belonging to different defect types, the defect types generated by the above scheme are more accurate, which is conducive to improving the representativeness of the inspection results of the wafer.

[0071] Exemplarily, the above detection method may further include: determining a pad area in each target wafer die area.

[0072] The pad area in each target wafer grain area can be determined by template matching. For example, the image corresponding to the target wafer grain area in the image to be tested of the wafer is used as the target wafer grain image, and the target wafer grain image is matched with the image template corresponding to the pad area to obtain the area in the target wafer grain image that successfully matches the image template, and the successfully matched area is used as the pad area. For example, the target wafer grain image and the image template corresponding to the pad area can be preprocessed first, such as grayscale conversion, filtering and denoising, etc., to improve the accuracy and efficiency of matching. Then select a suitable matching method according to the application requirements, such as matching based on square difference, normalized square difference, and correlation coefficient. The above matching process includes: placing the image template corresponding to the pad area at the upper left corner of the target wafer grain image, and then sliding on the target wafer grain image to compare each possible position. Then for each position in the target wafer grain image, the similarity or difference between the image template corresponding to the pad area and the corresponding area of ​​the target wafer grain image is calculated, which can be a pixel-by-pixel comparison, and finally a result matrix is ​​obtained. Among them, each element in the result matrix represents the matching degree of the image template corresponding to the pad area to the corresponding position in the target wafer grain image. When the result matrix is ​​obtained, the cv2.minMaxLoc() function can be used to analyze the result matrix to find the position with the highest matching degree. The position with the highest matching degree can be used as the image of the pad area.

[0073] Step S120 may further include step S121.

[0074] In step S121, for each defective region, when there is no position intersection between the defective region and any pad region, the defect type of the defective region is determined by using a first detection model corresponding to the defective region. When there is a position intersection between the defective region and any pad region, the defect type of the defective region is determined by using a second detection model corresponding to the defective region.

[0075] The first detection model is used to determine the defect type of the defect area that has no position intersection with the pad area. The second detection model is used to determine the defect type of the defect area that has a position intersection with the pad area.

[0076] The training method of the first detection model and the second detection model can be referred to above, and the embodiments of the present invention will not be described in detail here. The positional relationship between the defect area and the pad area can be compared to determine whether there is a position intersection between the defect area and the pad area. For example, the coordinates of the defect area in the image to be tested can be compared with the coordinates of the pad area in the image to be tested to determine whether the defect area has a position intersection with any pad area.

[0077] According to the above scheme of the embodiment of the present invention, the defect type of the defect area in the pad area and the defect type of the defect area in the non-pad area can be separately determined through different detection models. Since the defects in the pad area of ​​the wafer grain are usually more concerned in quality inspection than the defects in other areas, the above scheme determines the defect type of the more important pad area in a targeted manner through a separate detection model and determines the defect type of other areas through another detection model. This can improve the accuracy of the wafer detection method while reducing the number of models to be trained, which is conducive to the lightweight deployment of the detection method.

[0078] Exemplarily, the wafer inspection method may further include, for each defect region, when there is no positional intersection between the defect region and any pad region, cropping the image to be inspected according to the size of the defect region to obtain a defect region image.

[0079] Optionally, the ratio of the number of pixels occupied by foreign matter in the defective region image to the total number of pixels in the defective region image is greater than the ratio of the number of pixels occupied by foreign matter in the image to be tested to the total number of pixels in the image to be tested. For example, if the defect type is the presence of foreign matter, the area where the foreign matter is present can be regarded as the defective region, and the area where the foreign matter is present can be expanded by a certain preset ratio or not expanded to obtain the defective region image where the foreign matter is present by cropping. The above preset ratio can be set according to actual conditions, and the present invention is not limited to this.

[0080] Determining the defect type of the defect area by using the first detection model corresponding to the defect area in step S121 may also include: inputting the defect area image into the first detection model to obtain the defect type of the defect area.

[0081] In an example, the defect types output by the first detection model may include color difference in the surface area, color difference in the trimming area, opaque foreign matter in the surface area, transparent foreign matter in the trimming area, scratches in the surface area, scratches in the trimming area, etc.

[0082] According to the above scheme of the embodiment of the present invention, the image corresponding to the defect area where there is no position intersection in the pad area can be cropped to obtain the defect area image, and then the defect type can be determined based on the defect area image. The redundant area in the defect area can be removed, and the characteristics of the defect area in the image can be highlighted, which is beneficial to the accuracy of the defect type obtained after the first detection model recognizes the defect area image.

[0083] Exemplarily, the wafer inspection method may further include: for each defect area, when there is a position intersection between the defect area and any pad area, cropping the image to be tested according to the size of the pad area with the position intersection to obtain a pad area image.

[0084] Optionally, the ratio of the number of pixels occupied by foreign matter in the pad area image to the total number of pixels in the pad area image is greater than the ratio of the number of pixels occupied by foreign matter in the image to be tested to the total number of pixels in the image to be tested. For example, if the defect type is a pin print out of bounds, the pad area can be expanded by a certain preset ratio or not expanded to crop the pad area image with the pin print out of bounds. The above preset ratio can be set according to actual conditions, and the present invention is not limited to this.

[0085] Determining the defect type of the defect area by using the second detection model corresponding to the defect area in step S121 may also include: inputting the pad area image into the second detection model to obtain the defect type of the defect area.

[0086] In an example, the defect types output by the second detection model may include: pin print out of bounds in the pad area, pin print shallow in the pad area, opaque foreign matter in the pad area, transparent foreign matter in the pad area, scratches in the pad area, etc.

[0087] In some embodiments, the second detection model may include an instance segmentation model and a position analysis model. The above instance segmentation model can be used to mark the area where the defect entity is located in the pad area image and determine the category of the defect entity. For example, the category of the above defect entity may include: transparent foreign matter, solid foreign matter, pin mark, etc. The position analysis model can determine the defect type of the defect area based on the relationship between the pad area and the area where the defect entity is located, the number of defect entities, etc. For example, if the area where the pin mark is located partially overlaps with the pad area, it can be determined that the defect type is the pin mark out of bounds. If the area where the pin mark is located is completely located in the pad area, and the number of pin marks is greater than a preset threshold, it can be determined that the defect type is too many pin marks. The specific rules of the above position analysis model may depend on the quality inspection standard, and the embodiments of the present invention will not be repeated here. It should be understood that the second detection model may also output the defect type directly through the image features of the pad area image without going through the steps of instance segmentation and position analysis, and the embodiments of the present invention are not limited here. For example, the second detection model can be trained through multiple pad area images and the defect types of the pad area images. The specific process can refer to the training process of the detection model mentioned above.

[0088] According to the above scheme of the embodiment of the present invention, the image of the pad area corresponding to the defect area with the position intersection with any pad area can be cropped to obtain the pad area image, and then the defect type can be determined according to the pad area image, so that all-round detection can be performed on the complex defects that may exist in the pad area, such as the pin print out of bounds and the excessive number of pin prints mentioned above. In addition, only the pad area image is input into the second detection model, which can increase the second detection model's attention to the characteristics of the defects in the pad area image, which is conducive to improving the accuracy of the obtained defect type.

[0089] Exemplarily, the wafer detection method provided by the present invention further includes step S210 and step S220.

[0090] In step S210 , wafer grain distribution data of the image to be tested is determined based on first position information of the target wafer grain area.

[0091] The first position information is used to indicate the position of the target wafer grain area in the image to be tested. For example, the first position information may be the coordinates of the target wafer grain area in the image to be tested. Specifically, for example, the first position information may be the coordinates of each vertex of the target wafer grain area in the image to be tested. In another specific example, the first position information may be the coordinates of the center point of the target wafer grain area in the image to be tested. It should be understood that since the image to be tested includes multiple wafer grains and the wafer grain distribution data also includes multiple wafer grains, the first position information may be used to determine the position of the target wafer grain (or the corresponding target wafer grain area) in the wafer grain distribution data. It should be understood that the image to be tested may include images of some wafer grains in the wafer, and the wafer grain distribution data includes all wafer grains of the wafer. Therefore, the wafer grains in the multiple images to be tested may be mapped separately to obtain the wafer grain distribution data. The specific mapping rules are not limited in the embodiments of the present invention, and the target wafer grains in the image to be tested may correspond to the wafer grains in the wafer grain distribution data. Accordingly, the wafer grain corresponding to the target wafer grain area in the wafer grain distribution data can be determined through the first position information of the target wafer grain area in the image to be tested, so as to determine the position information of the wafer grain in the wafer.

[0092] The wafer grain distribution data is used to indicate the position information of each wafer grain in the wafer, and the identifier corresponding to the target wafer grain area in the wafer grain distribution data is different from the identifiers corresponding to other wafer grain areas. In one example, the above-mentioned wafer grain distribution data may be a wafer grain distribution map. For example, in combination with Figure 2 , Figure 2 The graph used in the stage of "comprehensively analyzing the positions of defective wafer grains in the wafer grain distribution data and the positions of defects in the wafer grains" may be the above-mentioned wafer grain distribution graph. The circular area in the wafer grain distribution graph may be used to represent the corresponding area of ​​the wafer in the graph. Each point (or rectangular grid) in the circular area may be used to represent a wafer grain on the wafer. The points corresponding to the target wafer grains in the wafer are filled with a first preset color, and the points corresponding to the non-target wafer grains in the wafer are filled with a second preset color. Among them, the first preset color may be red, and the second preset color may be green. The first preset color and the second preset color may be determined according to actual conditions, and the present invention does not limit this. In another example, the above-mentioned wafer grain distribution data may also be a wafer grain distribution table. For example, the wafer grain distribution table records in sequence whether each wafer grain is a target wafer grain that may have defects according to the position of the wafer grain. For example, the target wafer grain may correspond to the number 1, and other wafer grains may correspond to the number 0 to distinguish the target wafer grains in the wafer.

[0093] In step S220 , the defect label of each target wafer die region is determined based on the wafer die distribution data by using the first model.

[0094] The first model is used to determine the target wafer grain area in the wafer according to the wafer grain distribution data. The defect label is used to indicate whether there is a defect in the target wafer grain area. Through the mapping relationship in the above text, the first position information corresponding to the target wafer grain area can be used to obtain the position information of the target wafer grain in the target wafer grain area in the wafer grain distribution data, so as to establish an association between the target wafer grain area and the target wafer grain in the wafer grain distribution data. Then, the defect label determined by the target wafer grain can be used as the defect label of the target wafer grain area corresponding to the target wafer grain.

[0095] In one example, the first model may determine the defect labels of each target wafer grain region for the target wafer grain corresponding to each target wafer grain region. For each target wafer grain region, the input of the first model may include wafer grain distribution data and the position information of the target wafer grain in the wafer grain distribution data. The input of the first model may also include wafer grain distribution data, the position information of the target wafer grain in the wafer grain distribution data, and the image of the target wafer grain region corresponding to the target wafer grain in the image to be tested. It should be understood that the input of the first model may also be a part of the wafer grain distribution data, for example, data within a preset range of the target wafer grain in the wafer grain distribution data. The specific training process of the first model may include: obtaining a second training data set. Iteratively training the first model through the second training data set, and adjusting the model parameters of the first model through the loss function until the training is completed. The above-mentioned second training data set may include wafer grain distribution data for training and the position information of the target wafer grain in the wafer grain distribution data. Among them, the training image is an image of a wafer. The second training data set may also include wafer grain distribution data used for training, position information of target wafer grains in the wafer grain distribution data, and images of target wafer grain areas corresponding to the target wafer grains in the training images. The conditions for completing the above training may be that the loss value calculated by the loss function tends to be stable, the number of iterations reaches a preset number, etc. Based on the above training process, a first model can be obtained to determine the defect labels of each target wafer grain area in the target wafer grain distribution data. The first model can determine the defect label of the target wafer grain based on the input position information of the target wafer grain in the wafer grain distribution data, combined with the identification of all or part of the wafer grains in the wafer grain distribution data.

[0096] The defect labels may include a label for indicating that a defect exists in the target wafer die region, and a label for indicating that a defect does not exist in the target wafer die region.

[0097] The first model can comprehensively determine whether the defect label corresponding to the target wafer grain is a defect label indicating a defect based on the number of target wafer grains in the row or column where the target wafer grain is located. Combined with the actual scenario, the target wafer grain with defects may be a wafer grain in an area of ​​the wafer. For example, due to an abnormality in the processing stage, all the wafer grains in a column or a row may have defects. The first model can comprehensively consider the distribution characteristics of the target wafer grains in the wafer grain distribution data to determine whether the target wafer grain has an abnormality.

[0098] In some embodiments, a preset algorithm can also be used to assist the first model in determining the defect label. For example, the defect label corresponding to the target wafer grain (equivalent to the defect label of the target wafer grain area corresponding to the target wafer grain) can be determined based on the number of other target wafer grains around the target wafer grain in the wafer grain distribution data to determine whether it is a defect label indicating the existence of a defect. For example, a circle is drawn with the target wafer grain A as the center (or the center of a rectangle) and 10 wafer grains as the radius. The number of other target wafer grains in the circular area is also input into the first model to assist the first model in determining the defect label.

[0099] If the above detection method includes step S210 and step S220, step S130 may include step S131a.

[0100] In step S131a, the inspection result of the wafer is determined based on the defect type and defect label of each target wafer die region.

[0101] The inspection result of the wafer can be comprehensively determined based on the defect type and defect label corresponding to each target wafer grain area. For example, the defect type corresponding to the target wafer grain area B is pin-mark deviation, and the defect label corresponding to the target wafer grain area B is a label used to indicate that there is a defect in the target wafer grain area, then the inspection result of the wafer is determined to include the defect of pin-mark deviation in the target wafer grain area B. For another example, the defect type corresponding to the target wafer grain area C is pin-mark deviation, but the defect label corresponding to the target wafer grain area C is a label used to indicate that there is no defect in the target wafer grain area, then the inspection result of the wafer is determined to include the defect of no defect in the target wafer grain area C.

[0102] According to the above scheme of the embodiment of the present invention, not only can the defective areas in each area of ​​the target wafer area be detected in a targeted manner through the detection model, but also the wafer grain distribution data can be determined according to the position of the target wafer grain area in the image to be tested, and according to the distribution of each target wafer grain area in the wafer grain distribution data, it can be determined whether there is a possibility of misjudgment in the target wafer grain area. Combined with the target wafer grain distribution data, it can be determined from a global level whether the target wafer grain has defects, and combined with the defect type, it can be determined from a local level whether the target wafer grain has defects. Therefore, the above scheme can combine the global level and the local level to comprehensively determine the defects of the target wafer grain, which is conducive to improving the accuracy of the wafer detection results.

[0103] Exemplarily, step S131a may include step S131a1 and step S131a2.

[0104] In step S131a1, for each target wafer die region, a first result of the target wafer die region is generated based on the defect type of the target wafer die region and the position information corresponding to the target wafer die region in the wafer die distribution data.

[0105] In one example, the defect type of the target wafer grain area and the corresponding position information of the target wafer grain area in the wafer grain distribution data can be spliced ​​by the concat operator (splicing operator) or the add operator (superposition operator) to obtain the first result mentioned above. In another example, the defect type of the target wafer grain area and the corresponding position information of the target wafer grain area in the wafer grain distribution data can also be subjected to the feature fusion operation in the related technology to obtain the first result. In another example, the first result can also be determined directly according to the preset rules, combined with the defect type of the target wafer grain area and the corresponding position information of the target wafer grain area in the wafer grain distribution data, that is, the first result can be used to represent a defect type with a higher confidence level.

[0106] In step S131a2, based on the respective first results and defect labels of each target wafer die region, the inspection result of the wafer is determined.

[0107] In one example, the first result and the defect label can be concatenated by a concat operator or an add operator, and then input into a decision model or a decision algorithm to obtain a detection result. The decision logic of the decision model or decision algorithm can be combined with the relevant process of step S131a above, and adjusted with reference to the quality inspection requirements, and the embodiments of the present invention are not limited here. In another example, the first result and the defect label can also be subjected to the feature fusion operation in the related technology, and then input into the decision model or decision algorithm to obtain the detection result. In another example, the detection result can also be determined directly according to the preset rules, combined with the first result and the defect label, and the relevant process of step S131a above can be referred to.

[0108] The embodiment of the present invention provides an example for reference. When the first result of the target wafer grain area matches the defect label (the first result indicates the defect type, the defect label indicates the presence of a defect, then the first result and the defect label can be regarded as matching, that is, the two do not conflict), it is determined that the target wafer grain area has a defect type corresponding to the first result. When the first result of the target wafer grain area does not match the defect label (the first result indicates the defect type, the defect label indicates the absence of a defect, then the first result and the defect label can be regarded as mismatching, that is, the two conflict), it is determined that the target wafer grain area does not have a defect type corresponding to the first result. For example, take the target wafer grain area E, the target wafer grain area F, and the target wafer grain area G in the image to be tested as an example. The first result of the target wafer grain area E indicates that there is a foreign body in the surface area of ​​the target wafer grain area E, and the defect label of the target wafer grain area E indicates that there is a defect in the target wafer grain area E, then it can be determined that the target wafer grain area E has a defect of foreign body in the surface area. That is, the defect type of the target wafer grain area E is the presence of foreign body in the surface area. The first result of the target wafer grain area F indicates that the pin print of the target wafer grain area F is out of bounds, and the defect label of the target wafer grain area F indicates that the target wafer grain area F has a defect, then it can be determined that the target wafer grain area F has a pin print out of bounds defect. That is, the defect type of the target wafer grain area F is pin print out of bounds. The first result of the target wafer grain area G indicates that there are scratches in the trimming area of ​​the target wafer grain area G, and the defect label of the target wafer grain area G indicates that the target wafer grain area G does not have a defect. It can be determined that the target wafer grain area G does not have a scratch defect in the trimming area, that is, the target wafer grain area G does not have a defect. In summary, the inspection results of the wafer may include the presence of foreign matter in the surface area of ​​the wafer grain area E and the presence of pin print out of bounds in the target wafer grain area F. It should be understood that in the case where the first result does not match the defect label, the unmatched target wafer grain area can also be regarded as a wafer grain that is difficult to distinguish and output in the inspection result. Then, it can be further determined whether the difficult-to-distinguish wafer die has defects through manual or more accurate detection models.

[0109] According to the above scheme provided by the embodiment of the present invention, for each target wafer grain area, based on the defect type of the target wafer grain area and the position information corresponding to the target wafer grain area in the wafer grain distribution data, a first result of the target wafer grain area can be generated. Then, based on the first result and defect label of each target wafer grain area, the inspection result of the wafer is determined. The first result in the above scheme is obtained based on the position information corresponding to the target wafer grain area in the wafer grain distribution data, so the inspection result of the wafer can be comprehensively determined based on the position information, defect type and defect label, and then it is possible to comprehensively judge whether the target wafer grain has defects through other defective wafer grains that may exist near the target wafer grain, which is conducive to improving the accuracy of the inspection results.

[0110] Exemplarily, step S130 may include step S131b and step S132b.

[0111] In step S131b, a second result of each defective area is generated based on the defect type of the defective area and the second position information of the defective area.

[0112] The second position information is used to indicate the position of the defective area in the target wafer grain area. For example, when the image to be measured is an image obtained by taking a camera, the second position information may be the relative coordinates of the defective area in the target wafer grain area (for example, a new coordinate system is created in the wafer grain area, and the coordinates of the defective area in the coordinate system). For example, the second position information may be the relative coordinates of each vertex of the defective area in the target wafer grain area. For another example, the second position information may be the relative coordinates of the center point of the defective area in the target wafer grain area. Taking the intersection of the defective area and the pad area as an example, the second position coordinates of the defective area are the relative coordinates of the pad area image in the target wafer grain area. In the case where there is no positional intersection between the defective area and the pad area, the second position coordinates of the defective area are the relative coordinates of the defective area in the target wafer grain area. It should be understood that if all or part of the defective area is located in the pad area, the second position information may also be further used to indicate the position of the pad area in the wafer grain area.

[0113] In one example, the defect type of the defect area and the second position information of the defect area can be concatenated by a concat operator or an add operator to obtain the second result mentioned above. In another example, the defect type of the defect area and the second position information of the defect area can also be subjected to a feature fusion operation in the related technology to obtain the second result. In another example, the second result can also be determined directly according to a preset rule in combination with the defect type of the defect area and the second position information of the defect area, that is, the second result can be used to represent a defect type with a higher confidence level. It should be understood that the position information, defect type, and second position information used in the process related to obtaining the first result can also be concatenated to obtain the second result.

[0114] In step S132b, based on the second result of each defective area, the inspection result of the wafer is determined.

[0115] In one example, the second result and the defect label can be concatenated by a concat operator or an add operator, and then input into a decision model or a decision algorithm to obtain a detection result. The decision logic of the decision model or decision algorithm can be combined with the relevant process of step S131a above, and adjusted with reference to the quality inspection requirements, and the embodiments of the present invention are not limited here. In another example, the second result and the defect label can also be subjected to feature fusion operations in related technologies, and then input into a decision model or a decision algorithm to obtain a detection result. In another example, the detection result can also be determined directly according to preset rules in combination with the second result and the defect label, and the relevant process of step S131a above can be referred to.

[0116] According to the above scheme of the embodiment of the present invention, the second result of each defective area can be generated based on the defect type of each defective area and the second position information of the defective area. Then, based on the second result of each defective area, the inspection result of the wafer is determined. The second result in the above scheme is obtained based on the second position information, so the inspection result of the wafer can be comprehensively determined based on the defect type and the position of the defective area in the wafer grain area, which is conducive to improving the accuracy of the inspection result.

[0117] Exemplarily, step S130 further includes steps S131c to S134c.

[0118] In step S131c, for each defect region, the encoder in the language model generates a defect type code and a position information code of the defect region based on the defect type and position information of the defect region.

[0119] The above-mentioned position information may include at least one of the position information corresponding to the target wafer grain area in the wafer grain distribution data, the first position information and the second position information.

[0120] The encoder in the language model is used to convert the defect type, location information, and defect label of the defect area into a form that the language model can process. For example, the encoder in the language model can convert the text of the defect type into the defect type code that the language model can process. For another example, the encoder in the language model can convert the text of the location information into the location information code that the language model can process. For another example, the encoder in the language model can convert the text of the defect label into the defect label code that the language model can process.

[0121] In step S132c, the defect type code and location information code of each defect area are input into the prompt learning module to obtain the wafer description code.

[0122] See also Figure 5 As shown, Figure 5 FIG. 1 is a schematic diagram showing a wafer detection method according to an embodiment of the present invention. Figure 5 , the position information encoding may include a first position encoding obtained by an encoder for the position information corresponding to the target wafer grain area in the wafer grain distribution data, and a second position encoding obtained by an encoder for the second position information. In one example, the splicing result obtained by splicing the defect type encoding and the first position encoding (such as the first result mentioned above) can be input into the prompt learning module. In another example, the splicing result obtained by splicing the defect type encoding and the second position encoding (such as the second result mentioned above) can also be input into the prompt learning module. In another example, the splicing result obtained by splicing the defect type encoding, the first position encoding, and the second position encoding (reference Figure 5 In another example, the splicing result obtained by splicing the defect label code and the first position code can also be input into the prompt learning module.

[0123] For example, for defects in the pad area, the defect type coding of the defect type in the pad area, the position coding of the position information of the pad area in the target wafer grain area, and the position coding of the position information of the target wafer grain area in the wafer grain distribution data (or the position coding of the position information of the target wafer grain in the image to be tested) can be feature spliced ​​and then input into the prompt learning module. For another specific example, for defects in the surface area, the defect type coding of the defect type in the surface area, the position coding of the position information of the defect in the image to be tested, and the position coding of the position information of the target wafer grain where the defect is located in the wafer grain distribution data (or the position coding of the position information of the target wafer grain in the image to be tested) can be feature spliced ​​and then input into the prompt learning module. In the prompt learning module, the features obtained by feature splicing can be processed through operations such as convolution, activation, and pooling (the representativeness of the features can be enhanced by the above processing 5 times or more) to obtain enhanced features. Then, the enhanced features after convolution can be spliced ​​with the learnable prompt coding vector to obtain the wafer description code, and input into the language model. The above-mentioned learnable prompt encoding vector may be a preset encoding vector, which may be obtained by performing feature extraction on text related to the field of wafer defect detection, and may be used to enhance the language model's attention to the field of wafer detection.

[0124] In step S133c, the query information input by the user is input into the encoder in the language model to obtain the query encoding.

[0125] The query encoding obtained by the encoder can help the language model understand the user's intention.

[0126] In step S134c, the wafer description code and the query code are input into a decoder in the language model to generate a wafer inspection result corresponding to the query information.

[0127] The wafer description code and the query code may be feature fused or feature spliced, so that the language model can determine the output detection result code based on the features obtained by the feature fusion or feature splicing. Optionally, the wafer description code and the query code may be feature enhanced, and then feature fused or feature spliced ​​to obtain the detection result code. The detection result code is input into the decoder to generate a detection result in natural language that replies to the query information.

[0128] Combined with actual scenarios, for example, the query information that the user can input may be "Is there a defect in the wafer grain in the i-th row and the j-th column, and what is the defect type" (i may be a positive integer less than or equal to the total number of rows, and j may be a positive integer less than or equal to the total number of columns), and the detection result of the language model may be "There is a defect on the pad, the position coordinates of the pad are (x1, y1), and the defect type is pin mark deviation. At the same time, there is also a scratch defect on the surface, and the defect position is (x2, y2)" (x1 and x2 are horizontal coordinates, y1 and y2 are vertical coordinates. In this example, there is no restriction on the specific values, and they can represent the position of the pad and the position of the defect).

[0129] According to the above scheme of the embodiment of the present invention, for each defect area, the encoder in the language model can generate the defect type code and location information code of the defect area based on the defect type and location information of the defect area. Then, the defect type code and location information code of each defect area are input into the prompt learning module to obtain the wafer description code. The query information input by the user is then input into the encoder in the language model to obtain the query code. Finally, the wafer description code and the query code are input into the decoder in the language model to generate the detection result of the wafer corresponding to the query information. The above scheme can realize the user's targeted query on the wafer grains in the wafer by using the language model, which is conducive to the intuitive and convenient implementation of the interactive process of wafer detection.

[0130] The embodiment of the present invention further provides a wafer detection device 300. Figure 6 FIG. 3 is a schematic block diagram of a wafer inspection device 300 according to an embodiment of the present invention. Figure 6 The detection device 300 may include: a region determination module 310, a defect type generation module 320 and a detection result generation module 330.

[0131] The region determination module 310 is used to determine the target wafer grain region and the defect region in each target wafer grain region in the image to be tested of the wafer, wherein the defect region exists in the target wafer grain region. The defect type generation module 320 is used to determine the defect type of the defect region in the target wafer grain region for each target wafer grain region through the detection model corresponding to the defect region in the target wafer grain region, wherein the detection model corresponding to the defect region is related to the position of the defect region in the target wafer grain region. The detection result generation module 330 is used to determine the detection result of the wafer based on the defect type of the defect region in each target wafer grain region.

[0132] Exemplarily, the detection device 300 further includes: a wafer grain distribution data determination module and a defect label determination module.

[0133] The wafer grain distribution data determination module is used to determine the wafer grain distribution data of the image to be tested based on the first position information of the target wafer grain area, wherein the first position information is used to indicate the position of the target wafer grain area in the image to be tested, the wafer grain distribution data is used to indicate the position information of each wafer grain in the wafer, and the identifier corresponding to the target wafer grain area in the wafer grain distribution data is different from the identifier corresponding to other wafer grain areas. The defect label determination module is used to determine the defect label of each target wafer grain area based on the wafer grain distribution data through a first model, and the defect label is used to indicate whether the target wafer grain area has a defect.

[0134] The detection result generating module 330 may include a detection result first generating module.

[0135] The first detection result generation module is used to determine the detection result of the wafer based on the defect type and defect label of each target wafer grain area.

[0136] Exemplarily, the detection result first generation module may include: a first result generation module and a first result and label comprehensive determination module.

[0137] The first result generation module is used to generate the first result of each target wafer grain area based on the defect type of the target wafer grain area and the corresponding position information of the target wafer grain area in the wafer grain distribution data. The first result and label comprehensive determination module is used to determine the inspection result of the wafer based on the first result and defect label of each target wafer grain area.

[0138] Exemplarily, the detection device 300 may further include: a pad area determination module.

[0139] The pad area determination module is used to determine the pad area in each target wafer die area.

[0140] The defect type generating module 320 may include a first intersection determining module and a second intersection determining module.

[0141] The first intersection determination module is used to determine the defect type of each defect region by using the first detection model corresponding to the defect region when there is no position intersection between the defect region and any pad region. The second intersection determination module is used to determine the defect type of each defect region by using the second detection model corresponding to the defect region when there is a position intersection between the defect region and any pad region.

[0142] Exemplarily, the detection device 300 may further include a defect area image generation module.

[0143] The defect area image generation module is used for, for each defect area, when there is no position intersection between the defect area and any pad area, to crop the image to be tested according to the size of the defect area to obtain a defect area image.

[0144] The first intersection determination module may include a first detection module.

[0145] The first detection module is used to input the defect area image into the first detection model to obtain the defect type of the defect area.

[0146] Exemplarily, the detection device 300 may further include a pad area image generation module.

[0147] The pad area image generation module is used for, for each defect area, if there is a position intersection between the defect area and any pad area, to crop the image to be tested according to the size of the pad area with the position intersection to obtain the pad area image.

[0148] The second intersection determination module may include a second detection module.

[0149] The second detection module is used to input the pad area image into the second detection model to obtain the defect type of the defect area.

[0150] Exemplarily, the detection result generating module 330 may include a second result generating module and a second result comprehensive determination module.

[0151] The second result generation module is used to generate a second result of each defect area based on the defect type of each defect area and the second position information of the defect area, wherein the second position information is used to indicate the position of the defect area in the target wafer grain area. The second result comprehensive determination module is used to determine the inspection result of the wafer based on the second result of each defect area.

[0152] Exemplarily, the detection result generation module 330 may include: a first code generation module, a wafer description code generation module, a query code generation module and a decoding generation module.

[0153] The first coding generation module is used to generate the defect type code and location information code of each defect area respectively based on the defect type and location information of the defect area through the encoder in the language model. The wafer description coding generation module is used to input the defect type code and location information code of each defect area into the prompt learning module to obtain the wafer description code. The query coding generation module is used to input the query information input by the user into the encoder in the language model to obtain the query code. The decoding generation module is used to input the wafer description code and the query code into the decoder in the language model to generate the inspection result of the wafer corresponding to the query information.

[0154] According to another aspect of the present invention, an electronic device is also provided. Figure 7 FIG. 4 shows a schematic block diagram of an electronic device 400 according to an embodiment of the present invention. Figure 7 As shown, the electronic device 400 includes a processor 410 and a memory 420. The memory 420 stores a computer program. When the computer program instructions are executed by the processor 410, they are used to execute the above-mentioned wafer detection method.

[0155] In addition, according to another aspect of the present invention, a storage medium is also provided, on which program instructions are stored, and when the program instructions are executed by a computer or a processor, the computer or the processor executes the corresponding steps of the above-mentioned wafer detection method of the embodiment of the present invention, and is used to implement the corresponding modules in the above-mentioned wafer detection device or the corresponding modules in the above-mentioned electronic device according to the embodiment of the present invention. The storage medium may include, for example, a memory card of a smart phone, a storage component of a tablet computer, a hard disk of a personal computer, a read-only memory (ROM), an erasable programmable read-only memory (EPROM), a portable compact disk read-only memory (CD-ROM), a USB memory, or any combination of the above-mentioned storage media. The computer-readable storage medium may be any combination of one or more computer-readable storage media. According to another aspect of the present invention, a computer program product is also provided, including computer program instructions, and when the above-mentioned computer program instructions are executed by a computer or a processor, the computer or the processor executes the corresponding steps of the above-mentioned wafer detection method.

[0156] A person skilled in the art may understand the specific implementation scheme of the above-mentioned electronic device and storage medium by reading the above-mentioned description of the wafer detection method, which will not be described here for the sake of brevity.

[0157] Although example embodiments have been described herein with reference to the accompanying drawings, it should be understood that the above example embodiments are merely exemplary and are not intended to limit the scope of the present invention thereto. Various changes and modifications may be made therein by one of ordinary skill in the art without departing from the scope and spirit of the present invention. All such changes and modifications are intended to be included within the scope of the present invention as required by the appended claims.

[0158] Those of ordinary skill in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present invention.

[0159] In the several embodiments provided by the present invention, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic, for example, the division of the units is only a logical function division, and there may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another device, or some features can be ignored or not executed.

[0160] In the description provided herein, a large number of specific details are described. However, it is understood that embodiments of the present invention can be practiced without these specific details. In some instances, well-known methods, structures and techniques are not shown in detail so as not to obscure the understanding of this description.

[0161] Similarly, it should be understood that in order to streamline the present invention and help understand one or more of the various inventive aspects, in the description of the exemplary embodiments of the present invention, the various features of the present invention are sometimes grouped together into a single embodiment, figure, or description thereof. However, the method of the present invention should not be interpreted as reflecting the following intention: the claimed invention requires more features than the features explicitly stated in each claim. More specifically, as reflected in the corresponding claims, the inventive point is that the corresponding technical problem can be solved with less than all the features of a single disclosed embodiment. Therefore, the claims following the specific embodiment are hereby expressly incorporated into the specific embodiment, wherein each claim itself serves as a separate embodiment of the present invention.

[0162] Those skilled in the art will understand that, except for mutually exclusive features, all features disclosed in this specification (including the accompanying claims, abstract and drawings) and all processes or units of any method or device disclosed in this specification may be combined in any combination. Unless otherwise explicitly stated, each feature disclosed in this specification (including the accompanying claims, abstract and drawings) may be replaced by an alternative feature that provides the same, equivalent or similar purpose.

[0163] In addition, those skilled in the art will appreciate that, although some embodiments described herein include certain features included in other embodiments but not other features, the combination of features of different embodiments is meant to be within the scope of the present invention and form different embodiments. For example, in the claims, any one of the claimed embodiments may be used in any combination.

[0164] The various component embodiments of the present invention may be implemented in hardware, or in software modules running on one or more processors, or in a combination thereof. Those skilled in the art should understand that a microprocessor or a digital signal processor (DSP) may be used in practice to implement some or all of the functions of some modules in the wafer detection device according to an embodiment of the present invention. The present invention may also be implemented as a device program (e.g., a computer program and a computer program product) for executing part or all of the methods described herein. Such a program for implementing the present invention may be stored on a computer-readable medium, or may be in the form of one or more signals. Such a signal may be downloaded from an Internet website, or provided on a carrier signal, or provided in any other form.

[0165] It should be noted that the above embodiments illustrate the present invention rather than limit it, and that those skilled in the art may devise alternative embodiments without departing from the scope of the appended claims. In the claims, any reference symbol between brackets shall not be construed as a limitation on the claims. The word "comprising" does not exclude the presence of elements or steps not listed in the claims. The word "one" or "an" preceding an element does not exclude the presence of a plurality of such elements. The present invention may be implemented by means of hardware comprising a number of different elements and by means of a suitably programmed computer. In a unit claim enumerating a number of devices, several of these devices may be embodied by the same hardware item. The use of the words first, second, and third, etc., does not indicate any order. These words may be interpreted as names.

[0166] The above is only a specific embodiment of the present invention or an explanation of a specific embodiment. The protection scope of the present invention is not limited thereto. Any person skilled in the art can easily think of changes or substitutions within the technical scope disclosed by the present invention, which should be included in the protection scope of the present invention. The protection scope of the present invention shall be based on the protection scope of the claims.

Claims

1. A wafer detection method, characterized in that: The method comprises: In the image to be tested of the wafer, determining a target wafer grain region and a defect region in each target wafer grain region, wherein the defect region exists in the target wafer grain region; For each target wafer die region, determining the defect type of the defect region in the target wafer die region by using a detection model corresponding to the defect region in the target wafer die region, wherein the detection model corresponding to the defect region is related to the position of the defect region in the target wafer die region; Determining an inspection result of the wafer based on a defect type of a defect region in each target wafer die region; Wherein, determining the inspection result of the wafer based on the defect type of the defect area in each target wafer grain area includes: Generate a second result of the defect area based on the defect type of each defect area and the second position information of the defect area, wherein the second position information is used to indicate the position of the defect area in the target wafer die area; Based on the second result of each defective area, an inspection result of the wafer is determined.

2. The method according to claim 1, characterized in that The method further comprises: Based on the first position information of the target wafer grain area, determining the wafer grain distribution data of the image to be tested, wherein the first position information is used to indicate the position of the target wafer grain area in the image to be tested, the wafer grain distribution data is used to indicate the position information of each wafer grain in the wafer, and in the wafer grain distribution data, the identifier corresponding to the target wafer grain area is different from the identifiers corresponding to other wafer grain areas; Determine, by a first model, a defect label of each target wafer grain region based on the wafer grain distribution data, wherein the defect label is used to indicate whether the target wafer grain region has a defect; The method of determining the inspection result of the wafer based on the defect type of the defect area in each target wafer die area includes: Based on the defect type and defect label of each target wafer die area, the inspection result of the wafer is determined.

3. The method according to claim 2, characterized in that The step of determining the inspection result of the wafer based on the defect type and defect label of each target wafer grain region includes: For each target wafer grain region, based on the defect type of the target wafer grain region and the position information corresponding to the target wafer grain region in the wafer grain distribution data, generate a first result of the target wafer grain region; Based on the respective first results and defect labels of each target wafer die region, an inspection result of the wafer is determined.

4. The method according to claim 1, characterized in that The method further comprises: determining a pad area within each target wafer die area; For each target wafer grain region, determining the defect type of the defect region in the target wafer grain region by using the detection model corresponding to the defect region in the target wafer grain region includes: For each defect area, In the case that there is no position intersection between the defective area and any pad area, determining the defect type of the defective area by using a first detection model corresponding to the defective area; In the case where there is a position intersection between the defective region and any pad region, the defect type of the defective region is determined by using a second detection model corresponding to the defective region.

5. The method according to claim 4, characterized in that The method further comprises: For each defect area, when there is no position intersection between the defect area and any pad area, the image to be tested is cropped according to the size of the defect area to obtain an image of the defect area; The step of determining the defect type of the defect area by using the first detection model corresponding to the defect area includes: The defect area image is input into the first detection model to obtain the defect type of the defect area.

6. The method according to claim 4, characterized in that The method further comprises: For each defect area, when there is a position intersection between the defect area and any pad area, the image to be tested is cropped according to the size of the pad area with the position intersection to obtain a pad area image; The step of determining the defect type of the defect area by using a second detection model corresponding to the defect area includes: The pad area image is input into the second detection model to obtain the defect type of the defect area.

7. The method according to any one of claims 1 to 6, characterized in that The method of determining the inspection result of the wafer based on the defect type of the defect area in each target wafer die area includes: For each defect region, the encoder in the language model generates a defect type code and a position information code of the defect region based on the defect type and position information of the defect region respectively; Inputting the defect type code and location information code of each defect area into the prompt learning module to obtain the wafer description code; Inputting the query information input by the user into the encoder in the language model to obtain the query encoding; The wafer description code and the query code are input into a decoder in the language model to generate a detection result of the wafer corresponding to the query information.

8. A wafer detection device, characterized in that: The device comprises: A region determination module, used for determining a target wafer grain region and a defect region in each target wafer grain region in a wafer image to be tested, wherein the defect region exists in the target wafer grain region; A defect type generating module is used to determine, for each target wafer grain region, the defect type of the defect region in the target wafer grain region by using a detection model corresponding to the defect region in the target wafer grain region, wherein the detection model corresponding to the defect region is related to the position of the defect region in the target wafer grain region; A test result generating module, for determining a test result of the wafer based on a defect type of a defect region in each target wafer die region; Among them, the detection result generation module includes a second result generation module and a second result comprehensive judgment module, the second result generation module is used to generate a second result of the defect area based on the defect type of each defect area and the second position information of the defect area, the second position information is used to indicate the position of the defect area in the target wafer grain area; the second result comprehensive judgment module is used to determine the detection result of the wafer based on the second result of each defect area.

9. An electronic device, characterized in that: It comprises a memory and a processor, wherein the memory is used to store a computer program; and the processor is used to execute the computer program to implement the wafer detection method as described in any one of claims 1 to 7.

10. A storage medium storing a computer program / instruction, characterized in that: The computer program / instructions are used to execute the wafer detection method as described in any one of claims 1-7 when running.

11. A computer program product comprising computer program instructions, characterized in that The computer program instructions are used to execute the wafer detection method as described in any one of claims 1-7 when running.

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