Unidirectional Conductive Circuit, Power Multiplexer, and Electronic Device

Abstract

The present application discloses a unidirectional conduction circuit, a power multiplexer and an electronic device, relating to the technical field of electronic circuits. The unidirectional conduction circuit includes a first transistor and a first driving branch, and the first transistor is connected between a first voltage input terminal and a voltage output terminal. The first driving branch is respectively connected to the first voltage input terminal, the voltage output terminal and the control terminal of the first transistor. The first driving branch is configured to output a first driving voltage to the control terminal of the first transistor, and adjust the first driving voltage based on the voltage difference between the first input voltage at the first voltage input terminal and the output voltage at the voltage output terminal, so as to adjust the on-impedance of the first transistor, so that when the first input voltage is greater than the output voltage, the voltage difference is maintained at a preset voltage difference value, and when the first input voltage is less than or equal to the output voltage, the first transistor is turned off. By the above method, the power supply loss can be reduced, the power supply efficiency can be improved, and a stable voltage output can be achieved.

Description

Technical Field

[0001] Embodiments of the present application relate to the technical field of electronic circuits, and particularly to a unidirectional conduction circuit, a power multiplexer, and an electronic device. Background Art

[0002] A diode is an electronic component whose main characteristic is that it allows current to flow freely in one direction while almost completely blocking current flow in the opposite direction. Therefore, it can be said that a diode is unidirectionally conductive. This characteristic enables the diode to play various roles in a circuit, such as rectification and protecting the circuit from reverse voltage damage. The basic structure of a diode is a PN junction composed of a P-type semiconductor and an N-type semiconductor. When a forward voltage is applied across the two ends of the diode, that is, when the P-type terminal is connected to the positive pole of the power supply and the N-type terminal is connected to the negative pole of the power supply, the diode conducts; conversely, if a reverse voltage is applied, the diode cuts off, blocking the current flow.

[0003] However, when the diode is forward-conducting, there is a large forward voltage drop across the two ends of the diode. For example, 0.7V, resulting in a high loss on the diode and low power supply efficiency when applied to a power supply circuit. Moreover, this forward voltage drop increases with the increase of the forward current, which is not conducive to achieving a stable voltage output. Summary of the Invention

[0004] Embodiments of the present application provide a unidirectional conduction circuit, a power multiplexer, and an electronic device, which can reduce power supply loss, improve power supply efficiency, and achieve a stable voltage output.

[0005] In a first aspect, embodiments of the present application provide a unidirectional conduction circuit, including:

[0006] A first transistor connected between a first voltage input terminal and a voltage output terminal;

[0007] A first driving branch respectively connected to the first voltage input terminal, the voltage output terminal, and the control terminal of the first transistor, configured to output a first driving voltage to the control terminal of the first transistor, and adjust the first driving voltage based on the voltage difference between the first input voltage at the first voltage input terminal and the output voltage at the voltage output terminal, so as to adjust the on-impedance of the first transistor, such that when the first input voltage is greater than the output voltage, the voltage difference is maintained at a preset voltage difference value, and when the first input voltage is less than or equal to the output voltage, the first transistor is turned off.

[0008] In one or more embodiments, the first driving branch includes a first resistor, a second resistor, a second transistor, a third transistor, a first current source, and a second current source;

[0009] The first resistor is connected between the first voltage input terminal and the first end of the non-control terminal of the second transistor, the second resistor is connected between the voltage output terminal and the first end of the non-control terminal of the third transistor, the control terminal of the second transistor is respectively connected to the second end of the non-control terminal of the second transistor and the control terminal of the third transistor, the second end of the non-control terminal of the second transistor is connected to the negative electrode of the first current source, the positive electrodes of the first current source and the second current source are both grounded, and the second end of the non-control terminal of the third transistor is respectively connected to the negative electrode of the second current source and the control terminal of the first transistor;

[0010] The first drive branch is configured to maintain the difference between the voltage drop generated by the first current output by the first current source across the first resistor and the voltage drop generated by the second current output by the second current source across the second resistor equal to the preset voltage difference.

[0011] In one or more embodiments, the first current output by the first current source is equal to the second current output by the second current source, and the second transistor and the third transistor have the same size.

[0012] In one or more embodiments, both the second transistor and the third transistor are field effect transistors;

[0013] The control terminals of the second transistor and the third transistor are both the gates of the field effect transistors, the first ends of the non-control terminals of the second transistor and the third transistor are both the sources of the field effect transistors, and the second ends of the non-control terminals of the second transistor and the third transistor are both the drains of the field effect transistors.

[0014] In one or more embodiments, both the second transistor and the third transistor are bipolar junction transistors;

[0015] The control terminals of the second transistor and the third transistor are both the bases of the bipolar junction transistors, the first ends of the non-control terminals of the second transistor and the third transistor are both the emitters of the bipolar junction transistors, and the second ends of the non-control terminals of the second transistor and the third transistor are both the collectors of the bipolar junction transistors.

[0016] In one or more embodiments, the first drive branch further includes:

[0017] A bias branch, connected between the control terminal of the second transistor and ground and connected to the negative electrode of the first current source, is configured to form a path between the control terminal of the second transistor and ground.

[0018] In one or more embodiments, the bias branch includes a fourth transistor and a third resistor;

[0019] A control terminal of the fourth transistor is connected to a negative electrode of the first current source. A first end of a non-control terminal of the fourth transistor is connected to a control terminal of the second transistor. A second end of the non-control terminal of the fourth transistor is grounded through the third resistor.

[0020] In one or more embodiments, the first driving branch further includes:

[0021] A resistor branch, connected between the first voltage input terminal and the control terminal of the first transistor, is configured to generate a third current based on the first input voltage, where the third current is greater than currents at control terminals of the second transistor and the third transistor.

[0022] In one or more embodiments, the resistor branch includes a fourth resistor;

[0023] The fourth resistor is connected between the first voltage input terminal and the control terminal of the second transistor.

[0024] In one or more embodiments, the first driving branch further includes:

[0025] An output buffer branch, connected to a negative electrode of the second current source, the voltage output terminal, and the control terminal of the first transistor respectively, is configured such that an input resistance of the output buffer branch is greater than an output resistance to reduce an output resistance of the first driving branch.

[0026] In one or more embodiments, the output buffer branch includes a fifth resistor and a fifth transistor;

[0027] A first end of the fifth resistor is connected to the voltage output terminal. A second end of the fifth resistor is connected to a first end of a non-control terminal of the fifth transistor and the control terminal of the first transistor respectively. A control terminal of the fifth transistor is connected to a negative electrode of the second current source. A second end of the non-control terminal of the fifth transistor is grounded.

[0028] In one or more embodiments, the output buffer branch includes a sixth transistor and a seventh transistor;

[0029] A control terminal of the sixth transistor is connected to a control terminal of the seventh transistor and a negative electrode of the second current source respectively. A second end of a non-control terminal of the sixth transistor is connected to the voltage output terminal. A first end of the non-control terminal of the sixth transistor is connected to a first end of a non-control terminal of the seventh transistor and the control terminal of the first transistor respectively. A second end of the non-control terminal of the seventh transistor is grounded.

[0030] In a second aspect, an embodiment of the present application provides a power multiplexer, including a voltage converter and the unidirectional conduction circuit as described above;

[0031] A first end of the unidirectional conduction circuit is connected to a first voltage input terminal for inputting a first input voltage. A first end of the voltage converter is connected to a second voltage input terminal for inputting a second input voltage. A second end of the unidirectional conduction circuit and a second end of the voltage converter are both connected to a voltage output terminal;

[0032] The power multiplexer is configured to automatically supply current from the unidirectional conduction circuit to the voltage output terminal when the output voltage of the unidirectional conduction circuit is greater than a preset output voltage of the voltage converter, and automatically supply current from the voltage converter to the voltage output terminal when the output voltage of the unidirectional conduction circuit is less than the preset output voltage.

[0033] In one or more embodiments, the voltage converter includes:

[0034] An eighth transistor connected between the second voltage input terminal and the voltage output terminal;

[0035] A second driving branch connected to the voltage output terminal, a reference voltage, and a control terminal of the eighth transistor, configured to output a second driving voltage to the control terminal of the eighth transistor, adjust the second driving voltage based on the reference voltage and the output voltage of the voltage output terminal to adjust the on-resistance of the eighth transistor, and supply current to the voltage output terminal to maintain the output voltage at the preset output voltage when the output voltage of the unidirectional conduction circuit is less than the preset output voltage; and maintain the eighth transistor off when the output voltage of the unidirectional conduction circuit is greater than the preset output voltage.

[0036] In one or more embodiments, the second driving branch includes a sixth resistor, a seventh resistor, and an operational amplifier;

[0037] The sixth resistor and the seventh resistor are connected in series between the voltage output terminal and the ground. A connection point between the sixth resistor and the seventh resistor is connected to a non-inverting input terminal of the operational amplifier. The reference voltage is input to an inverting input terminal of the operational amplifier. An output terminal of the operational amplifier is connected to the control terminal of the eighth transistor. A first end of a non-control terminal of the eighth transistor is connected to the second voltage input terminal, and a second end of the non-control terminal of the eighth transistor is connected to the voltage output terminal.

[0038] In one or more embodiments, the voltage converter further includes:

[0039] An isolation branch is connected between the eighth transistor and the voltage output terminal, and is configured to establish a connection between the eighth transistor and the voltage output terminal when the second input voltage is greater than a preset voltage threshold, and is configured to disconnect the connection between the voltage output terminal and the eighth transistor when the second input voltage is less than the preset voltage threshold.

[0040] In one or more embodiments, the isolation branch includes a ninth transistor;

[0041] A control terminal of the ninth transistor inputs a third driving signal. A first end of the non-control terminal of the ninth transistor is connected to the voltage output terminal, and a second end of the non-control terminal of the ninth transistor is connected to a second end of the non-control terminal of the eighth transistor;

[0042] Wherein, when the second input voltage is greater than the preset voltage threshold, the third driving signal is at a low level to control the ninth transistor to conduct; when the second input voltage is less than the preset voltage threshold, the third driving signal is at a high level to control the ninth transistor to turn off.

[0043] In one or more embodiments, the power multiplexer further includes a controller, and the controller is configured to output a control signal based on a voltage difference between the first input voltage and an output voltage of the voltage output terminal when the voltage difference is greater than a first preset voltage, wherein the first preset voltage is greater than a preset voltage difference;

[0044] The unidirectional conduction circuit further includes a current limiting branch, and the current limiting branch is connected between the first transistor and the voltage output terminal. The current limiting branch is configured to adjust a conduction impedance based on the control signal so that a current flowing through the first transistor does not exceed a preset current limit value.

[0045] In one or more embodiments, the current limiting branch includes a tenth transistor;

[0046] A control terminal of the tenth transistor is connected to the controller. A first end of the non-control terminal of the tenth transistor is connected to a first end of the non-control terminal of the first transistor, and a second end of the non-control terminal of the tenth transistor is connected to the voltage output terminal.

[0047] In a third aspect, an embodiment of the present application provides an electronic device, including the power multiplexer as described above.

[0048] The beneficial effects of the present application are as follows: The unidirectional conduction circuit of the embodiment of the present application includes a first transistor and a first driving branch. Among them, the first transistor is connected between the first voltage input terminal and the voltage output terminal. The first driving branch is respectively connected to the first voltage input terminal, the voltage output terminal, and the control terminal of the first transistor. The first driving branch is configured to output a first driving voltage to the control terminal of the first transistor, and adjust the first driving voltage based on the voltage difference between the first input voltage of the first voltage input terminal and the output voltage of the voltage output terminal, so as to adjust the on-resistance of the first transistor, so that when the first input voltage is greater than the output voltage, the voltage difference is maintained at a preset voltage difference value, and when the first input voltage is less than or equal to the output voltage, the first transistor is turned off. Thus, the above process realizes the function of a diode. Since a transistor is used to conduct current, the voltage difference can be made much smaller than the on-voltage drop when the diode conducts forward, which is beneficial to reducing power supply loss and improving power supply efficiency. Moreover, by adjusting the on-resistance of the first transistor, the voltage difference can be maintained stable, thereby realizing a stable voltage output. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] One or more embodiments are exemplarily illustrated by the pictures in the corresponding drawings. These exemplary illustrations are not intended to limit the embodiments. Elements with the same reference numerals in the drawings are represented as similar elements.

[0050] Figure 1 is a schematic structural diagram of the unidirectional conduction circuit provided by the embodiment of the present application;

[0051] Figure 2 is a schematic circuit structure diagram of the first driving branch provided by the embodiment of the present application Figure 1 ;

[0052] Figure 3 is a schematic circuit structure diagram of the first driving branch provided by the embodiment of the present application Figure 2 ;

[0053] Figure 4 is a schematic circuit structure diagram of the first driving branch provided by the embodiment of the present application Figure 3 ;

[0054] Figure 5 is a schematic circuit structure diagram of the first driving branch provided by the embodiment of the present application Figure 4 ;

[0055] Figure 6 is a schematic circuit structure diagram of the first driving branch provided by the embodiment of the present application Figure 5 ;

[0056] Figure 7 is a schematic circuit structure diagram of the first driving branch provided by the embodiment of the present application Figure 6 ;

[0057] Figure 8 Schematic diagram of the circuit structure of the first drive branch provided by an embodiment of the present application Figure 7 ;

[0058] Figure 9 Schematic diagram of the circuit structure of the first drive branch provided by an embodiment of the present application Figure 8 ;

[0059] Figure 10 Schematic diagram of the circuit structure of the first drive branch provided by an embodiment of the present application Figure 9 ;

[0060] Figure 11 Schematic diagram of the composition block diagram of the power multiplexer provided by an embodiment of the present application Figure 1 ;

[0061] Figure 12 Schematic diagram of the composition block diagram of the power multiplexer provided by an embodiment of the present application Figure 2 ;

[0062] Figure 13 Schematic diagram of the circuit structure of the power multiplexer provided by an embodiment of the present application Figure 1 ;

[0063] Figure 14 Schematic diagram of the circuit structure of the power multiplexer provided by an embodiment of the present application Figure 2 ;

[0064] Figure 15 Schematic diagram of the circuit structure of the power multiplexer provided by an embodiment of the present application Figure 3 ;

[0065] Figure 16 Schematic diagram of the circuit structure of the power multiplexer provided by an embodiment of the present application Figure 4 ;

[0066] Figure 17 Schematic diagram of the circuit structure of the power multiplexer provided by an embodiment of the present application Figure 5 ;

[0067] Figure 18 Schematic diagram of the circuit structure of the power multiplexer provided by an embodiment of the present application Figure 6 ;

[0068] Figure 19 Schematic diagram of the circuit structure of the power multiplexer provided by an embodiment of the present application Figure 7 ;

[0069] Figure 20 is Figure 19 Schematic diagram of each signal in the power multiplexer shown Detailed implementation manners

[0070] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions in the embodiments of this application will be clearly and elaborately described below with reference to the accompanying drawings in the embodiments of this application. Obviously, the described embodiments are some but not all of the embodiments of this application. It should be understood that the specific embodiments described herein are only used to explain this application and are not used to limit this application.

[0071] It should be noted that when an element is expressed as "connected" to another element, it can be directly connected to the other element, or there can be one or more intermediate elements therebetween.

[0072] In addition, the technical features involved in the various embodiments of this application described below can be combined with each other as long as they do not conflict with each other.

[0073] Please refer to Figure 1 , Figure 1 , which is a schematic structural diagram of the unidirectional conduction circuit provided by the embodiments of this application. As Figure 1 shown, the unidirectional conduction circuit 100 includes a first transistor M D and a first driving branch 101.

[0074] Among them, the first transistor M D is connected between the first voltage input terminal VIN1 and the voltage output terminal VOUT, that is, the first end of the non-control end of the first transistor M D is connected to the voltage output terminal VOUT, and the second end of the non-control end of the first transistor M D is connected to the first voltage input terminal VIN1. The first driving branch 101 is respectively connected to the first voltage input terminal VIN1, the voltage output terminal VOUT, and the control end of the first transistor M D .

[0075] In this embodiment, taking the first transistor M D as a P-type field effect transistor (PMOS transistor) as an example, the control end of the first transistor M D is the gate of the PMOS transistor, the first end of the non-control end of the first transistor M D is the source of the PMOS transistor, and the second end of the non-control end of the first transistor M D is the drain of the PMOS transistor. Of course, in other embodiments, the first transistor M D can also be any controllable switch, such as an NMOS transistor or an IGBT switch transistor, etc.

[0076] Specifically, the first driving branch 101 is configured to output a first driving voltage V gate to the first transistor M DThe control terminal, and adjusts the first driving voltage V based on the voltage difference between the first input voltage (denoted as VI1) of the first voltage input terminal VIN1 and the output voltage V01 of the voltage output terminal VOUT gate , so as to adjust the first transistor M D 's on-resistance, so that when the first input voltage VI1 is greater than the output voltage V01, the voltage difference is maintained at a preset voltage difference (denoted as ΔV), and when the first input voltage VI1 is less than or equal to the output voltage V01, the first transistor M D is turned off.

[0077] Among them, the preset voltage difference ΔV can be set based on the actual application scenario. The embodiments of the present application do not make specific limitations on this, as long as it satisfies that the preset voltage difference ΔV is much smaller than the on-voltage drop of the body diode of the first transistor M D . For example, in some embodiments, the preset voltage difference ΔV is configured to be 10 mV. The first driving branch 101 is configured to automatically adjust the first driving voltage V in real time according to the actual voltage difference between the first input voltage VI1 and the output voltage V01 gate , so as to adjust the first transistor M D 's on-resistance. If the first input voltage VI1 is greater than the output voltage V01, then control the actual voltage difference between the first input voltage VI1 and the output voltage V01 to be equal to the preset voltage difference ΔV; and if the first input voltage VI1 is less than or equal to the output voltage V01, then control the first transistor M D to turn off. Thus, the function of unidirectional conduction is realized, that is, the function of a diode is realized. At the same time, by setting the preset voltage difference ΔV to be much smaller than the on-voltage drop when the diode conducts forward, it is possible to make the actual voltage difference between the first input voltage VI1 and the output voltage V01 much smaller than the on-voltage drop when the diode conducts forward, which is beneficial to reducing power supply loss and improving power supply efficiency. And by adjusting the on-resistance of the first transistor M D in a closed loop, the voltage difference can be maintained stable at ΔV, thereby realizing a stable voltage output.

[0078] In some embodiments, as shown in Figure 2 , the first driving branch 101 includes a first resistor R1, a second resistor R2, a second transistor (i.e., a field effect transistor M2), a third transistor (i.e., a field effect transistor M3), a first current source IA1, and a second current source IA2. In this embodiment, taking both the second transistor and the third transistor as PMOS field effect transistors as an example, among them, the control terminals of the second transistor and the third transistor are both the gates of the field effect transistors, the first non-control terminals of the second transistor and the third transistor are both the sources of the field effect transistors, and the second non-control terminals of the second transistor and the third transistor are both the drains of the field effect transistors.

[0079] Among them, the first resistor R1 is connected between the first voltage input terminal VIN1 and the source of the field effect transistor M2; the second resistor R2 is connected between the voltage output terminal VOUT and the source of the field effect transistor M3; the gate of the field effect transistor M2 is respectively connected to the drain of the field effect transistor M2 and the gate of the field effect transistor M3; the drain of the field effect transistor M2 is connected to the negative electrode of the first current source IA1; the positive electrodes of the first current source IA1 and the second current source IA2 are both grounded to GND; the drain of the field effect transistor M3 is respectively connected to the negative electrode of the second current source IA2 and the control terminal of the first transistor M D to output the first driving voltage V gate to the control terminal of the first transistor M D 's control terminal.

[0080] Specifically, the first driving branch 101 is configured to maintain the voltage drop generated by the first current (denoted as current I1) output by the first current source IA1 on the first resistor R1 and the voltage drop generated by the second current (denoted as current I2) output by the second current source IA2 on the second resistor R2 to be equal to a preset voltage difference ΔV, that is, ΔV = I1 * R1 - I2 * R2. Since the current mirror circuit composed of the field effect transistor M2 and the field effect transistor M3 will ensure that the source voltages of the field effect transistor M2 and the field effect transistor M3 are equal, it can be obtained that: VI1 - I1 * R1 = VO1 - I2 * R2. Thus, VI1 - VO1 = I1 * R1 - I2 * R2 = ΔV. It can be seen that by appropriately setting the first resistor R1, the second resistor R2, the first current source IA1, and the second current source IA2, the required preset voltage difference ΔV can be obtained.

[0081] In some embodiments, the first current I1 output by the first current source IA1 is equal to the second current I2 output by the second current source IA2, that is, I1 = I2. And, the sizes of the second transistor and the third transistor are the same, that is, the sizes (i.e., the aspect ratios) of the field effect transistor M2 and the field effect transistor M3 are the same. Then, ΔV = I1 * (R1 - R2), that is, the preset voltage difference ΔV can be configured by configuring the difference in the resistance values of the first resistor R1 and the second resistor R2.

[0082] Taking I1 = I2 as an example to illustrate Figure 1 the Figure 2 working principle of the combination of

[0083] When the unidirectional conduction circuit operates in a steady state, the source voltage of the field effect transistor M2 is equal to the source voltage of the field effect transistor M3, and the current flowing through the first resistor R1 and the second resistor R2 is both I1. If the load connected to the voltage output terminal VOUT increases (for example, taking the output resistance as an example to characterize the load, the corresponding output resistance decreases at this time), it will cause the voltage at the voltage output terminal VOUT to drop. Since the gate voltage of the field effect transistor M3 is the same as the gate voltage of the field effect transistor M2, the voltage drop at the voltage output terminal VOUT causes the voltage difference between the source and the gate of the field effect transistor M3 to drop, making the field effect transistor M3 not fully conductive, and the current flowing through the second resistor R2 drops to I1 - ΔI. The second current source IA2 will extract a current ΔI from the control terminal of the first transistor M D , causing the voltage at the control terminal of the first transistor M D to drop, making the first transistor M D more fully conductive. The on-resistance of the first transistor M D decreases, thereby increasing the output voltage VO1 at the voltage output terminal VOUT, forming a negative feedback process to maintain the voltage difference between the first voltage input terminal VIN1 and the voltage output terminal VOUT stable near the preset voltage difference ΔV.

[0084] However, in the Figure 2 circuit structure shown, it may be difficult to stabilize the voltage difference between the first voltage input terminal VIN1 and the voltage output terminal VOUT near the preset voltage difference ΔV due to the poor matching between the field effect transistors M2 and M3.

[0085] Based on this, in some embodiments, the field effect transistors M2 and M3 can be replaced with bipolar transistors. In this embodiment, taking the second transistor and the third transistor as PNP bipolar transistors as an example, specifically as Figure 3 shown, the second transistor (i.e., the bipolar transistor Q2) and the third transistor (i.e., the bipolar transistor Q3) are both bipolar transistors. The control terminals of the second transistor and the third transistor are both the bases of the bipolar transistors. The first non-control terminals of the second transistor and the third transistor are both the emitters of the bipolar transistors. The second non-control terminals of the second transistor and the third transistor are both the collectors of the bipolar transistors.

[0086] Specifically, the matching degree of the bipolar transistors Q2 and Q3 during the manufacturing process is better than that of the field effect transistors M2 and M3. Therefore, using the bipolar transistors Q2 and Q3 to form a current mirror can more accurately maintain the equality of the voltages at the emitters of the bipolar transistor Q2 and the bipolar transistor Q3, and further ensure that the voltage difference between the first voltage input terminal VIN1 and the voltage output terminal VOUT is more accurately maintained at the preset voltage difference ΔV.

[0087] In some embodiments, as Figure 4 shown, on the basis of the circuit structure shown in Figure 3 the first driving branch 101 further includes a bias branch 1011, wherein the bias branch 1011 is connected between the base of the bipolar transistor Q2 and the ground GND, and is connected to the negative pole of the first current source IA1.

[0088] Specifically, the bias branch 1011 is configured to form a path between the base of the bipolar transistor Q2 and the ground GND. That is, the introduction of the bias branch 1011 is to provide an independent grounding loop for the bias currents of the base of the bipolar transistor Q2 and the base of the bipolar transistor Q3, so as to ensure that the first current I1 output by the first current source IA1 is equal to the current flowing through the first resistor R1, and to ensure that the second current I2 output by the second current source IA2 is equal to the current flowing through the second resistor R2. Thus, when the first current I1 and the second current I2 are equal, it can be ensured that the voltage at the emitter of the bipolar transistor Q2 is equal to the voltage at the emitter of the bipolar transistor Q3.

[0089] In some embodiments, as Figure 5 shown, the bias branch 1011 includes a fourth transistor M4 and a third resistor R3.

[0090] Wherein, the control terminal of the fourth transistor M4 is connected to the negative pole of the first current source IA1, the first end of the non-control terminal of the fourth transistor M4 is connected to the base of the bipolar transistor Q2, and the second end of the non-control terminal of the fourth transistor M4 is grounded to GND through the third resistor R3.

[0091] In this embodiment, taking the fourth transistor M4 as a PMOS transistor as an example, the control terminal of the fourth transistor M4 is the gate of the PMOS transistor, the first end of the non-control terminal of the fourth transistor M4 is the source of the PMOS transistor, and the second end of the non-control terminal of the fourth transistor M4 is the drain of the PMOS transistor. Of course, in other embodiments, the fourth transistor M4 can also be any controllable switch, such as an NMOS transistor or an IGBT switch tube, etc.

[0092] In some embodiments, as Figure 6 shown, on the basis of the circuit structure shown in Figure 5 the first driving branch 101 further includes a resistor branch 1012. Wherein, the resistor branch 1012 is connected between the first voltage input terminal VIN1 and the control terminal of the second transistor.

[0093] Specifically, the resistor branch 1012 is configured to generate a third current based on the first input voltage VI1, where the third current is greater than the current at the base of the bipolar transistors Q2 / Q3, typically the third current is much greater than the current at the base of the bipolar transistors Q2 / Q3. For example, the third current is 100 times greater than the current at the base of the bipolar transistors Q2 / Q3. Subsequently, the influence of the change in the current at the base of the bipolar transistors Q2 / Q3 on the gate bias of the fourth transistor M4 can be further reduced, and the matching accuracy of the first current I1 output by the first current source IA1 and the current flowing through the first resistor R1, and the matching accuracy of the second current I2 output by the second current source IA2 and the current flowing through the second resistor R2 can be further improved.

[0094] In some embodiments, as Figure 7 shown, the resistor branch 1012 includes a fourth resistor R4.

[0095] Wherein, the fourth resistor R4 is connected between the first voltage input terminal VIN1 and the base of the bipolar transistor Q2.

[0096] In some embodiments, as Figure 8 shown, the first driving branch 101 further includes an output buffer branch 1013, wherein the output buffer branch 1013 is connected to the negative electrode of the second current source IA2.

[0097] Specifically, the output buffer branch 1013 is configured such that the input resistance of the output buffer branch 1013 is greater than the output resistance, so as to reduce the output resistance ro of the first driving branch 101. A lower output resistance is beneficial to increasing the phase margin of the unidirectional conduction circuit 100 and increasing the response speed.

[0098] Specifically, in the frequency response of the unidirectional conduction circuit 100 of the first driving branch 101 as Figures 2 - 7 shown, there are two poles. One is the main pole determined by the capacitance CL (not shown) at the voltage output terminal VOUT, the load RL (not shown) connected to the voltage output terminal VOUT, and the on-resistance Ro of the first transistor M D , and its frequency fp1 = 1 / 2pi((RL / / Ro)*CL). The other is the secondary pole determined by the output resistance ro at the output terminal Vgate of the first driving branch 101 and the gate parasitic capacitance Cgd of the first transistor M D , and its frequency fp2 ≈ 1 / 2pi(ro*Cgd). Usually in applications, the frequency of the main pole fp1 is relatively low and varies with the load. And the frequency of the secondary pole can be very close to the frequency of the main pole, causing problems in applications Figures 2 - 7The unidirectional conduction circuit 100 of the first driving branch 101 shown has insufficient phase margin, a relatively slow transient response speed, and a risk of instability. By adding the output buffer branch 1013, the output resistance ro of the first driving branch 101 can be effectively reduced. Furthermore, the frequency of the secondary pole of the unidirectional conduction circuit 100 is pushed up to be much higher than the frequency of the main pole, so that an increase in the phase margin and an improvement in the response speed of the unidirectional conduction circuit 100 can be achieved.

[0099] In some embodiments, as Figure 9 shown, the output buffer branch 1013 includes a fifth resistor R5 and a fifth transistor Q5.

[0100] Among them, the first end of the fifth resistor R5 is connected to the voltage output terminal VOUT, and the second end of the fifth resistor R5 is respectively connected to the first end of the non-control end of the fifth transistor Q5 and the control end of the first transistor M D The control end of the fifth transistor Q5 is connected to the negative pole of the second current source IA2, and the second end of the non-control end of the fifth transistor Q5 is grounded to GND.

[0101] In this embodiment, taking the fifth transistor Q5 as a bipolar transistor as an example, the control end of the fifth transistor Q5 is the base of the bipolar transistor, the first end of the non-control end of the fifth transistor Q5 is the emitter of the bipolar transistor, and the second end of the non-control end of the fifth transistor Q5 is the collector of the bipolar transistor. Of course, in other embodiments, the fifth transistor Q5 can also be any controllable switch, such as a MOS transistor or an IGBT switch tube, etc.

[0102] Specifically, the fifth resistor R5 and the fifth transistor Q5 form a common collector amplifier circuit. According to the properties of the common collector circuit, its input resistance is very large and its output resistance is very small. As the output buffer stage of the first driving branch 101, it can effectively reduce the overall output resistance ro of the first driving branch 101, and further push up the frequency of the secondary pole of the unidirectional conduction circuit 100 to be much greater than the frequency of the main pole, so that an increase in the phase margin and an improvement in the response speed of the unidirectional conduction circuit 100 can be achieved.

[0103] In practical applications, when the unidirectional conduction circuit 100 operates in a steady state, the emitter voltages of the bipolar transistor Q2 and the bipolar transistor Q3 are equal, and the current flowing through the first resistor R1 and the second resistor R2 is both I1. If the load connected to the voltage output terminal VOUT increases, the voltage of the voltage output terminal VOUT will decrease. Since the base voltages of the bipolar transistor Q2 and the bipolar transistor Q3 are equal, the decrease in the voltage of the voltage output terminal VOUT causes the voltage difference between the emitter and the base of the bipolar transistor Q3 to decrease, making the bipolar transistor Q3 conduct insufficiently, and the current flowing through the second resistor R2 decreases to I1 - ΔI. The second current source IA2 will draw a current ΔI from the base of the fifth transistor Q5, thereby increasing the emitter current of the fifth transistor Q5, causing the gate voltage of the first transistor M D to decrease, making the first transistor M D conduct more fully, and the on-resistance of the first transistor M D decreases, thereby increasing the output voltage VO1 of the voltage output terminal VOUT, forming a negative feedback process to maintain the voltage difference between the first voltage input terminal VIN1 and the voltage output terminal VOUT stable near the preset voltage difference ΔV.

[0104] However, for the Figure 9 circuit structure shown, when the first input voltage VI1 of the first voltage input terminal VIN1 drops, such as when the power supply is unplugged from the first voltage input terminal VIN1, in response to the drop of the first input voltage VI1, the base voltage of the bipolar transistor Q3 drops rapidly, and the emitter voltage of the bipolar transistor Q3 also drops rapidly, the current on the second resistor R2 increases rapidly, and the bipolar transistor Q5 is turned off. However, since the voltage of the control terminal of the first transistor M D is only pulled up by the fifth resistor R5, the pulling-up speed is very slow. Moreover, when the first input voltage VI1 drops very fast, the parasitic capacitance between the control terminal of the first transistor M D and the second terminal of the non-control terminal of the first transistor M D can cause the gate voltage of the first transistor M D to be briefly pulled down. These two factors together cause the first transistor M D not to turn off quickly, resulting in the risk of current flowing from the voltage output terminal VOUT through the first transistor M D and backfeeding to the first voltage input terminal VIN1.

[0105] Based on this, Figure 10 another circuit implementation of the output buffer branch 1013 is exemplarily shown to solve the problem of current flowing from the voltage output terminal VOUT through the first transistor M D and backfeeding to the first voltage input terminal VIN1.

[0106] As Figure 10 shown, the output buffer branch 1013 includes a sixth transistor Q6 and a seventh transistor Q7.

[0107] Among them, the control terminal of the sixth transistor Q6 is respectively connected to the control terminal of the seventh transistor Q7 and the negative electrode of the second current source IA2. The second terminal of the non-control terminal of the sixth transistor Q6 is connected to the voltage output terminal VOUT. The first terminal of the non-control terminal of the sixth transistor Q6 is respectively connected to the first terminal of the non-control terminal of the seventh transistor Q7 and the control terminal of the first transistor M D The second terminal of the non-control terminal of the seventh transistor Q7 is grounded to GND.

[0108] In this embodiment, taking the sixth transistor Q6 and the seventh transistor Q7 as bipolar transistors as an example, among them, the sixth transistor Q6 is an NPN-type transistor, and the seventh transistor Q7 is a PNP-type transistor. Then, the control terminal of the sixth transistor Q6 (and the seventh transistor Q7) is the base of the bipolar transistor, the first terminal of the non-control terminal of the sixth transistor Q6 (and the seventh transistor Q7) is the emitter of the bipolar transistor, and the second terminal of the non-control terminal of the sixth transistor Q6 (and the seventh transistor Q7) is the collector of the bipolar transistor. Of course, in other embodiments, the sixth transistor Q6 and the seventh transistor Q7 can also be any controllable switches, such as MOS transistors or IGBT switch transistors, etc.

[0109] Specifically, when the first input voltage VI1 drops rapidly, the sixth transistor Q6 can be fully turned on in response to the rapid rise of the collector voltage of the bipolar transistor Q2 to rapidly raise the voltage of the control terminal of the first transistor M D so as to turn off the first transistor M quickly, achieving the purpose of preventing the voltage output terminal VOUT from back-feeding current to the first voltage input terminal VIN1. D

[0110] Please refer to Figure 11 , Figure 11 which is a schematic diagram of the composition block diagram of the power multiplexer provided by the embodiment of the present application. As Figure 11 shown, the power multiplexer 1000 includes the unidirectional conduction circuit 100 and the voltage converter 200 in any embodiment of the present application.

[0111] Among them, the first end of the unidirectional conduction circuit 100 is connected to the first voltage input terminal VIN1. The first voltage input terminal VIN1 is used to input the first input voltage VI1. The first end of the voltage converter 200 is connected to the second voltage input terminal VIN2. The second voltage input terminal VIN2 is used to input the second input voltage (denoted as VI2). The second end of the unidirectional conduction circuit 100 and the second end of the voltage converter 200 are both connected to the voltage output terminal VOUT. ​

[0112] Specifically, the power multiplexer 1000 is configured to automatically supply current from the unidirectional conduction circuit 100 to the voltage output terminal VOUT when the output voltage of the unidirectional conduction circuit 100 is greater than the preset output voltage of the voltage converter 200, and automatically supply current from the voltage converter 200 to the voltage output terminal VOUT when the output voltage of the unidirectional conduction circuit 100 is less than the preset output voltage. Among them, the preset output voltage can be set based on the actual application scenario, and the embodiments of the present application do not make specific limitations on this.

[0113] In some embodiments, the first voltage input terminal VIN1 is configured to be connected to a battery, and the first input voltage VI1 is the voltage provided by the battery; the second voltage input terminal VIN2 is configured to be connected to a DC power supply, and the second input voltage VI2 is the voltage provided by the DC power supply.

[0114] Specifically, the power multiplexer 1000 is used to achieve a smooth switch of the power supply of the electrical device between an external DC power supply and an internal battery, and to achieve mutual isolation between the two power supplies. In this embodiment, the power multiplexer 1000 preferentially draws power from the battery and supplies power to the electrical device connected to the voltage output terminal VOUT through the unidirectional conduction circuit 100. When the voltage of the battery is too low to support the voltage required at the voltage output terminal VOUT and the second voltage input terminal VIN2 of the voltage converter 200 is connected to a power supply, the voltage converter 200 converts the voltage of the power supply into a voltage suitable for the electrical device and outputs it to the voltage output terminal VOUT. At the same time, the voltage output by the voltage converter 200 to the voltage output terminal VOUT cannot be back-fed to the battery (i.e., the first voltage input terminal VIN1) through the unidirectional conduction circuit 100.

[0115] In some embodiments, the voltage converter 200 is configured as a low-dropout linear regulator.

[0116] In some embodiments, as Figure 12 shown, the power multiplexer 1000 further includes an output capacitor CL. The output capacitor CL is connected between the voltage output terminal VOUT and the ground GND.

[0117] Please refer to Figure 13 , Figure 13 exemplarily shows a circuit structure of the unidirectional conduction circuit 100 and the voltage converter 200. Among them, the specific implementation of the unidirectional conduction circuit 100 can refer to the structure shown in Figures 1 - 12 . Among them, the first end of the non-control end of the first transistor M D is the second end of the unidirectional conduction circuit 100 and is connected to the voltage output terminal VOUT, and the second end of the non-control end of the first transistor M D is the first end of the unidirectional conduction circuit 100 and is connected to the first voltage input terminal VIN1.

[0118] As Figure 13 shown, the voltage converter 200 includes an eighth transistor M L and a second drive branch 201.

[0119] Wherein, the eighth transistor M L is connected between the second voltage input terminal VIN2 and the voltage output terminal VOUT. The second drive branch 201 is connected to the voltage output terminal VOUT, the reference voltage VREF, and the control terminal of the eighth transistor M L of.

[0120] In this embodiment, taking the eighth transistor M L as a PMOS transistor as an example, the control terminal of the eighth transistor M L is the gate of the PMOS transistor. The first non-control terminal of the eighth transistor M L is the source of the PMOS transistor, and at the same time is the first terminal of the voltage converter 200, and is connected to the second voltage input terminal VIN2. The second non-control terminal of the eighth transistor M L is the drain of the PMOS transistor, and at the same time is the second terminal of the voltage converter 200, and is connected to the voltage output terminal VOUT. Of course, in other embodiments, the eighth transistor M L can also be any controllable switch, such as an NMOS transistor or an IGBT switch tube, etc.

[0121] Specifically, the second drive branch 201 is configured to output a second drive voltage to the control terminal of the eighth transistor M L and adjust the second drive voltage based on the reference voltage VREF and the output voltage VO1 of the voltage output terminal VOUT to adjust the on-resistance of the eighth transistor M L ; the second drive branch 201 is further configured to provide a current to the voltage output terminal VOUT to maintain the output voltage VO1 at a preset output voltage when the output voltage VO1 of the unidirectional conduction circuit 100 is less than the preset output voltage; the second drive branch 201 is further configured to maintain the eighth transistor M L off when the output voltage VO1 of the unidirectional conduction circuit 100 is greater than the preset output voltage.

[0122] In some embodiments, as Figure 14 shown, the second drive branch 201 includes a sixth resistor R6, a seventh resistor R7, and an operational amplifier U1.

[0123] Among them, the sixth resistor R6 and the seventh resistor R7 are connected in series between the voltage output terminal VOUT and the ground GND. The connection point between the sixth resistor R6 and the seventh resistor R7 is connected to the non-inverting input terminal of the operational amplifier U1. The reference voltage VREF is input to the inverting input terminal of the operational amplifier U1. The output terminal of the operational amplifier U1 is connected to the control terminal of the eighth transistor M L The first end of the non-control terminal of the eighth transistor M L is connected to the second voltage input terminal VIN2, and the second end of the non-control terminal of the eighth transistor M L is connected to the voltage output terminal VOUT.

[0124] Specifically, the operational amplifier U1 outputs a voltage signal (i.e., the second driving voltage) for controlling the gate of the eighth transistor M L according to the difference between the result of voltage division of the voltage at the voltage output terminal VOUT by the sixth resistor R6 and the seventh resistor R7 and the reference voltage VREF, so as to adjust the on-resistance of the eighth transistor M L and thus maintain the voltage stability of the voltage output terminal VOUT. By setting the reference voltage VREF to the voltage VREFO (VREFO = VREF*(R6 + R7) / R7) before voltage division of the reference voltage VREF by the sixth resistor R6 and the seventh resistor R7 to be equal to the lower limit of the output voltage VO1 of the unidirectional conduction circuit 100, the unidirectional conduction circuit 100 is made to supply power to the voltage output terminal VOUT preferentially. That is, the preset output voltage is configured to be the lower limit of the output voltage VO1. When the output voltage VO1 of the unidirectional conduction circuit 100 is less than its lower limit, Figure 14 the voltage converter 200 shown in Figure 14 will automatically supply current to the voltage output terminal VOUT; when the output voltage VO1 of the unidirectional conduction circuit 100 is greater than its lower limit, Figure 14 the voltage converter 200 shown in L will automatically control the eighth transistor M L to turn off, so that only the unidirectional conduction circuit 100 supplies current to the voltage output terminal VOUT.

[0125] In some embodiments, as Figure 15 shown, the voltage converter 200 further includes an isolation branch 202. Among them, the isolation branch 202 is connected between the eighth transistor M L and the voltage output terminal VOUT.

[0126] Specifically, the isolation branch 202 is configured to establish a connection between the eighth transistor M L and the voltage output terminal VOUT when the second input voltage VI2 of the second voltage input terminal VIN2 is greater than the preset voltage threshold, and is configured to disconnect the voltage output terminal VOUT from the eighth transistor M LThe connection therebetween. Among them, the preset voltage threshold can be set based on the actual application scenario, and the embodiments of the present application do not make specific limitations thereto.

[0127] In some embodiments, as Figure 16 shown, the isolation branch 202 includes a ninth transistor M RB . Among them, the control terminal of the ninth transistor M RB inputs a third driving signal , the first end of the non-control terminal of the ninth transistor M RB is connected to the voltage output terminal VOUT, and the second end of the non-control terminal of the ninth transistor M RB is connected to the second end of the non-control terminal of the eighth transistor M L .

[0128] In this embodiment, taking the ninth transistor M RB as a PMOS transistor as an example, the control terminal of the ninth transistor M RB is the gate of the PMOS transistor, the first end of the non-control terminal of the ninth transistor M RB is the source of the PMOS transistor, and the second end of the non-control terminal of the ninth transistor M RB is the drain of the PMOS transistor. Of course, in other embodiments, the ninth transistor M RB can also be any controllable switch, such as an NMOS transistor or an IGBT switch transistor, etc.

[0129] Specifically, when the second input voltage VI2 is greater than the preset voltage threshold, the third driving signal is at a low level, controlling the ninth transistor M RB to conduct, so as to establish the connection between the eighth transistor M L and the voltage output terminal VOUT; when the second input voltage VI2 is less than the preset voltage threshold, the third driving signal is at a high level, controlling the ninth transistor M RB to turn off, so as to disconnect the connection between the voltage output terminal VOUT and the eighth transistor M L .

[0130] In this embodiment, the drain of the ninth transistor M RB is connected to the drain of the eighth transistor M L , the source of the ninth transistor M RB is connected to the voltage output terminal VOUT, and the third driving signal representing that the second input voltage VI2 is less than the preset voltage threshold controls the gate of the ninth transistor M RB to control the conduction and turn-off of the ninth transistor M RB . Specifically, when the second input voltage VI2 is greater than the preset voltage threshold, the third driving signal is at a low level. When the second input voltage VI2 is less than a preset voltage threshold, the third drive signal is at a high level. When the second input voltage VI2 is input to the power multiplexer 1000 through the second voltage input terminal VIN2, the third drive signal is at a low level, and the ninth transistor M RB conducts, without affecting the normal operation of the voltage converter 200. When the second input voltage VI2 is disconnected from the second voltage input terminal VIN2, the third drive signal turns to a high level, and the ninth transistor M RB turns off; in this case, the parasitic diode of the ninth transistor M RB can isolate the voltage output terminal VOUT and the second voltage input terminal VIN2, so that the voltage of the voltage output terminal VOUT cannot be back-fed to the second voltage input terminal VIN2.

[0131] The following takes the first input voltage VI1 being configured as the voltage provided by the battery and the second input voltage VI2 being configured as the voltage provided by the DC power supply as an example to illustrate the principle of the circuit structure shown Figure 16 below.

[0132] Specifically, when only the voltage of the battery is input to the unidirectional conduction circuit 100, the voltage of the battery supplies power to the voltage output terminal VOUT through the unidirectional conduction circuit 100.

[0133] When the battery voltage (denoted as VBATT) input to the unidirectional conduction circuit 100 is sufficient (such as VBATT - ΔV > VREFO), and there is also a DC power supply input to the second voltage input terminal VIN2, since the voltage provided by the unidirectional conduction circuit 100 to the voltage output terminal VOUT is higher than the voltage VREFO before the reference voltage VREF is divided by the sixth resistor R6 and the seventh resistor R7, the first transistor M L is in a state of high conduction impedance, and almost no current flows through the first transistor M L , which can be regarded as turned off, thus realizing that the battery voltage VBATT supplies power to the voltage output terminal VOUT through the unidirectional conduction circuit 100 preferentially. Such a setting can also maximize the efficiency of supplying power to the voltage output terminal VOUT, because the second input voltage VI2 input to the second voltage input terminal VIN2 is often significantly higher than the battery voltage VBATT and the voltage required by the electrical device connected to the voltage output terminal VOUT. Using the voltage converter 200 to provide voltage to the voltage output terminal VOUT will consume most of the electrical energy on the first transistor M L , resulting in low efficiency.

[0134] When the battery voltage of the unidirectional conduction circuit 100 decreases to make VBATT - ΔV ≤ VREFO, the voltage converter 200 starts to supply current to the voltage output terminal VOUT, and the first drive branch 101 controls the first transistor M D to turn off. Thus, the connection between the voltage output terminal VOUT and the first voltage input terminal VIN1 is disconnected, and the first drive branch 101 can quickly turn off the first transistor M D , to prevent current from flowing back from the voltage output terminal VOUT to the battery terminal VBATT. It should be noted that the anode of the parasitic diode of the first transistor M D is connected to the first voltage input terminal VIN1, and the cathode of the parasitic diode is connected to the voltage output terminal VOUT. When the first transistor M D is in the off state, it can also prevent current from flowing back from the voltage output terminal VOUT to the first voltage input terminal VIN1.

[0135] When the battery is not connected to the first voltage input terminal VIN1 or is severely discharged, the power multiplexer 1000 automatically supplies a suitable voltage to the voltage output terminal VOUT by the voltage converter 200.

[0136] In summary, the power multiplexer 1000 can achieve the optimal configuration of two power supplies for supplying power to the voltage output terminal VOUT, the fast response and smooth transition during the switching process between the two power supplies, and at the same time can achieve the mutual isolation between the two power supplies. Thus, it can effectively improve the reliability and power supply efficiency when the two power supplies supply power to the electrical equipment.

[0137] In some embodiments, as Figure 17 shown, the power multiplexer 1000 further includes a controller 300, and the unidirectional conduction circuit 100 further includes a current limiting branch 102.

[0138] Among them, the controller 300 is configured to output a control signal based on the voltage difference when the voltage difference between the first input voltage VI1 and the output voltage VO1 of the voltage output terminal VOUT is greater than a first preset voltage, where the first preset voltage is greater than the voltage when the voltage difference is a fixed value, that is, the first preset voltage is greater than the preset voltage difference ΔV. The current limiting branch 102 is connected between the first transistor M D and the voltage output terminal VOUT. The current limiting branch 102 is configured to adjust the conduction impedance of the current limiting branch 102 based on the control signal, so that the current flowing through the first transistor M D does not exceed a preset current limit value. Among them, the preset current limit value can be set based on the actual application scenario, and the embodiments of the present application do not make specific limitations on this.

[0139] In some embodiments, as Figure 19 shown, the current limiting branch 102 includes a tenth transistor M FB。

[0140] Among them, the control terminal of the tenth transistor M FB is connected to the controller 300. The first end of the non-control terminal of the tenth transistor M FB is connected to the first end of the non-control terminal of the first transistor M D . The second end of the non-control terminal of the tenth transistor M FB is connected to the voltage output terminal VOUT.

[0141] In this embodiment, taking the tenth transistor M FB as a PMOS transistor as an example, the control terminal of the tenth transistor M FB is the gate of the PMOS transistor. The first end of the non-control terminal of the tenth transistor M FB is the source of the PMOS transistor. The second end of the non-control terminal of the tenth transistor M FB is the drain of the PMOS transistor. Of course, in other embodiments, the tenth transistor M FB can also be any controllable switch, such as an NMOS transistor or an IGBT switch tube, etc.

[0142] The following combines Figure 20 each signal in the shown power multiplexer to Figure 19 illustrate the principle of the shown circuit structure. Among them, in Figure 20 , the abscissa is the current Iout flowing through the unidirectional conduction circuit 100, and the ordinate is the difference between the first input voltage VI1 and the output voltage VO1.

[0143] Specifically, when the current Iout flowing through the unidirectional conduction circuit 100 is small, such as (Iout is less than Ireg, where Ireg is the maximum current flowing through the unidirectional conduction circuit 100 when the voltage difference is the preset voltage difference ΔV), the unidirectional conduction circuit 100 maintains the voltage difference between the first input voltage VI1 and the output voltage VO1 at the preset voltage difference ΔV. When the current Iout flowing through the unidirectional conduction circuit 100 exceeds Ireg, even if the first drive branch 101 controls the first transistor M D to be fully conductive, it cannot control the voltage difference between the first input voltage VI1 and the output voltage VO1 at the preset voltage difference ΔV, and this voltage difference increases with the increase of the current Iout. Until when the current Iout flowing through the unidirectional conduction circuit 100 reaches the preset current limit value (denoted as Ilim), the controller 300 can adjust the conduction impedance of the tenth transistor M FB so that the current Iout flowing through the unidirectional conduction circuit 100 is maintained at the preset current limit value Ilim.

[0144] An embodiment of the present application further provides an electronic device, which includes the power multiplexer 1000 in any embodiment of the present application.

[0145] The above are only embodiments of the present application, and do not limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made by using the content of the specification and drawings of the present application, or directly or indirectly applied in other related technical fields, is equally included in the patent protection scope of the present application.

[0146] The above embodiments are only used to illustrate the technical solutions of the present application, rather than limiting them; under the idea of the present application, the technical features in the above embodiments or different embodiments can also be combined, and the steps can be implemented in any order. Those of ordinary skill in the art should understand that they can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements on some of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A unidirectional conductive circuit, characterized in that, Comprising: A first transistor connected between a first voltage input terminal and a voltage output terminal; A first driving branch respectively connected to the first voltage input terminal, the voltage output terminal and the control terminal of the first transistor, configured to output a first driving voltage to the control terminal of the first transistor, and adjust the first driving voltage based on the voltage difference between a first input voltage of the first voltage input terminal and an output voltage of the voltage output terminal, so as to adjust the on-resistance of the first transistor, so that when the first input voltage is greater than the output voltage, the voltage difference is maintained at a preset voltage difference value, and when the first input voltage is less than or equal to the output voltage, the first transistor is turned off; The first driving branch includes a first resistor, a second resistor, a second transistor, a third transistor, a first current source, a second current source and a bias branch; The first resistor is connected between the first voltage input terminal and the first end of the non-control terminal of the second transistor, the second resistor is connected between the voltage output terminal and the first end of the non-control terminal of the third transistor, the control terminal of the second transistor is respectively connected to the second end of the non-control terminal of the second transistor and the control terminal of the third transistor, the second end of the non-control terminal of the second transistor is connected to the negative electrode of the first current source, the positive electrodes of the first current source and the second current source are both grounded, the second end of the non-control terminal of the third transistor is respectively connected to the negative electrode of the second current source and the control terminal of the first transistor, the bias branch is connected between the control terminal of the second transistor and the ground and is connected to the negative electrode of the first current source; The first driving branch is configured to maintain the difference between the voltage drop generated by the first current output by the first current source on the first resistor and the voltage drop generated by the second current output by the second current source on the second resistor equal to the preset voltage difference value; The bias branch is configured to form a path between the control terminal of the second transistor and the ground.

2. The unidirectional conductive circuit according to claim 1, wherein The first current output by the first current source is equal to the second current output by the second current source, and the second transistor and the third transistor have the same size.

3. The unidirectional conductive circuit according to claim 1 or 2, characterized in that, Both the second transistor and the third transistor are field effect transistors; The control terminals of the second transistor and the third transistor are both the gates of the field effect transistors, the first ends of the non-control terminals of the second transistor and the third transistor are both the sources of the field effect transistors, and the second ends of the non-control terminals of the second transistor and the third transistor are both the drains of the field effect transistors.

4. The unidirectional conduction circuit according to claim 1 or 2, characterized in that, Both the second transistor and the third transistor are bipolar transistors; The control terminals of the second transistor and the third transistor are both the bases of the bipolar transistors, the first ends of the non-control terminals of the second transistor and the third transistor are both the emitters of the bipolar transistors, and the second ends of the non-control terminals of the second transistor and the third transistor are both the collectors of the bipolar transistors.

5. The unidirectional conductive circuit according to claim 1, characterized in that, The bias branch includes a fourth transistor and a third resistor; The control terminal of the fourth transistor is connected to the negative electrode of the first current source. The first end of the non-control terminal of the fourth transistor is connected to the control terminal of the second transistor. The second end of the non-control terminal of the fourth transistor is grounded through the third resistor.

6. The unidirectional conductive circuit according to claim 1, characterized in that, The first driving branch further includes: A resistor branch connected between the first voltage input terminal and the control terminal of the first transistor, configured to generate a third current based on the first input voltage, wherein the third current is greater than the currents at the control terminals of the second transistor and the third transistor.

7. The unidirectional conduction circuit according to claim 6, characterized in that, The resistor branch includes a fourth resistor; The fourth resistor is connected between the first voltage input terminal and the control terminal of the second transistor.

8. The unidirectional conductive circuit according to claim 1, wherein The first driving branch further includes: An output buffer branch connected to the negative electrode of the second current source, the voltage output terminal, and the control terminal of the first transistor respectively, configured to have an input resistance of the output buffer branch greater than the output resistance to reduce the output resistance of the first driving branch.

9. The unidirectional conductive circuit according to claim 8, wherein, The output buffer branch includes a fifth resistor and a fifth transistor; The first end of the fifth resistor is connected to the voltage output terminal. The second end of the fifth resistor is connected to the first end of the non-control terminal of the fifth transistor and the control terminal of the first transistor respectively. The control terminal of the fifth transistor is connected to the negative electrode of the second current source. The second end of the non-control terminal of the fifth transistor is grounded.

10. The unidirectional conductive circuit according to claim 8, characterized in that, The output buffer branch includes a sixth transistor and a seventh transistor; The control terminal of the sixth transistor is connected to the control terminal of the seventh transistor and the negative electrode of the second current source respectively. The second end of the non-control terminal of the sixth transistor is connected to the voltage output terminal. The first end of the non-control terminal of the sixth transistor is connected to the first end of the non-control terminal of the seventh transistor and the control terminal of the first transistor respectively. The second end of the non-control terminal of the seventh transistor is grounded.

11. A power multiplexer, characterized in that, Comprising a voltage converter and a unidirectional conductive circuit according to any one of claims 1-10; The first end of the unidirectional conductive circuit is connected to the first voltage input terminal for inputting a first input voltage. The first end of the voltage converter is connected to the second voltage input terminal for inputting a second input voltage. The second end of the unidirectional conductive circuit and the second end of the voltage converter are both connected to the voltage output terminal; The power multiplexer is configured to automatically supply current from the unidirectional conductive circuit to the voltage output terminal when the output voltage of the unidirectional conductive circuit is greater than the preset output voltage of the voltage converter, and automatically supply current from the voltage converter to the voltage output terminal when the output voltage of the unidirectional conductive circuit is less than the preset output voltage.

12. The power multiplexer according to claim 11, wherein The voltage converter includes: An eighth transistor connected between the second voltage input terminal and the voltage output terminal; A second driving branch, connected to the voltage output terminal, the reference voltage, and the control terminal of the eighth transistor, is configured to output a second driving voltage to the control terminal of the eighth transistor, and adjust the second driving voltage based on the reference voltage and the output voltage of the voltage output terminal to adjust the on-resistance of the eighth transistor, and provide a current to the voltage output terminal to maintain the output voltage at the preset output voltage when the output voltage of the unidirectional conduction circuit is less than the preset output voltage; and maintain the eighth transistor turned off when the output voltage of the unidirectional conduction circuit is greater than the preset output voltage.

13. The power multiplexer according to claim 12, characterized in that, The second driving branch includes a sixth resistor, a seventh resistor, and an operational amplifier; The sixth resistor and the seventh resistor are connected in series between the voltage output terminal and the ground. The connection point between the sixth resistor and the seventh resistor is connected to the non-inverting input terminal of the operational amplifier. The reference voltage is input to the inverting input terminal of the operational amplifier. The output terminal of the operational amplifier is connected to the control terminal of the eighth transistor. The first end of the non-control terminal of the eighth transistor is connected to the second voltage input terminal. The second end of the non-control terminal of the eighth transistor is connected to the voltage output terminal.

14. The power multiplexer according to claim 12 or 13, characterized in that, The voltage converter further includes: An isolation branch, connected between the eighth transistor and the voltage output terminal, is configured to establish a connection between the eighth transistor and the voltage output terminal when the second input voltage is greater than a preset voltage threshold, and is configured to disconnect the connection between the voltage output terminal and the eighth transistor when the second input voltage is less than the preset voltage threshold.

15. The power multiplexer according to claim 14, wherein The isolation branch includes a ninth transistor; The control terminal of the ninth transistor inputs a third driving signal. The first end of the non-control terminal of the ninth transistor is connected to the voltage output terminal. The second end of the non-control terminal of the ninth transistor is connected to the second end of the non-control terminal of the eighth transistor; Wherein, when the second input voltage is greater than the preset voltage threshold, the third driving signal is at a low level to control the ninth transistor to conduct; when the second input voltage is less than the preset voltage threshold, the third driving signal is at a high level to control the ninth transistor to turn off.

16. The power multiplexer according to claim 11, wherein The power multiplexer further includes a controller configured to output a control signal based on the voltage difference between the first input voltage and the output voltage of the voltage output terminal when the voltage difference is greater than a first preset voltage, wherein the first preset voltage is greater than a preset voltage difference; The unidirectional conduction circuit further includes a current limiting branch connected between the first transistor and the voltage output terminal. The current limiting branch is configured to adjust the on-resistance based on the control signal so that the current flowing through the first transistor does not exceed a preset current limit value.

17. The power multiplexer according to claim 16, wherein, The current limiting branch includes a tenth transistor; The control terminal of the tenth transistor is connected to the controller. The first end of the non-control terminal of the tenth transistor is connected to the first end of the non-control terminal of the first transistor. The second end of the non-control terminal of the tenth transistor is connected to the voltage output terminal.

18. An electronic device, characterized in that, Comprising a power multiplexer as described in any one of claims 11-17.

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