Image data processing method, processing chip and image forming equipment

Abstract

The invention relates to the technical field of image forming, in particular to an image data processing method, a processing chip and image forming equipment. Comprising the following steps: acquiring differential data output by a scanning analog front end; sorting parameters in the differential data according to preset configuration information to obtain sorted to-be-detected image data; and detecting validity and color information of the to-be-detected image data, and outputting processed image data. The embodiment of the invention can improve the data processing efficiency, and is particularly suitable for image forming equipment and processing chips.

Description

Technical Field

[0001] The present application relates to the field of data processing technology, and in particular to an image data processing method, a processing chip and an image forming device. Background Art

[0002] Most of the image forming devices in the prior art still use TTL (Transistor-Transistor Logic) to transmit image data, which has low transmission efficiency and low anti-interference ability. Therefore, the processing chip of the image forming device in the prior art still has problems in data processing and transmission that are not perfect. Summary of the invention

[0003] In view of this, the present application provides an image data processing method, a processing chip, and an image forming device, which can improve data processing efficiency.

[0004] In a first aspect, an embodiment of the present invention provides an image data processing method, which is applied to a processing chip and includes:

[0005] Get the differential data output by the scanned analog front end;

[0006] Sorting the parameters in the differential data according to the preset configuration information to obtain the image data to be detected after the sorting is completed;

[0007] The validity and color information of the image data to be detected are detected, and the processed image data is output.

[0008] In some embodiments, the configuration information is set according to the type of the scanning analog front end.

[0009] In some embodiments, the configuration information includes:

[0010] The logarithm of the differenced data;

[0011] The number of bits and positions of pixel data in the differential data;

[0012] The number of bits and the position of the control information in the differential data.

[0013] In some embodiments, the step of sorting the parameters in the differential data according to the preset configuration information to obtain the sorted image data to be detected includes:

[0014] Performing serial-to-parallel conversion on the differential data to obtain parallel output data;

[0015] The parameters in the parallel output data are sorted in corresponding positions according to the configuration information to obtain the image data to be detected.

[0016] In some embodiments, the control information includes the line header information to be tested, the validity information to be tested, and the color information to be tested; the configuration information also includes: configuration line header information, configuration validity information, and configuration color information;

[0017] The detecting of the validity and color information of the image data to be detected and outputting the processed image data comprises:

[0018] Detecting whether the to-be-detected line header information of the to-be-detected image data matches the configuration line header information in the configuration information;

[0019] Detecting whether the validity information to be tested of the image data to be tested matches the configuration validity information in the configuration information;

[0020] If yes, determining that the image data to be detected is valid data;

[0021] Color detection is performed on the color information to be detected in the valid data according to the configured color information in the configuration information, and processed image data is output after the detection is completed.

[0022] In some embodiments, the method further includes: if any of the above detections is negative, the image data to be detected is invalid data and is discarded.

[0023] In a second aspect, an embodiment of the present invention provides a processing chip, including:

[0024] Differential data interface, used to obtain differential data output by the scanning analog front end;

[0025] The data processor is used to sort the parameters in the differential data according to preset configuration information to obtain the image data to be detected after sorting; detect the validity and color information of the image data to be detected, and output the processed image data.

[0026] In some embodiments, the configuration information is set according to the type of the scanning analog front end.

[0027] In some embodiments, the configuration information includes:

[0028] The logarithm of the differential data;

[0029] The number of bits and positions of pixel data in the differential data;

[0030] The number of bits and the position of the control information in the differential data.

[0031] In some embodiments, the data processor comprises:

[0032] A serial-to-parallel conversion module, used for performing serial-to-parallel conversion on the differential data to obtain parallel output data;

[0033] A data sorting module is used to sort the parameters in the parallel output data in corresponding positions according to the configuration information to obtain the image data to be detected.

[0034] In some embodiments, the data processor further includes:

[0035] The phase-locked loop module is used to output a doubled frequency clock signal after detecting that the differential clock signal output by the scanning analog front end is stable so as to enable the serial-to-parallel conversion module to perform serial-to-parallel conversion on the differential data, and output a delayed phase-locked loop identification signal and a received data processing clock signal so as to enable the data sorting module to perform parameter sorting to obtain the image data to be detected.

[0036] In some embodiments, the control information includes the line header information to be tested, the validity information to be tested, and the color information to be tested; the configuration information also includes: configuration line header information, configuration validity information, and configuration color information;

[0037] The data processor comprises:

[0038] A line header detection module, used to detect whether the line header information of the image data to be detected matches the configuration line header information in the configuration information;

[0039] A pixel processing module is used to detect whether the validity information to be tested of the image data to be detected matches the configuration validity information in the configuration information, and when the row header information to be tested matches the configuration row header information, and the validity information to be tested matches the configuration validity information, the image data to be detected is determined to be valid data, and color detection is performed on the color information to be tested in the valid data according to the configuration color information in the configuration information, and the processed image data is output after the detection is completed.

[0040] In a third aspect, an embodiment of the present invention provides an image forming device, comprising: at least one processing chip; and at least one memory communicatively connected to the processing chip, wherein: the memory stores program instructions executable by the processing chip, and the processing chip calls the program instructions to execute the method described in the first aspect or any one of the first aspects above.

[0041] The image data processing method, processing chip and image forming device provided by the present application have at least the following technical effects:

[0042] Based on the acquired differential data output by the scanning simulation front end, the differential data are sorted according to the preset configuration information to obtain the image data to be detected, and the processed image data is output after the detection is completed. The embodiments of the present application are applicable to a processing chip, which can process the differential data output by the scanning simulation front end through the preset configuration information, and at the same time improve the compatibility with a variety of different types of scanning simulation front ends, as well as the data processing efficiency and reliability. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0044] Figure 1 A flowchart of an image data processing method provided by an embodiment of the present invention;

[0045] Figure 2 A flowchart of another image data processing method provided by an embodiment of the present invention;

[0046] Figure 3 A specific flow chart of an image data processing method provided by an embodiment of the present invention;

[0047] Figure 4 A signal schematic diagram of image data processing provided for the implementation of the present invention;

[0048] Figure 5 A schematic diagram of a format of an image data frame provided by an embodiment of the present invention;

[0049] Figure 6 A schematic diagram of the format of an invalid data frame provided by an embodiment of the present invention;

[0050] Figure 7 A schematic diagram of the format of a startup data frame provided by an embodiment of the present invention;

[0051] Figure 8 A schematic diagram of a format of a valid format frame provided by an embodiment of the present invention;

[0052] Fig. 9 A schematic diagram of a format of a valid format frame provided by an embodiment of the present invention;

[0053] Fig.10 A schematic diagram of a format of a valid format frame provided by an embodiment of the present invention;

[0054] Fig.11A schematic structural diagram of an image forming device provided by an embodiment of the present invention;

[0055] Fig.12 A schematic structural diagram of an image forming device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0056] In order to better understand the technical solution of the present application, the embodiments of the present application are described in detail below with reference to the accompanying drawings.

[0057] It should be clear that the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present application.

[0058] The terms used in the embodiments of the present application are only for the purpose of describing specific embodiments, and are not intended to limit the present application. The singular forms "a", "said" and "the" used in the embodiments of the present application and the appended claims are also intended to include plural forms, unless the context clearly indicates other meanings.

[0059] It should be understood that the term "and / or" used in this article is only a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article generally indicates that the associated objects before and after are in an "or" relationship.

[0060] Image forming devices are devices that form images on imaging media based on imaging principles, including but not limited to printers, copiers, fax machines, scanners, multi-function devices, electrostatic printing devices and other devices that may realize image forming functions.

[0061] Most image forming devices include a scanning component, such as a scanning analog front end of a CCD or CMOS image sensor. When the image forming device performs a copy or scan operation, the scanning component captures the image of the operation and outputs image data. At present, the image data output by the scanning component of the image forming device is mainly transmitted in TTL mode, which affects the transmission efficiency. If the scanning component of the image forming device is changed to output image data in LVDS (Low Voltage Differential Signing), how to process the image data becomes a problem that needs to be solved. In order to solve the problem, an embodiment of the present invention provides an image data processing method, which can improve the transmission efficiency of image data and provide support for subsequent image forming operations.

[0062] See also Figure 1 , which is a flowchart of an image data processing method provided by an embodiment of the present invention. Figure 1 The method is applied to a processing chip, and the processing steps of the method include:

[0063] 101, obtaining differential data output by the scanning analog front end.

[0064] 102 , sorting the parameters in the differential data according to the preset configuration information to obtain the image data to be detected after sorting.

[0065] 103, performing validity and color information detection on the image data to be detected.

[0066] 104, output the processed image data.

[0067] The above differential data is image data in LVDS format.

[0068] The above configuration information is set according to the type of scanning simulation front end. According to different types of scanning simulation front ends, corresponding configuration information is set, so that when differential data is received, differential data of corresponding formats can be adaptively identified and processed to help meet the various data requirements of subsequent image processing. It can then adapt to the differential data output by different types of scanning simulation front ends to help compatible with the acquisition and processing of multiple pairs of differential data. Its configuration is relatively flexible and easy to implement, thereby improving the efficiency of image data transmission and processing and improving system performance.

[0069] The above configuration information may include the logarithm of the differential data. In addition, the image data to be detected includes pixel data and control information. The above configuration information may pre-configure the number of bits and the position of the pixel data that the image data to be detected needs to include, as well as the number of bits and the position of the control information. It can be understood that the number of bits of pixel data refers to the number of bits occupied by the pixel data in a frame of image data to be detected, which is equivalent to the number of bits of pixel data in the differential data output by the scanning analog front end. The position of the pixel data may be the position of the bit occupied by the pixel data in the differential data, the position in the image to be detected, or the position in the data after the differential data has been intermediately converted (such as serial-to-parallel conversion). The number of bits of control information refers to the number of bits occupied by the control information in a frame of image data to be detected, which is equivalent to the number of bits of control information in the differential data output by the scanning analog front end. The position of the control information may be the position of each bit occupied by the control information in the differential data, the position in the image to be detected, or the position in the data after the differential data has been intermediately converted (such as serial-to-parallel conversion). Furthermore, each bit occupied by the control information can be used to represent line header information, validity information, color information, etc. Among them, according to the line header information, it can be judged whether each frame of the image data to be detected is data of the same line, the validity information is used to judge whether the image data to be detected is valid data, and the color information is used to represent the color of the image data to be detected.

[0070] In the above step 102, the parameters in the differential data can be sorted in corresponding positions according to the configuration information to obtain the image data to be detected that matches the configuration information. After obtaining the image data to be detected, the validity of the image data to be detected and the color information in the image data to be detected can be detected according to the configuration information, and the processed image data can be output.

[0071] The method of the embodiment of the present invention is based on the acquired differential data output by the image sensor, and sorts them according to the preset configuration information to obtain the image data to be detected, and outputs the processed image data after the detection is completed. The embodiment of the present application is applicable to image forming devices, and can process the differential data output by the image sensor through the preset configuration information, and can improve the compatibility with various types of scanning simulation front ends, as well as the data processing efficiency and reliability.

[0072] See also Figure 2 , is a flow chart of another image data processing method provided by an embodiment of the present invention. Figure 2 As shown, the processing steps of the method include:

[0073] 201, obtaining differential data output by the scanning analog front end.

[0074] 202, performing serial-to-parallel conversion on the differential data to obtain parallel output data.

[0075] 203 , sort the parameters in the parallel output data in corresponding positions according to the preset configuration information to obtain the image data to be detected.

[0076] The control information of the image data to be detected includes the line header information to be tested, the validity information to be tested and the color information to be tested. The preset configuration information includes the configuration line header information, the configuration validity information and the configuration color information.

[0077] 204, detect whether the detected line header information of the detected image data matches the configuration line header information in the configuration information. If they match, execute step 205; if they do not match, the detected image data is invalid pixel data and is discarded.

[0078] 205, detect whether the validity information of the image data to be detected matches the configuration validity information in the configuration information. If they match, the image data to be detected is valid data and execute step 206. If they do not match, the image data to be detected is invalid data and is discarded.

[0079] 206 , performing color information detection on the color information of the image data to be detected according to the configured color information to obtain processed image data.

[0080] 207, sending the processed image data to an AXI (Advanced eXtens ib le Interface) bus in a burst form.

[0081] The preset configuration information includes: the logarithm of the differential data, the number of bits of the pixel data and the position of the pixel data in the parallel output data, the number of bits of the control information and the position of the control information in the parallel output data. Specifically, the control information may include row header information, validity information and color information. The row header information may include a row synchronization signal and a row indication signal, and the position of the row synchronization signal and the row indication signal in the parallel output information. The validity information may include a validity flag and the position of the validity flag in the parallel output information. The color information may include a color flag and the position of the color flag in the parallel output information.

[0082] In step 203, the parameters in the parallel output data may be sorted at corresponding positions according to the configuration information to obtain the image data to be detected.

[0083] In steps 204-206, the validity and color information of the image data to be detected can be detected according to the configuration information. Among them, according to the row header information to be detected in the image data to be detected, it can be detected whether the image to be detected in the current frame is the beginning of a new row of pixel data, or it can be used to detect whether the current frame is the same row of pixel data as the previous frame. According to the validity information to be tested in the image data to be detected, it can be judged whether the image data to be detected in the current frame is valid. According to the color information to be tested in the image data to be detected, the color represented by the image data to be detected in the current frame can be determined. After determining the color of the image data to be detected, it is output to the AXI bus as processed image data and finally written into the system memory.

[0084] See also Figure 3 , is a specific flow chart of an image data processing method provided by an embodiment of the present invention. Figure 3 As shown, the image data processing process of the embodiment of the present invention includes:

[0085] 301, the scanning analog front end outputs a differential clock signal.

[0086] like Figure 4 As shown, the scanning analog front end can continuously output the differential clock signal CLK_P / CLK_N at a certain frequency. After the phase-locked loop module detects the differential clock signal with a stable frequency, it outputs the DLL_LOCK signal (i.e., the delay phase-locked loop identification signal). The DLL_LOCK signal is used to indicate that the output clock of the scanning analog front end has stabilized. Figure 4 As shown, the DLL_LOCK signal remains at a high level, indicating that the output clock of the scanning analog front end has stabilized.

[0087] 302, the scanning analog front end outputs three pairs of differential data.

[0088] like Figure 4 As shown in the figure, under the differential clock signal, the scanning analog front end outputs three pairs of differential data, namely DATA_P / DATA_N[0], DATA_P / DATA_N[1] and DATA_P / DATA_N[2]. Figure 4 As shown, DATA_P / DATA_N[0], DATA_P / DATA_N[1] and DATA_P / DATA_N[2] are transmitted bit by bit, and 7 bits of data are transmitted in each differential clock cycle.

[0089] 303, perform serial-to-parallel conversion on the differential data.

[0090] like Figure 4As shown in the figure, DATA_P / DATA_N[0], DATA_P / DATA_N[1] and DATA_P / DATA_N[2] are converted from serial to parallel to obtain three sets of parallel output data DATA_RA, DATA_RB and DATA_RC. DATA_RA, DATA_RB and DATA_RC output 7 bits of data in parallel in each output clock (CLK_OUT, i.e., the received data processing clock), i.e., DATA_RA[6:0], DATA_RB[6:0] and DATA_RC[6:0]. Accordingly, in each CLK_OUT cycle, a frame of parallel output data includes 21 bits, i.e., DATA_RA[6:0], DATA_RB[6:0] and DATA_RC[6:0].

[0091] 304 , sort the parameters in the three pairs of parallel output data according to the configuration information.

[0092] The configuration information includes: the number of differential data is 3 pairs; the number of pixel data bits contained in each frame of the scan analog front end output data is 16 bits, and the 16 bits are located at {DATA_RA[6:3] and DATTA_RB[6:0], DATA_RC[4:0]} in the parallel output data; the number of control information bits contained in each frame of output data is 5 bits, and the positions are DATA_RA[2:0], DATA_RC[6:5]. Among them, DATA_RC[5] of the control information indicates whether the pixel data is valid, and DATA_RC[6] and DATA_RA[0] of the control information indicate the color. Specifically, 00 indicates red data, 01 indicates green data, and 10 indicates blue data. DATA_RA[1] indicates a row synchronization signal, which is used to indicate the start signal of the output of a row of content, and DATA_RA[2] is a row indication signal, which is used to indicate that the current frame and the previous frame belong to the same row of pixel data.

[0093] The image data to be detected after being sorted according to the above configuration information is as follows Figure 5 As shown. Among them, a frame of image data to be detected includes 21 bits, of which pixel data occupies 16 bits and control information occupies 5 bits. Figure 5 As shown, in a frame of image data to be detected, pixel data occupies bits D0 to D15, and control information occupies the remaining 5 bits. The meanings of the bits occupied by the control information are as follows:

[0094] The CHA channel bit0 and the CHC channel bit6 are used to express color.

[0095] The CHA channel bit1 HS is used to represent the line synchronization signal, which is used to indicate the start signal for the output of a line of content.

[0096] CHA channel bit2 HD is used to indicate the same row indication signal, which is used to indicate the pixel data of the same row. When scanning and imaging, the image sensor scans the operation content line by line, and the corresponding output pixel data is usually one frame HS, followed by N frames HD. After the pixel data of the same row is transmitted, the next row HS and N frames HD will be output. That is, the pixel data of the same row can be received according to HS and HD.

[0097] CHC channel bit5 VD is a validity flag used to indicate whether the pixel data of the current frame is valid.

[0098] 305, check whether the line header information on the CHA channels bit1 and bit2 of the image data to be detected matches the configuration information. If they match, execute step 306; if not, discard the current image data to be detected.

[0099] The row headers HS and HD in the configuration information can take values ​​of 1 and 0 to indicate data in the same row, 0 and 0 to indicate a start frame, and 1 and 1 to indicate that the row header does not match the configuration information.

[0100] like Figure 6 As shown, the HS and HD on the CHA channels bit1 and bit2 are 1 and 1 respectively, then the row header of the current data frame does not match the configuration information, and the current data frame is invalid pixel data and is discarded. Figure 7 As shown, the HS and HD on the CHA channels bit1 and bit2 are 0 and 0 respectively, then the current data frame is a startup frame, the line header information matches the configuration information, and step 306 is continued. Figure 8-Figure 10 As shown, the HS and HD on the CHA channels bit1 and bit2 are 1 and 0 respectively, and the row header information matches the configuration information, and step 306 is continued.

[0101] 306, detect VD on the CHC channel bit5 of the image data to be detected. If VD is 0, it means that the image data to be detected is valid pixel data and execute step 307; otherwise, the image data to be detected is invalid pixel data and is discarded.

[0102] like Figure 6 As shown, the VD on the CHC channel bit5 is 1, indicating that the current data frame is invalid pixel data. Figure 7-Figure 10 As shown, VD on the CHC channel bit5 is 0, indicating that the current data frame is valid pixel data.

[0103] 307 , detecting the values ​​of the CHC channel bit6 and the CHA channel bit0 of the image data to be detected to determine the color of the image data to be detected.

[0104] in, Figure 7 Indicates a start frame and is a hint signal for image data processing, without the need to detect the color information of the start frame.

[0105] like Figure 8 As shown, the values ​​of bit6 on the CHC channel and bit0 on the CHA channel are 00, indicating that the color of the current frame is red, that is, the pixel data stored in bits D0 to D15 are red pixel data. In an example, D0 to D15 can store red pixel data R0[0]-R0[7] and R1[0]-R1[7]. Fig. 9 As shown, the values ​​of bit6 on the CHC channel and bit0 on the CHA channel are 01, indicating that the color of the current frame is green. That is, the pixel data stored in bits D0 to D15 are green pixel data. In an example, D0 to D15 can store green pixel data G0[0]-G0[7] and G1[0]-G1[7]. Fig.10 As shown, the value of CHC channel bit6 and CHA channel bit0 is 10, indicating that the color of the current frame is blue. That is, the pixel data stored in bit D0 to D15 is blue pixel data. In an example, D0 to D15 can store blue pixel data B0[0]-B0[7] and B1[0]-B1[7].

[0106] exist Figure 8-Figure 10 In the example, three frames of image data contain information about two pixels, for example, R0[0:7]-G0[0:7]-B0[0:7] corresponds to pixel 1, and R1[0:7]-G1[0:7]-B1[0:7] corresponds to pixel 2. In this example, two pixel information can be transmitted through three frames of image data. It can be understood that the pixel information carried by D0-D15 in each frame of image data can be configured as needed to achieve the purpose of flexible transmission of pixel information.

[0107] 308, cache the processed image data.

[0108] The processed image data may be cached according to certain rules based on the detected color information. For example, the processed image data may be cached in RGB or BGR order.

[0109] 309, when the amount of cached data reaches a certain value, the cached data is sent to the AXI bus in burst form based on the first-in-first-out principle, and finally written into the system memory. When the processed image data is output, the data can be output pixel by pixel (pixel-by-pixel) or line by line (line-by-line) or color block (color lane) and so on.

[0110] The method of the embodiment of the present invention supports the input and processing conversion of multiple pairs of LVDS data. In addition, the method of the embodiment of the present invention supports multiple working modes, such as transmitting one pixel per frame, and Figure 8-Figure 10 The three frames shown transmit two pixels, etc. When outputting data, the data output format of the embodiment of the present invention is flexible and configurable, such as being able to output data pixel-by-pixel, line-by-line, or according to color planes.

[0111] See also Fig.11 , is a schematic diagram of the structure of a processing chip provided by an embodiment of the present invention. Fig.11 As shown, the processing chip includes: a differential data interface and a data processor. The differential data interface is used to obtain differential data output by the scanning analog front end. The data processor is used to sort the parameters in the differential data according to the preset configuration information to obtain the image data to be detected after sorting; detect the validity and color information of the image data to be detected, and output the processed image data.

[0112] In some embodiments, the configuration information may be set according to the type of scanning analog front end.

[0113] In some embodiments, the configuration information includes: the logarithm of the differential data, the number of bits of pixel data in the differential data and the location thereof, and the number of bits of control information in the differential data and the location thereof.

[0114] In some embodiments, Fig.11 As shown, the data processor specifically includes: a phase-locked loop module, a serial-to-parallel conversion module, a data sorting module, a line head detection module, a pixel processing module, a data buffer module and a data output module. Among them, the scanning analog front end continuously outputs the differential clock signal CLK_P / CLK_N at a certain frequency.

[0115] The phase-locked loop module is used to output a doubled frequency clock signal after detecting that the differential clock signal output by the scanning analog front end is stable, so as to enable the serial-to-parallel conversion module to perform serial-to-parallel conversion on the differential data, and output a delayed phase-locked loop identification signal (DLL_LOCK signal) and a received data processing clock signal (CLK_OUT signal) to enable the data sorting module to perform parameter sorting to obtain the image data to be detected.

[0116] The serial-to-parallel conversion module is used to perform serial-to-parallel conversion on differential data to obtain parallel output data.

[0117] The data sorting module is used to sort the parameters in the parallel output data in corresponding positions according to the configuration information to obtain the image data to be detected.

[0118] The control information includes the line header information to be tested, the validity information to be tested and the color information to be tested; the configuration information also includes: configuration line header information, configuration validity information and configuration color information.

[0119] The line header detection module is used to detect whether the line header information of the image data to be detected matches the configuration line header information in the configuration information.

[0120] The pixel processing module is used to detect whether the validity information to be tested of the image data to be tested matches the configuration validity information in the configuration information, and when the row header information to be tested matches the configuration row header information, and the validity information to be tested matches the configuration validity information, the image data to be tested is determined to be valid data, and color detection is performed on the color information to be tested in the valid data according to the configuration color information in the configuration information.

[0121] The data cache module is used to cache processed image data.

[0122] The data output module is used to send the cached processed image data to the AXI bus in a burst form when the processed image data in the data cache module reaches a set condition.

[0123] In this embodiment, the data output module is a memory access module, namely an SDMA module, which can choose whether to configure the burst operation to configure the maximum number of bursts and configure the single burst length according to the congestion of the system bus, so that the data output module can send the cached processed image data to the AXI bus in a burst form when the processed image data in the data cache module meets the set conditions.

[0124] The image forming device of the embodiment of the present invention can execute the image data processing method of the embodiment shown above. For the parts not described in detail in this embodiment, reference can be made to the relevant description of the method embodiment. The execution process and technical effects of the technical solution refer to the description of the embodiment shown in the method, which will not be repeated here.

[0125] See also Fig.12 , is a schematic diagram of the structure of an image forming device provided by an embodiment of the present invention. Fig.12 As shown, the image forming device 600 may include: a processing chip 601, a memory 602 and a communication unit 603. These components communicate through one or more buses. Those skilled in the art can understand that the structure of the image forming device shown in the figure does not constitute a limitation on the embodiment of the present application. It can be a bus structure or a star structure, and can also include more or less components than shown in the figure, or combine certain components, or arrange the components differently.

[0126] The communication unit 603 is used to establish a communication channel so that the image forming device can communicate with other devices, receive user data sent by other devices or send user data to other devices.

[0127] The processing chip 601 is the control center of the image forming device. It uses various interfaces and lines to connect various parts of the entire image forming device. It runs or executes software programs, instructions, and / or modules stored in the memory 602, and calls data stored in the memory to perform various functions of the image forming device and / or process data. The processing chip 601 can be composed of an integrated circuit (IC), for example, it can be composed of a single packaged IC, or it can be composed of multiple packaged ICs with the same or different functions. For example, the processor 601 can include a central processing unit (CPU), a microcontroller unit (MCU), etc.

[0128] Memory 602 is used to store execution instructions of processor 601. Memory 602 can be implemented by any type of volatile or non-volatile storage device or a combination of them, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic disk or optical disk.

[0129] When the execution instructions in the memory 602 are executed by the processor 601 , the image forming device 600 is enabled to execute the image data processing method according to the embodiment of the present invention.

[0130] In a specific implementation, the present application further provides a computer storage medium, wherein the computer storage medium may store a program, and when the program is executed, the program may include some or all of the steps in each embodiment of the image data processing method of the image forming device provided by the present application. The storage medium may be a disk, an optical disk, a read-only memory (ROM) or a random access memory (RAM), etc.

[0131] In a specific implementation, the present application also provides a computer program product, wherein the computer program product includes executable instructions, and when the executable instructions are executed on a computer, the computer executes part or all of the steps in each embodiment of the image data processing method of the image forming device provided in the present application.

[0132] The embodiment of the present application also provides a non-temporary computer-readable storage medium, which stores computer instructions, and the computer instructions enable the computer to execute the method provided by the embodiment of the present application.

[0133] Those skilled in the art can clearly understand that the technology in the embodiments of the present application can be implemented by means of software plus a necessary general hardware platform. Based on this understanding, the technical solution in the embodiments of the present application is essentially or the part that contributes to the prior art can be embodied in the form of a software product, which can be stored in a storage medium such as ROM / RAM, a disk, an optical disk, etc., including several instructions for enabling a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the methods described in each embodiment of the present application or some parts of the embodiments.

[0134] In this specification, the same or similar parts between the various embodiments can be referred to each other. In particular, for the device embodiment and the terminal embodiment, since they are basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the description in the method embodiment.

Claims

1. A method for processing image data, characterized in that: The method is applied to a processing chip, comprising: Get the differential data output by the scanned analog front end; Sorting the parameters in the differential data according to the preset configuration information to obtain the image data to be detected after the sorting is completed; The validity and color information of the image data to be detected are detected, and the processed image data is output.

2. The method according to claim 1, characterized in that: The configuration information is set according to the type of the scanning analog front end.

3. The method according to claim 1, characterized in that: The configuration information includes: The logarithm of the differenced data; The number of bits and positions of pixel data in the differential data; The number of bits and the position of the control information in the differential data.

4. The method according to any one of claims 1 to 3, characterized in that: The step of sorting the parameters in the differential data according to the preset configuration information to obtain the image data to be detected after the sorting is completed includes: Performing serial-to-parallel conversion on the differential data to obtain parallel output data; The parameters in the parallel output data are sorted in corresponding positions according to the configuration information to obtain the image data to be detected.

5. The method according to claim 3, characterized in that: The control information includes the line header information to be tested, the validity information to be tested and the color information to be tested; the configuration information also includes: configuration line header information, configuration validity information and configuration color information; The detecting of validity and color information of the image data to be detected and outputting processed image data comprises: Detecting whether the to-be-detected line header information of the to-be-detected image data matches the configuration line header information in the configuration information; Detecting whether the validity information to be tested of the image data to be tested matches the configuration validity information in the configuration information; If yes, determining that the image data to be detected is valid data; Color detection is performed on the color information to be detected in the valid data according to the configured color information in the configuration information, and processed image data is output after the detection is completed.

6. The method according to claim 5, characterized in that The method further comprises: If any of the above tests is negative, the image data to be detected is invalid data and is discarded.

7. A processing chip, characterized in that: include: Differential data interface, used to obtain differential data output by the scanning analog front end; The data processor is used to sort the parameters in the differential data according to preset configuration information to obtain the image data to be detected after sorting; detect the validity and color information of the image data to be detected, and output the processed image data.

8. The processing chip according to claim 7, characterized in that: The configuration information is set according to the type of the scanning analog front end.

9. The processing chip according to claim 7, characterized in that: The configuration information includes: The logarithm of the differential data; The number of bits and positions of pixel data in the differential data; The number of bits and the position of the control information in the differential data.

10. The processing chip according to claim 7, characterized in that: The data processor comprises: A serial-to-parallel conversion module, used for performing serial-to-parallel conversion on the differential data to obtain parallel output data; A data sorting module is used to sort the parameters in the parallel output data in corresponding positions according to the configuration information to obtain the image data to be detected.

11. The processing chip according to claim 10, characterized in that: The data processor further comprises: The phase-locked loop module is used to output a doubled frequency clock signal after detecting that the differential clock signal output by the scanning analog front end is stable so as to enable the serial-to-parallel conversion module to perform serial-to-parallel conversion on the differential data, and output a delayed phase-locked loop identification signal and a received data processing clock signal so as to enable the data sorting module to perform parameter sorting to obtain the image data to be detected.

12. The device according to claim 9, characterized in that The control information includes the line header information to be tested, the validity information to be tested and the color information to be tested; the configuration information also includes: configuration line header information, configuration validity information and configuration color information; The data processor comprises: A line header detection module, used to detect whether the line header information of the image data to be detected matches the configuration line header information in the configuration information; A pixel processing module is used to detect whether the validity information to be tested of the image data to be detected matches the configuration validity information in the configuration information, and when the row header information to be tested matches the configuration row header information and the validity information to be tested matches the configuration validity information, it is determined that the image data to be detected is valid data, and color detection is performed on the color information to be tested in the valid data according to the configuration color information in the configuration information.

13. An image forming device, characterized in that: include: at least one processing chip; and at least one memory in communication with the processing chip, wherein: The memory stores program instructions that can be executed by the processing chip, and the processing chip calls the program instructions to execute the method according to any one of claims 1 to 6.

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