Printed wiring board substrate and printed wiring board
By using a technology of combining fluororesin and conductive particles on the base film of the printed wiring board, the corrosion problem of metal layer caused by fluoride in the composite film is solved, the adhesion between the wiring and the base film is improved, and the printed wiring board is ensured. Stability and performance.
Patent Information
- Application Number
- CN202380046857.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2022-06-16
- Filing Date
- 2023-06-13
- Publication Date
- 2025-01-10
AI Technical Summary
When using a composite film to form a printed wiring board by a semi-addition method, the water-soluble fluoride formed at the interface between the metal layer and the resin film causes the metal layer to corrode during wet etching, reducing the adhesion between the wiring and the base film.
The base film formed of fluorine resin is adopted. The conductive layer contains a plurality of conductive particles that are bound to each other. The conductive layer is formed by heating and pressurization to ensure strong bonding between the conductive particles and the base film, reduce the residual fluorine compound, and improve the conductive layer and the base. Adhesion of the membrane.
The adhesion of the printed wiring board is effectively improved, corrosion of the conductive layer during the wet etching process is suppressed, and the bonding force between the wiring and the base film is improved.
Smart Images

Figure CN119302042A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to a substrate for a printed wiring board and a printed wiring board. This application claims priority based on Japanese application No. 2022-097564 filed on June 16, 2022, and all the contents described in the Japanese application are incorporated herein by reference. Background Art
[0002] Japanese Patent Publication No. 2006-69074 (Patent Document 1) describes a composite film. The composite film described in Patent Document 1 has a resin film and a metal layer. The resin film has a main surface. The resin film is formed of, for example, a fluororesin. The metal layer is arranged on the main surface of the resin film. The metal layer is formed by sputtering.
[0003] Prior art literature
[0004] Patent Literature
[0005] Patent Document 1: Japanese Patent Application Publication No. 2006-69074 Summary of the invention
[0006] The printed wiring board substrate disclosed in the present invention comprises: a base film having a main surface; and a conductive layer disposed on the main surface. The base film is formed of a fluororesin. The conductive layer is a layer including a plurality of conductive particles bonded to each other. The amount of nitrogen present in the main surface is 0.2 atomic % or more. BRIEF DESCRIPTION OF THE DRAWINGS
[0007] Figure 1 It is a cross-sectional view of the printed wiring board substrate 100 .
[0008] Figure 2 It is a cross-sectional view of a modified example of the printed wiring board substrate 100 .
[0009] Figure 3 It is a manufacturing process diagram of the printed wiring board substrate 100 .
[0010] Figure 4 It is a cross-sectional view for explaining the production step S1.
[0011] Figure 5 It is a cross-sectional view for explaining the conductive layer forming step S2.
[0012] Figure 6 is a cross-sectional view of the printed wiring board 200 .
[0013] Figure 7 It is a cross-sectional view of a modified example of the printed wiring board 200 .
[0014] Figure 8 It is a manufacturing process diagram of the printed wiring board 200.
[0015] Fig. 9It is a cross-sectional view explaining the resist pattern forming step S4.
[0016] Fig.10 It is a cross-sectional view explaining the electrolytic plating step S5.
[0017] Fig.11 It is a cross-sectional view explaining the resist pattern removing step S6.
[0018] Fig.12 This is a SEM image of a cross section of the printed wiring board substrate 100 . DETAILED DESCRIPTION
[0019] [Technical Problems to be Solved by the Present Disclosure]
[0020] In the composite film described in Patent Document 1, water-soluble fluoride is formed at the interface between the metal layer and the resin film during sputtering. When the composite film described in Patent Document 1 is used to form a printed wiring board by a semi-additive method, it is necessary to remove a portion of the metal layer that does not constitute the wiring by wet etching. During the wet etching, the fluoride corrodes the metal layer constituting the wiring. The corrosion of the metal layer constituting the wiring causes the adhesion between the wiring and the base film to decrease.
[0021] The present disclosure has been made in view of the above-mentioned problems of the prior art. More specifically, the present disclosure provides a printed wiring board substrate capable of improving the adhesion of wiring.
[0022] [Effects of the present disclosure]
[0023] According to the printed wiring board substrate of the present disclosure, the adhesion of wiring can be improved.
[0024] [Description of Embodiments of the Present Disclosure]
[0025] First, embodiments of the present disclosure will be listed and described.
[0026] (1) A printed wiring board substrate according to an embodiment includes: a base film having a main surface; and a conductive layer disposed on the main surface. The base film is formed of a fluororesin. The conductive layer is a layer including a plurality of conductive particles bonded to each other. The amount of nitrogen present in the main surface is 0.2 atomic % or more.
[0027] According to the printed wiring board substrate of (1) above, the adhesion of wiring can be improved.
[0028] (2) In the printed wiring board substrate of (1) above, the conductive particles may be particles containing copper or silver as a main component.
[0029] (3) In the printed wiring board substrate of (1) or (2) above, the thickness of the conductive layer may be 0.05 μm or more and 2.0 μm or less.
[0030] (4) In the printed wiring board substrate according to (1) to (3) above, the average particle size of the conductive particles may be 1 nm or more and 500 nm or less.
[0031] (5) The printed wiring board substrate according to (1) to (4) above may further include a copper plating layer disposed on the conductive layer.
[0032] (6) In the printed wiring board substrate of (5) above, the copper plating layer may be an electroless copper plating layer or an electrolytic copper plating layer.
[0033] (7) In the printed wiring board substrate according to any one of (1) to (6) above, the base film may be formed of a fluororesin containing a filler.
[0034] (8) In the printed wiring board substrate of (7) above, the filler may be made of silicon dioxide.
[0035] (9) In the printed wiring board substrate of (1) to (8) above, the fluororesin is polytetrafluoroethylene.
[0036] (10) A printed wiring board according to an embodiment includes: a base film having a main surface; and wiring arranged on the main surface. The base film is formed of a fluororesin. The wiring has a conductive layer arranged on the main surface. The conductive layer is a layer including a plurality of conductive particles bonded to each other. The amount of nitrogen present in the main surface is 0.2 atomic % or more.
[0037] [Details of the embodiments of the present disclosure]
[0038] Next, the details of the embodiments of the present disclosure will be described with reference to the accompanying drawings. In the following drawings, the same reference symbols are marked for the same or corresponding parts, and repeated descriptions are not repeated. Hereinafter, the printed wiring board substrate involved in the embodiment is set as the printed wiring board substrate 100, and the printed wiring board involved in the embodiment is set as the printed wiring board 200.
[0039] (Configuration of Printed Wiring Board Substrate 100)
[0040] Hereinafter, the configuration of the printed wiring board substrate 100 will be described.
[0041] Figure 1 1 is a cross-sectional view of a printed wiring board substrate 100. Figure 1 As shown, the printed wiring board substrate 100 includes a base film 10 , a conductive layer 20 , and a copper plating layer 30 .
[0042] The base film 10 has a first main surface 10a and a second main surface 10b. The first main surface 10a and the second main surface 10b are end surfaces in the thickness direction of the base film 10. The second main surface 10b is a surface facing the first main surface 10a.
[0043] The base film 10 is formed of a fluororesin. The fluororesin is, for example, PTFE (polytetrafluoroethylene). However, the fluororesin used in the base film 10 is not limited thereto. The fluororesin used in the base film 10 may also be PFA (tetrafluoroethylene-perfluoroalkyl vinyl ether copolymer) or FEP (tetrafluoroethylene-hexafluoropropylene copolymer). The base film 10 may also be formed of a fluororesin containing a filler. The filler may also be silicon dioxide. However, the filler may also be formed of other materials.
[0044] The filler may also be spherical. The average particle size of the filler may also be greater than 0.3 μm and less than 4.0 μm. The average particle size of the filler is measured by performing cross-sectional observation using a scanning electron microscope (SEM) and averaging the particle sizes of the filler observed in the cross section. The particle size of the filler may be calculated manually based on the above-mentioned SEM image, or it may be calculated using image processing. The area of the cross section is 20 μm×20 μm. The method for preparing the sample for the above-mentioned cross-sectional observation is not particularly limited, but in order to accurately measure the particle size, the sample is prepared using, for example, a cross section polisher (Cross Section Polisher (registered trademark) manufactured by JEOL Ltd.). The volume ratio of the filler to the fluororesin may be greater than 1.2, or may be greater than 1.5.
[0045] The filler and the conductive layer 20 may be in contact, or there may be a distance between the filler and the conductive layer 20. In the case where there is a distance between the filler and the conductive layer 20, a fluororesin may be present between the filler and the conductive layer 20. The distance may be greater than 0.01 μm and less than 0.5 μm, or greater than 0.05 μm and less than 0.3 μm. In any cross section orthogonal to the first principal surface 10a, the total length of the fluororesin layer in the direction parallel to the first principal surface 10a within the above-mentioned distance (greater than 0.01 μm and less than 0.5 μm) between the filler and the conductive layer 20 may be greater than 5%, or greater than 10%, relative to the entire length of the first principal surface 10a in the cross section. In this case, the above-mentioned effect of improving adhesion is fully ensured.
[0046] The conductive layer 20 is disposed on the first main surface 10a. The thickness of the conductive layer 20 is set to T. T may also be greater than 0.05 μm and less than 2.0 μm. When the thickness of the conductive layer 20 is less than 0.05 μm, the conductivity is insufficient, and during the electrolytic plating step (S5) described below, defects in the electrolytic plating layer may occur, or the deviation in the thickness distribution of the electrolytic plating layer may increase. When the thickness of the conductive layer 20 exceeds 2.0 μm, in the etching step (S7) described below, the etching amount becomes too large, and the deviation in the circuit width caused by the deviation in etching increases.
[0047] The conductive layer 20 is a layer of a plurality of conductive particles bonded to each other. The thickness of the conductive layer 20 can be measured by the following method. The sample is embedded in a resin, and the processed surface is preliminarily finished by mechanical grinding. The processed surface is cross-sectioned using an Ar ion beam (cross-section polisher), and a 2 nm carbon coating is performed, and the thickness of the conductive layer 20 is measured in an image obtained by a high-resolution scanning electron microscope (manufactured by Hitachi High-Technologies Corporation, SU8020). The thickness is set as the average value of the measured values at any 10 points.
[0048] The conductive layer 20 is a porous body. In the conductive layer 20, two adjacent conductive particles are bonded to each other. The conductive particles bonded to each other may also be sintered. In the conductive layer 20, there may also be a portion where two adjacent conductive particles are not bonded to each other. The plurality of conductive particles at the interface with the first main surface 10a are fixed to the first main surface 10a. However, a portion of the plurality of conductive particles at the interface with the first main surface 10a may not be fixed to the first main surface 10a.
[0049] The conductive particles are formed of a conductive material. The conductive particles are particles whose main component is, for example, copper (Cu). The conductive particles may also be particles whose main component is silver (Ag). It should be noted that copper being the main component of the conductive particles means that the content of copper in the conductive particles exceeds 50% by mass. The same is true when silver is used. In the conductive layer 20, a variety of conductive particles formed of different materials may also be included. The average particle size of the conductive particles is, for example, 1 nm or more and 500 nm or less. When the average particle size of the conductive particles is less than 1 nm, the conductivity is reduced because it is easy to oxidize. In addition, during the electrolytic plating step (S5) described below, defects in the electrolytic plating layer will occur, or the deviation of the thickness distribution of the electrolytic plating layer will increase. When the average particle size of the conductive particles exceeds 500 nm, it is difficult to obtain bonding between the particles by sintering, so the conductivity is reduced. In addition, during the electrolytic plating step (S5) described below, defects in the electrolytic plating layer will occur, or the deviation of the thickness distribution of the electrolytic plating layer will increase. The average particle size of the conductive particles is measured using a particle size distribution device (for example, Microtrac particle size distribution analyzer UPA-150EX manufactured by Nikkiso Co., Ltd.).
[0050] The amount of nitrogen present in the first main surface 10a is 0.2 atomic % or more. The amount of nitrogen present in the first main surface 10a is measured by XPS (X-ray photoelectron spectroscopy) analysis. More specifically, after removing the conductive layer 20 disposed on the first main surface 10a using an acidic solution, the first main surface 10a is subjected to XPS analysis, and the amount of nitrogen present per unit area in the first main surface 10a is obtained based on the peak area of the energy spectrum indicating the 1s orbit of nitrogen obtained as a result.
[0051] The copper plating layer 30 is disposed on the conductive layer 20. The copper plating layer 30 is a copper layer formed by plating. The copper plating layer 30 is, for example, an electroless copper plating layer, that is, a copper layer formed by electroless plating. The copper plating layer 30 may also be an electrolytic copper plating layer, that is, a copper layer formed by electrolytic plating. It should be noted that the printed wiring board substrate 100 may not have the copper plating layer 30.
[0052] <Modification>
[0053] Figure 2 1 is a cross-sectional view of a modified example of the printed wiring board substrate 100. Figure 2 As shown, in the printed wiring board substrate 100, the conductive layer 20 may be further disposed on the second main surface 10b. When the conductive layer 20 is disposed on the second main surface 10b, the copper plating layer 30 may be disposed on the conductive layer 20 on the second main surface 10b.
[0054] (Method of Manufacturing Printed Wiring Board Substrate 100)
[0055] Hereinafter, a method for manufacturing the printed wiring board substrate 100 will be described.
[0056] Figure 3 1 is a manufacturing process diagram of the printed wiring board substrate 100. Figure 3 As shown, the manufacturing method of the printed wiring board substrate 100 includes a preparation step S1, a conductive layer forming step S2, and a plating step S3. The conductive layer forming step S2 is performed after the preparation step S1. The plating step S3 is performed after the conductive layer forming step S2. It should be noted that, when the printed wiring board substrate 100 does not have the copper plating layer 30, the plating step S3 is omitted.
[0057] Figure 4 is a cross-sectional view illustrating the preparation step S1. Figure 4 As shown, in the preparation step S1, a base film 10 is prepared. It should be noted that in the base film 10 prepared in the preparation step S1, the conductive layer 20 is not formed on the first main surface 10a. In addition, before the base film 10 prepared in the preparation step S1 is provided to the conductive layer forming step S2, the first main surface 10a may be pre-treated (for example, alkali treatment, plasma treatment), or may not be pre-treated.
[0058] Figure 5 2 is a cross-sectional view illustrating the conductive layer forming step S2. Figure 5 As shown, a conductive layer 20 is formed on the first main surface 10a. In the conductive layer forming step S2, first, ink in which a plurality of conductive particles are dispersed is applied on the first main surface 10a. The surfaces of the conductive particles contained in the ink are coated with an organic material. The organic material contains nitrogen and hydrogen.
[0059] In the conductive layer forming step S2, secondly, the ink applied on the first main surface 10a is heated and pressurized. The heating and pressurization are performed in a vacuum environment. The heating and pressurization are performed, for example, using a vacuum press. By heating and pressurizing, the solvent in the ink evaporates, and the organic material coating the surface of the conductive particles decomposes, thereby generating sintering between the conductive particles and fixing the conductive particles on the first main surface 10a. Through the above process, the conductive layer 20 is formed on the first main surface 10a. It should be noted that when pressurizing, a plate component formed of a metal material such as aluminum is arranged between the pressure head of the vacuum press and the ink.
[0060] In the plating step S3, a copper plating layer 30 is formed on the conductive layer 20. The copper plating layer 30 is formed by, for example, a non-electrolytic plating method. The copper plating layer 30 can also be formed by an electrolytic plating method. Figure 1 A printed wiring board substrate 100 having the structure shown.
[0061] <Modification>
[0062] In the above example, in the conductive layer forming step S2, the ink in which the conductive particles are dispersed is applied to the first main surface 10a, but the ink may also be applied to the surface of a plate member formed of a metal material such as aluminum. In this case, after the base film 10 is arranged on the applied ink, the ink is heated and pressurized. It should be noted that when the ink is applied to the surface of a plate member formed of a metal material such as aluminum, it is less likely to be repelled than when the ink is applied to the surface of the base film 10 formed of a fluororesin.
[0063] (Configuration of Printed Wiring Board 200)
[0064] Hereinafter, the configuration of the printed wiring board 200 will be described.
[0065] Figure 6 2 is a cross-sectional view of the printed wiring board 200. Figure 6 As shown, the printed wiring board 200 has a base film 10 and wiring 50. The wiring 50 is arranged on the first main surface 10a. The wiring 50 has a conductive layer 20, a copper plating layer 30 and an electrolytic copper plating layer 40. The electrolytic copper plating layer 40 is arranged on the copper plating layer 30. The electrolytic copper plating layer 40 is a copper layer formed by electrolytic plating. The printed wiring board 200 may not have the copper plating layer 30.
[0066] Figure 7 2 is a cross-sectional view of a modified example of the printed wiring board 200. Figure 7 As shown, in the printed wiring board 200 , the wiring 50 may be arranged also on the second main surface 10 b . In this case as well, the printed wiring board 200 may not have the copper plating layer 30 .
[0067] (Method of Manufacturing Printed Wiring Board 200)
[0068] Hereinafter, a method for manufacturing printed wiring board 200 will be described.
[0069] Figure 8 2 is a manufacturing process diagram of the printed wiring board 200. Figure 8 As shown, the method for manufacturing the printed wiring board 200 includes a resist pattern forming step S4, an electrolytic plating step S5, a resist pattern removing step S6, and an etching step S7. The printed wiring board 200 is formed using the printed wiring board substrate 100.
[0070] Fig. 9 2 is a cross-sectional view illustrating the resist pattern forming step S4. Fig. 9 As shown, in the resist pattern forming step S4, a resist pattern 60 is formed on the conductive layer 20. The resist pattern 60 has an opening 61. The copper plating layer 30 is exposed from the opening 61. The resist pattern 60 is formed by, for example, exposing and developing a dry film resist to perform patterning. It should be noted that, when the printed wiring board 200 does not have the copper plating layer 30, the conductive layer 20 is exposed from the opening 61.
[0071] Fig.10 2 is a cross-sectional view illustrating the electrolytic plating step S5. Fig.10 As shown, in the electrolytic plating step S5, the electrolytic copper plating layer 40 is formed on the copper plating layer 30 exposed from the opening 61 (in the case where there is no copper plating layer 30, on the conductive layer 20 exposed from the opening 61). The electrolytic copper plating layer 40 is formed by passing electricity through the conductive layer 20 and the copper plating layer 30 to perform electrolytic plating on the copper plating layer 30 exposed from the opening 61.
[0072] Fig.11 2 is a cross-sectional view illustrating the resist pattern removal step S6. Fig.11 As shown, in the resist pattern removal step S6, the resist pattern 60 is removed. In the etching step S7, the conductive layer 20 and the copper plating layer 30 between two adjacent electrolytic copper plating layers 40 are removed by wet etching. Figure 6 A printed wiring board 200 of the structure shown.
[0073] (Effects of the printed wiring board substrate 100)
[0074] Hereinafter, the effects of the printed wiring board substrate 100 will be described.
[0075] In the printed wiring board substrate 100, in the conductive layer forming step S2, the organic material coating the surface of the conductive particles reacts with the fluorine contained in the fluororesin of the base film 10 to generate a fluorine compound. Since the organic material coating the surface of the conductive particles contains hydrogen, the fluorine compound is hydrogen fluoride. Since hydrogen fluoride is a gas, the fluorine compound generated in the conductive layer forming step S2 is discharged to the outside through the conductive layer 20 as a porous body, and is not likely to remain at the interface between the conductive layer 20 and the first main surface 10a. In other words, the conductive layer 20 will not be corroded like the water-soluble fluoride formed at the interface between the metal layer and the resin film when sputtering is performed.
[0076] When the printed wiring board substrate 100 is used to form the printed wiring board 200, the conductive layer 20 that does not constitute the wiring 50 is removed by wet etching. In the printed wiring board substrate 100, since the fluorine compound is not likely to remain at the interface between the conductive layer 20 and the first main surface 10a, the conductive layer 20 that constitutes the wiring 50 is not likely to be corroded during the wet etching. Therefore, according to the printed wiring board substrate 100, the peeling of the wiring 50 can be suppressed.
[0077] It should be noted that in the conductive layer forming step S2, the nitrogen contained in the organic material covering the surface of the conductive particles at the interface with the first main surface 10a is combined with the carbon contained in the fluororesin of the base film 10, so that the conductive layer 20 is fixed to the first main surface 10a. For this reason, when the amount of nitrogen present in the first main surface 10a is measured by XPS analysis after the conductive layer 20 is removed by an acidic solution, it is 0.2 atomic % or more. Therefore, in the printed wiring board substrate 100 and the printed wiring board 200, the adhesion between the base film 10 and the conductive layer 20 is excellent. It should be noted that as an apparatus for XPS analysis, QuanteraSXM manufactured by ULVAC PHI was used, and the X-ray irradiation conditions were set to 100μmφ, 25W, and 15kV.
[0078] When the base film 10 is formed of a fluororesin containing a filler, the base film 10 is less likely to deform during pressurization in the conductive layer forming step S2, so that pressure is applied to the ink more uniformly. Therefore, in this case, the conductive layer 20 can be formed more uniformly.
[0079] When the filler is formed of silicon dioxide, silicon dioxide is inexpensive, so the cost of the base film 10 can be reduced. When the average particle size of the filler is 0.3 μm or more and 4.0 μm or less, it is possible to suppress the increase of the unevenness of the first main surface 10a (second main surface 10b) due to the pressurization in the conductive layer forming step S2, and suppress the deformation of the base film 10 during the pressurization. When the volume ratio of the filler to the fluororesin is 1.2 or more, the conductive layer 20 can be formed more uniformly.
[0080] Fig.12 This is a SEM image of a cross section of the printed wiring board substrate 100 . Fig.12 ] A SEM image of a cross section perpendicular to the first main surface 10a is shown in FIG. Fig.12 The cross section of was processed using a cross section polisher (Cross Section Polisher (registered trademark)). Fig.12 In the embodiment, the base film 10 is formed of PTFE containing a filler made of silica. Fig.12 As shown, when there is a fluororesin between the filler and the conductive layer 20, when the pressurization in the conductive layer forming step S2 is performed, a high pressure is applied between the fluororesin and the conductive layer 20, thereby improving the adhesion between the conductive layer 20 and the base film 10. When the thickness of the fluororesin is less than 0.01 μm, the conductive layer 20 and the filler may come into contact. When the thickness of the fluororesin exceeds 0.5 μm, the above-mentioned pressure increase effect is reduced. Therefore, when the thickness of the fluororesin is greater than 0.01 μm and less than 0.5 μm, the adhesion between the conductive layer 20 and the base film 10 is particularly improved.
[0081] When the filler is spherical, it is easy to obtain a uniform distance between the conductive layer 20 along a part of the surface of the filler. In addition, when the filler is spherical, it is not easy for the filler to break through the conductive layer 20 when the pressurization in the conductive layer forming step S2 is performed. In any cross section orthogonal to the first main surface 10a, when the length of the fluororesin layer along the first main surface 10a between the filler and the conductive layer 20 is 5% or more of the width of the cross section, the above-mentioned effect of improving the adhesion is fully ensured. Alternatively, in any cross section orthogonal to the first main surface 10a, the total length of the fluororesin layer along the direction parallel to the first main surface 10a within the range of the above-mentioned distance (0.01μm or more and 0.5μm or less) between the filler and the conductive layer 20 can be 5% or more, or 10% or more relative to the entire length of the first main surface 10a in the cross section. In this case, the above-mentioned effect of improving the adhesion is fully ensured.
[0082] <Example>
[0083] Samples 1 to 7 were prepared as examples, and Sample 8 was prepared as a comparative example. In Samples 1 to 6 and 8, the base film 10 was formed of PTFE containing a filler. In Sample 7, the base film 10 was formed of PTFE containing no filler.
[0084] Copper particles having an average particle size of 70 nm were used as the conductive particles in Samples 1 to 4 and Samples 6 to 7. Copper particles having an average particle size of 30 nm were used as the conductive particles in Sample 5.
[0085] In samples 1 to 8, the pressure applied to the ink in the conductive layer forming step S2 was changed. In sample 8, the pressure was 0. That is, in sample 8, no pressure was applied to the ink during the conductive layer forming step S2. In samples 1 to 8, the maximum heating temperature in the conductive layer forming step S2 (the maximum heating temperature of the hot plate of the pressurizing device) was set to 350°C. Samples 1 to 8 were heated from room temperature to 350°C at a heating rate of 5°C / min, maintained at 350°C for 10 minutes, and then cooled to room temperature at a cooling rate of 5°C / min.
[0086] In samples 1 to 5, 7, and 8, ink was applied to the first main surface 10a during the conductive layer forming step S2. In sample 6, ink was applied to the surface of the aluminum plate member during the conductive layer forming step S2. In samples 1 to 8, the first main surface 10a was not pre-treated. The details of samples 1 to 8 are shown in Table 1.
[0087] [Table 1]
[0088]
[0089] For samples 1 to 8, the amount of nitrogen present in the first main surface 10a and the adhesion between the conductive layer 20 and the first main surface 10a were measured. In the determination of the adhesion between the conductive layer 20 and the first main surface 10a, first, an electrolytic copper plating layer was formed on the conductive layer 20. At this time, the average value of the combined thickness of the conductive layer 20 and the thickness of the electrolytic copper plating layer was set to 20μm. Second, in accordance with JIS-C6471 (1995), the base film 10 was fixed to the glass fiber epoxy resin board using a double-sided tape, and the conductive layer 20 and the electrolytic copper plating layer were peeled off relative to the base film 10 in a 180° direction. The measuring device used was Autograph AGS-X / 500N of Shimadzu Corporation, the sample width was set to 5mm, the peeling speed was set to 50mm / min, and the measuring temperature was set to 25±3°C. The peel strength during this peeling was set as the adhesion between the conductive layer 20 and the first main surface 10a. The amount of nitrogen present was obtained by measuring the amount of nitrogen present in the base film by XPS analysis after the copper layer was etched away using a copper etching solution of 1 mol / L copper chloride and 0.5 mol / L hydrochloric acid. The XPS analysis used a QuanteraSXM manufactured by ULVAC PHI as an apparatus, and the X-ray irradiation conditions were set to 100 μmφ, 25 W, and 15 kV. These measurement results are shown in Table 2.
[0090] [Table 2]
[0091]
[0092] As shown in Table 2, the amount of nitrogen present in the first main surface 10a is 0.2 atomic % or more in Samples 1 to 7. On the other hand, the amount of nitrogen present in the first main surface 10a is less than 0.2 atomic % in Sample 8. It is clear from this that the amount of nitrogen present in the first main surface 10a is 0.2 atomic % or more by performing the pressurization in the conductive layer forming step S2.
[0093] The adhesion between the conductive layer 20 and the first main surface 10a in samples 1 to 7 is greater than that in sample 8. From this comparison, it is clear that the adhesion of the conductive layer 20 and thus the adhesion of the wiring 50 is improved by making the amount of nitrogen present in the first main surface 10a 0.2 atomic % or more.
[0094] The embodiments disclosed this time should be considered to be illustrative in all aspects and not restrictive. The scope of the present invention is indicated by the claims rather than the embodiments described above, and is intended to include all modifications within the meaning and scope equivalent to the claims.
[0095] Description of Reference Numerals
[0096] 10 Basement membrane
[0097] 10a First main surface
[0098] 10b Second main surface
[0099] 20 Conductive layer
[0100] 30 Copper plating
[0101] 40 Electrolytic copper plating layer
[0102] 50 Wiring
[0103] 60 Resist pattern
[0104] 61 Opening
[0105] 100 Substrates for printed wiring boards
[0106] 200 Printed Wiring Board
[0107] S1 Preparation process
[0108] S2 Conductive layer forming process
[0109] S3 Plating process
[0110] S4 Resist pattern forming process
[0111] S5 Electrolytic plating process
[0112] S6 Resist pattern removal process
[0113] S7 Etching Process
[0114] T Thickness.
Claims
1. A printed wiring board substrate, comprising: a base film having a main surface; and A conductive layer is disposed on the main surface, The base film is formed of a fluororesin, The conductive layer is a layer including a plurality of conductive particles bonded to each other, The amount of nitrogen present in the main surface is 0.2 atomic % or more.
2. The printed wiring board substrate according to claim 1, wherein The conductive particles are particles containing copper or silver as a main component.
3. The printed wiring board substrate according to claim 1 or 2, wherein The conductive layer has a thickness of 0.05 μm or more and 2.0 μm or less.
4. The printed wiring board substrate according to any one of claims 1 to 3, wherein The average particle diameter of the conductive particles is greater than or equal to 1 nm and less than or equal to 500 nm.
5. The printed wiring board substrate according to any one of claims 1 to 4, wherein The printed wiring board substrate further includes a copper plating layer disposed on the conductive layer.
6. The printed wiring board substrate according to claim 5, wherein The copper plating layer is an electroless copper plating layer or an electrolytic copper plating layer.
7. The printed wiring board substrate according to any one of claims 1 to 6, wherein The base film is formed of a fluororesin containing a filler.
8. The printed wiring board substrate according to claim 7, wherein The filler is formed of silicon dioxide.
9. The printed wiring board substrate according to any one of claims 1 to 8, wherein The fluororesin is polytetrafluoroethylene.
10. A printed wiring board comprising: a base film having a main surface; and wiring, arranged on the main surface, The base film is formed of a fluororesin, The wiring has a conductive layer arranged on the main surface, The conductive layer is a layer including a plurality of conductive particles bonded to each other, The amount of nitrogen present in the main surface is 0.2 atomic % or more.
Citation Information
Patent Citations
Method of manufacturing composite film and method for reforming surface of resin film
JP2006069074A
Method for forming decorative coating surface
JP2022097564A