Automatic testing method for transformer substation virtual terminal loop checking tool

Abstract

The invention relates to the technical field of transformer substation checking, in particular to an automatic testing method for a transformer substation virtual terminal loop checking tool, which comprises the following steps: reading a configuration file by the checking tool, and analyzing and identifying information of the configuration file to obtain an original checking result; performing visual display on the original checking result, and correcting the original checking result according to the use habit; carrying out test basis matching on the to-be-tested checking tool TUT, and testing the TUT to obtain a test result; and visually displaying the test result and outputting a test report. According to the method, the functions of the automatic checking tool for the virtual loop of the configuration file of the intelligent substation can be effectively improved, the accuracy, effectiveness and friendliness of the automatic checking tool for the virtual loop of the configuration file are improved, and the uncontrollable hidden danger of the automatic checking tool for field operation due to the logic and functional defects of the automatic checking tool is avoided; power grid safety risks after new equipment is put into operation are reduced, intrinsic safety of the intelligent substation is improved, and quality improvement and efficiency improvement of the power grid are promoted.

Description

Technical Field

[0001] The invention relates to the technical field of transformer substation verification, and in particular to an automatic testing method for a transformer substation virtual terminal circuit verification tool. Background Art

[0002] As an important part of the configuration file of the smart substation, the secondary virtual terminal circuit of the substation is a bridge to realize the protection and control functions of the whole station. Therefore, it is particularly important to ensure the correctness of the virtual terminal circuit. The acceptance of the configuration file of the smart substation mostly adopts the means of transmission test and manual verification of the configuration file, which requires a high technical level of personnel and is difficult to fully verify the virtual circuit of the smart substation. With the improvement of the digital level of power grid equipment and related detection professions, the automatic verification tool of the virtual circuit of the configuration file of the smart substation has gradually been widely used in power grids of all levels across the country. By realizing the automatic and comprehensive verification of the configuration file, the correctness and consistency of the configuration file of the smart substation are guaranteed to a certain extent. However, in the actual application process, due to the lack of relevant standards to test and detect the relevant functions and usage conditions of the automatic verification tool of the virtual circuit of the configuration file of the smart substation, the comprehensiveness of the functions of the configuration file verification tool on the market and the rationality of the performance cannot be effectively guaranteed, and the verification results of the configuration file are uneven. There are many cases where the virtual circuit verification coverage type is not comprehensive, the verification results are not intuitive and unfriendly, and even obvious omissions and false detections occur.

[0003] Therefore, it is necessary to design an automatic testing method for substation virtual terminal circuit verification tools. Summary of the invention

[0004] The purpose of the present invention is to solve at least one of the technical problems existing in the prior art and to provide an automatic testing method for a substation virtual terminal circuit verification tool.

[0005] To achieve the above object, the technical solution adopted by the present invention is as follows: an automatic testing method for a substation virtual terminal circuit verification tool, comprising: Step 1: The calibration tool reads the configuration file, parses and identifies the information in the configuration file, and obtains the original calibration result; Step 2: Visualize the original calibration results and modify them according to usage habits; Step 3, matching the test basis of the tested verification tool TUT, testing the TUT, and obtaining the test results; the test basis covers standard virtual terminal loop connections under different voltage levels, different main wiring forms, different interval types, and different primary and secondary equipment configurations; Step 4: Visualize the test results and output the test report.

[0006] Furthermore, in step 1, the parsing and information identification of the configuration file specifically includes: Read the SCD file to identify the SCD electrical structure information, which includes the voltage level in the substation, the main wiring form at each voltage level, and the primary equipment model information at each voltage level; Read SSD files to identify SSD electrical structure information; Read and identify IED attribute information, including IED device type, voltage level, bay type, bay number, set, and IED sampling method attribute information; Read the model information of the IED device in the configuration file, identify the ICD version and virtual terminals used by the IED, and adapt the standard virtual terminals in the test basis.

[0007] Furthermore, in step 2, the visual display of the original verification result includes: Overview of the calibration results; Check the error distribution by bay and IED, including marking the bays, IEDs and virtual terminal circuits with errors in sequence; Hierarchical display by bay, IED, and virtual terminal circuit; Detailed information of the error virtual terminal circuit, including output terminal and input terminal information. The output and input terminal information includes IEDName, IED description, terminal index, terminal name, and bay description information.

[0008] Furthermore, in step 3, the testing of the TUT specifically includes: Step 301, testing whether the TUT has an automatic verification function for virtual terminal circuits under different voltage levels and different wiring modes; Specifically, it includes: using TUT to open an SCD file containing 500kV 3 / 2 wiring, 220kV double busbar or double busbar single segment wiring or double busbar double segment wiring, 110kV single busbar or single busbar segment wiring, and perform virtual terminal circuit verification; Step 302, testing whether the TUT has an automatic verification function for virtual terminal loops under differentiated design conditions in different regions; Specifically, it includes: using TUT to open a configuration file containing virtual terminals under the design conditions of region A, and performing a virtual terminal circuit verification operation; using TUT to open a configuration file containing virtual terminals under the design conditions of region B, and performing a virtual terminal circuit verification operation; Step 303, testing whether the TUT has an automatic verification function for virtual terminal loops that are adaptable to device models of different technical standards, different manufacturers or models; Specifically, it includes: using TUT to open a configuration file containing device models of different technical standards, different manufacturers, and different models, and perform virtual terminal circuit verification operations; Step 304, testing the TUT to have the function of automatically checking the virtual terminal loop when the IED Name and ICD version information of the IED are not standardized; Specifically, it includes: using TUT to open a configuration file containing IED Name and IED ICD version information that is not standardized, and performing a virtual terminal circuit verification operation; Step 305, testing the TUT to identify the electrical structure information of the SCD under test; Specifically include: using TUT to import the SCD file under test; using TUT to parse the SCD file; checking whether the parsing result contains the information described in the electrical structure information identification; using the XML file editing tool to open the SCD file; comparing whether the electrical structure information parsed by TUT is consistent with the relevant information in the SCD file opened by the XML file editing tool; Step 306, testing the TUT's ability to identify the IED attribute information in the SCD under test; Specifically include: using TUT to import the SCD file under test; using TUT to parse the SCD file; checking whether the parsing result contains the IED attribute information described in IED attribute identification; using an XML file editing tool to open the SCD file; comparing whether the IED attribute information parsed by TUT is consistent with the IED related attribute information in the SCD file opened by the XML file editing tool; Step 307, testing the TUT's ability to identify the IED virtual terminal information in the SCD under test; Specifically include: using TUT to import the SCD file under test; using TUT to parse the SCD file; checking whether the parsing result contains IED virtual terminal information; using XML file editing tools to open the SCD file; comparing the IED virtual terminal information parsed by TUT with the IED related virtual terminal information in the SCD file opened by the XML file editing tool to see if they are consistent; Step 308, testing the TUT verification function when the virtual terminal is misconnected in the same bay, the device is misconnected across bays, or the duplex protection device is misconnected; Step 309, testing the TUT verification function when the virtual terminal loop is wrongly connected; Step 310, testing the TUT verification function when there are syntax connection errors such as GOOSE and SV virtual terminal loop levels and types; Step 311, testing whether the TUT has the extended maintenance function of the verification basis; Step 312, test that the TUT has the function of viewing the error distribution by bay and IED, the function of identifying the error bay, IED and virtual terminal loop, the function of displaying the loop connection details on the error virtual terminal loop, and the function of outputting the virtual terminal loop verification result report; Specifically including: use TUT to open an SCD file with several virtual terminal circuit errors, perform virtual terminal verification operations, and view the error distribution by interval and IED; use TUT to open an SCD file with several virtual terminal circuit errors, perform virtual terminal verification operations, and view the error distribution by interval and IED; use TUT to open an SCD file with several virtual terminal circuit errors, perform virtual terminal verification operations, and view detailed information on the erroneous virtual terminal circuits; use TUT to open an SCD file with several virtual terminal circuit errors, perform virtual terminal verification operations, and perform verification report export operations.

[0009] Furthermore, the step 308 specifically includes: Step 3081, using XML or SCD configuration tool to edit and generate an SCD file that only has cross-interval virtual terminal loop matching errors, and using TUT to open the SCD file; Step 3082, performing a virtual terminal loop verification operation; Step 3083, comparing and checking whether the verification result is consistent with the preset result; Step 3084, repeating steps 3081 to 3083, and replacing step 3081 with: using XML or SCD configuration tool to edit and generate an SCD file that only has duplex set matching errors, and opening the SCD file with TUT; Step 3085, repeating steps 3081 to 3083, and replacing step 3081 with: using XML or SCD configuration tool to edit and generate an SCD file that only contains virtual terminal loop matching errors within the same interval, and opening the SCD file with TUT; Step 3086, repeat steps 3081 to 3083, and replace step 3081 with: use XML or SCD configuration tool to edit and generate an SCD file in which cross-interval virtual terminal loop matching errors, duplicated set matching errors, and virtual terminal matching errors coexist in the same interval, and open the SCD file with TUT.

[0010] Furthermore, the step 309 specifically includes: Step 3091, using XML or SCD configuration tool to edit and generate an SCD file that only has loop misalignment errors such as sampling and switch position, and using TUT to open the SCD file; Step 3092, performing a virtual terminal circuit verification operation; Step 3093, comparing and checking whether the verification result is consistent with the preset result; Step 3094, repeating steps 3091 to 3093, and replacing step 3091 with: using XML or SCD configuration tool to edit and generate an SCD file that only has duplex set matching errors, and opening the SCD file with TUT; Step 3095, repeating steps 3091 to 3093, and replacing step 3091 with: using XML or SCD configuration tool to edit and generate an SCD file that only contains circuit missing errors such as switch position, tripping, and start failure, and opening the SCD file with TUT; Step 3096, repeating steps 3091 to 3093, and replacing step 3091 with: using XML or SCD configuration tool to edit and generate an SCD file that only contains loop redundancy errors such as switch position and tripping, and opening the SCD file with TUT; Step 3097, repeat steps 3091 to 3093, and replace step 3091 with: use XML or SCD configuration tool to edit and generate an SCD file with misaligned sampling, switch position and other circuits, missing switch position, tripping, starting failure and other circuits, redundant switch position, tripping and other circuits, and other misconnections, and open the SCD file with TUT.

[0011] Furthermore, the step 310 specifically includes: Step 3101, using XML or SCD configuration tool to edit and generate an SCD file that only has inconsistent virtual terminal association types, where the internal terminal model is DO and the external terminal model is DA, and opening the SCD file with TUT; Step 3102, performing a virtual terminal verification operation; Step 3103, comparing and checking whether the verification result is consistent with the preset result; Step 3104, repeating steps 3101 to 3103, and replacing step 3101 with: using XML or SCD configuration tool to edit and generate an SCD file that only has a number of virtual terminal association type inconsistent connections with internal terminal models of DA and external terminal models of DO, and opening the SCD file with TUT; Step 3105, repeating steps 3101 to 3103, and replacing step 3101 with: using XML or SCD configuration tool to edit and generate an SCD file that only has several GOOSE virtual terminals connecting internal terminals and external terminals whose models are both DA but BType is inconsistent, and opening the SCD file with TUT; Step 3106, repeating steps 3101 to 3103, and replacing step 3101 with: using XML or SCD configuration tool to edit and generate an SCD file that only has a number of SV virtual terminals connecting internal terminals and external terminals whose models are both DO but have inconsistent CDC types, and opening the SCD file with TUT; Step 3107, repeat steps 3101 to 3103, and replace step 3101 with: use XML or SCD configuration tool to edit and generate an SCD file in which the internal terminal model is DO and the external terminal model is DA; the internal terminal model is DA and the external terminal model is DO; the GOOSE virtual terminal connects the internal terminal and the external terminal model are both DA but the BType is inconsistent; the SV virtual terminal connects the internal terminal and the external terminal model are both DO but the CDC type is inconsistent, and open the SCD file with TUT.

[0012] Furthermore, the step 311 specifically includes: Step 3111, use TUT to open a verification basis; Step 3112, performing a new operation on the verification basis opened in step 3111; Step 3113, check the TUT related log to see whether the newly added operation content in step 3112 is recorded; Step 3114, repeating steps 3111 to 3113, and replacing step 3112 with: deleting the verification basis opened in step 3111; Step 3115, repeat steps 3111 to 3113, and replace step 3112 with: modify the verification basis opened in step 3111.

[0013] It can be seen from the above description of the present invention that, compared with the prior art, the automatic testing method for the substation virtual terminal circuit verification tool of the present invention includes at least one of the following beneficial effects: 1. The present invention visualizes the results of the virtual terminal loop verification tool, and makes design corrections to the visualization of the original verification results in accordance with the habits of on-site personnel, proposes standardized virtual terminal loop test criteria under different voltage levels, different main connection forms, different interval types and different primary and secondary equipment configurations, and finally conducts a comprehensive test on TUT to ensure that the virtual loop automatic verification technology can efficiently and accurately find incorrect virtual terminal loops in the smart substation configuration file, solves the problems of missed detection and false detection in the virtual loop automatic verification technology, and avoids a series of problems such as high safety risk factor, lack of anti-error measures, imperfect functions and performance of the virtual loop automatic verification tool for the configuration file of the smart substation that is widely used on the market, and can meet the needs of larger-scale smart grid construction and development.

[0014] 2. The present invention can effectively improve the function of the automatic verification tool for the virtual loop of the configuration file of the smart substation, improve the accuracy, effectiveness and friendliness of the automatic verification tool for the virtual loop of the configuration file, avoid the uncontrollable hidden dangers left by the automatic verification tool for on-site operations due to its own logic and functional defects, reduce the power grid safety risk after the new equipment is put into operation, improve the inherent safety of the smart substation, and promote the quality and efficiency of the power grid. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 The present invention is a flowchart of the steps of an automatic testing method for a substation virtual terminal circuit verification tool in a preferred embodiment of the present invention. DETAILED DESCRIPTION

[0016] The technical scheme in the embodiment of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiment of the present invention. Obviously, the described embodiment is only a part of the embodiment of the present invention, not all of the embodiments. Based on the embodiment of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0017] Reference Figure 1 As shown, a preferred embodiment of the present invention is an automatic testing method for a substation virtual terminal circuit verification tool, comprising: Step 1: The calibration tool reads the configuration file, parses and identifies the information in the configuration file, and obtains the original calibration result; Step 2: Visualize the original calibration results and modify them according to usage habits; Step 3, matching the test basis of the tested verification tool TUT, testing the TUT, and obtaining the test results; the test basis covers standard virtual terminal loop connections under different voltage levels, different main wiring forms, different interval types, and different primary and secondary equipment configurations; Step 4: Visualize the test results and output the test report.

[0018] As a preferred embodiment of the present invention, it may also have the following additional technical features: In this embodiment, in step 1, the parsing and information identification of the configuration file specifically includes: Read the SCD file to identify the SCD electrical structure information, which includes the voltage level in the substation, the main wiring form at each voltage level, and the primary equipment model information at each voltage level; Read SSD files to identify SSD electrical structure information; Read and identify IED attribute information, including IED device type, voltage level, bay type, bay number, set, and IED sampling method attribute information; Read the model information of the IED device in the configuration file, identify the ICD version and virtual terminals used by the IED, and adapt the standard virtual terminals in the test basis.

[0019] In this embodiment, in step 2, the visual display of the original verification result includes: Overview of the calibration results; Check the error distribution by bay and IED, including marking the bays, IEDs and virtual terminal circuits with errors in sequence; Hierarchical display by bay, IED, and virtual terminal circuit; Detailed information of the error virtual terminal circuit, including output terminal and input terminal information. The output and input terminal information includes IEDName, IED description, terminal index, terminal name, and bay description information.

[0020] In this embodiment, in step 3, the testing of the TUT specifically includes: Step 301, testing whether the TUT has an automatic verification function for virtual terminal circuits under different voltage levels and different wiring modes; Specifically, it includes: using TUT to open an SCD file containing 500kV 3 / 2 wiring, 220kV double busbar or double busbar single segment wiring or double busbar double segment wiring, 110kV single busbar or single busbar segment wiring, and perform virtual terminal circuit verification; Step 302, testing whether the TUT has an automatic verification function for virtual terminal loops under differentiated design conditions in different regions; Specifically, it includes: using TUT to open a configuration file containing virtual terminals under the design conditions of region A, and performing a virtual terminal circuit verification operation; using TUT to open a configuration file containing virtual terminals under the design conditions of region B, and performing a virtual terminal circuit verification operation; Step 303, testing whether the TUT has an automatic verification function for virtual terminal loops that are adaptable to device models of different technical standards, different manufacturers or models; Specifically, it includes: using TUT to open a configuration file containing device models of different technical standards, different manufacturers, and different models, and perform virtual terminal circuit verification operations; Step 304, testing the TUT to have the function of automatically checking the virtual terminal loop when the IED Name and ICD version information of the IED are not standardized; Specifically, it includes: using TUT to open a configuration file containing IED Name and IED ICD version information that is not standardized, and performing a virtual terminal circuit verification operation; Step 305, testing the TUT to identify the electrical structure information of the SCD under test; Specifically include: using TUT to import the SCD file under test; using TUT to parse the SCD file; checking whether the parsing result contains the information described in the electrical structure information identification; using the XML file editing tool to open the SCD file; comparing whether the electrical structure information parsed by TUT is consistent with the relevant information in the SCD file opened by the XML file editing tool; Step 306, testing the TUT's ability to identify the IED attribute information in the SCD under test; Specifically include: using TUT to import the SCD file under test; using TUT to parse the SCD file; checking whether the parsing result contains the IED attribute information described in IED attribute identification; using an XML file editing tool to open the SCD file; comparing whether the IED attribute information parsed by TUT is consistent with the IED related attribute information in the SCD file opened by the XML file editing tool; Step 307, testing the TUT's ability to identify the IED virtual terminal information in the SCD under test; Specifically include: using TUT to import the SCD file under test; using TUT to parse the SCD file; checking whether the parsing result contains IED virtual terminal information; using XML file editing tools to open the SCD file; comparing the IED virtual terminal information parsed by TUT with the IED related virtual terminal information in the SCD file opened by the XML file editing tool to see if they are consistent; Step 308, testing the TUT verification function when the virtual terminal is misconnected in the same bay, the device is misconnected across bays, or the duplex protection device is misconnected; Step 309, testing the TUT verification function when the virtual terminal loop is wrongly connected; Step 310, testing the TUT verification function when there are syntax connection errors such as GOOSE and SV virtual terminal loop levels and types; Step 311, testing whether the TUT has the extended maintenance function of the verification basis; Step 312, test that the TUT has the function of viewing the error distribution by bay and IED, the function of identifying the error bay, IED and virtual terminal loop, the function of displaying the loop connection details on the error virtual terminal loop, and the function of outputting the virtual terminal loop verification result report; Specifically including: use TUT to open an SCD file with several virtual terminal circuit errors, perform virtual terminal verification operations, and view the error distribution by interval and IED; use TUT to open an SCD file with several virtual terminal circuit errors, perform virtual terminal verification operations, and view the error distribution by interval and IED; use TUT to open an SCD file with several virtual terminal circuit errors, perform virtual terminal verification operations, and view detailed information on the erroneous virtual terminal circuits; use TUT to open an SCD file with several virtual terminal circuit errors, perform virtual terminal verification operations, and perform verification report export operations.

[0021] In this embodiment, step 308 specifically includes: Step 3081, using XML or SCD configuration tool to edit and generate an SCD file that only has cross-interval virtual terminal loop matching errors, and using TUT to open the SCD file; Step 3082, performing a virtual terminal loop verification operation; Step 3083, comparing and checking whether the verification result is consistent with the preset result; Step 3084, repeating steps 3081 to 3083, and replacing step 3081 with: using XML or SCD configuration tool to edit and generate an SCD file that only has duplex set matching errors, and opening the SCD file with TUT; Step 3085, repeating steps 3081 to 3083, and replacing step 3081 with: using XML or SCD configuration tool to edit and generate an SCD file that only contains virtual terminal loop matching errors within the same interval, and opening the SCD file with TUT; Step 3086, repeat steps 3081 to 3083, and replace step 3081 with: use XML or SCD configuration tool to edit and generate an SCD file in which cross-interval virtual terminal loop matching errors, duplicated set matching errors, and virtual terminal matching errors coexist in the same interval, and open the SCD file with TUT.

[0022] In this embodiment, step 309 specifically includes: Step 3091, using XML or SCD configuration tool to edit and generate an SCD file that only has loop misalignment errors such as sampling and switch position, and using TUT to open the SCD file; Step 3092, performing a virtual terminal circuit verification operation; Step 3093, comparing and checking whether the verification result is consistent with the preset result; Step 3094, repeating steps 3091 to 3093, and replacing step 3091 with: using XML or SCD configuration tool to edit and generate an SCD file that only has duplex set matching errors, and opening the SCD file with TUT; Step 3095, repeating steps 3091 to 3093, and replacing step 3091 with: using XML or SCD configuration tool to edit and generate an SCD file that only contains circuit missing errors such as switch position, tripping, and start failure, and opening the SCD file with TUT; Step 3096, repeating steps 3091 to 3093, and replacing step 3091 with: using XML or SCD configuration tool to edit and generate an SCD file that only contains loop redundancy errors such as switch position and tripping, and opening the SCD file with TUT; Step 3097, repeat steps 3091 to 3093, and replace step 3091 with: use XML or SCD configuration tool to edit and generate an SCD file with misaligned sampling, switch position and other circuits, missing switch position, tripping, starting failure and other circuits, redundant switch position, tripping and other circuits, and other misconnections, and open the SCD file with TUT.

[0023] In this embodiment, step 310 specifically includes: Step 3101, using XML or SCD configuration tool to edit and generate an SCD file that only has inconsistent virtual terminal association types, where the internal terminal model is DO and the external terminal model is DA, and opening the SCD file with TUT; Step 3102, performing a virtual terminal verification operation; Step 3103, comparing and checking whether the verification result is consistent with the preset result; Step 3104, repeating steps 3101 to 3103, and replacing step 3101 with: using XML or SCD configuration tool to edit and generate an SCD file that only has a number of virtual terminal association type inconsistent connections with internal terminal models of DA and external terminal models of DO, and opening the SCD file with TUT; Step 3105, repeating steps 3101 to 3103, and replacing step 3101 with: using XML or SCD configuration tool to edit and generate an SCD file that only has several GOOSE virtual terminals connecting internal terminals and external terminals whose models are both DA but BType is inconsistent, and opening the SCD file with TUT; Step 3106, repeating steps 3101 to 3103, and replacing step 3101 with: using XML or SCD configuration tool to edit and generate an SCD file that only has a number of SV virtual terminals connecting internal terminals and external terminals whose models are both DO but have inconsistent CDC types, and opening the SCD file with TUT; Step 3107, repeat steps 3101 to 3103, and replace step 3101 with: use XML or SCD configuration tool to edit and generate an SCD file in which the internal terminal model is DO and the external terminal model is DA; the internal terminal model is DA and the external terminal model is DO; the GOOSE virtual terminal connects the internal terminal and the external terminal model are both DA but the BType is inconsistent; the SV virtual terminal connects the internal terminal and the external terminal model are both DO but the CDC type is inconsistent, and open the SCD file with TUT.

[0024] In this embodiment, the step 311 specifically includes: Step 3111, use TUT to open a verification basis; Step 3112, performing a new operation on the verification basis opened in step 3111; Step 3113, check the TUT related log to see whether the newly added operation content in step 3112 is recorded; Step 3114, repeating steps 3111 to 3113, and replacing step 3112 with: deleting the verification basis opened in step 3111; Step 3115, repeat steps 3111 to 3113, and replace step 3112 with: modify the verification basis opened in step 3111.

[0025] The above description is only a preferred specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any technician familiar with the technical field can make equivalent replacements or changes according to the technical scheme and improved concepts of the present invention within the technical scope disclosed by the present invention, and they should be covered by the protection scope of the present invention.

Claims

1. An automatic testing method for a substation virtual terminal circuit verification tool, characterized in that: include: Step 1: The calibration tool reads the configuration file, parses and identifies the information in the configuration file, and obtains the original calibration result; Step 2, visually display the original calibration results, and modify the visual display of the original calibration results according to usage habits; Step 3, matching the test basis of the tested verification tool TUT, testing the TUT, and obtaining the test results; the test basis covers standard virtual terminal loop connections under different voltage levels, different main wiring forms, different interval types, and different primary and secondary equipment configurations; Step 4: Visualize the test results and output the test report.

2. The automatic testing method for a substation virtual terminal circuit verification tool according to claim 1, characterized in that: In step 1, the configuration file is parsed and information is identified, specifically including: Read the SCD file to identify the SCD electrical structure information, which includes the voltage level in the substation, the main wiring form at each voltage level, and the primary equipment model information at each voltage level; Read SSD files to identify SSD electrical structure information; Read and identify IED attribute information, including IED device type, voltage level, bay type, bay number, set, and IED sampling method attribute information; Read the model information of the IED device in the configuration file, identify the ICD version and virtual terminals used by the IED, and adapt the standard virtual terminals in the test basis.

3. The automatic testing method for a substation virtual terminal circuit verification tool according to claim 1 is characterized in that: In step 2, the visual display of the original verification results includes: Overview of the calibration results; Check the error distribution by bay and IED, including marking the bays, IEDs and virtual terminal circuits with errors in sequence; Hierarchical display by bay, IED, and virtual terminal circuit; Detailed information of the error virtual terminal circuit, including output terminal and input terminal information. The output and input terminal information includes IEDName, IED description, terminal index, terminal name, and bay description information.

4. The automatic testing method for a substation virtual terminal circuit verification tool according to claim 1, characterized in that: In step 3, the testing of the TUT specifically includes: Step 301, testing whether the TUT has an automatic verification function for virtual terminal circuits under different voltage levels and different wiring modes; Specifically, it includes: using TUT to open an SCD file containing 500kV 3 / 2 wiring, 220kV double busbar or double busbar single segment wiring or double busbar double segment wiring, 110kV single busbar or single busbar segment wiring, and perform virtual terminal circuit verification; Step 302, testing whether the TUT has an automatic verification function for virtual terminal loops under differentiated design conditions in different regions; Specifically, it includes: using TUT to open a configuration file containing virtual terminals under the design conditions of region A, and performing a virtual terminal circuit verification operation; using TUT to open a configuration file containing virtual terminals under the design conditions of region B, and performing a virtual terminal circuit verification operation; Step 303, testing whether the TUT has an automatic verification function for virtual terminal loops that are adaptable to device models of different technical standards, different manufacturers or models; Specifically, it includes: using TUT to open a configuration file containing device models of different technical standards, different manufacturers, and different models, and perform virtual terminal circuit verification operations; Step 304, testing the TUT to have the function of automatically checking the virtual terminal loop when the IED Name and ICD version information of the IED are not standardized; Specifically, it includes: using TUT to open a configuration file containing IED Name and IED ICD version information that is not standardized, and performing a virtual terminal circuit verification operation; Step 305, testing the TUT to identify the electrical structure information of the SCD under test; Specifically include: using TUT to import the SCD file under test; using TUT to parse the SCD file; checking whether the parsing result contains the information described in the electrical structure information identification; using the XML file editing tool to open the SCD file; comparing whether the electrical structure information parsed by TUT is consistent with the relevant information in the SCD file opened by the XML file editing tool; Step 306, testing the TUT's ability to identify the IED attribute information in the SCD under test; Specifically include: using TUT to import the SCD file under test; using TUT to parse the SCD file; checking whether the parsing result contains the IED attribute information described in IED attribute identification; using an XML file editing tool to open the SCD file; comparing whether the IED attribute information parsed by TUT is consistent with the IED related attribute information in the SCD file opened by the XML file editing tool; Step 307, testing the TUT's ability to identify the IED virtual terminal information in the SCD under test; Specifically include: using TUT to import the SCD file under test; using TUT to parse the SCD file; checking whether the parsing result contains IED virtual terminal information; using XML file editing tools to open the SCD file; comparing the IED virtual terminal information parsed by TUT with the IED related virtual terminal information in the SCD file opened by the XML file editing tool to see if they are consistent; Step 308, testing the TUT verification function when the virtual terminal is misconnected in the same bay, the device is misconnected across bays, or the duplex protection device is misconnected; Step 309, testing the TUT verification function when the virtual terminal loop is wrongly connected; Step 310, testing the TUT verification function when there are syntax connection errors such as GOOSE and SV virtual terminal loop levels and types; Step 311, testing whether the TUT has the extended maintenance function of the verification basis; Step 312, test that the TUT has the function of viewing the error distribution by bay and IED, the function of identifying the error bay, IED and virtual terminal loop, the function of displaying the loop connection details on the error virtual terminal loop, and the function of outputting the virtual terminal loop verification result report; Specifically including: use TUT to open an SCD file with several virtual terminal circuit errors, perform virtual terminal verification operations, and view the error distribution by interval and IED; use TUT to open an SCD file with several virtual terminal circuit errors, perform virtual terminal verification operations, and view the error distribution by interval and IED; use TUT to open an SCD file with several virtual terminal circuit errors, perform virtual terminal verification operations, and view detailed information on the erroneous virtual terminal circuits; use TUT to open an SCD file with several virtual terminal circuit errors, perform virtual terminal verification operations, and perform verification report export operations.

5. The automatic testing method for a substation virtual terminal circuit verification tool according to claim 4 is characterized in that: The step 308 specifically includes: Step 3081, using XML or SCD configuration tool to edit and generate an SCD file that only has cross-interval virtual terminal loop matching errors, and using TUT to open the SCD file; Step 3082, performing a virtual terminal loop verification operation; Step 3083, comparing and checking whether the verification result is consistent with the preset result; Step 3084, repeating steps 3081 to 3083, and replacing step 3081 with: using XML or SCD configuration tool to edit and generate an SCD file that only has duplex set matching errors, and opening the SCD file with TUT; Step 3085, repeating steps 3081 to 3083, and replacing step 3081 with: using XML or SCD configuration tool to edit and generate an SCD file that only contains virtual terminal loop matching errors within the same interval, and opening the SCD file with TUT; Step 3086, repeat steps 3081 to 3083, and replace step 3081 with: use XML or SCD configuration tool to edit and generate an SCD file in which cross-interval virtual terminal loop matching errors, duplicated set matching errors, and virtual terminal matching errors coexist in the same interval, and open the SCD file with TUT.

6. The automatic testing method for a substation virtual terminal circuit verification tool according to claim 4, characterized in that: The step 309 specifically includes: Step 3091, using XML or SCD configuration tool to edit and generate an SCD file that only has loop misalignment errors such as sampling and switch position, and using TUT to open the SCD file; Step 3092, performing a virtual terminal circuit verification operation; Step 3093, comparing and checking whether the verification result is consistent with the preset result; Step 3094, repeating steps 3091 to 3093, and replacing step 3091 with: using XML or SCD configuration tool to edit and generate an SCD file that only has duplex set matching errors, and opening the SCD file with TUT; Step 3095, repeating steps 3091 to 3093, and replacing step 3091 with: using XML or SCD configuration tool to edit and generate an SCD file that only contains circuit missing errors such as switch position, tripping, and start failure, and opening the SCD file with TUT; Step 3096, repeating steps 3091 to 3093, and replacing step 3091 with: using XML or SCD configuration tool to edit and generate an SCD file that only contains loop redundancy errors such as switch position and tripping, and opening the SCD file with TUT; Step 3097, repeat steps 3091 to 3093, and replace step 3091 with: use XML or SCD configuration tool to edit and generate an SCD file with misaligned sampling, switch position and other circuits, missing switch position, tripping, starting failure and other circuits, redundant switch position, tripping and other circuits, and other misconnections, and open the SCD file with TUT.

7. The automatic testing method for a substation virtual terminal circuit verification tool according to claim 4, characterized in that: The step 310 specifically includes: Step 3101, using XML or SCD configuration tool to edit and generate an SCD file that only has inconsistent virtual terminal association types, where the internal terminal model is DO and the external terminal model is DA, and opening the SCD file with TUT; Step 3102, performing a virtual terminal verification operation; Step 3103, comparing and checking whether the verification result is consistent with the preset result; Step 3104, repeating steps 3101 to 3103, and replacing step 3101 with: using XML or SCD configuration tool to edit and generate an SCD file that only has a number of virtual terminal association type inconsistent connections with internal terminal models of DA and external terminal models of DO, and opening the SCD file with TUT; Step 3105, repeating steps 3101 to 3103, and replacing step 3101 with: using XML or SCD configuration tool to edit and generate an SCD file that only has several GOOSE virtual terminals connecting internal terminals and external terminals whose models are both DA but BType is inconsistent, and opening the SCD file with TUT; Step 3106, repeating steps 3101 to 3103, and replacing step 3101 with: using XML or SCD configuration tool to edit and generate an SCD file that only has a number of SV virtual terminals connecting internal terminals and external terminals whose models are both DO but have inconsistent CDC types, and opening the SCD file with TUT; Step 3107, repeat steps 3101 to 3103, and replace step 3101 with: use XML or SCD configuration tool to edit and generate an SCD file in which the internal terminal model is DO and the external terminal model is DA; the internal terminal model is DA and the external terminal model is DO; the GOOSE virtual terminal connects the internal terminal and the external terminal model are both DA but the BType is inconsistent; the SV virtual terminal connects the internal terminal and the external terminal model are both DO but the CDC type is inconsistent, and open the SCD file with TUT.

8. The automatic testing method for a substation virtual terminal circuit verification tool according to claim 4, characterized in that: The step 311 specifically includes: Step 3111, use TUT to open a verification basis; Step 3112, performing a new operation on the verification basis opened in step 3111; Step 3113, check the TUT related log to see whether the newly added operation content in step 3112 is recorded; Step 3114, repeating steps 3111 to 3113, and replacing step 3112 with: deleting the verification basis opened in step 3111; Step 3115, repeat steps 3111 to 3113, and replace step 3112 with: modify the verification basis opened in step 3111.

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