Packaging structure and forming method thereof
By using multi-layer substrate and dielectric layer structure in semiconductor packaging process, and using printing technology to form conductive parts in the through holes, the residual glue and air gap problems during solder bumps and hybrid leads are solved, and efficient conductive connection is achieved and cost reduction.
Patent Information
- Application Number
- CN202410317588.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-07-17
- Filing Date
- 2024-03-20
- Publication Date
- 2025-01-17
AI Technical Summary
In semiconductor packaging process, residual glue, air gap or material waste is easily generated when the solder bumps and hybrid leads are bonded, resulting in poor electrical conduction and increased costs.
By providing a multi-layer substrate and dielectric layer structure, conductive parts are formed in the through holes using a printing process, air gaps and copper seed layers in the deposition process, direct bonding of multiple grains, simplifying process steps and reducing costs.
The conductive connection without air gap is realized, which reduces material waste and process complexity, improves structural reliability and jointing, and reduces overall costs.
Smart Images
Figure CN119324183A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of packaging structures, and in particular to a method for forming a conductive component. Background Art
[0002] In the packaging process, through silicon vias (TSV) and wire bonding are widely used. In detail, silicon vias and wires require the application of many semiconductor process technologies (such as yellow light process, etching process, deposition process, planarization process, etc.) and back-end technologies (such as thinning process, bumping process, wire bonding process), etc. Among them, in the wire bonding process, when the die is bonded by solder bumps, residual glue is likely to affect electrical conduction. Alternatively, when the die is bonded by mixed wires, the difference between the center and the edge of the wafer is likely to occur, resulting in air gaps or dish-shaped depressions, and causing problems such as material waste and increased machine costs. Therefore, the industry still needs to improve the packaging structure and formation method to overcome the above-mentioned problems. Summary of the invention
[0003] An embodiment of the present application provides a method for forming a packaging structure. The method includes: providing a first substrate and a second substrate. The first substrate includes a first substrate and a first dielectric layer on the first substrate, and the second substrate includes a second substrate and a second dielectric layer on the second substrate. The second substrate has a first through hole, and the first dielectric layer and the second dielectric layer have a first hole and a second hole respectively. The method also includes: docking the second substrate to the first substrate in a manner that the second dielectric layer is connected to the first dielectric layer to form a first composite structure; thinning the top surface of the first composite structure to expose the first through hole; and forming a first conductive component in the first through hole.
[0004] The embodiment of the present application provides a packaging structure, comprising a first substrate, a second substrate, a third substrate, a conductive component and a conductive wire. The first substrate comprises a first substrate and a first dielectric layer thereon, the second substrate comprises a second substrate and a second dielectric layer thereon, and the third substrate comprises a third substrate and a third dielectric layer thereon. The conductive component is surrounded by and in direct contact with the first dielectric layer, the second dielectric layer, the second substrate, the third dielectric layer, and the third substrate, and the conductive component is exposed through the third substrate. The conductive wire is surrounded by the third dielectric layer. The conductive wire is spaced from the third substrate by the third dielectric layer. BRIEF DESCRIPTION OF THE DRAWINGS
[0005] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.
[0006] Figure 1 is a cross-sectional schematic diagram illustrating a stage of forming a packaging structure according to some embodiments of the present application;
[0007] Figure 2A is a schematic cross-sectional view illustrating a plurality of second dielectric layers in a packaging structure according to some embodiments of the present application;
[0008] Figure 2B is a top view of a second dielectric layer in a packaging structure according to some embodiments of the present application;
[0009] Figure 3-Figure 9 1 is a schematic cross-sectional view of forming a packaging structure at different stages according to some embodiments of the present application;
[0010] Figure 10-11 1 is a schematic cross-sectional view of forming a packaging structure at different stages according to other embodiments of the present application.
[0011] [Explanation of symbols]
[0012] 100:Substrate
[0013] 110: Base material
[0014] 120: Dielectric layer
[0015] 200:Substrate
[0016] 210,210': Base material
[0017] 220: Dielectric layer
[0018] 300:Substrate
[0019] 310,310': Base material
[0020] 320: Dielectric layer
[0021] 1000:Printing process
[0022] DV2: Width
[0023] DO1,DO2: Width
[0024] M: Conductive parts
[0025] M1: Conductive parts
[0026] M2: Conductive parts
[0027] L: Conductive thread
[0028] R: Depression
[0029] C1: First composite structure
[0030] C2: Second composite structure
[0031] O1: Hole
[0032] O2: Holes
[0033] O3: Holes
[0034] V2: Through hole
[0035] V3: Through hole DETAILED DESCRIPTION
[0036] Figure 1 , Figure 3-Figure 9 According to some embodiments of the present application, cross-sectional schematic diagrams of forming a packaging structure at different stages are illustrated. Figure 2A FIG. 4 is a schematic cross-sectional view of a plurality of dielectric layers O2 in a packaging structure according to some embodiments of the present application. Figure 2B FIG. 1 is a top view of a dielectric layer O2 in a packaging structure according to some embodiments of the present application.
[0037] Reference Figure 1 , Figure 2A and Figure 2B , a substrate 100 and a substrate 200 are provided. In one embodiment, the substrate 100 includes a base material 110 and a dielectric layer 120 formed thereon, and the substrate 200 includes a base material 210 and a dielectric layer 220 formed thereon.
[0038] In one embodiment, the substrate 110 and the substrate 210 may be a die, which may include various components (not shown), such as active components, passive components, interconnect structures, or combinations thereof. For example, active components include transistors and diodes. Passive components include capacitors, inductors, and resistors. The interconnect structure may include multilayer metal wires and vias formed in a dielectric structure. The multilayer metal wires and vias electrically connect various components to form a functional circuit.
[0039] In one embodiment, the substrate 210 may have a through hole V2. The through hole V2 may be formed, for example, by an etching process. The etching process may be an anisotropic etching process, which includes various dry etching processes, such as reactive ion etching, neutral particle beam etching, inductively coupled plasma etching, or a combination thereof. The through hole V2 may extend from a surface of the substrate 210 into the substrate 210. In one embodiment, in a cross section, the through hole V2 may have a maximum width (located at the top surface of the substrate 210) DV2.
[0040] In one embodiment, the dielectric layer 120 and the dielectric layer 220 may include an inorganic dielectric material and / or an organic dielectric material. The dielectric layer 120 and the dielectric layer 220 may be, for example, a polymer film including polyimide (PI), polybenzoxazole (PBO), benzocyclobutene (BCB), the like or a combination thereof. In one embodiment, the dielectric layer 120 and the dielectric layer 220 may be a single layer or multiple layers. For example, in Figure 1 In the embodiment of FIG. 1 , the dielectric layer 120 and the dielectric layer 220 are both illustrated as single layers. Figure 2A In the embodiment, the dielectric layer 220 has a plurality of layers stacked on each other, and all of the layers have a hole O2.
[0041] In one embodiment, the dielectric layer 120 and the dielectric layer 220 may have a hole O1 and a hole O2, respectively. For example, the hole O1 and the hole O2 may be formed, for example, by a mechanical perforation process. The hole O1 may extend from one surface of the dielectric layer 120 through the dielectric layer 120 to the other surface, and the hole O2 may extend from one surface of the dielectric layer 220 through the dielectric layer 220 to the other surface. The hole O1 and the hole O2 may be via holes. In one embodiment, in a cross section, the hole O1 may have a maximum width (located at the top surface of the dielectric layer 120) DO1, and the hole O2 may have a maximum width (located at the top surface of the dielectric layer 220) DO2. It should be noted that Figure 1 , Figure 3-Figure 9 The dielectric layer 220 is along Figure 2B A cross-sectional view taken along the section line AA'.
[0042] There are no special restrictions on the width DO1 of hole O1, the width DO2 of hole O2, and the width DV2 of through hole V2, and they can be adjusted according to actual needs. However, when the width DO2 is roughly equal to the width DO1, the conductive ink can be prevented from filling the corners when filling the conductive ink later, thereby avoiding increasing material costs.
[0043] In one embodiment, the dielectric layer 120 may be attached to the substrate 110 through an adhesive layer (not shown), and the dielectric layer 220 may be attached to the substrate 210. In one embodiment, the dielectric layer 220 may be attached to the substrate 210 by aligning the hole O2 of the dielectric layer 220 with the through hole V2 of the substrate 210. The adhesive layer may be an adhesive, which may include a material similar to the dielectric layer 120 or the dielectric layer 220, such as a polymer including polyimide, polyurethane, epoxy resin, etc.
[0044] Depend on Figure 1 It can be seen that the hole O1 exposes the substrate 110 , and the hole O2 exposes the substrate 210 .
[0045] Next refer to Figure 3-Figure 4 The substrate 200 is connected to the substrate 100 in such a way that the dielectric layer 220 is connected to the dielectric layer 120 to form the first composite structure C1. Specifically, the hole O2 of the dielectric layer 220 is aligned with the hole O1 of the dielectric layer 120 to form the first composite structure C1.
[0046] In one embodiment, the formation of the first composite structure C1 includes: coating an adhesive layer (not shown) on the dielectric layer 120; and attaching the dielectric layer 220 to the dielectric layer 120 via the adhesive layer. The material of the adhesive layer is similar to the above example and will not be described again.
[0047] Next refer to Figure 5 The top surface of the first composite structure C1 is thinned to expose the through hole V2 . Furthermore, a conductive component M1 is formed in the through hole V2 . In one embodiment, the conductive component M1 directly contacts the substrate 200 .
[0048] In one embodiment, thinning the top surface of the first composite structure C1 includes removing an excess portion of the first composite structure C1 through a planarization process (eg, chemical mechanical polishing) or an etching process to expose the through hole V2 .
[0049] In one embodiment, the conductive component M1 is formed by a printing process 1000. The printing process 1000 may include a screen printing process, a spray printing process, a three-dimensional printing process, etc. In one embodiment, the printing process 1000 includes filling the conductive ink into the through hole V2 and curing the conductive ink in the through hole V2. The conductive ink includes a metal ink, such as nano-silver ink, nano-copper-silver alloy ink, nano-gold ink, etc. Curing includes heating or irradiating the conductive ink. The heating process is, for example, a low-temperature sintering process at a temperature below 250°C (for example, 120°C to 220°C, 160°C to 200°C). The irradiation process is, for example, using laser light or ultraviolet light.
[0050] Compared to the comparative example of depositing conductive material first and then thinning it in the prior art, the conductive components are formed by thinning first and then by printing process in the embodiment of the present application, which can reduce the risk of incomplete deposition (for example, air gaps, etc.) in the prior art, and can also reduce the deposition of copper seed layer, etc. (which in turn leads to a decrease in the aspect ratio of the through hole), which can not only reduce the process complexity, but also improve the structural reliability.
[0051] Next refer to Figure 6 , providing a substrate 300. The substrate 300 includes a substrate 310 and a dielectric layer 320 thereon. The substrate 310 has a through hole V3, and the dielectric layer 320 has a hole O3. In one embodiment, the dielectric layer 320 also includes a recess R (which serves as a conductive line L after a printing process). In the case where the recess R is designed not to be connected to an external circuit, the conductive line L can be first formed in this step by a printing process 1000. The printing process 1000 is similar to the above and will not be described in detail here. The material of the remaining part of the substrate 300 (for example, it can be a grain) is similar to that of the substrate 200, that is, the material of the substrate 310 is similar to that of the substrate 210, the formation of the through hole V3 is similar to that of the through hole V2, the formation and material of the dielectric layer 320 are similar to those of the dielectric layer 220, and the formation of the hole O3 is similar to that of the hole O2, and will not be described in detail here.
[0052] Next refer to Figure 7-Figure 8 , the substrate 300 is docked to the first composite structure C1 to form the second composite structure C2. Specifically, the dielectric layer 320 of the substrate 300 is docked to the top surface of the first composite structure C1 where the through hole V2 is exposed. More specifically, the hole O3 and the recess R of the dielectric layer 320 are aligned with the through hole V2 of the first composite structure C1 to form the second composite structure C2.
[0053] In one embodiment, the formation of the second composite structure C1 includes: coating an adhesive layer (not shown) on the dielectric layer 320; and attaching the dielectric layer 320 to the first composite structure C1 through the adhesive layer. The material of the adhesive layer is similar to that described above and will not be described again.
[0054] Next refer to Fig. 9 The top surface of the second composite structure C2 is thinned to expose the through hole V3. Furthermore, a conductive component M2 is formed in the through hole V3. In one embodiment, the conductive component M2 directly contacts the substrate 300.
[0055] In one embodiment, thinning the top surface of the second composite structure C2 includes removing excess portions of the second composite structure C2 by a planarization process or an etching process to expose the through hole V3. In one embodiment, the conductive component M2 is formed by a printing process 1000, which is similar to the above and will not be described again.
[0056] Depend on Fig. 9It can be seen that the conductive component M1 and the conductive component M2 (or collectively referred to as the conductive component M) or the conductive component M1 and the conductive line L are connected, and since they are formed by filling the conductive ink and curing, no air gap is generated therein. Furthermore, the conductive component M1 and the conductive component M2 and the conductive line L can also be considered to be formed as one piece.
[0057] like Fig. 9 As shown, the conductive component M is surrounded by and in direct contact with the dielectric layer 120, the dielectric layer 220, the substrate 210', the dielectric layer 320, and the substrate 310'. The conductive component M is exposed through the substrate 310'. The conductive line L is surrounded by the dielectric layer 320. The conductive line L is separated from the substrate 310 by the dielectric layer 320. It should be noted that in the case of Fig. 9 In the structure shown, more substrates and / or dielectric layers can be formed through processes similar to the above according to actual needs.
[0058] In summary, the embodiments of the present application can directly bond multiple dies through multiple dielectric layers and multiple substrates, thereby eliminating the steps of forming bumps and leads, and avoiding uneven metal interfaces or different sizes of lead bumps, thereby avoiding the problem of air gaps or residual glue when bonding dies. In addition, the printing process can reduce the complicated deposition steps in the traditional process, reduce material waste, and reduce costs.
[0059] Figure 10-11 1 is a schematic cross-sectional view of forming a packaging structure at different stages according to other embodiments of the present application.
[0060] Fig.10 Undertake Figure 6 , and Figure 7 The difference is that the conductive component M1 is not formed in the through hole V2 aligned with the through hole V3. Figure 6 As shown, the conductive component M1 is formed in the through hole V2 which is not aligned with the conductive line L connected to the external circuit, while the conductive component M1 is not formed in the through hole V3 which is connected to the external circuit.
[0061] Next, refer to Fig.11 8, the substrate 300 is docked on the first composite structure C1 to form the second composite structure C2. Then, similar to the above, the top surface of the second composite structure C2 is thinned to expose the second through hole V3. And, the conductive component M1 and the conductive component M2 are simultaneously formed in the through hole V2 and the through hole V3 by the printing process 1000, and the result is similar to Fig. 9 shown.
[0062] In summary, the through hole connected to the external circuit can be printed after the die bonding is completed to form a conductive component therein, so as to further reduce the process steps and cost.
[0063] In summary, the embodiments of the present application can form the redistribution layer, the conductive wires in the grains and the through holes in the packaging structure through the printing process, thereby improving the bonding force and electrical properties. In one embodiment, through multiple layers of dielectric layers with holes, multi-level redistribution layers can be arbitrarily designed to increase the flexibility of the conductive line design. In one embodiment, by using a printing process to form a conductive component, the barrier layer (such as Ta / Ti, etc.) and the copper seed layer (Cu seed layer) added when the conductive component is formed by a deposition process in the traditional process can be avoided, thereby maintaining a larger depth-to-width ratio and reducing the generation of air gaps. In one embodiment, by stacking multiple substrates and multiple dielectric layers without using a bump process and a lead process, a redistribution layer between grains can be directly formed and multiple grains can be directly bonded to reduce the overall height and simplify the process steps and complexity. In one embodiment, the through holes in each substrate are opened through a thinning process, and the conductive component is finally formed by a printing process, which can reduce multiple complicated deposition processes.
[0064] Although the present application is shown above with the aforementioned embodiments, they are not used to limit the present application. Those with ordinary knowledge in the technical field to which the present application belongs can make some changes and modifications without departing from the spirit and scope of the present application. Therefore, the scope of protection of the present application shall be determined by the scope of the attached patent application.
Claims
1. A method for forming a packaging structure, characterized in that: include: A first substrate and a second substrate are provided, wherein the first substrate comprises a first base material and a first dielectric layer on the first base material, and the second substrate comprises a second base material and a second dielectric layer on the second base material, wherein the second base material has a first through hole, and the first dielectric layer and the second dielectric layer have a first hole and a second hole respectively; The second substrate is butted to the first substrate in such a manner that the second dielectric layer is in contact with the first dielectric layer to form a first composite structure; thinning a top surface of the first composite structure to expose the first through hole; as well as A first conductive component is formed in the first through hole.
2. The method for forming a packaging structure according to claim 1, characterized in that: The forming of the first conductive component includes using a printing process.
3. The method for forming a packaging structure according to claim 2, wherein: The printing process includes filling a conductive ink into the first through hole and curing the conductive ink in the first through hole.
4. The method for forming a packaging structure according to claim 1, wherein: Providing the second substrate includes forming the second dielectric layer on the second substrate, wherein the second hole of the second dielectric layer is aligned with the first through hole of the second substrate.
5. The method for forming a packaging structure according to claim 1, wherein: The first hole exposes the first substrate, and the second hole exposes the second substrate.
6. The method for forming a packaging structure according to claim 1, characterized in that: The first conductive component directly contacts the second substrate.
7. The method for forming a packaging structure according to claim 1, characterized in that: Bonding the second substrate to the first substrate includes aligning the second hole of the second dielectric layer with the first hole of the first dielectric layer.
8. The method for forming a packaging structure according to claim 7, characterized in that: Forming the first conductive component further includes forming the first conductive component in the first hole and the second hole.
9. The method for forming a packaging structure according to claim 1, wherein: After forming the first conductive member, neither wiring nor bumps are formed.
10. The method for forming a packaging structure according to claim 1, wherein: Also includes: Providing a third substrate, comprising a third base material and a third dielectric layer on the third base material, wherein the third base material has a second through hole, wherein the third dielectric layer has a third hole; Connecting the third substrate to the first composite structure to form a second composite structure; thinning the top surface of the second composite structure to expose the second through hole; as well as A second conductive component is formed in the second through hole.
11. The method for forming a packaging structure according to claim 10, characterized in that: The first conductive component and the second conductive component are formed integrally.
12. The method for forming a packaging structure according to claim 10, characterized in that: Bonding the third substrate to the first composite structure includes bonding the third dielectric layer of the third substrate to a top surface of the first composite structure where the second through hole is exposed.
13. The method for forming a packaging structure according to claim 10, characterized in that: After thinning the top surface of the second composite structure, the first conductive component is formed simultaneously with the second conductive component.
14. The method for forming a packaging structure according to claim 13, characterized in that: The forming of the first conductive component and the forming of the second conductive component simultaneously include filling a conductive ink into the first through hole and the second through hole, and solidifying the conductive ink in the first through hole and the second through hole.
15. The method for forming a packaging structure according to claim 13, wherein: Before simultaneously forming the first conductive component and the second conductive component, the method further includes forming a conductive line in the third dielectric layer.
16. The method for forming a packaging structure according to claim 15, characterized in that: Forming the conductive line includes filling a conductive ink into a recess of the third dielectric layer and curing the conductive ink in the recess.
17. The method for forming a packaging structure according to claim 15, characterized in that: The first conductive component, the second conductive component and the conductive line are formed integrally.
18. The method for forming a package structure according to claim 10, wherein: The first substrate, the second substrate, and the third substrate are all crystal grains.
19. The method for forming a package structure according to claim 1, wherein: Connecting the second substrate to the first substrate includes: coating an adhesive layer on the first dielectric layer; and The second dielectric layer of the second substrate is attached to the first dielectric layer of the first substrate through the adhesive layer.
20. A packaging structure, characterized in that: include: A first substrate, a second substrate and a third substrate, wherein the first substrate comprises a first base material and a first dielectric layer thereon, the second substrate comprises a second base material and a second dielectric layer thereon, and the third substrate comprises a third base material and a third dielectric layer thereon; a conductive component surrounded by and in direct contact with the first dielectric layer, the second dielectric layer, the second substrate, the third dielectric layer, and the third substrate, wherein the conductive component is exposed through the third substrate; as well as A conductive line is surrounded by the third dielectric layer, wherein the conductive line is separated from the third substrate by the third dielectric layer.