Current sampling circuit, bidirectional current sampling circuit, bilateral bidirectional current sampling circuit, three-phase brushless motor drive control circuit and three-phase brushless motor

Abstract

The embodiment of the invention provides a current sampling circuit, a bidirectional current sampling circuit, a bilateral bidirectional current sampling circuit, a three-phase brushless motor driving control circuit and a three-phase brushless motor. The current sampling circuit comprises a clamping circuit which comprises an operational amplifier and a feedback transistor, the negative input end of the operational amplifier is connected with an output node of a motor, the output end of the operational amplifier is connected with a grid electrode of the feedback transistor, and the positive input end of the operational amplifier is connected with a node of a circuit to be detected and a drain electrode of the feedback transistor; and the input of the current mirror is connected with the source electrode of the feedback transistor, and the current mirror outputs the copied current. By adopting the current sampling circuit with the operational amplifier and corresponding bidirectional and bilateral expansion, the problem that an accurate and economical current sampling mode is lacked in the prior art is solved, and the technical effects of low cost and simple and accurate phase current acquisition are achieved.

Description

Technical Field

[0001] The present invention relates to the field of motor drive technology, and in particular to a current sampling circuit, a bidirectional current sampling circuit, a bilateral bidirectional current sampling circuit, a three-phase brushless motor drive control circuit and a three-phase brushless motor. Background Art

[0002] In existing three-phase brushless motor drive control circuits, it is often necessary to obtain phase current, which is done by using external sampling resistors. However, using sampling resistors (separate components) will increase the layout cost and power loss of the printed circuit board (PCB). In addition, when the system is operating normally, the chip temperature rises, the on-resistance of the power tube changes greatly, and the current obtained by the sampling resistor will be distorted to a certain extent. Therefore, an accurate and economical current sampling method is needed. Summary of the invention

[0003] In view of the deficiencies in the prior art, the present invention provides a current sampling circuit, a bidirectional current sampling circuit, a bilateral bidirectional current sampling circuit, a three-phase brushless motor drive control circuit and a three-phase brushless motor, which solves the problem in the prior art of lacking an accurate and economical current sampling method.

[0004] In a first aspect, according to an embodiment of the present invention, there is provided a current sampling circuit, comprising: a clamping circuit, comprising an operational amplifier and a feedback transistor, wherein the negative input terminal of the operational amplifier is connected to the motor output node, the output terminal is connected to the gate of the feedback transistor, and the positive input terminal is connected to the circuit node to be measured and the drain of the feedback transistor; a current mirror, wherein the input of the current mirror is connected to the source of the feedback transistor and the copied current is output.

[0005] According to an embodiment of the present invention, the current mirror includes: a fourth PMOS field effect transistor, whose source is connected to the source of the feedback transistor, whose drain is grounded, and whose gate is connected to the first conduction voltage; a fifth NMOS field effect transistor, whose source is connected to the source of the feedback transistor, whose gate is connected to the gate of the feedback transistor, and whose drain is connected to the drain of the fifth PMOS field effect transistor; a fifth PMOS field effect transistor, whose gate is connected to its drain, and whose source is connected to the source of the sixth PMOS field effect transistor; a sixth PMOS field effect transistor, whose gate is connected to the gate of the fifth PMOS field effect transistor, and whose drain is connected to the source of the seventh PMOS field effect transistor; and a seventh PMOS field effect transistor, whose gate is connected to the second conduction voltage, and whose drain outputs the current copied by the current mirror.

[0006] In a second aspect, according to another embodiment of the present invention, a bidirectional current sampling circuit is provided, comprising: a first PMOS field effect transistor, a gate of which is connected to a third bias voltage, a gate of a second PMOS field effect transistor and a gate of a third PMOS field effect transistor, a source of which is connected to a power supply voltage, and a drain of which is connected to an output terminal of a motor; a second PMOS field effect transistor, a drain of which is connected to an output terminal of a motor, a source of which is connected to an output terminal of a motor, and a current sampling circuit described in the first aspect, wherein the source of the second PMOS field effect transistor is connected to a positive input terminal of an operational amplifier in the current sampling circuit, and a negative input terminal of the operational amplifier is connected to the power supply voltage; a third PMOS field effect transistor, a source of which is connected to an output terminal of a motor, and a drain of which is connected to the current sampling circuit described in the first aspect, wherein the drain of the third PMOS field effect transistor is connected to an output terminal of the motor, and a drain of the third PMOS field effect transistor is connected to an output terminal of the motor, and a drain of the third PMOS field effect transistor is connected to an output terminal of the motor, and a drain of the third PMOS field effect transistor is connected to an output terminal of the motor, and a drain of the third PMOS field effect transistor is connected to an output terminal of the motor, and a drain of the third PMOS field effect transistor is connected to an output terminal of the motor, and a drain of the third PMOS field effect transistor is connected to an output terminal of the motor

[0007] According to an embodiment of the present invention, the current flowing through the first PMOS field effect transistor is proportional to the current sampled at the node of the circuit to be tested.

[0008] In a third aspect, according to another embodiment of the present invention, a bilateral bidirectional current sampling circuit is provided, comprising a high-side bidirectional current sampling circuit and a low-side bidirectional current sampling circuit, wherein the high-side bidirectional current sampling circuit is a bidirectional current sampling circuit as described in the second aspect, and the low-side bidirectional current sampling circuit comprises: a first NMOS field effect transistor, whose gate is connected to a fourth bias voltage, a gate of a second NMOS field effect transistor and a gate of a third NMOS field effect transistor, whose source is grounded, and whose drain is connected to the motor output terminal; a second NMOS field effect transistor, whose drain is connected to the motor output terminal, and whose source is connected to the current sampling circuit described in the first aspect; a third NMOS field effect transistor, whose source is grounded, and whose drain is connected to the current sampling circuit described in the first aspect.

[0009] According to another embodiment of the present invention, the current mirror in the low-side bidirectional current sampling circuit includes: a ninth PMOS field effect transistor, whose source is connected to the source of the feedback transistor in the low-side bidirectional current sampling circuit, whose gate is connected to the gate of the feedback transistor, and whose drain outputs the copied current.

[0010] According to another embodiment of the present invention, the bilateral bidirectional current sampling circuit further includes: a voltage conversion circuit, used to convert the copied current into a voltage; a bias circuit, used to bias the converted voltage to the center voltage of the analog-to-digital converter; an analog-to-digital converter, used to sample and quantize the biased voltage to obtain a sampled quantized current; and a high-side and low-side current selection circuit, used to select one of the high-side bidirectional current sampling circuit and the low-side bidirectional current sampling circuit for output based on the phase voltage amplitude.

[0011] In a fourth aspect, according to another embodiment of the present invention, a three-phase brushless motor drive control circuit is provided, comprising a bilateral bidirectional current sampling circuit as described in the third aspect.

[0012] In a fifth aspect, according to another embodiment of the present invention, a three-phase brushless motor is provided, which is controlled by a three-phase brushless motor drive control circuit as described in the fourth aspect.

[0013] The technical principle of the present invention is: a current sampling circuit including a clamping circuit of an operational amplifier and a current mirror is adopted, and further expanded to bidirectional sampling and bilateral sampling based on this, and finally a bilateral selection circuit is set to perform circuit control.

[0014] Compared with the prior art, the present invention has the following beneficial effects: by adopting the above-mentioned current sampling circuit with an operational amplifier and the corresponding bidirectional and bilateral expansions, it solves the problem of the lack of an accurate and economical current sampling method in the prior art, and produces a technical effect of low-cost, simple and accurate acquisition of phase current. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 FIG. 4 is a circuit diagram of a current sampling circuit according to an embodiment of the present invention.

[0016] Figure 2 FIG. 4 is a circuit diagram of a bidirectional current sampling circuit according to another embodiment of the present invention.

[0017] Figure 3 A circuit diagram of a bilateral bidirectional current sampling circuit according to another embodiment of the present invention

[0018] Figure 4 FIG. 4 is a circuit diagram of a current mirror according to another embodiment of the present invention.

[0019] Figure 5 This is a block diagram of an overall framework of current sampling according to another embodiment of the present invention.

[0020] Figure 6 This is a curve diagram of a current sampling example according to yet another embodiment of the present invention. DETAILED DESCRIPTION

[0021] The technical solution of the present invention is further described below in conjunction with the accompanying drawings and embodiments.

[0022] As shown in the background technology, the prior art lacks an accurate and economical current sampling method. Figure 1As shown, an embodiment of the present invention proposes a current sampling circuit, including: a clamp circuit, including an operational amplifier and a feedback transistor, wherein the negative input terminal of the operational amplifier is connected to the motor output node, the output terminal is connected to the gate of the feedback transistor, and the positive input terminal is connected to the circuit node to be tested and the drain of the feedback transistor; a current mirror, whose input is connected to the source of the feedback transistor and outputs the copied current. Through the sampling circuit, current sampling can be completed, and the operational amplifier has the function of selectively turning on or off.

[0023] Reference again Figure 1 According to an embodiment of the present invention, the current mirror includes: a fourth PMOS field effect transistor P4, whose source is connected to the source of the feedback transistor N4, whose drain is grounded, and whose gate is connected to the first conduction voltage V1; a fifth NMOS field effect transistor N5, whose source is connected to the source of the feedback transistor N4, whose gate is connected to the gate of the feedback transistor N4, and whose drain is connected to the drain of the fifth PMOS field effect transistor P5; a fifth PMOS field effect transistor P5, whose gate is connected to its drain, and whose source is connected to the source of the sixth PMOS field effect transistor P6; a sixth PMOS field effect transistor P6, whose gate is connected to the gate of the fifth PMOS field effect transistor P5, and whose drain is connected to the source of the seventh PMOS field effect transistor P7; a seventh PMOS field effect transistor P7, whose gate is connected to the second conduction voltage V2, and whose drain outputs the current copied by the current mirror. Wherein, the first conduction voltage V1 and the second conduction voltage V2 are set to make P4 and P6 conduct.

[0024] According to another embodiment of the present invention, Figure 2 As shown, a bidirectional current sampling circuit is provided, comprising: a first PMOS field effect transistor P1 (201), whose gate is connected to a third bias voltage (not shown), a gate of a second PMOS field effect transistor P2 (202) and a gate of a third PMOS field effect transistor P3 (203), whose source is connected to a power supply voltage VM, and whose drain is connected to a motor output terminal OUT; a second PMOS field effect transistor P2 (202), whose drain is connected to the motor output terminal OUT, whose source is connected to the above-mentioned current sampling circuit (208), wherein its source is connected to the positive input terminal of an operational amplifier in the current sampling circuit (208), and whose negative input terminal is connected to the power supply voltage; a third PMOS field effect transistor P3 (203), whose source is connected to the motor output terminal OUT, whose drain is connected to the above-mentioned current sampling circuit (207), wherein its drain is connected to the positive input terminal of an operational amplifier in the current sampling circuit (208), and whose negative input terminal is connected to the motor output terminal.

[0025] In addition, in order to further reduce the loss of the circuit, according to an embodiment of the present invention, the current flowing through the first PMOS field effect transistor is proportional to the current sampled at the node of the circuit to be tested. Generally, the current is reduced by a multiple, so that the power loss of the subsequent circuit (whether it is a conversion circuit or a resistor) becomes smaller.

[0026] Reference again Figure 2 When the gate signals of P1, P2 and P3 are turned on, there are two types of currents flowing through the power tube, one is flowing from the motor (M) into the OUT terminal, and the other is flowing from the OUT terminal to the motor (M). When the current flows from the OUT terminal to the motor, the clamping circuit in the current sampling circuit (207) connected to the A terminal of the P3 sampling tube starts to work, so that the voltage at the A terminal is consistent with the OUT voltage. The gate and source of the P3 sampling tube are respectively connected to the gate and source of the P1 power tube, and the P3 sampling tube can proportionally copy the current flowing through the P1 power tube. Since the current flows from VM to OUT and then to the motor, the voltage of VM should be greater than the voltage at the OUT terminal. The voltage of VM is greater than the voltage at the OUT terminal, which makes the clamping circuit in the current sampling circuit (208) connected to the P2 sampling tube unable to work normally. Therefore, the P2 sampling tube does not sample current at this time.

[0027] Similarly, when the power tube is turned on, the current flows from the motor to the OUT terminal and then to VM. Since the gate and drain of P2 are connected to the gate and drain of the power tube, the clamp circuit in the current sampling circuit (208) connected to the B terminal of P2 works, so that the voltage of the B terminal of P2 is equal to the voltage of the VM terminal of P1, and P2 proportionally copies the current of P1. However, since the current flows from the motor to the OUT terminal and to VM, the voltage of the OUT terminal is greater than the voltage of the VM terminal, and the negative terminal voltage of the operational amplifier is greater than the positive terminal voltage, so that the output terminal VO1 of the operational amplifier is low, N4 and N5 will not be turned on, ISA=0, and the P1 sampling tube cannot obtain the current of the P3 power tube. At the same time, there is only one direction of the current. Therefore, the P3 sampling tube is used to sample the current flowing from the OUT terminal to the motor, and the current sampled by the P2 sampling tube is 0. In addition, the P2 sampling tube is used to sample the current flowing from the motor to the OUT terminal, and the current sampled by the P3 sampling tube is 0.

[0028] According to another embodiment of the present invention, Figure 3As shown, a bilateral bidirectional current sampling circuit is provided, including a high-side bidirectional current sampling circuit and a low-side bidirectional current sampling circuit, wherein the high-side bidirectional current sampling circuit is a bidirectional current sampling circuit as described above, and the low-side bidirectional current sampling circuit includes: a first NMOS field effect transistor N1 (204), whose gate is connected to a fourth bias voltage (not shown), a gate of a second NMOS field effect transistor N2 (205) and a gate of a third NMOS field effect transistor N3 (206), whose source is grounded, and whose drain is connected to the motor output terminal OUT; a second NMOS field effect transistor N2 (205), whose drain is connected to the motor output terminal, and whose source is connected to the current sampling circuit described above; a third NMOS field effect transistor N3 (206), whose source is grounded, and whose drain is connected to the current sampling circuit described above. It is generally known that when an analog-to-digital converter (AD) may exist in a circuit, the analog-to-digital converter has requirements for the sampled data signal. In detail, when the phase voltage duty cycle is small (i.e., low amplitude), the data sampled by AD may be distorted. However, when the phase voltage drive signal duty cycle is small, the duty cycle of the high-side gate signal (for the bidirectional sampling circuit between the power supply voltage and the motor output terminal) is small, but in the same carrier cycle, the duty cycle of the low-side gate signal (for the bidirectional sampling circuit between the motor output terminal and the ground node) is large, which can meet the AD accurate sampling of data. Therefore, if the phase voltage amplitude is small, the duty cycle of the high-side gate signal is small, and the AD quantization result when the low-side gate is turned on is more accurate. If the phase voltage amplitude is large, the duty cycle of the high-side gate signal is large, and the AD quantization result when the high-side gate is turned on is more accurate. Therefore, each carrier cycle will turn on the high-side power tube and the low-side power tube.

[0029] According to another embodiment of the present invention, Figure 4 As shown, the current mirror in the low-side bidirectional current sampling circuit includes: a ninth PMOS field effect transistor P2, whose source is connected to the source of the feedback transistor P1 in the low-side bidirectional current sampling circuit, whose gate is connected to the gate of the feedback transistor P1, and whose drain outputs the copied current ISC.

[0030] According to another embodiment of the present invention, Figure 5As shown, the bilateral bidirectional current sampling circuit also includes: a voltage conversion circuit 106 / 107, used to convert the copied current into a voltage; a bias circuit 108 / 109, used to bias the converted voltage to the center voltage of the analog-to-digital converter; an analog-to-digital converter 110 / 111, used to sample and quantize the biased voltage to obtain a sampled quantized current; a high-side and low-side current selection circuit 112, used to select one of the high-side bidirectional current sampling circuit and the low-side bidirectional current sampling circuit for output (complete phase current 113) based on the phase voltage amplitude. In general, the method for obtaining the complete phase current is to sample the high-side phase current (current sampling circuits 104 and 118) and the low-side phase current (current sampling circuits 105 and 119) respectively, and select the sampling results according to the phase voltage amplitude to obtain the complete and undistorted phase current, wherein the phase voltage amplitude comes from the phase voltage drive signal generation circuit (101). When sampling the high-side phase current and the low-side phase current, the clamping circuit is mainly used to copy the voltage at one end of the power tube (phase high-side power tube 102 and phase low-side power tube 103), so as to obtain the phase current in the corresponding direction on the corresponding sampling tube (phase high-side sampling tube 114, 115 and phase low-side sampling tube 116 and 117). At the same time, there is only one direction of current. The two sampling tubes on the same side will also have only one sampling current result. In addition, the current is converted into voltage and biased at the center voltage of AD quantization. The high and low side phase current sampling and quantization results output by AD are selected using the phase voltage amplitude to obtain a complete phase current signal. An example of the obtained phase current is shown below. Figure 6 As shown, the horizontal axis is the angle, the vertical axis in the upper figure is the phase voltage amplitude, and the vertical axis in the lower figure is the phase current amplitude. It can be seen that the sparse area corresponds to the high-side sampling phase current result, and the dense area corresponds to the low-side sampling phase current result.

[0031] According to another embodiment of the present invention, a three-phase brushless motor drive control circuit is provided, comprising a bilateral bidirectional current sampling circuit as described above.

[0032] According to another embodiment of the present invention, a three-phase brushless motor is provided, which is controlled by a three-phase brushless motor drive control circuit as described above.

[0033] In summary, the embodiment of the present invention adopts an integrated current sampling structure, which does not require an external sampling resistor, greatly reducing PCB cost and power loss. In addition, the embodiment of the present invention uses a sampling tube to obtain phase current and scales down the phase current, greatly reducing the power loss of current to voltage. In addition, the high and low side currents are effectively selected through the phase voltage drive signal to obtain the complete phase current, avoiding the acquisition of distorted phase current and ensuring the integrity and reliability of the signal.

[0034] Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the present invention rather than to limit it. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solution of the present invention can be modified or replaced by equivalents without departing from the purpose and scope of the technical solution of the present invention, which should be included in the scope of the claims of the present invention.

Claims

1. A current sampling circuit, characterized in that: include: A clamp circuit, comprising an operational amplifier and a feedback transistor, wherein the negative input terminal of the operational amplifier is connected to the motor output node, the output terminal is connected to the gate of the feedback transistor, and the positive input terminal is connected to the circuit node to be tested and the drain of the feedback transistor; The current mirror has an input connected to the source of the feedback transistor and outputs the copied current.

2. A current sampling circuit as claimed in claim 1, characterized in that: The current mirror comprises: a fourth PMOS field effect transistor, whose source is connected to the source of the feedback transistor, whose drain is grounded, and whose gate is connected to the first conduction voltage; a fifth NMOS field effect transistor, whose source is connected to the source of the feedback transistor, whose gate is connected to the gate of the feedback transistor, and whose drain is connected to the drain of the fifth PMOS field effect transistor; a fifth PMOS field effect transistor, whose gate is connected to its drain, and whose source is connected to the source of the sixth PMOS field effect transistor; a sixth PMOS field effect transistor, whose gate is connected to the gate of the fifth PMOS field effect transistor, and whose drain is connected to the source of the seventh PMOS field effect transistor; The seventh PMOS field effect transistor has a gate connected to the second turn-on voltage, and a drain outputting the current copied by the current mirror.

3. A bidirectional current sampling circuit, characterized in that: include: A first PMOS field effect transistor, whose gate is connected to the third bias voltage, the gate of the second PMOS field effect transistor and the gate of the third PMOS field effect transistor, whose source is connected to the power supply voltage, and whose drain is connected to the motor output terminal; a second PMOS field effect transistor, whose drain is connected to the motor output terminal, and whose source is connected to the current sampling circuit according to any one of claims 1 to 2, wherein the source is connected to the positive input terminal of an operational amplifier in the current sampling circuit, and the negative input terminal of the operational amplifier is connected to the power supply voltage; A third PMOS field effect transistor, whose source is connected to the motor output terminal, and whose drain is connected to the current sampling circuit described in any one of claims 1-2, wherein its drain is connected to the positive input terminal of the operational amplifier in the current sampling circuit, and the negative input terminal of the operational amplifier is connected to the motor output terminal.

4. A current sampling circuit as claimed in claim 3, characterized in that: The current flowing through the first PMOS field effect transistor is proportional to the current sampled at the node of the circuit to be tested.

5. A bilateral bidirectional current sampling circuit, characterized in that: The invention comprises a high-side bidirectional current sampling circuit and a low-side bidirectional current sampling circuit, wherein the high-side bidirectional current sampling circuit is a bidirectional current sampling circuit according to any one of claims 3 to 4, and the low-side bidirectional current sampling circuit comprises: A first NMOS field effect transistor, whose gate is connected to the fourth bias voltage, the gate of the second NMOS field effect transistor and the gate of the third NMOS field effect transistor, whose source is grounded, and whose drain is connected to the output terminal of the motor; A second NMOS field effect transistor, a drain of which is connected to the motor output terminal, and a source of which is connected to the current sampling circuit according to claim 1; The third NMOS field effect transistor has a source connected to the ground and a drain connected to the current sampling circuit according to claim 1.

6. A bilateral bidirectional current sampling circuit as claimed in claim 5, characterized in that: The current mirror in the low-side bidirectional current sampling circuit comprises: A ninth PMOS field effect transistor has a source connected to the source of the feedback transistor in the low-side bidirectional current sampling circuit, a gate connected to the gate of the feedback transistor, and a drain outputting the copied current.

7. The bilateral bidirectional current sampling circuit according to claim 5, characterized in that: Also includes: A voltage conversion circuit, used for converting the copied current into a voltage; A bias circuit, used for biasing the converted voltage to a center voltage of the analog-to-digital converter; An analog-to-digital converter, used for sampling and quantizing the biased voltage to obtain a sampled and quantized current; The high-side and low-side current selection circuit is used to select one of the high-side bidirectional current sampling circuit and the low-side bidirectional current sampling circuit for output based on the phase voltage amplitude.

8. A three-phase brushless motor drive control circuit, characterized in that: It comprises a bilateral bidirectional current sampling circuit as described in any one of claims 5-7.

9. A three-phase brushless motor, characterized in that: The three-phase brushless motor drive control circuit as claimed in claim 8 is used for control.

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