Voltage regulation module, electronic equipment and power supply optimization method

Abstract

The invention discloses a voltage regulation module, electronic equipment and a power supply optimization method. The voltage regulation module provided by the invention comprises an SoC chip, a first voltage regulation module and a second voltage regulation module, the SoC chip is provided with a control end and a voltage detection end, and the first voltage regulation module is provided with a control end and an output end; the control end of the SoC chip is coupled with the control end of the first voltage regulation module; the output end of the first voltage regulation module is coupled with the second voltage regulation module, and the second voltage regulation module is coupled with the voltage detection end of the SoC chip.

Description

Technical Field

[0001] The present application belongs to the field of electronic technology, and specifically relates to a voltage regulating module, an electronic device and a power supply optimization method. Background Art

[0002] At present, in order to save power consumption, it is very common to use AVS (Adaptive Voltage Scaling) voltage regulation system in electronic devices such as mobile phones and tablets to adjust the power supply voltage output by PMIC (Power Management Integrated Circuit) chip according to the load severity.

[0003] In the related art, the power supply voltage in the SoC (System On Chip) is set by the platform vendor and cannot be modified by the user. As a result, it is difficult to meet actual usage requirements in many cases. Summary of the invention

[0004] The present application provides a voltage regulation module, an electronic device and a power optimization method, which at least solve the problem that the power supply voltage in the SoC in the related art cannot be modified.

[0005] In a first aspect, the present application provides a voltage regulation module, including: a SoC chip, a first voltage regulation module, and a second voltage regulation module; The SoC chip has a control end and a voltage detection end, and the first voltage regulation module has a control end and an output end; the control end of the SoC chip is coupled to the control end of the first voltage regulation module; the output end of the first voltage regulation module is connected to the second voltage regulation module, and the second voltage regulation module is connected to the voltage detection end of the SoC chip.

[0006] In a second aspect, the present application provides an electronic device, comprising the voltage regulating module as described in the first aspect.

[0007] In a third aspect, the present application provides a power optimization method, which is applied to the voltage regulation module as described in the first aspect, comprising: The second voltage regulating module regulates the first voltage output by the first voltage regulating module to obtain a second voltage; The second voltage regulating module outputs the second voltage to the SoC chip; The SoC chip determines a voltage adjustment command based on the second voltage, and outputs the voltage adjustment command to the first voltage adjustment module.

[0008] In an embodiment of the present application, the voltage regulating module includes a SoC chip, a first voltage regulating module and a second voltage regulating module; the SoC chip has a control terminal and a voltage detection terminal, the first voltage regulating module has a control terminal and an output terminal; the control terminal of the SoC chip is coupled to the control terminal of the first voltage regulating module; the output terminal of the first voltage regulating module is connected to the second voltage regulating module, and the second voltage regulating module is connected to the voltage detection terminal of the SoC chip. In this way, in the scenario where the SoC chip regulates the power supply voltage output by the first voltage regulating module, after the SoC chip performs adaptive voltage regulation on the power supply voltage output by the first voltage regulating module in the related art, the power supply voltage in the SoC cannot be modified, while the second voltage regulating module of the present application can modify and set the power supply voltage output by the first voltage regulating module, and the SoC chip can further set the power supply voltage output by the first voltage regulating module based on the voltage value modified and set by the second voltage regulating module, thereby solving the problem that the power supply voltage in the SoC in the related art cannot be modified. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] The above and / or additional aspects and advantages of the present application will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which: Figure 1 A schematic diagram of an AVS voltage regulating system provided in the related art; Figure 2 A schematic diagram of a voltage regulating module provided in an embodiment of the present application; Figure 3 A schematic diagram of another voltage regulating module provided in an embodiment of the present application; Figure 4 A schematic diagram of another voltage regulating module provided in an embodiment of the present application; Figure 5 A schematic diagram of another voltage regulating module provided in an embodiment of the present application; Figure 6 A schematic diagram of another voltage regulating module provided in an embodiment of the present application; Figure 7 A schematic diagram of an electronic device provided in an embodiment of the present application; Figure 8 A schematic flow chart of a power optimization method provided in an embodiment of the present application; Fig. 9 A schematic flowchart of another power optimization method provided in an embodiment of the present application.

[0010] Description of reference numerals: 10-electronic device; 100-voltage regulating module; 110-SoC chip; 111-communication interface; 112-AVS sensor; 113-AVS controller; 114-central processing unit; 115-memory; 116-arbitrator; 120-first voltage regulating module; 121-first controller; 122-first voltage regulating element; 130-second voltage regulating module; 131-second controller; 132-second voltage regulating element; 200-PMIC chip; A-control end of SoC chip; B-voltage detection end of SoC chip; C-control end of first voltage regulating module; D-output end of first voltage regulating module; E-voltage output end of PMIC chip. DETAILED DESCRIPTION

[0011] The embodiments of the present application will be described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present application, and should not be construed as limitations on the present application. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without making creative work are within the scope of protection of the present application.

[0012] The term "first" or "second" in the specification and claims of this application may include one or more of the features explicitly or implicitly. In the description of this application, unless otherwise specified, "plurality" means two or more. In addition, "and / or" in the specification and claims means at least one of the connected objects, and the character " / " generally means that the objects connected before and after are in an "or" relationship.

[0013] In the description of the present application, it should be understood that the terms "inside", "outside", etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.

[0014] In the description of this application, it should be noted that, unless otherwise clearly specified and limited, the terms "connected" and "connection" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0015] Currently, the power supply voltage in SoC (System On Chip) is set by the platform vendor and cannot be modified by the user. As a result, it is difficult to meet actual usage requirements in many cases.

[0016] For example, refer to Figure 1 In the related art, the AVS voltage regulation system in the electronic device may include a SoC chip and a PMIC chip. The SoC chip includes a central processing unit, a memory, an arbitrator, an AVS sensor and an AVS controller. The PMIC chip includes a voltage regulation module. The voltage regulation scheme based on the AVS voltage regulation system includes: the central processing unit reads the initial voltage value pre-stored in the memory and gives the initial voltage value to the arbitrator; the arbitrator can send a voltage regulation command to the PMIC chip through the SPMI (Serial Peripheral Management Interface) bus, and the voltage regulation command includes a power supply power-on instruction and an initial voltage value; the voltage regulation module in the PMIC chip outputs the power supply voltage VDD to the AVS sensor of the SoC chip according to the voltage regulation command; the AVS sensor detects the current power supply voltage VDD, as well as sensor data such as the load and temperature in the current SoC chip and outputs them to the AVS controller; the AVS controller comprehensively determines a more appropriate voltage value based on the value of the current power supply voltage VDD and the sensor data such as the load and temperature in the current SoC chip, and then outputs it to the arbitrator to update the voltage value; the arbitrator sends a voltage regulation command to the PMIC chip again through the SPMI bus, and the voltage regulation command includes updated voltage value information; the voltage regulation module in the PMIC chip adjusts the power supply voltage VDD currently output by the PMIC chip according to the updated voltage value information, and then can adjust the voltage multiple times until the power supply voltage VDD output by the PMIC chip reaches the expected voltage value.

[0017] Among them, the traditional AVS voltage regulation scheme in the related technology can refer to the following Table 1:

[0018] Table 1 Referring to Table 1, for example, in the related art, when the power supply voltage VDD currently output by the PMIC chip is 900mV, if the power supply voltage expected to be output by the SoC chip is 800mV, the AVS sensor determines that the power supply voltage VDD output by the PMIC chip has excess performance, then the voltage difference to be adjusted is 100mV, and the single voltage adjustment amplitude of the AVS controller is 25mV, and it needs to step down the voltage 4 times before adjusting to the expected voltage value of 800mV.

[0019] For another example, when the power supply voltage VDD currently output by the PMIC chip is 850mV, if the power supply voltage expected to be output by the SoC chip is 800mV, and the AVS sensor determines that the power supply voltage VDD output by the PMIC chip has excess performance, then the voltage difference that needs to be adjusted is 50mV, and the single voltage adjustment amplitude of the AVS controller is 15mV. It needs to reduce the voltage three times to reach the expected voltage value (adjusted to 805mV, which is about 800mV).

[0020] For another example, when the power supply voltage VDD currently output by the PMIC chip is 800mV, if the power supply voltage expected to be output by the SoC chip is 800mV, and the AVS sensor determines that the performance of the power supply voltage VDD output by the PMIC chip is normal, the arbitrator can maintain or slightly adjust the power supply voltage output by the PMIC.

[0021] For another example, when the power supply voltage VDD currently output by the PMIC chip is 770mV, if the power supply voltage expected to be output by the SoC chip is 800mV, the AVS sensor determines that the power supply voltage VDD output by the PMIC chip has insufficient performance, then the voltage difference that needs to be adjusted is -30mV, and the single voltage adjustment amplitude of the AVS controller is 15mV, and the voltage needs to be boosted twice to reach the expected voltage value of 800mV.

[0022] For another example, when the power supply voltage VDD currently output by the PMIC chip is 700mV, if the power supply voltage expected to be output by the SoC chip is 800mV, the AVS sensor determines that the power supply voltage VDD output by the PMIC chip has insufficient performance, then the voltage difference that needs to be adjusted is -100mV, and the single voltage adjustment amplitude of the AVS controller is 25mV, and it needs to boost the voltage 4 times to reach the expected voltage value of 800mV.

[0023] In the example of Table 1 above, in order to ensure that the entire system circuit can work normally under poor processes and environments, the AVS voltage regulation system will reserve a certain power supply voltage margin, and the power supply voltage VDD needs to be boosted to make the power supply voltage VDD greater than the lower operating voltage. In this way, the actual required voltage is greater than the actual supply voltage, resulting in unnecessary power consumption. At the same time, it may also cause additional heating problems for the load equipment. For example, in a certain scenario, the power supply voltage of the target module can operate normally at 770mV, but the AVS voltage regulation scheme in the related technology will still set the target voltage at 800mV, resulting in unnecessary power consumption. For example, the current power supply voltage is 800mV, and the traditional voltage regulation scheme in the related technology does not regulate the voltage and maintains the output at 800mV, resulting in unnecessary power consumption.

[0024] Based on this, the embodiment of the present application provides a voltage regulation module, in which a second voltage regulation module is set between the voltage regulation modules in the SoC chip and the PMIC chip. Furthermore, in the related art, after the SoC chip completes the adjustment of the power supply voltage output by the first voltage regulation module, since the second voltage regulation module of the present application can modify and set the power supply voltage output by the first voltage regulation module, the SoC chip can further set the power supply voltage output by the first voltage regulation module based on the spoofed voltage value after the modification and setting by the second voltage regulation module, so that the voltage in the SoC can be adjusted by the second voltage regulation module, thereby solving the problem that the power supply voltage in the SoC in the related art cannot be modified. For example, in the voltage regulation scheme implemented by the present application, the second voltage regulation module modifies the current power supply voltage 800mV to 830mV output, and the SoC chip regards the spoofed voltage 830mV as the power supply voltage value output by the current PMIC chip for voltage regulation, and continues to reduce the voltage once, and the voltage is reduced by 30mV each time. After the voltage is adjusted once, the power supply voltage value 800mV actually output by the current PMIC chip is reduced to the expected 770mV. In this way, it can not only meet the normal operation of the system, but also achieve the purpose of reducing power consumption.

[0025] In addition, in the example of Table 1 above, the current AVS voltage regulation system's step-by-step slow voltage regulation scheme is difficult to take into account the impact of some fast anomalies, such as transient interference, etc., and it is difficult to meet the demand for accelerating the voltage regulation process. For example, when the power supply voltage VDD currently output by the PMIC chip is 700mV, the power supply voltage expected to be output by the SoC chip in the prior art is 800mV, and the single voltage regulation amplitude of the AVS controller is 25mV, and it needs to be boosted 4 times to reach the expected voltage value of 800mV.

[0026] Based on this, the embodiment of the present application provides a voltage regulation module, in which a second voltage regulation module is set between the voltage regulation module in the SoC chip and the PMIC chip, and then, the SoC chip can adjust the power supply voltage VDD_IN output by the voltage regulation module in the PMIC chip based on the spoof voltage VDD_OUT adjusted by the second voltage regulation module, which can achieve the effect of accelerating the voltage regulation process. For example, in the present application, the power supply voltage expected to be output by the second voltage regulation module is 770mV, and it is determined that the power supply voltage VDD is lower than expected. The second voltage regulation module modifies the current power supply voltage 700mV to 650mV output. The AVS sensor determines that the current power supply voltage output by the PMIC chip (i.e., the spoof voltage 650mV) is much lower than expected, and the boost needs to be accelerated. The AVS controller sets the single voltage regulation amplitude to 35mV, and boosts the current output power supply voltage VDD (700mV) twice to 770mV. Compared with the related art that requires boosting 4 times, the voltage regulation process can be accelerated to achieve the effect of accelerating the voltage regulation.

[0027] The voltage regulating module, electronic device and power supply optimization method provided in the embodiments of the present application are described in detail below with reference to the accompanying drawings.

[0028] like Figure 2 As shown, the embodiment of the present application provides a voltage regulating module 100, which may include: a SoC chip 110, a first voltage regulating module 120 and a second voltage regulating module 130; The SoC chip 110 has a control terminal A and a voltage detection terminal B, and the first voltage regulation module 120 has a control terminal C and an output terminal D; the control terminal A of the SoC chip 110 is coupled to the control terminal C of the first voltage regulation module 120; the output terminal D of the first voltage regulation module 120 is coupled to the second voltage regulation module 130, and the second voltage regulation module 130 is coupled to the voltage detection terminal B of the SoC chip 110.

[0029] In the embodiment of the present application, the SoC chip 110 is a chip that integrates multiple functional modules, which may include but are not limited to: a central processing unit (CPU), a graphics processing unit (GPU), a memory controller (DDR controller), a multimedia module (Multi-media), a display processing unit (DPU), a video processing unit (VPU), a communication module (Modem), etc., aiming to integrate as many functional modules as possible on one chip to achieve high integration and reduce layout area.

[0030] In the embodiment of the present application, the output voltage of the first voltage regulating module 120 may be a power supply voltage VDD_IN, and the power supply voltage VDD_IN may provide an operating voltage for multiple functional modules on the SoC chip 110 .

[0031] In an embodiment of the present application, the SoC chip 110 has an adaptive voltage regulation (AVS) function. The SoC chip 110 can detect the power supply voltage VDD_IN output by the first voltage regulation module 120 and adjust it to an expected voltage value, wherein the expected voltage value can be a predetermined target voltage, and the target voltage is the minimum voltage threshold that meets the target condition.

[0032] In the embodiment of the present application, the voltage detection terminal of the SoC chip 110 does not detect the power supply voltage value (e.g., VDD_IN) actually output by the first voltage regulating module, but detects the power supply voltage value actually outputted and modified by the second voltage regulating module to obtain a spoofed voltage (e.g., VDD_OUT). In the case where the SoC chip 110 regards the spoofed voltage (e.g., VDD_OUT) as the power supply voltage value currently output by the first voltage regulating module, the SoC chip can further set the power supply voltage output by the first voltage regulating module based on the spoofed voltage information, thereby solving the problem in the related art that the power supply voltage in the SoC cannot be modified.

[0033] For example, in an embodiment of the present application, a second voltage regulation module 130 is arranged between the voltage detection end of the SoC chip 110 and the output end of the first voltage regulation module 120. Furthermore, in a scenario where the SoC chip regulates the power supply voltage output by the first voltage regulation module, in the related art, after the SoC chip completes adaptive voltage regulation of the power supply voltage output by the first voltage regulation module, the power supply voltage in the SoC cannot be modified. The second voltage regulation module of the present application can modify and set the power supply voltage output by the first voltage regulation module to obtain a spoofed voltage value. The SoC chip can further set the power supply voltage output by the first voltage regulation module based on the spoofed voltage value modified and set by the second voltage regulation module. In this way, the voltage in the SoC is adjusted by the second voltage regulation module, thereby solving the problem of excessive power consumption caused by the inability to modify the power supply voltage in the SoC in the related art.

[0034] According to the voltage regulating module provided in the embodiment of the present application, the voltage regulating module includes a SoC chip, a first voltage regulating module and a second voltage regulating module; the SoC chip has a control end and a voltage detection end, and the first voltage regulating module has a control end and an output end; the control end of the SoC chip is coupled to the control end of the first voltage regulating module; the output end of the first voltage regulating module is connected to the second voltage regulating module, and the second voltage regulating module is connected to the voltage detection end of the SoC chip. In this way, in the scenario where the SoC chip regulates the power supply voltage output by the first voltage regulating module, after the SoC chip performs adaptive voltage regulation on the power supply voltage output by the first voltage regulating module in the related art, the power supply voltage in the SoC cannot be modified, while the second voltage regulating module of the present application can modify and set the power supply voltage output by the first voltage regulating module, and the SoC chip can further set the power supply voltage output by the first voltage regulating module based on the voltage value modified and set by the second voltage regulating module, thereby solving the problem that the power supply voltage in the SoC in the related art cannot be modified.

[0035] In addition, in an embodiment of the present application, a second voltage regulation module 130 is arranged between the SoC chip 110 and the first voltage regulation module 120, and thus, the SoC chip 110 can adjust the output voltage VDD_IN of the first voltage regulation module 120 based on the output voltage VDD_OUT adjusted by the second voltage regulation module 130. In other words, the second voltage regulation module 130 can assist the SoC chip 110 in adjusting the output voltage VDD_IN of the first voltage regulation module 120.

[0036] Furthermore, in the embodiment of the present application, since the second voltage regulation module 130 can assist the SoC chip 110 in regulating the output voltage of the first voltage regulation module 120, the adaptive voltage regulation process of the output voltage VDD_IN of the first voltage regulation module 120 by the SoC chip 110 can be accelerated, thereby achieving the effect of speeding up the voltage regulation process.

[0037] In practical applications, when the loads of multiple functional modules in the SoC chip 110 change, the SoC chip 110 can adaptively adjust the power supply voltage output by the first voltage regulation module 120. The adaptive voltage regulation can be a step-by-step voltage regulation. For example, the greater the voltage difference between the current output power supply voltage and the expected voltage value, the greater the single voltage regulation amplitude of the SoC chip on the previous output power supply voltage. The first voltage regulation module can be set in the PMIC chip, and the power supply voltage output by the PMIC chip provides the working voltage for the multiple functional modules of the SoC chip.

[0038] For example, in a specific embodiment, Figure 3 As shown, the first voltage regulating module 120 may be disposed in the PMIC chip 200; The PMIC chip 200 has a control end and a voltage output end E. The control end A of the SoC chip 110 is connected to the control end of the PMIC chip 200. The control end of the PMIC chip 200 is coupled to the control end C of the first voltage regulation module 120. The output end D of the first voltage regulation module 120 is coupled to the voltage output end E of the PMIC chip 200.

[0039] Among them, the PMIC chip 200 has a power management function and is a highly integrated circuit chip that can effectively manage and regulate the power supply in electronic equipment.

[0040] Among them, the first voltage regulation module 120 is set in the PMIC chip 200, the control end A of the SoC chip 110 can be connected to the control end of the PMIC chip 200 through the SPMI bus, and the control end of the PMIC chip 200 is connected to the control end C of the first voltage regulation module 120; the output end D of the first voltage regulation module 120 is connected to the voltage output end E of the PMIC chip 200.

[0041] Among them, the SoC chip 110 can send a voltage adjustment instruction to the PMIC chip 200 through the SPMI bus, and the voltage adjustment instruction may include an updated voltage value, which can be based on the second voltage VDD_OUT output by the second voltage adjustment module and the updated voltage value determined by the current load in the SoC chip. The first voltage adjustment module 120 can adjust the output voltage VDD_IN according to the voltage adjustment instruction.

[0042] The output terminal D of the first voltage regulating module 120 is connected to the voltage output terminal E of the PMIC chip 200 , and thus, the voltage output terminal E of the PMIC chip 200 can output the voltage VDD_IN to the voltage detection terminal B of the SoC chip 110 .

[0043] In addition, the voltage output terminal E of the PMIC chip 200 can also output the voltage VDD_IN to each functional module in the SoC chip 110 to provide operating voltage for each functional module in the SoC chip 110 .

[0044] It should be pointed out that in the related art, the PMIC chip generally directly outputs a voltage VDD to the SoC chip 110 for voltage detection. In the embodiment of the present application, the PMIC chip 200 outputs a first voltage VDD_IN to the second voltage regulation module, which then steps up or steps down the voltage to obtain a suitable second voltage VDD_OUT, and then transmits it to the voltage detection end of the SoC chip 110. After the voltage detection end of the SoC chip 110 receives VDD_OUT, it will update the voltage value according to the information of VDD_OUT and the current load condition in the SoC chip, and adjust the output voltage VDD_IN of the PMIC chip 200 according to the updated voltage value. In this way, the expected PMIC voltage can be output as expected, the voltage regulation process can be accelerated, and power consumption can be saved, and system stability can be verified.

[0045] In this way, the PMIC chip can output the power supply voltage VDD_IN to provide working voltage to multiple functional modules of the SoC chip, and the second voltage regulation module can assist the SoC chip in regulating the output voltage VDD_IN of the PMIC chip, thereby achieving the effect of speeding up the voltage regulation process.

[0046] In practical applications, the specific location of the second voltage regulating module 130 can be determined according to actual needs. For example, the second voltage regulating module 130 can be set between the PMIC chip 200 and the SoC chip 110. In this case, the second voltage regulating module 130 can be an independent voltage regulating IC chip, which can be customized according to actual needs. For another example, the second voltage regulating module 130 can be set in the PMIC chip 200. In this case, the circuit in the existing PMIC chip 200 can be reused, which is highly feasible and saves area. The following example is given.

[0047] In a specific embodiment, Figure 3As shown, the second voltage regulating module 130 can be arranged between the PMIC chip 200 and the SoC chip 110 , and the output terminal D of the first voltage regulating module 120 is connected to the input terminal of the second voltage regulating module 130 via the voltage output terminal E of the PMIC chip 200 .

[0048] The second voltage regulating module 130 may be specifically disposed on a power supply path between the PMIC chip 200 and the SoC chip 110 .

[0049] Among them, the output terminal D of the first voltage regulating module 120 is connected to the input terminal of the second voltage regulating module 130 via the voltage output terminal E of the PMIC chip 200. Then, the voltage output terminal E of the PMIC chip 200 can output the first voltage VDD_IN to the second voltage regulating module 130, and then the second voltage regulating module will step up or step down the voltage to obtain a suitable second voltage VDD_OUT, and then transmit it to the voltage detection terminal B of the SoC chip 110. After the voltage detection terminal B of the SoC chip 110 receives VDD_OUT, it will update the voltage value according to the information of VDD_OUT and the current load condition in the SoC chip, and adjust the output voltage VDD_IN of the PMIC chip 200 according to the updated voltage value.

[0050] In addition, the voltage output terminal E of the PMIC chip 200 can also output the first voltage VDD_IN to multiple functional modules of the SoC chip 110 to enable the multiple functional modules to operate normally.

[0051] In the embodiment of the present application, the second voltage regulating module 130 may be an independent voltage regulating IC, which may be customized according to actual needs.

[0052] In this way, an independent voltage regulating IC is set as the second voltage regulating module 130 on the power path between the PMIC chip 200 and the SoC chip 110. The voltage regulating IC assists the SoC chip in regulating the output voltage VDD_IN of the PMIC chip, thereby accelerating the voltage regulation process. At the same time, the second voltage regulating module 130 is an independent voltage regulating IC, which can be customized according to actual needs.

[0053] In another specific embodiment, Figure 4 As shown, the second voltage regulating module 130 is disposed in the PMIC chip 200 , and the output terminal D of the first voltage regulating module 120 is connected to the voltage output terminal E of the PMIC chip 200 and the input terminal of the second voltage regulating module 130 respectively.

[0054] Among them, the output terminal D of the first voltage regulating module 120 is connected to the voltage output terminal E of the PMIC chip 200 and the input terminal of the second voltage regulating module 130 respectively, and then the voltage output terminal E of the PMIC chip 200 can output the first voltage VDD_IN to multiple functional modules of the SoC chip 110, so that the multiple functional modules can work normally. At the same time, the output terminal D of the first voltage regulating module 120 can output the first voltage VDD_IN to the second voltage regulating module 130, and then the second voltage regulating module will increase or decrease the voltage to obtain a suitable second voltage VDD_OUT, and then transmit it to the voltage detection terminal B of the SoC chip 110. After receiving VDD_OUT, the voltage detection terminal B of the SoC chip 110 will update the voltage value according to the information of VDD_OUT and the current load condition in the SoC chip, and adjust the output voltage VDD_IN of the PMIC chip 200 according to the updated voltage value.

[0055] In the embodiment of the present application, the second voltage regulating module 130 can be specifically arranged inside the SoC chip. The second voltage regulating module 130 can reuse the circuit inside the existing PMIC chip 200, which is highly feasible and saves area.

[0056] In this way, the second voltage regulation module 130 can be specifically set inside the SoC chip. The second voltage regulation module 130 assists the SoC chip 110 in regulating the output voltage VDD_IN of the PMIC chip 200, thereby accelerating the voltage regulation process. At the same time, the second voltage regulation module is integrated into the PMIC chip to save external PCB layout area and reduce the risk of power supply interference.

[0057] It should be pointed out that the SoC chip 110, the first voltage regulating module 120, and the second voltage regulating module 130 all have a voltage regulating function. The internal structure of the SoC chip 110, the first voltage regulating module 120, and the second voltage regulating module 130 and the working principle of the voltage regulating module 100 are illustrated below.

[0058] In a specific embodiment, reference Figure 5 or Figure 6 , the second voltage regulating module 130 may include a second controller 131 and a second voltage regulating element 132; the second controller 131 is connected to the second voltage regulating element 132; The second controller 131 has a first input terminal, a second input terminal and an output terminal, and the second voltage regulating element 132 has a control terminal, an input terminal and an output terminal. The first input terminal of the second controller 131 is coupled to the output terminal D of the first voltage regulating module 120, the second input terminal of the second controller 131 is connected to the communication interface 111 of the SoC chip 110, and the output terminal of the second controller 131 is connected to the control terminal of the second voltage regulating element 132; the input terminal of the second voltage regulating element 132 is coupled to the output terminal D of the first voltage regulating module 120, and the output terminal of the second voltage regulating element 132 is connected to the voltage detection terminal B of the SoC chip 110.

[0059] The first input terminal of the second controller 131 is coupled to the output terminal D of the first voltage regulating module 120 , and the first input terminal of the second controller 131 can receive the first voltage VDD_IN output by the first voltage regulating module 120 .

[0060] Among them, the second input end of the second controller 131 is connected to the communication interface 111 of the SoC chip 110 through a communication bus to communicate between the second controller 131 and the SoC chip 110. The second input end of the second controller 131 can receive clock signals, control signals, load information, temperature information, etc.

[0061] The second controller 131 includes a preset control logic algorithm, which determines whether to perform a boost operation or a buck operation on VDD_IN by combining the input first voltage VDD_IN with the input load, temperature and other information of the SoC chip.

[0062] The output terminal of the second controller 131 can output a control signal to the second voltage regulating element 132 for controlling the voltage step-up / step-down operation of the first voltage VDD_IN, and including a specific voltage regulation amplitude.

[0063] Among them, the second voltage regulating element 132 includes a boost element and a buck element. After receiving the control signal sent by the second controller 131, the input first voltage VDD_IN is boosted or bucked to obtain the second voltage VDD_OUT, and then output to the voltage detection terminal B of the SoC chip in the form of VDD_OUT.

[0064] In this way, the second controller 131 in the second voltage regulating module 130 can generate a control signal based on the input first voltage VDD_IN, combined with the input load, temperature and other information of the SoC chip, and then the second voltage regulating element 132 will increase or decrease the input first voltage VDD_IN according to the control signal to obtain the second voltage VDD_OUT. In this way, the SoC chip can adjust the output voltage VDD_IN of the first voltage regulating module based on the second voltage VDD_OUT output by the second voltage regulating module. Since the second voltage regulating module 130 can assist the SoC chip 110 in adjusting the output voltage VDD_IN of the first voltage regulating module 120, the voltage regulation process can be accelerated.

[0065] refer to Figure 5 or Figure 6 The first voltage regulating module 120 may include a first controller 121 and a first voltage regulating element 122 . The control end of the PMIC chip 200 is connected to the first controller 121 . The first controller 121 is connected to the first voltage regulating element 122 . The first voltage regulating element 122 is coupled to the voltage output end E of the PMIC chip 200 .

[0066] Among them, the control end A of the SoC chip 110 can be connected to the first controller 121 via the control end of the PMIC chip 200, and send a voltage adjustment command to the first controller 121; the voltage adjustment command can include update voltage value information, the first controller 121 can generate a control signal according to the voltage adjustment command, and send the control signal to the first voltage regulating element 122, the first voltage regulating element 122 can adjust the output first voltage VDD_IN according to the control signal, which can achieve the effect of speeding up the voltage regulation process.

[0067] refer to Figure 5 or Figure 6 , the SoC chip 110 may include an AVS sensor 112, an AVS controller 113, a central processor 114, a memory 115, and an arbitrator 116; The second voltage regulation module 130 is connected to the AVS sensor 112 through the voltage detection terminal B of the SoC chip 110, the AVS sensor 112 is connected to the AVS controller 113 and the central processing unit 114 respectively, the central processing unit 114 is connected to the memory 115, the AVS controller 113 and the central processing unit 114 are both connected to the arbitrator 116, and the arbitrator 116 is coupled to the control terminal C of the first voltage regulation module 120 through the control terminal A of the SoC chip 110.

[0068] Among them, the SoC chip 110 has an adaptive voltage regulation (AVS) function, and the adaptive voltage regulation process based on the SoC chip 110 may include: the central processing unit 114 reads the initial voltage value pre-stored in the memory 115, and gives the initial voltage value to the arbitrator 116; the arbitrator 116 can send a voltage regulation command to the PMIC chip 200 through the SPMI bus, and the voltage regulation command includes a power-on instruction and an initial voltage value; the first voltage regulation module 120 in the PMIC chip 200 outputs the first voltage VDD_IN to the second voltage regulation module 130 according to the voltage regulation command; the second voltage regulation module 130 performs a step-up or step-down operation on the input first voltage VDD_IN according to the input first voltage VDD_IN, combined with the input load, temperature and other information of the SoC chip, to obtain the second voltage VDD_OUT; the second voltage regulation module 130 outputs the second voltage VDD _OUT to the AVS sensor 112 of the SoC chip 110; the AVS sensor 112 detects the second voltage VDD_OUT, as well as the sensor data such as the current load and temperature in the SoC chip and outputs them to the AVS controller 113; the AVS controller 113 comprehensively determines a more appropriate voltage value based on the value of the second voltage VDD_OUT currently detected, as well as the sensor data such as the current load and temperature in the SoC chip, and outputs it to the arbitrator 116 to update the voltage value; the arbitrator 116 sends a voltage adjustment command to the PMIC chip 200 again through the SPMI bus, and the voltage adjustment command includes the updated voltage value information; the first voltage adjustment module 120 in the PMIC chip 200 adjusts the voltage VDD_IN currently output by the PMIC chip 200 according to the updated voltage value information, and the voltage can be adjusted multiple times subsequently until the first voltage VDD_IN output by the PMIC chip reaches the expected voltage value.

[0069] In this way, the SoC chip 110 can adaptively adjust the first voltage VDD_IN output by the first voltage regulation module 120 based on the second voltage VDD_OUT output by the second voltage regulation module 130. Since the second voltage regulation module 130 can assist the SoC chip 110 in adjusting the first voltage VDD_IN output by the first voltage regulation module 120, the voltage regulation process can be accelerated.

[0070] It can be understood that the second voltage VDD_OUT output by the second voltage regulation module 130 can be regarded as a deceptive voltage information. After the SoC chip 110 detects the deceptive voltage information, the single voltage regulation amplitude can be increased compared with the related technology, thereby reducing the number of voltage regulation times and achieving the effect of accelerating the voltage regulation.

[0071] For example, in a specific example, when the first voltage VDD_IN output by the first voltage regulating module 120 is greater than or equal to the target voltage, the second voltage VDD_OUT output by the second voltage regulating module 130 is greater than the first voltage VDD_IN output by the first voltage regulating module 120; When the first voltage VDD_IN output by the first voltage regulating module 120 is lower than the target voltage, the second voltage VDD_OUT output by the second voltage regulating module 130 is lower than the first voltage VDD_IN output by the first voltage regulating module; The target voltage is the minimum voltage threshold that meets the target condition.

[0072] For example, the target voltage is the minimum voltage threshold for the functional modules in the SoC chip 110 to work normally. The voltage regulating module can perform at least one voltage regulation process on the first voltage VDD_IN output by the first voltage regulating module 120 to adjust the first voltage VDD_IN output by the first voltage regulating module 120 to the desired target voltage.

[0073] In actual applications, the case where the first voltage VDD_IN output by the first voltage regulating module 120 is greater than the target voltage is a voltage reduction scenario. The SoC chip 110 can control the first voltage VDD_IN currently output by the first voltage regulating module 120 to be reduced at least once until it is adjusted to the target voltage.

[0074] In this case, the second voltage regulation module 130 can boost the input first voltage VDD_IN to obtain a second voltage VDD_OUT that is greater than the first voltage VDD_IN. Compared with the current power supply voltage VDD_IN detected by the SoC chip 110 in the related technology, the current power supply voltage VDD_IN detected by the SoC chip 110 in the present application is a larger second voltage VDD_OUT, which is equivalent to expanding the voltage difference between the detected current power supply voltage and the target voltage to be adjusted, and then the SoC chip 110 can adopt a larger single voltage regulation amplitude, increase the single voltage regulation amplitude, thereby reducing the number of voltage reductions and achieving the effect of accelerated voltage reduction.

[0075] In actual applications, the case where the first voltage VDD_IN output by the first voltage regulating module 120 is lower than the target voltage is a boosting scenario. The SoC chip 110 can control at least one boosting operation on the first voltage VDD_IN currently output by the first voltage regulating module 120 until it is adjusted to the target voltage.

[0076] In this case, the second voltage regulation module 130 can perform a step-down operation on the input first voltage VDD_IN to obtain a second voltage VDD_OUT which is less than the first voltage VDD_IN. Compared with the current power supply voltage VDD_IN detected by the SoC chip 110 in the related technology, the current power supply voltage detected by the SoC chip 110 in the present application is a smaller VDD_OUT, which is equivalent to enlarging the voltage difference to be adjusted between the current power supply voltage and the target voltage. Therefore, the SoC chip 110 can adopt a larger single voltage regulation amplitude, increase the single voltage regulation amplitude, reduce the number of boosting times, and achieve the effect of accelerated boosting.

[0077] In addition, in actual applications, for the case where the first voltage VDD_IN output by the first voltage regulation module 120 is equal to the target voltage, in order to ensure that the entire system circuit can operate normally under poor processes and environments, the relevant technology will reserve a certain power supply voltage margin, and the first voltage VDD_IN needs to be boosted so that the first voltage VDD_IN is slightly larger than the target voltage. In this way, the actual required voltage is slightly larger than the actual supply voltage, which brings unnecessary power consumption. At the same time, it may also cause additional heating problems for the load equipment.

[0078] In this case, in an embodiment of the present application, when the first voltage VDD_IN output by the first voltage regulating module 120 is equal to the target voltage, the second voltage regulating module 130 can perform a boost operation on the input first voltage VDD_IN to obtain a second voltage VDD_OUT slightly larger than the target voltage. The current power supply voltage detected by the SoC chip 110 is VDD_OUT slightly larger than the target voltage, and it is considered that a certain power supply voltage margin has been reserved, and the current power supply voltage is maintained without further adjustment.

[0079] Furthermore, the first voltage VDD_IN output by the first voltage regulating module 120 can be maintained at the target voltage (ie, the minimum voltage threshold that meets the target condition) without being boosted, which can both meet the normal operation of the system and achieve the purpose of reducing power consumption.

[0080] Based on the same concept as the voltage regulating module provided in any of the above embodiments, an embodiment of the present application also provides an electronic device.

[0081] like Figure 7 As shown, an embodiment of the present application provides an electronic device 10 including a voltage regulating module 100 .

[0082] It should be pointed out that the electronic device 10 provided in the embodiment of the present application includes the voltage regulating module provided in any of the above embodiments and can realize all the functions of the voltage regulating module. To avoid repetition, it will not be described again here.

[0083] In the embodiment of the present application, the electronic device may be a terminal or other device other than a terminal. For example, the electronic device may be a smart watch, a mobile phone, a tablet computer, a laptop computer, a PDA, a vehicle-mounted electronic device, a mobile Internet device (MID), an augmented reality (AR) / virtual reality (VR) device, a robot, a wearable device, an ultra-mobile personal computer (UMPC), a netbook or a personal digital assistant (PDA), etc. It may also be a server, a network attached storage (NAS), a personal computer (PC), etc., which is not specifically limited in the embodiment of the present application.

[0084] Based on a concept similar to the voltage regulating module provided in any of the above embodiments, an embodiment of the present application further provides a power supply optimization method, which is applied to the voltage regulating module provided in any of the above embodiments.

[0085] For example, Figure 8 As shown, an embodiment of the present application provides a power optimization method, which is applied to the voltage regulation module provided in any of the above embodiments. The power optimization method may include: Step 810: The second voltage regulating module regulates the first voltage output by the first voltage regulating module to obtain a second voltage; Step 820: The second voltage regulating module outputs a second voltage to the SoC chip; Step 830: The SoC chip determines a voltage adjustment command based on the second voltage, and outputs the voltage adjustment command to the first voltage adjustment module.

[0086] Before step 810 , the first voltage regulating module may output the current power supply voltage VDD in the form of a first voltage VDD_IN.

[0087] In step 810 , the second voltage regulating module 130 may perform a voltage-boosting or voltage-reducing operation on the first voltage VDD_IN output by the first voltage regulating module to obtain a second voltage VDD_OUT (ie, a spoofing voltage).

[0088] In step 820, the second voltage regulating module outputs a second voltage VDD_OUT to the voltage detection terminal of the SoC chip. The second voltage VDD_OUT is a spoof voltage information. The SoC chip regards the second voltage VDD_OUT detected by the voltage detection terminal as the power supply voltage VDD currently output by the first voltage regulating module, which can enlarge the voltage difference between the current power supply voltage and the target voltage to be regulated.

[0089] Furthermore, in step 830, the SoC chip can determine a larger single voltage regulation amplitude based on the voltage difference that can be expanded during the process of determining the voltage regulation command based on the second voltage, thereby increasing the single voltage regulation amplitude, reducing the number of voltage regulation times, and achieving the effect of accelerating the voltage regulation.

[0090] According to the power optimization method provided in the embodiment of the present application, the second voltage regulating module regulates the first voltage output by the first voltage regulating module to obtain the second voltage; the second voltage regulating module outputs the second voltage to the SoC chip; the SoC chip determines the voltage regulation command based on the second voltage, and outputs the voltage regulation command to the first voltage regulating module. In this way, the SoC chip regards the second voltage (i.e., the deceptive voltage) detected by the voltage detection terminal as the first voltage (i.e., the power supply voltage) actually output by the current first voltage regulating module. The SoC chip can further set the first voltage output by the first voltage regulating module based on the second voltage, so that the voltage in the SoC can be adjusted through the second voltage regulating module, thereby solving the problem that the power supply voltage in the SoC cannot be modified in the related art.

[0091] In addition, the SoC chip regards the second voltage detected by the voltage detection end as the first voltage (power supply voltage) output by the current first voltage regulation module, thereby enlarging the voltage difference to be regulated between the current power supply voltage and the target voltage, and in the process of determining the voltage regulation command based on the second voltage, determines a larger single voltage regulation amplitude, increases the single voltage regulation amplitude, reduces the number of voltage regulation times, and achieves the effect of accelerated voltage regulation.

[0092] In a specific embodiment, the voltage regulation command output by the SoC chip may include a single voltage regulation amplitude; in order to ensure the stability of the system, the SoC chip may adjust the voltage step by step during the adaptive voltage regulation process. The greater the voltage difference to be adjusted between the current power supply voltage and the target voltage, the greater the single voltage regulation amplitude.

[0093] For example, in the above step 830, the SoC chip determines a voltage adjustment command based on the second voltage, including: Based on the second voltage, determining a target voltage difference; the target voltage difference is the difference between the second voltage and the target voltage; Based on the target voltage difference, a single voltage regulation amplitude is determined; wherein the single voltage regulation amplitude is proportional to the target voltage difference.

[0094] The target voltage is the minimum voltage threshold that meets the target condition.

[0095] For example, the target voltage is the minimum voltage threshold at which the functional modules in the SoC chip can work normally. The voltage regulating module can perform at least one voltage regulation process on the first voltage VDD_IN output by the first voltage regulating module 120 to adjust the first voltage VDD_IN output by the first voltage regulating module 120 to the desired target voltage.

[0096] Among them, the second voltage VDD_OUT is a deceptive voltage information, and the SoC chip regards the second voltage VDD_OUT detected by the voltage detection terminal as the power supply voltage VDD currently output by the first voltage regulation module. Compared with the related art that regards the difference between the first voltage and the target voltage as the voltage difference to be adjusted, the present application regards the difference between the second voltage and the target voltage as the target voltage difference to be adjusted. The SoC chip can determine a larger single voltage adjustment amplitude based on a larger target voltage difference, thereby increasing the single voltage adjustment amplitude, reducing the number of voltage adjustments, and achieving the effect of accelerating voltage regulation.

[0097] The single voltage adjustment amplitude is proportional to the target voltage difference. The larger the target voltage difference is, the larger the single voltage adjustment amplitude is. For example, when the target voltage difference is 130mV, the single voltage adjustment amplitude is 40mV; when the target voltage difference is 50mV, the single voltage adjustment amplitude is 15mV.

[0098] In this way, by determining the corresponding single voltage regulation amplitude based on different target voltage differences, the effect of step-by-step voltage regulation can be achieved, ensuring the stability of the system during the adaptive voltage regulation process.

[0099] In another specific embodiment, in order to achieve the effect of accelerating voltage regulation and saving power consumption, in the above step 810, the second voltage regulation module regulates the first voltage output by the first voltage regulation module to obtain the second voltage, including: When the first voltage output by the first voltage regulating module is greater than or equal to the target voltage, the second voltage regulating module performs a voltage boost process on the first voltage output by the first voltage regulating module, so that the second voltage output by the second voltage regulating module is greater than the first voltage output by the first voltage regulating module; When the first voltage output by the first voltage regulating module is lower than the target voltage, the second voltage regulating module steps down the first voltage output by the first voltage regulating module so that the second voltage output by the second voltage regulating module is lower than the first voltage output by the first voltage regulating module.

[0100] It can be understood that the situation where the first voltage VDD_IN output by the first voltage regulating module is greater than the target voltage is a step-down scenario, and the SoC chip can control the first voltage VDD_IN currently output by the first voltage regulating module to perform at least one step-down operation until it is adjusted to the target voltage. In this case, the second voltage regulating module performs a step-up process on the input first voltage VDD_IN to obtain a second voltage VDD_OUT greater than the first voltage VDD_IN. Compared with the current power supply voltage VDD_IN detected by the SoC chip in the related art, the current power supply voltage VDD_OUT detected by the SoC chip in the present application is a larger second voltage VDD_OUT, which is equivalent to expanding the target voltage difference to be adjusted between the detected current power supply voltage and the target voltage, and then the SoC chip can use a larger single voltage regulation amplitude to step down the output voltage of the first voltage regulating module, increase the single voltage regulation amplitude, thereby reducing the number of step-downs and achieving the effect of accelerated step-down.

[0101] Similarly, the case where the first voltage VDD_IN output by the first voltage regulating module is less than the target voltage is a boost scenario, and the SoC chip can control the first voltage VDD_IN currently output by the first voltage regulating module to perform at least one boost operation until it is adjusted to the target voltage. In this case, the second voltage regulating module can step down the input first voltage VDD_IN to obtain a second voltage VDD_OUT that is less than the first voltage VDD_IN. Compared with the current power supply voltage VDD_IN detected by the SoC chip in the related art, the current power supply voltage detected by the SoC chip in this application is a smaller VDD_OUT, which is equivalent to expanding the voltage difference to be adjusted between the current power supply voltage and the target voltage, and then the SoC chip can use a larger single voltage regulation amplitude to boost the output voltage of the first voltage regulating module, increase the single voltage regulation amplitude, reduce the number of boosts, and achieve the effect of accelerated boosting.

[0102] In addition, for the case where the first voltage VDD_IN output by the first voltage regulating module is equal to the target voltage, in order to ensure that the whole system circuit can work normally under poor processes and environments, a certain power supply voltage margin will be reserved in the related technology, and the first voltage VDD_IN needs to be boosted so that the first voltage VDD_IN is slightly greater than the target voltage. In this way, the actual required voltage is slightly greater than the actual supply voltage, which brings unnecessary power consumption. At the same time, it may also cause additional heating problems for the load equipment. In this case, for the case where the first voltage VDD_IN output by the first voltage regulating module 120 is equal to the target voltage, the second voltage regulating module 130 can boost the input first voltage VDD_IN to obtain a second voltage VDD_OUT slightly greater than the target voltage. The current power supply voltage detected by the SoC chip 110 is VDD_OUT slightly greater than the target voltage. It is considered that the current power supply voltage output by the first voltage regulating module has reserved a certain power supply voltage margin, and the current power supply voltage is maintained and no longer adjusted. Furthermore, the first voltage VDD_IN output by the first voltage regulating module can be maintained at the target voltage (ie, the minimum voltage threshold that meets the target condition) without being boosted, which can both meet the normal operation of the system and achieve the purpose of reducing power consumption.

[0103] In practical applications, for example, Figure 5 Taking the voltage regulating module shown in FIG. 1 as an example, the second voltage regulating module 130 may be a voltage regulating IC disposed on the power path between the SoC chip 110 and the PMIC chip 200. Fig. 9 As shown, the present application provides a power optimization method that can be applied to Figure 5 The voltage regulating module shown, the power supply optimization method may include the following steps: Determine that the power supply voltage currently output by the PMIC chip is VDD; Input the current power supply voltage of the PMIC chip to the voltage regulator IC in the form of VDD_IN; The voltage regulator IC determines whether to increase or decrease the voltage of VDD_IN; wherein, the second controller inside the voltage regulator IC integrates the judgment logic algorithm in advance, and when receiving VDD_IN, combined with the current system operation scenario (such as the load, temperature and other information transmitted by the SoC chip to the voltage regulator IC through the communication bus), determines whether to increase or decrease the voltage of VDD_IN, and determines the increase or decrease amplitude, and then controls the second voltage regulator element inside the voltage regulator IC to adjust VDD_IN to obtain VDD_OUT; The voltage regulator IC outputs VDD_OUT to the AVS sensor; The AVS sensor transmits information such as VDD_OUT, current load of SoC, temperature, etc. to the AVS controller; wherein the AVS controller determines to obtain an updated voltage value based on information such as VDD_OUT, current load of SoC, temperature, etc., and then the arbitrator updates the voltage value; The arbitrator updates the power supply voltage VDD output by the PMIC chip through the SPMI bus, and a round of voltage regulation is completed; After a round of voltage regulation is completed, the voltage regulation IC determines whether it needs to continue voltage regulation; for example, the second controller of the voltage regulation IC can compare whether the current VDD_IN and the expected target voltage value are consistent. If not, the voltage is adjusted again. If it is consistent with expectations, the current round of voltage regulation is ended.

[0104] For example, in the embodiment of the present application, the voltage regulation scheme can refer to the following Table 2:

[0105] Table 2 Referring to Table 2, for example, when the power supply voltage VDD_IN currently output by the PMIC chip is 900mV, if the power supply voltage expected to be output by the voltage regulator IC is 770mV, the voltage regulator IC determines that the power supply voltage VDD_IN is much higher than expected, and the voltage regulator IC adjusts VDD_IN to obtain VDD_OUT, and VDD_OUT is 950mV. The AVS sensor determines that the power supply voltage VDD output by the PMIC chip has excess performance and needs to be stepped down faster. The target voltage difference to be adjusted is 950-770=180mV, and the single voltage adjustment amplitude of the AVS controller is set to 43mV. The current output power supply voltage VDD_IN (900mV) can be stepped down 3 times to 770mV.

[0106] For another example, when the power supply voltage VDD_IN currently output by the PMIC chip is 850mV, if the expected output power supply voltage is 770mV, the voltage regulator IC determines that the power supply voltage VDD_IN is slightly higher than expected, and the voltage regulator IC adjusts VDD_IN to obtain VDD_OUT, VDD_OUT is 900mV, and the AVS sensor determines that the power supply voltage VDD output by the PMIC chip has excess performance and needs to be reduced. The target voltage difference to be adjusted is 900-770=130mV, and the single voltage adjustment amplitude of the AVS controller is set to 40mV. The current output power supply voltage VDD_IN (850mV) can be reduced twice to 770mV.

[0107] For another example, when the power supply voltage VDD_IN currently output by the PMIC chip is 800mV, if the expected output power supply voltage is 770mV, the voltage regulator IC determines that the power supply voltage VDD_IN can be reduced to reduce power consumption. The voltage regulator IC adjusts VDD_IN to obtain VDD_OUT, and VDD_OUT is 830mV. The AVS sensor determines that the power supply voltage VDD output by the PMIC chip has excess performance and needs to be reduced. The target voltage difference to be adjusted is 830-770=60mV. The single voltage regulation amplitude of the AVS controller is set to 30mV. The current output power supply voltage VDD_IN (800mV) can be reduced once to 770mV.

[0108] For another example, when the power supply voltage VDD_IN currently output by the PMIC chip is 770mV, if the expected output power supply voltage is 770mV, the voltage regulator IC determines that the current power supply voltage can operate normally, and the voltage regulator IC adjusts VDD_IN to obtain VDD_OUT, and VDD_OUT is 800mV. The AVS sensor determines that the power supply voltage VDD output by the PMIC chip has normal performance, then the arbitrator can maintain or slightly adjust the power supply voltage output by the PMIC.

[0109] For another example, when the power supply voltage VDD_IN currently output by the PMIC chip is 700mV, if the expected output power supply voltage is 800mV, the voltage regulator IC determines that the power supply voltage VDD_IN is slightly lower than expected, and the voltage regulator IC adjusts VDD_IN to obtain VDD_OUT, VDD_OUT is 650mV, and the AVS sensor determines that the power supply voltage VDD output by the PMIC chip is slightly lower than expected and needs to be boosted faster. The target voltage difference to be adjusted is 650-770=-120mV, and the single voltage regulation amplitude of the AVS controller is set to 35mV. The current output power supply voltage VDD_IN (700mV) can be boosted twice to 770mV.

[0110] Comparing the voltage regulation scheme of the related art in Table 1 above with the example of the voltage regulation scheme of the embodiment of the present application in Table 2 above, the embodiment of the present application can achieve the effect of accelerating voltage regulation and saving power consumption. For example, the current power supply voltage is 850mV, the expected voltage value in the related art is 800mV, and 15mV is adjusted at a time, and the voltage needs to be reduced three times to reach the expected voltage value. However, the embodiment of the present application adjusts the current power supply voltage VDD_IN to VDD_OUT through the voltage regulation IC, which becomes 900mV. The AVS decision device can use 900mV as the power supply voltage of the current PMIC for voltage regulation. The single voltage regulation amplitude is 40mV, and the voltage is reduced by 40mV at a time. After the voltage is adjusted twice, the expected voltage value of 770mV is reached. Compared with the related art, the number of voltage regulation times is reduced by 1, and the effect of accelerated voltage reduction is achieved.

[0111] For another example, the current power supply voltage is 700mV, and the expected voltage value in the related art is 800mV. If the voltage is increased by 25mV once, it needs to be boosted 4 times to reach the expected voltage value of 800mV. However, in the embodiment of the present application, the current power supply voltage VDD_IN is adjusted to VDD_OUT through the voltage regulator IC, which becomes 650mV. The AVS decision device can use 650mV as the power supply voltage of the current PMIC for voltage regulation. The single voltage regulation amplitude is 35mV, and the voltage is increased by 35mV once. After 2 voltage regulation, the expected voltage value of 770mV is reached. Compared with the related art, the number of voltage regulation is reduced by 2 times, and the effect of accelerated voltage boost is achieved.

[0112] In addition, the AV voltage regulation scheme in the related art is solidified inside the SoC chip. In order to take into account various situations such as consistency and reliability, the power supply voltage margin is very wide. For example, in a certain scenario, 770mV can operate normally, but the AVS voltage regulation scheme in the related art will still set the target voltage at 800mV. However, through the voltage regulation scheme provided in the embodiment of the present application, the SoC chip can be controlled to reduce the power supply voltage to 770mV, achieving the effect of reducing power consumption in the target scenario. For example, the current power supply voltage is 800mV, and the traditional voltage regulation scheme in the related art does not regulate the voltage and maintains the output at 800mV. The voltage regulation scheme implemented in this application raises VDD_OUT to 830mV output, and the AVS decision device uses 830mV as the power supply voltage output by the current PMIC chip for voltage regulation, and continues to reduce the voltage once, reducing the voltage by 30mV each time, and reducing the voltage to the expected 770mV after regulating once. In this way, it can not only meet the normal operation of the system, but also achieve the purpose of reducing power consumption.

[0113] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "illustrative embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials, or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0114] Although the embodiments of the present application have been shown and described, those skilled in the art will appreciate that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present application, and that the scope of the present application is defined by the claims and their equivalents.

Claims

1. A voltage regulating module, characterized in that: include: A system on chip (SoC) chip, a first voltage regulating module and a second voltage regulating module; The SoC chip has a control end and a voltage detection end, and the first voltage regulation module has a control end and an output end; the control end of the SoC chip is coupled to the control end of the first voltage regulation module; the output end of the first voltage regulation module is coupled to the second voltage regulation module, and the second voltage regulation module is coupled to the voltage detection end of the SoC chip.

2. The voltage regulating module according to claim 1, characterized in that: The first voltage regulation module is arranged in a power management integrated circuit PMIC chip; The PMIC chip has a control end and a voltage output end. The control end of the SoC chip is connected to the control end of the PMIC chip. The control end of the PMIC chip is coupled to the control end of the first voltage regulating module. The output end of the first voltage regulating module is coupled to the voltage output end of the PMIC chip.

3. The voltage regulating module according to claim 2, characterized in that: The second voltage regulating module is arranged between the PMIC chip and the SoC chip, and the output end of the first voltage regulating module is connected to the input end of the second voltage regulating module via the voltage output end of the PMIC chip.

4. The voltage regulating module according to claim 2, characterized in that: The second voltage regulating module is arranged in the PMIC chip, and the output end of the first voltage regulating module is respectively connected to the voltage output end of the PMIC chip and the input end of the second voltage regulating module.

5. The voltage regulating module according to any one of claims 1 to 4, characterized in that: When the first voltage output by the first voltage regulating module is greater than or equal to the target voltage, the second voltage output by the second voltage regulating module is greater than the first voltage output by the first voltage regulating module; When the first voltage output by the first voltage regulating module is lower than the target voltage, the second voltage output by the second voltage regulating module is lower than the first voltage output by the first voltage regulating module; The target voltage is a minimum voltage threshold that satisfies the target condition.

6. The voltage regulating module according to any one of claims 1 to 4, characterized in that: The second voltage regulating module includes a second controller and a second voltage regulating element; the second controller is connected to the second voltage regulating element; The second controller has a first input terminal, a second input terminal and an output terminal, the second voltage regulating element has a control terminal, an input terminal and an output terminal, the first input terminal of the second controller is coupled to the output terminal of the first voltage regulating module, the second input terminal of the second controller is connected to the communication interface of the SoC chip, and the output terminal of the second controller is connected to the control terminal of the second voltage regulating element; The input end of the second voltage regulating element is coupled to the output end of the first voltage regulating module, and the output end of the second voltage regulating element is connected to the voltage detection end of the SoC chip.

7. The voltage regulating module according to claim 2, characterized in that: The first voltage regulating module includes a first controller and a first voltage regulating element. The control end of the PMIC chip is connected to the first controller, the first controller is connected to the first voltage regulating element, and the first voltage regulating element is coupled to the voltage output end of the PMIC chip.

8. The voltage regulating module according to claim 1, characterized in that: The SoC chip includes an adaptive voltage regulation AVS sensor, an AVS controller, a central processing unit, a memory and an arbitrator; The second voltage regulation module is connected to the AVS sensor through the voltage detection end of the SoC chip, the AVS sensor is connected to the AVS controller and the central processing unit respectively, the central processing unit is connected to the memory, the AVS controller and the central processing unit are both connected to the arbitrator, and the arbitrator is coupled to the control end of the first voltage regulation module through the control end of the SoC chip.

9. An electronic device, characterized in that: It comprises a voltage regulating module as described in any one of claims 1 to 8.

10. A power optimization method, applied to the voltage regulating module according to any one of claims 1 to 8, characterized in that: The method comprises: The second voltage regulating module regulates the first voltage output by the first voltage regulating module to obtain a second voltage; The second voltage regulating module outputs the second voltage to the SoC chip; The SoC chip determines a voltage adjustment command based on the second voltage, and outputs the voltage adjustment command to the first voltage adjustment module.

11. The method according to claim 10, characterized in that The voltage regulation command includes a single voltage regulation amplitude; The SoC chip determines a voltage adjustment command based on the second voltage, including: Based on the second voltage, determining a target voltage difference; the target voltage difference is the difference between the second voltage and the target voltage, and the target voltage is a minimum voltage threshold that meets the target condition; Based on the target voltage difference, determining a single voltage regulation amplitude; Wherein, the single voltage regulation amplitude is proportional to the target voltage difference.

12. The method according to claim 11, characterized in that The second voltage regulating module regulates the first voltage output by the first voltage regulating module to obtain a second voltage, including: When the first voltage output by the first voltage regulating module is greater than or equal to the target voltage, the second voltage regulating module performs a voltage boost process on the first voltage output by the first voltage regulating module, so that the second voltage output by the second voltage regulating module is greater than the first voltage output by the first voltage regulating module; When the first voltage output by the first voltage regulating module is lower than the target voltage, the second voltage regulating module steps down the first voltage output by the first voltage regulating module so that the second voltage output by the second voltage regulating module is lower than the first voltage output by the first voltage regulating module.

Images