Frequency adjustment system and method, equipment and computer storage medium

Abstract

The invention discloses a frequency adjustment system and method, equipment and a computer storage medium, the frequency adjustment system comprises a processor, a linear controller and a DVFS module, the linear controller is used for generating an adjustment signal based on an actual usage rate and a preset usage rate corresponding to the processor after receiving the actual usage rate of the processor, and sending the adjustment signal to the DVFS module; an adjusting signal is output to the DVFS module; wherein the actual utilization rate is obtained by monitoring the utilization rate of the processor in real time; and the DVFS module is used for adjusting the frequency of the processor based on the adjusting signal.

Description

Technical Field

[0001] The present invention relates to the technical field of frequency adjustment, and in particular to a frequency adjustment system and method, a device and a computer storage medium. Background Art

[0002] The frequency adjustment methods of the Central Processing Unit (CPU) mainly include the following: static frequency setting, dynamic voltage and frequency scaling (DVFS), task scheduling and load balancing, energy-saving mode switching, etc.

[0003] However, static frequency settings cannot be adjusted dynamically according to real-time loads, and cannot adapt to real-time load changes, which can easily cause performance waste or insufficient resources. The adjustment strategy of DVFS is relatively simple, and it is difficult to achieve precise control, and it cannot maintain a stable state under a specific utilization target. Task scheduling and load balancing are not suitable for single-core CPUs or tasks that cannot be evenly distributed, and the optimization effect is limited. Energy-saving mode switching has the problem of response time delay caused by frequent switching, and frequent switching may cause system performance jitter. This method is not suitable for highly dynamically changing loads.

[0004] That is to say, the currently common frequency adjustment method cannot take into account both real-time performance and accuracy, and cannot adjust the frequency of the processor in a timely and accurate manner, and thus cannot respond well to changes in the load of the processor. Summary of the invention

[0005] The embodiments of the present application provide a frequency adjustment system and method, a device and a computer storage medium, which can timely and accurately adjust the frequency of a processor, thereby quickly and stably responding to changes in the load of the processor.

[0006] The technical solution of the embodiment of the present application is implemented as follows:

[0007] In a first aspect, an embodiment of the present application provides a frequency adjustment system, the frequency adjustment system comprising a processor, a linear controller, and a DVFS module, wherein:

[0008] A linear controller, configured to generate an adjustment signal based on the actual utilization rate and a preset utilization rate corresponding to the processor after receiving the actual utilization rate of the processor, and output the adjustment signal to the DVFS module; wherein the actual utilization rate is obtained by real-time monitoring of the utilization rate of the processor;

[0009] The DVFS module is used to adjust the frequency of the processor based on the adjustment signal.

[0010] In a second aspect, an embodiment of the present application provides a frequency adjustment method, which is applied to a frequency adjustment system, the frequency adjustment system including a processor, a linear controller, and a DVFS module, and the method includes:

[0011] After receiving the actual usage rate of the processor, the linear controller generates an adjustment signal based on the actual usage rate and a preset usage rate corresponding to the processor; wherein the actual usage rate is obtained by real-time monitoring of the usage rate of the processor;

[0012] The linear controller outputs an adjustment signal to the DVFS module;

[0013] The DVFS module adjusts the frequency of the processor based on the adjustment signal.

[0014] In a third aspect, an embodiment of the present application provides a computer device, which includes a frequency adjustment system and a memory storing executable instructions of the frequency adjustment system. The frequency adjustment system includes a processor, a linear controller, and a DVFS module. When the instructions are executed by the frequency adjustment system, the method of the second aspect is implemented.

[0015] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium on which a program is stored. When the program is executed by a processor, the method of the second aspect described above is implemented.

[0016] The embodiment of the present application provides a frequency adjustment system and method, device and computer storage medium, wherein the frequency adjustment system includes a processor, a linear controller, and a DVFS module, wherein the linear controller is used to generate an adjustment signal based on the actual usage rate and the preset usage rate corresponding to the processor after receiving the actual usage rate of the processor, and output the adjustment signal to the DVFS module; wherein the actual usage rate is obtained by real-time monitoring of the usage rate of the processor; and the DVFS module is used to adjust the frequency of the processor based on the adjustment signal. That is to say, in the embodiment of the present application, the linear controller in the frequency adjustment system can adjust the frequency of the processor in real time based on the actual usage rate of the processor obtained by real-time monitoring, combined with the preset usage rate corresponding to the processor, wherein the linear processor has a fine adjustment function, so the frequency of the processor can be accurately adjusted through the linear processor. That is to say, the frequency adjustment system and method proposed in the embodiment of the present application can adjust the frequency of the processor in a timely and accurate manner, and can then respond quickly and stably to the load changes of the processor. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 The composition structure of the frequency adjustment system proposed in the embodiment of the present application Figure 1 ;

[0018] Figure 2The composition structure of the frequency adjustment system proposed in the embodiment of the present application Figure 2 ;

[0019] Figure 3 The composition structure of the frequency adjustment system proposed in the embodiment of the present application Figure 3 ;

[0020] Figure 4 The composition structure of the frequency adjustment system proposed in the embodiment of the present application Figure 4 ;

[0021] Figure 5 The composition structure of the frequency adjustment system proposed in the embodiment of the present application Figure 5 ;

[0022] Figure 6 This is an application diagram of the frequency adjustment system proposed in the embodiment of the present application. Figure 1 ;

[0023] Figure 7 This is an application diagram of the frequency adjustment system proposed in the embodiment of the present application. Figure 2 ;

[0024] Figure 8 The composition structure of the frequency adjustment system proposed in the embodiment of the present application Figure 6 ;

[0025] Fig. 9 This is an application diagram of the frequency adjustment system proposed in the embodiment of the present application. Figure 3 ;

[0026] Fig.10 This is an application diagram of the frequency adjustment system proposed in the embodiment of the present application. Figure 4 ;

[0027] Fig.11 The following is a schematic diagram of the implementation process of the frequency adjustment method proposed in the embodiment of the present application. Figure 1 ;

[0028] Fig.12 The following is a schematic diagram of the implementation process of the frequency adjustment method proposed in the embodiment of the present application. Figure 2 ;

[0029] Fig.13 A schematic diagram of the composition structure of the computer device proposed in an embodiment of the present application. DETAILED DESCRIPTION

[0030] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. It is understood that the specific embodiments described herein are only used to explain the difference application, rather than to limit the application. It should also be noted that, for the convenience of description, only the parts that are different from the related applications are shown in the drawings.

[0031] The precise control and adjustment of the central processing unit (CPU) frequency has a crucial impact on the performance of the device.

[0032] Among them, the common CPU frequency adjustment methods mainly include the following:

[0033] Static frequency setting: Traditional CPU frequency management operates by presetting a fixed frequency;

[0034] Dynamic Voltage and Frequency Scaling (DVFS): This method dynamically adjusts the CPU frequency and voltage based on load conditions.

[0035] Task scheduling and load balancing: Optimize overall utilization by evenly distributing tasks to multiple CPUs;

[0036] Energy-saving mode switching: Enter energy-saving mode at low load to reduce power consumption.

[0037] However, static frequency settings cannot be adjusted dynamically according to real-time loads, and cannot adapt to real-time load changes, which can easily cause performance waste or insufficient resources. The adjustment strategy of DVFS is relatively simple, and it is difficult to achieve precise control, and it cannot maintain a stable state under a specific utilization target. Task scheduling and load balancing are not suitable for single-core CPUs or tasks that cannot be evenly distributed, and the optimization effect is limited. Energy-saving mode switching has the problem of response time delay caused by frequent switching, and frequent switching may cause system performance jitter. This method is not suitable for highly dynamically changing loads.

[0038] That is to say, the currently common frequency adjustment method cannot take into account both real-time performance and accuracy, cannot adjust the frequency of the processor in a timely and accurate manner, and thus cannot respond well to changes in the load of the processor.

[0039] In order to solve the above problems, the embodiments of the present application provide a frequency adjustment system and method, a device and a computer storage medium, wherein the frequency adjustment system includes a processor, a linear controller, and a DVFS module, wherein the linear controller is used to generate an adjustment signal based on the actual usage rate and the preset usage rate corresponding to the processor after receiving the actual usage rate of the processor, and output the adjustment signal to the DVFS module; wherein the actual usage rate is obtained by real-time monitoring of the usage rate of the processor; and the DVFS module is used to adjust the frequency of the processor based on the adjustment signal. That is to say, in the embodiments of the present application, the linear controller in the frequency adjustment system can adjust the frequency of the processor in real time based on the actual usage rate of the processor obtained by real-time monitoring, combined with the preset usage rate corresponding to the processor, wherein the linear processor has a fine adjustment function, so the frequency of the processor can be accurately adjusted through the linear processor. That is to say, the frequency adjustment system and method proposed in the embodiments of the present application can adjust the frequency of the processor in a timely and accurate manner, and can then respond quickly and stably to the load changes of the processor.

[0040] The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application.

[0041] An embodiment of the present application provides a frequency adjustment system, wherein: Figure 1 The composition structure of the frequency adjustment system proposed in the embodiment of the present application Figure 1 ,like Figure 1 As shown, the frequency adjustment system 100 may include a linear controller 1001 , a DVFS module 1002 , and a processor 1003 .

[0042] It can be understood that in the embodiments of the present application, the processor can be a processor of any type or with any function. For example, the processor includes but is not limited to a central processing unit CPU, a graphics processing unit (Graphics Processing Unit, GPU), etc.

[0043] Furthermore, in an embodiment of the present application, the linear controller may include but is not limited to any type such as a proportional-integral-derivative (PID) controller, a proportional (P) controller, an integral (I) controller, a derivative (D) controller, a proportional-integral (PI) controller, or the like.

[0044] It is understood that in the embodiments of the present application, the PID controller is used as an example for illustrative description, but the specific type of linear controller is not limited. Among them, the PID controller is a feedback controller widely used in industrial automation control systems. It outputs a control signal by calculating the proportion (P), integral (I) and differential (D) of the deviation (i.e., the difference between the set value and the actual value) to achieve precise control of the controlled object.

[0045] Among them, the role of the proportional (P) term is to respond immediately to the deviation to reduce the deviation. When a deviation occurs, the proportional term will immediately produce a control effect proportional to the deviation in an attempt to eliminate the deviation. The size of the proportional term is determined by the proportional gain (Kp). The larger the Kp, the faster the response to the deviation, but it may also cause system oscillation or instability.

[0046] The integral (I) term is mainly used to eliminate the static error of the system. It integrates the deviation (i.e. accumulates the deviation) to produce a control effect that gradually increases (or decreases) over time until the deviation is zero. The integral term ensures that the system eventually reaches the set value, but too much integral action may cause the system to respond too slowly or produce overshoot.

[0047] Among them, the role of the differential (D) term is to predict the trend of deviation changes and make corrections in advance. It produces a control effect opposite to the trend of deviation changes by reacting to the rate of change of the deviation (i.e., the derivative of the deviation). The differential term can speed up the response of the system, reduce overshoot, and improve the stability of the system. However, the differential term is sensitive to noise, and too much differential action may cause the system to overreact to noise.

[0048] Further, in an embodiment of the present application, the DVFS module may be a dynamic voltage and frequency adjustment (DVFS) module. DVFS is a technology for reducing processor power consumption while maintaining performance. It allows the processor to automatically adjust its operating frequency and voltage according to the current workload to achieve the best balance between energy consumption and performance.

[0049] The frequency adjustment includes: when the processor needs to process fewer or simpler tasks, its operating frequency can be reduced to reduce power consumption. On the contrary, when the tasks to be processed are heavy or complex, the operating frequency can be increased to speed up the processing.

[0050] The voltage adjustment includes: As the processor operating frequency is adjusted, the voltage required will also change accordingly. When the frequency is reduced, the voltage can be reduced to further reduce power consumption. This is because the power consumption of the processor is proportional to the square of its operating frequency and voltage, as shown in the following formula:

[0051] P=CV2f (1)

[0052] Among them, P is power consumption, C is capacitance, V is voltage, and f is frequency.

[0053] It is understandable that in the embodiments of the present application, the implementation of DVFS depends on the collaboration of hardware and software. In terms of hardware, the processor needs to support the DVFS function; in terms of software, the operating system or application needs to be able to identify the current workload and adjust the frequency and voltage of the processor accordingly.

[0054] Accordingly, in an embodiment of the present application, the DVFS module may be integrated into a processor, for example, the processor is a module having a DVFS function. The DVFS module may also be integrated into the same hardware as the processor, for example, the processor and the DVFS module are integrated into the same device. The DVFS module may also be configured in different hardware devices from the processor, which is not specifically limited in the present application.

[0055] For example, in some embodiments, Figure 2 The composition structure of the frequency adjustment system proposed in the embodiment of the present application Figure 2 ,like Figure 2 As shown, the DVFS module may be integrated into a processor, for example, the processor is a CPU having a DVFS function.

[0056] Furthermore, in the embodiments of the present application, different linear controllers may be correspondingly set for different processors.

[0057] For example, in some embodiments, Figure 3 The composition structure of the frequency adjustment system proposed in the embodiment of the present application Figure 3 ,like Figure 3 As shown, the processors are respectively a CPU and a GPU, and the CPU and the GPU respectively include two different linear controllers. The DVFS module is configured independently from the processor.

[0058] Furthermore, in the embodiments of the present application, different DVFS modules may be correspondingly configured for different processors.

[0059] For example, in some embodiments, Figure 4 The composition structure of the frequency adjustment system proposed in the embodiment of the present application Figure 4 ,like Figure 4 As shown, the processors are respectively a CPU and a GPU, and the CPU and the GPU respectively include two different DVFS modules. The DVFS module can be integrated into the processor, for example, the processors are respectively a CPU with a DVFS function and a GPU with a DVFS function.

[0060] Furthermore, in an embodiment of the present application, the linear controller may be configured to generate an adjustment signal based on the actual usage rate and a preset usage rate corresponding to the processor after receiving the actual usage rate of the processor.

[0061] In the embodiment of the present application, the actual usage rate is obtained by monitoring the usage rate of the processor in real time.

[0062] That is to say, in the embodiment of the present application, the actual usage rate obtained by real-time monitoring of the processor usage rate can be understood as the real-time usage rate of the processor, that is, the actual usage rate can characterize the real-time usage of the processor.

[0063] In an embodiment of the present application, the actual usage rate of the processor can be obtained in a variety of ways, including but not limited to: the frequency adjustment system monitors the usage rate of the processor in real time by running monitoring software, thereby obtaining the actual usage rate of the processor; or, the frequency adjustment system monitors the usage rate of the processor in real time by configuring a sensor, thereby obtaining the actual usage rate of the processor.

[0064] Furthermore, in an embodiment of the present application, the frequency adjustment system may also include a sensor, which may be used to monitor the usage rate of the processor in real time.

[0065] For example, in some embodiments, Figure 5 The composition structure of the frequency adjustment system proposed in the embodiment of the present application Figure 5 ,like Figure 5 As shown, the frequency adjustment system 100 may include a linear controller 1001, a DVFS module 1002, a processor 1003, and a sensor 1004. The sensor may monitor the usage rate of the processor in real time, obtain the actual usage rate of the processor, and send the actual usage rate of the processor to the linear controller.

[0066] That is, in the embodiment of the present application, the frequency adjustment system can sample the actual usage rate of the processor in real time through a high-precision sensor or professional monitoring software. The sampling frequency can be preset, for example, once or more per second, so as to ensure the real-time and accuracy of the sampled data.

[0067] In an embodiment of the present application, after receiving the actual usage rate of the processor, the linear controller may choose to further generate a corresponding adjustment signal according to the actual usage rate of the processor and the preset usage rate corresponding to the processor.

[0068] In an embodiment of the present application, the preset usage rate corresponding to the processor may be pre-set and stored, wherein different processors may correspond to different preset usage rates, or the same preset usage rate may be used.

[0069] For example, in some embodiments, assuming that the frequency adjustment system includes a processor cluster consisting of multiple processors, a unified preset usage rate may be pre-set to perform frequency control on the processor cluster.

[0070] For example, in some embodiments, assuming that the frequency adjustment system includes a processor cluster consisting of multiple processors, different preset usage rates may be pre-set for different processors to respectively control the frequency of each processor in the processor cluster.

[0071] It can be understood that, in the embodiments of the present application, the preset usage rate can be any value greater than or equal to 0 and less than or equal to 1, and the present application does not make any specific limitation.

[0072] Exemplarily, in some embodiments, for the CPU, the corresponding preset usage rate may be 70%; for the GPU, the corresponding preset usage rate may be 80%.

[0073] Exemplarily, in some embodiments, for the CPU and GPU, the corresponding preset usage rates may both be 80%.

[0074] It is understandable that, in the embodiments of the present application, the preset usage rate may be set based on the reference scenario. For example, for the same processor, the preset usage rate corresponding to the processor may be different in different application scenarios.

[0075] Exemplarily, in some embodiments, if the application scenario is a game scenario, the corresponding preset usage rate may be 85%; if the application scenario is an office scenario, the corresponding preset usage rate may be 70%.

[0076] It can be understood that in an embodiment of the present application, for a multi-core processor, such as a multi-core CPU, different preset usage rates can be set for different cores. For example, the preset usage rates corresponding to different CPU cores may be different, thereby achieving more refined load balancing and power consumption management.

[0077] Further, in an embodiment of the present application, after receiving the actual usage rate of the processor, the linear controller can determine the usage rate error based on the actual usage rate and the preset usage rate corresponding to the processor; and then generate an adjustment signal based on the usage rate error.

[0078] Exemplarily, in some embodiments, when determining the usage error based on the actual usage and the preset usage corresponding to the processor, the linear controller can perform a difference operation on the actual usage and the preset usage to obtain the difference between the actual usage and the preset usage, and then use the difference as the usage error.

[0079] Exemplarily, in some embodiments, when determining the usage error based on the actual usage and the preset usage corresponding to the processor, the linear controller can perform a proportional operation on the actual usage and the preset usage to obtain the ratio between the actual usage and the preset usage, and then use the difference as the usage error.

[0080] Further, in an embodiment of the present application, the adjustment signal may be used to indicate whether to adjust the frequency of the processor and how to adjust the frequency of the processor. The adjustment signal may include a first adjustment signal and a second adjustment signal. The first adjustment signal may be used to indicate increasing the frequency; the second adjustment signal may be used to indicate decreasing the frequency.

[0081] In an embodiment of the present application, if the usage error between the actual usage rate and the preset usage rate indicates that the actual usage rate is greater than the preset usage rate, it can be considered that the workload at this time is high and the frequency needs to be increased to respond to the change in load. Therefore, the linear controller can generate a first adjustment signal for indicating an increase in frequency.

[0082] Exemplarily, in some embodiments, assuming that the usage error is determined by performing a difference operation on the actual usage rate and the preset usage rate, then, when the usage error is greater than 0, it can be determined that the actual usage rate is greater than the preset usage rate, and the linear controller can generate a first adjustment signal for indicating an increase in frequency.

[0083] Exemplarily, in some embodiments, assuming that the usage error is determined by performing a proportional operation on the actual usage rate and the preset usage rate, then when the usage error is greater than 1, it can be determined that the actual usage rate is greater than the preset usage rate, and the linear controller can generate a first adjustment signal for indicating an increase in frequency.

[0084] In an embodiment of the present application, if the usage error between the actual usage rate and the preset usage rate indicates that the actual usage rate is less than the preset usage rate, it can be considered that the workload at this time is low and the frequency needs to be reduced to respond to the change in load. Therefore, a second adjustment signal for indicating a reduction in frequency can be generated.

[0085] Exemplarily, in some embodiments, assuming that the usage error is determined by performing a difference operation on the actual usage rate and the preset usage rate, then, when the usage error is less than 0, it can be determined that the actual usage rate is less than the preset usage rate. At this time, the linear controller can generate a second adjustment signal for indicating a reduction in frequency.

[0086] Exemplarily, in some embodiments, assuming that the usage error is determined by performing a proportional operation on the actual usage rate and the preset usage rate, then when the usage error is less than 1, it can be determined that the actual usage rate is less than the preset usage rate, and the linear controller can generate a second adjustment signal for indicating a reduction in frequency.

[0087] Further, in an embodiment of the present application, if the utilization error between the actual utilization rate and the preset utilization rate indicates that the actual utilization rate is equal to the preset utilization rate, it can be considered that the frequency of the processor at this time can meet the workload requirements. Therefore, a third adjustment signal can be generated to indicate that the frequency will not be changed, or the generation of the adjustment signal may not be performed. This application does not make specific limitations.

[0088] Further, in the embodiment of the present application, taking the PID controller as an example, the adjustment signal output by the PID controller can be a linear combination of the three parameters P, I, and D, that is:

[0089]

[0090] Wherein, u(t) is the adjustment signal output by the controller, e(t) is the deviation signal, i.e., the usage error (e.g., the difference between the actual usage and the preset usage), K p , K i and K d They are proportional gain, integral gain and differential gain respectively.

[0091] In the embodiment of the present application, by adjusting these three parameters, the PID controller can achieve accurate control of different systems and meet different control requirements. However, the adjustment of PID parameters is a complex process and requires repeated experiments and adjustments according to specific system characteristics and control objectives.

[0092] In an embodiment of the present application, parameters such as the proportional gain, integral gain and differential gain of the PID controller are intelligently adjusted through a machine learning algorithm, thereby further optimizing the control effect.

[0093] Further, in an embodiment of the present application, after generating an adjustment signal according to the usage rate error, the linear controller may also be used to output the adjustment signal to the DVFS module, so that the DVFS module performs frequency adjustment based on the adjustment signal.

[0094] Further, in an embodiment of the present application, the DVFS module may be used to adjust the frequency of the processor based on an adjustment signal.

[0095] It can be understood that in an embodiment of the present application, after receiving the adjustment signal output by the linear controller, the DVFS module can determine the target adjustment parameter based on the adjustment signal; and then determine the target adjustment value corresponding to the target adjustment parameter based on the mapping relationship between the adjustment parameter and the adjustment value.

[0096] In an embodiment of the present application, based on the adjustment signal, the DVFS module may determine a corresponding target adjustment parameter, wherein the target adjustment parameter may be used to determine whether to adjust the frequency and how to adjust the frequency of the processor.

[0097] For example, in some embodiments, the present application does not specifically limit the specific representation form of the target adjustment parameter. For example, the target adjustment parameter can be represented in the form of high and low levels, or in the form of numerical values.

[0098] Further, in an embodiment of the present application, a mapping relationship between adjustment parameters and adjustment values ​​may be pre-constructed, and the mapping relationship between adjustment parameters and adjustment values ​​may include a corresponding relationship between adjustment parameters and specific adjustment values.

[0099] Accordingly, in the embodiment of the present application, after determining the corresponding target adjustment parameter based on the adjustment signal, the DVFS module may determine the corresponding target adjustment value using the mapping relationship between the adjustment parameter and the adjustment value.

[0100] Exemplarily, in some embodiments, the mapping relationship between the adjustment parameters and the adjustment values ​​may be as shown in Table 1, wherein the mapping relationship between the adjustment parameters and the adjustment values ​​may include a corresponding relationship between the adjustment parameters and the adjustment values ​​corresponding to the same processor.

[0101] Table 1

[0102] Adjusting parameters Adjustment value Parameter A Value a Parameter B Value b Parameter C Value c …… …… Parameter N Value n

[0103] Further, in an embodiment of the present application, in an embodiment of the present application, the target adjustment value may include a target adjustment power value and a target adjustment voltage value.

[0104] It is understandable that, in the embodiment of the present application, DVFS can adjust the voltage of the processor while adjusting the power of the processor, wherein there may be no dependency between the voltage adjustment and the power adjustment.

[0105] Correspondingly, in the embodiment of the present application, the mapping relationship between the adjustment parameter and the adjustment value may also include a corresponding relationship between the adjustment parameter and a specific adjustment power value and an adjustment voltage value.

[0106] Accordingly, in an embodiment of the present application, after determining the corresponding target adjustment parameter based on the adjustment signal, the DVFS module may use a mapping relationship between the adjustment parameter and the adjustment value to determine the corresponding target adjustment power value and target adjustment voltage value.

[0107] Exemplarily, in some embodiments, the mapping relationship between the adjustment parameters and the adjustment values ​​may be as shown in Table 2, wherein the mapping relationship between the adjustment parameters and the adjustment values ​​may include a correspondence between the adjustment parameters and the adjustment power value and the adjustment voltage value corresponding to the same processor.

[0108] Table 2

[0109]

[0110]

[0111] Further, in an embodiment of the present application, after determining the corresponding target adjustment power value and target adjustment voltage value using the mapping relationship between the adjustment parameter and the adjustment value, the DVFS module can be used to adjust the frequency of the processor according to the target adjustment power value; it can also be used to adjust the voltage of the processor according to the target adjustment voltage value.

[0112] For example, in some embodiments, Figure 6 This is an application diagram of the frequency adjustment system proposed in the embodiment of the present application. Figure 1 ,like Figure 6 As shown, when frequency adjustment is performed based on a frequency adjustment system including a processor, a linear controller, and a DVFS module, for the actual usage rate of the processor input to the linear controller, the linear controller can determine the usage rate error in combination with the preset usage rate corresponding to the processor, and output a corresponding adjustment signal based on the usage rate error, and the DVFS module can adjust the power of the processor in response to the adjustment signal.

[0113] For example, in some embodiments, Figure 7 This is an application diagram of the frequency adjustment system proposed in the embodiment of the present application. Figure 2 ,like Figure 7 As shown, when frequency adjustment is performed based on a frequency adjustment system including a sensor, a processor, a linear controller, and a DVFS module, after the sensor sends the collected actual usage rate of the processor to the linear controller, the linear controller can determine the usage rate error in combination with the preset usage rate corresponding to the processor, and output a corresponding adjustment signal based on the usage rate error, and the DVFS module can adjust the power of the processor in response to the adjustment signal.

[0114] Furthermore, in an embodiment of the present application, after the DVFS module completes the frequency adjustment of the processor based on the adjustment signal, the frequency adjustment system can continue to monitor the actual utilization rate of the processor in real time to ensure that the actual utilization rate of the processor remains near the target value (preset utilization rate), thereby being able to continue to respond accurately to load changes.

[0115] Further, in an embodiment of the present application, the frequency adjustment system may include at least one processor.

[0116] Exemplarily, in some embodiments, the frequency adjustment system may include a CPU cluster consisting of multiple CPUs, wherein the CPU cluster refers to a group of host nodes with multiple CPUs, and these nodes can jointly use these CPUs to complete computing tasks.

[0117] Furthermore, in an embodiment of the present application, the frequency adjustment system may also include at least one linear controller corresponding to at least one processor.

[0118] That is to say, in the embodiment of the present application, the processors and the linear controllers are in one-to-one correspondence, wherein at least one processor includes a first processor, and at least one linear controller includes a linear controller corresponding to the first processor.

[0119] For example, in some embodiments, Figure 8 The composition structure of the frequency adjustment system proposed in the embodiment of the present application Figure 6 ,like Figure 8 As shown, it is assumed that the frequency adjustment system includes five CPUs, and corresponding to the five CPUs, the frequency adjustment system also includes five linear controllers, wherein CPU1 is the first processor, and correspondingly, linear controller 1 is the first linear controller.

[0120] Further, in an embodiment of the present application, after receiving the actual usage rate of the first processor, the first linear controller can be used to generate an adjustment signal corresponding to the first processor based on the actual usage rate of the first processor and a preset usage rate corresponding to the first processor.

[0121] In the embodiment of the present application, the actual usage rate of the first processor is obtained by real-time monitoring of the usage rate of the first processor, which can represent the real-time usage of the first processor.

[0122] In an embodiment of the present application, the preset usage rate corresponding to the first processor may be pre-set and stored, wherein different processors may correspond to different preset usage rates, or the same preset usage rate may be used.

[0123] For example, in some embodiments, assuming that the frequency adjustment system includes a processor cluster consisting of multiple processors, a unified preset usage rate can be preset to control the frequency of the processor cluster. Alternatively, different preset usage rates can be preset for different processors to control the frequency of each processor in the processor cluster respectively.

[0124] Further, in an embodiment of the present application, after receiving the actual usage rate of the first processor, the first linear controller can determine the usage error corresponding to the first processor based on the actual usage rate of the first processor and the preset usage rate corresponding to the first processor; and then can generate an adjustment signal corresponding to the first processor based on the usage error corresponding to the first processor.

[0125] That is to say, in an embodiment of the present application, for the one-to-one corresponding processor and linear controller included in the frequency adjustment system, for example, the first processor and the first linear controller, the first linear controller can be used to generate an adjustment signal corresponding to the first processor based on the actual usage rate corresponding to the first processor, thereby adjusting and controlling the frequency of the first processor through the adjustment signal corresponding to the first processor.

[0126] Further, in an embodiment of the present application, the DVFS module may be configured to adjust the frequency of the first processor based on an adjustment signal corresponding to the first processor.

[0127] In the embodiment of the present application, multiple processors in the frequency adjustment system may respectively correspond to multiple DVFS modules, or the same DVFS module may be used to control the frequency of the processors.

[0128] Exemplarily, in some embodiments, it is assumed that the frequency adjustment system includes five CPUs. Corresponding to the five CPUs, the frequency adjustment system further includes five DVFS modules, and the five DVFS modules are respectively integrated into the five CPUs.

[0129] For example, in some embodiments, assuming that the frequency adjustment system includes five CPUs, corresponding to the five CPUs, the frequency adjustment system uses the same DVFS module to respond to adjustment signals transmitted by different linear controllers, and the DVFS module is configured independently from the processors.

[0130] For example, in some embodiments, Fig. 9 This is an application diagram of the frequency adjustment system proposed in the embodiment of the present application. Figure 3 ,like Fig. 9As shown, when frequency adjustment is performed based on a frequency adjustment system including multiple processors, multiple linear controllers corresponding to the multiple processors, and a DVFS module, for the actual usage rate of the processor input to the linear controller, the linear controller can determine the usage rate error in combination with the preset usage rate corresponding to the processor, and output a corresponding adjustment signal based on the usage rate error, and the DVFS module can adjust the power of the processor in response to the adjustment signal.

[0131] For example, in some embodiments, Fig.10 This is an application diagram of the frequency adjustment system proposed in the embodiment of the present application. Figure 4 ,like Fig.10 As shown, when frequency adjustment is performed based on a frequency adjustment system including multiple processors, multiple linear controllers corresponding to the multiple processors, and a DVFS module, after the sensor sends the collected actual usage rate of the processor to the linear controller, the linear controller can determine the usage rate error in combination with the preset usage rate corresponding to the processor, and output a corresponding adjustment signal based on the usage rate error, and the DVFS module can adjust the power of the processor in response to the adjustment signal.

[0132] In summary, the frequency adjustment system proposed in the embodiment of the present application, on the one hand, is based on a clear utilization rate target value (preset utilization rate) pre-set for the processor, and dynamically adjusts the frequency of the processor through a linear controller to maintain the actual utilization rate of the processor near the target value (preset utilization rate), thereby achieving the best balance between performance and power consumption, extending battery life and reducing energy consumption. On the other hand, the actual utilization rate of the processor can be monitored in real time, and the fine adjustment function of the linear controller can be used to enable the processor to respond to load changes quickly and stably, thereby ensuring the stability and efficiency of task execution. On the third hand, the frequency adjustment system can realize frequency adjustment and control of any type of processor, which is not only applicable to CPUs, but can also be extended to other key components such as GPUs, and has high scalability and versatility, thereby achieving all-round dynamic frequency management and power consumption optimization.

[0133] The embodiment of the present application proposes a frequency adjustment system, which includes a processor, a linear controller, and a DVFS module, wherein the linear controller is used to generate an adjustment signal based on the actual usage rate and the preset usage rate corresponding to the processor after receiving the actual usage rate of the processor, and output the adjustment signal to the DVFS module; wherein the actual usage rate is obtained by real-time monitoring of the usage rate of the processor; and the DVFS module is used to adjust the frequency of the processor based on the adjustment signal. That is to say, in the embodiment of the present application, the linear controller in the frequency adjustment system can adjust the frequency of the processor in real time based on the actual usage rate of the processor obtained by real-time monitoring, combined with the preset usage rate corresponding to the processor, wherein the linear processor has a fine adjustment function, so the frequency of the processor can be accurately adjusted through the linear processor. That is to say, the frequency adjustment system and method proposed in the embodiment of the present application can adjust the frequency of the processor in a timely and accurate manner, and can then respond quickly and stably to changes in the load of the processor.

[0134] Based on the above embodiment, another embodiment of the present application provides a frequency adjustment method, which can be applied to a frequency adjustment system. Figure 1 As shown, the frequency adjustment system may include a processor, a linear controller, and a DVFS module.

[0135] It can be understood that in the embodiments of the present application, the processor can be a processor of any type or with any function, for example, the processor includes but is not limited to a central processing unit CPU, a graphics processing unit GPU, etc.

[0136] Furthermore, in an embodiment of the present application, the linear controller may include but is not limited to any type such as a PID controller, a P controller, an I controller, a D controller, and a PI controller.

[0137] It is understood that in the embodiments of the present application, the PID controller is used as an example for illustrative description, but the specific type of linear controller is not limited. Among them, the PID controller is a feedback controller widely used in industrial automation control systems. It outputs a control signal by calculating the proportion (P), integral (I) and differential (D) of the deviation (i.e., the difference between the set value and the actual value) to achieve precise control of the controlled object.

[0138] Among them, the role of the proportional (P) term is to respond immediately to the deviation to reduce the deviation. When a deviation occurs, the proportional term will immediately produce a control effect proportional to the deviation in an attempt to eliminate the deviation. The size of the proportional term is determined by the proportional gain (Kp). The larger the Kp, the faster the response to the deviation, but it may also cause system oscillation or instability.

[0139] The integral (I) term is mainly used to eliminate the static error of the system. It integrates the deviation (i.e. accumulates the deviation) to produce a control effect that gradually increases (or decreases) over time until the deviation is zero. The integral term ensures that the system eventually reaches the set value, but too much integral action may cause the system to respond too slowly or produce overshoot.

[0140] Among them, the role of the differential (D) term is to predict the trend of deviation changes and make corrections in advance. It produces a control effect opposite to the trend of deviation changes by reacting to the rate of change of the deviation (i.e., the derivative of the deviation). The differential term can speed up the response of the system, reduce overshoot, and improve the stability of the system. However, the differential term is sensitive to noise, and too much differential action may cause the system to overreact to noise.

[0141] Further, in an embodiment of the present application, the DVFS module may be a dynamic voltage and frequency adjustment (DVFS) module. DVFS is a technology for reducing processor power consumption while maintaining performance. It allows the processor to automatically adjust its operating frequency and voltage according to the current workload to achieve the best balance between energy consumption and performance.

[0142] The frequency adjustment includes: when the processor needs to process fewer or simpler tasks, its operating frequency can be reduced to reduce power consumption. On the contrary, when the tasks to be processed are heavy or complex, the operating frequency can be increased to speed up the processing.

[0143] The voltage adjustment includes: as the processor operating frequency is adjusted, the required voltage will also change accordingly. When the frequency is reduced, the voltage can be reduced to further reduce power consumption.

[0144] It is understandable that in the embodiments of the present application, the implementation of DVFS depends on the collaboration of hardware and software. In terms of hardware, the processor needs to support the DVFS function; in terms of software, the operating system or application needs to be able to identify the current workload and adjust the frequency and voltage of the processor accordingly.

[0145] Accordingly, in an embodiment of the present application, the DVFS module may be integrated into a processor, for example, the processor is a module having a DVFS function. The DVFS module may also be integrated into the same hardware as the processor, for example, the processor and the DVFS module are integrated into the same device. The DVFS module may also be configured in different hardware devices from the processor, which is not specifically limited in the present application.

[0146] For example, in some embodiments, Figure 2 As shown, the DVFS module may be integrated into a processor, for example, the processor is a CPU having a DVFS function.

[0147] Furthermore, in the embodiments of the present application, different linear controllers may be correspondingly set for different processors.

[0148] For example, in some embodiments, Figure 3 As shown, the processors are respectively a CPU and a GPU, and the CPU and the GPU respectively include two different linear controllers. The DVFS module is configured independently from the processor.

[0149] Furthermore, in the embodiments of the present application, different DVFS modules may be correspondingly configured for different processors.

[0150] For example, in some embodiments, Figure 4 As shown, the processors are respectively a CPU and a GPU, and the CPU and the GPU respectively include two different DVFS modules. The DVFS module can be integrated into the processor, for example, the processors are respectively a CPU with a DVFS function and a GPU with a DVFS function.

[0151] Furthermore, in the embodiments of the present application, Fig.11 The following is a schematic diagram of the implementation process of the frequency adjustment method proposed in the embodiment of the present application. Figure 1 ,like Fig.11 As shown, the frequency adjustment method may include the following steps:

[0152] Step 101: After receiving the actual usage rate of the processor, the linear controller generates an adjustment signal based on the actual usage rate and a preset usage rate corresponding to the processor; wherein the actual usage rate is obtained by real-time monitoring of the usage rate of the processor.

[0153] In an embodiment of the present application, after receiving the actual usage rate of the processor, the linear controller may generate an adjustment signal based on the actual usage rate and a preset usage rate corresponding to the processor.

[0154] In the embodiment of the present application, the actual usage rate is obtained by monitoring the usage rate of the processor in real time.

[0155] That is to say, in the embodiment of the present application, the actual usage rate obtained by real-time monitoring of the processor usage rate can be understood as the real-time usage rate of the processor, that is, the actual usage rate can characterize the real-time usage of the processor.

[0156] In an embodiment of the present application, the actual usage rate of the processor can be obtained in a variety of ways, including but not limited to: the frequency adjustment system monitors the usage rate of the processor in real time by running monitoring software, thereby obtaining the actual usage rate of the processor; or, the frequency adjustment system monitors the usage rate of the processor in real time by configuring a sensor, thereby obtaining the actual usage rate of the processor.

[0157] Furthermore, in an embodiment of the present application, the frequency adjustment system may also include a sensor, which may be used to monitor the usage rate of the processor in real time.

[0158] For example, in some embodiments, Figure 5 As shown, the frequency adjustment system may include a processor, a linear controller, a DVFS module, and a sensor. The sensor may monitor the utilization rate of the processor in real time, obtain the actual utilization rate of the processor, and send the actual utilization rate of the processor to the linear controller.

[0159] That is, in the embodiment of the present application, the frequency adjustment system can sample the actual usage rate of the processor in real time through a high-precision sensor or professional monitoring software. The sampling frequency can be preset, for example, once or more per second, so as to ensure the real-time and accuracy of the sampled data.

[0160] In an embodiment of the present application, after receiving the actual usage rate of the processor, the linear controller may choose to further generate a corresponding adjustment signal according to the actual usage rate of the processor and the preset usage rate corresponding to the processor.

[0161] In an embodiment of the present application, the preset usage rate corresponding to the processor may be pre-set and stored, wherein different processors may correspond to different preset usage rates, or the same preset usage rate may be used.

[0162] For example, in some embodiments, assuming that the frequency adjustment system includes a processor cluster consisting of multiple processors, a unified preset usage rate may be pre-set to perform frequency control on the processor cluster.

[0163] For example, in some embodiments, assuming that the frequency adjustment system includes a processor cluster consisting of multiple processors, different preset usage rates may be pre-set for different processors to respectively control the frequency of each processor in the processor cluster.

[0164] It can be understood that, in the embodiments of the present application, the preset usage rate can be any value greater than or equal to 0 and less than or equal to 1, and the present application does not make any specific limitation.

[0165] Exemplarily, in some embodiments, for the CPU, the corresponding preset usage rate may be 70%; for the GPU, the corresponding preset usage rate may be 80%.

[0166] Exemplarily, in some embodiments, for the CPU and GPU, the corresponding preset usage rates may both be 80%.

[0167] It is understandable that, in the embodiments of the present application, the preset usage rate may be set based on the reference scenario. For example, for the same processor, the preset usage rate corresponding to the processor may be different in different application scenarios.

[0168] Exemplarily, in some embodiments, if the application scenario is a game scenario, the corresponding preset usage rate may be 85%; if the application scenario is an office scenario, the corresponding preset usage rate may be 70%.

[0169] It can be understood that in an embodiment of the present application, for a multi-core processor, such as a multi-core CPU, different preset usage rates can be set for different cores. For example, the preset usage rates corresponding to different CPU cores may be different, thereby achieving more refined load balancing and power consumption management.

[0170] Further, in an embodiment of the present application, after receiving the actual usage rate of the processor, the linear controller can determine the usage rate error based on the actual usage rate and the preset usage rate corresponding to the processor; and then generate an adjustment signal based on the usage rate error.

[0171] Exemplarily, in some embodiments, when determining the usage error based on the actual usage and the preset usage corresponding to the processor, the linear controller can perform a difference operation on the actual usage and the preset usage to obtain the difference between the actual usage and the preset usage, and then use the difference as the usage error.

[0172] Exemplarily, in some embodiments, when determining the usage error based on the actual usage and the preset usage corresponding to the processor, the linear controller can perform a proportional operation on the actual usage and the preset usage to obtain the ratio between the actual usage and the preset usage, and then use the difference as the usage error.

[0173] Further, in an embodiment of the present application, the adjustment signal may be used to indicate whether to adjust the frequency of the processor and how to adjust the frequency of the processor. The adjustment signal may include a first adjustment signal and a second adjustment signal. The first adjustment signal may be used to indicate increasing the frequency; the second adjustment signal may be used to indicate decreasing the frequency.

[0174] In an embodiment of the present application, if the usage error between the actual usage rate and the preset usage rate indicates that the actual usage rate is greater than the preset usage rate, it can be considered that the workload at this time is high and the frequency needs to be increased to respond to the change in load. Therefore, the linear controller can generate a first adjustment signal for indicating an increase in frequency.

[0175] Exemplarily, in some embodiments, assuming that the usage error is determined by performing a difference operation on the actual usage rate and the preset usage rate, then, when the usage error is greater than 0, it can be determined that the actual usage rate is greater than the preset usage rate, and the linear controller can generate a first adjustment signal for indicating an increase in frequency.

[0176] Exemplarily, in some embodiments, assuming that the usage error is determined by performing a proportional operation on the actual usage rate and the preset usage rate, then when the usage error is greater than 1, it can be determined that the actual usage rate is greater than the preset usage rate, and the linear controller can generate a first adjustment signal for indicating an increase in frequency.

[0177] In an embodiment of the present application, if the usage error between the actual usage rate and the preset usage rate indicates that the actual usage rate is less than the preset usage rate, it can be considered that the workload at this time is low and the frequency needs to be reduced to respond to the change in load. Therefore, a second adjustment signal for indicating a reduction in frequency can be generated.

[0178] Exemplarily, in some embodiments, assuming that the usage error is determined by performing a difference operation on the actual usage rate and the preset usage rate, then, when the usage error is less than 0, it can be determined that the actual usage rate is less than the preset usage rate. At this time, the linear controller can generate a second adjustment signal for indicating a reduction in frequency.

[0179] Exemplarily, in some embodiments, assuming that the usage error is determined by performing a proportional operation on the actual usage rate and the preset usage rate, then when the usage error is less than 1, it can be determined that the actual usage rate is less than the preset usage rate, and the linear controller can generate a second adjustment signal for indicating a reduction in frequency.

[0180] Further, in an embodiment of the present application, if the utilization error between the actual utilization rate and the preset utilization rate indicates that the actual utilization rate is equal to the preset utilization rate, it can be considered that the frequency of the processor at this time can meet the workload requirements. Therefore, a third adjustment signal can be generated to indicate that the frequency will not be changed, or the generation of the adjustment signal may not be performed. This application does not make specific limitations.

[0181] Further, in the embodiment of the present application, taking the PID controller as an example, the adjustment signal output by the PID controller can be a linear combination of the three parameters P, I, and D, as shown in formula (2). Wherein, u(t) is the adjustment signal output by the controller, e(t) is the deviation signal, that is, the usage error (for example, the difference between the actual usage and the preset usage), K p , K i and K d They are proportional gain, integral gain and differential gain respectively.

[0182] In the embodiment of the present application, by adjusting these three parameters, the PID controller can achieve accurate control of different systems and meet different control requirements. However, the adjustment of PID parameters is a complex process and requires repeated experiments and adjustments according to specific system characteristics and control objectives.

[0183] In an embodiment of the present application, parameters such as the proportional gain, integral gain and differential gain of the PID controller are intelligently adjusted through a machine learning algorithm, thereby further optimizing the control effect.

[0184] Step 102: The linear controller outputs an adjustment signal to the DVFS module.

[0185] In an embodiment of the present application, after generating an adjustment signal according to the usage rate error, the linear controller may output the adjustment signal to the DVFS module, so that the DVFS module performs frequency adjustment based on the adjustment signal.

[0186] Step 103: The DVFS module adjusts the frequency of the processor based on the adjustment signal.

[0187] In an embodiment of the present application, the DVFS module may adjust the frequency of the processor based on the adjustment signal.

[0188] It can be understood that in an embodiment of the present application, after receiving the adjustment signal output by the linear controller, the DVFS module can determine the target adjustment parameter based on the adjustment signal; and then determine the target adjustment value corresponding to the target adjustment parameter based on the mapping relationship between the adjustment parameter and the adjustment value.

[0189] In an embodiment of the present application, based on the adjustment signal, the DVFS module may determine a corresponding target adjustment parameter, wherein the target adjustment parameter may be used to determine whether to adjust the frequency and how to adjust the frequency of the processor.

[0190] For example, in some embodiments, the present application does not specifically limit the specific representation form of the target adjustment parameter. For example, the target adjustment parameter can be represented in the form of high and low levels, or in the form of numerical values.

[0191] Further, in an embodiment of the present application, a mapping relationship between adjustment parameters and adjustment values ​​may be pre-constructed, and the mapping relationship between adjustment parameters and adjustment values ​​may include a corresponding relationship between adjustment parameters and specific adjustment values.

[0192] Accordingly, in the embodiment of the present application, after determining the corresponding target adjustment parameter based on the adjustment signal, the DVFS module may determine the corresponding target adjustment value using the mapping relationship between the adjustment parameter and the adjustment value.

[0193] Exemplarily, in some embodiments, the mapping relationship between the adjustment parameters and the adjustment values ​​may be as shown in Table 1, wherein the mapping relationship between the adjustment parameters and the adjustment values ​​may include a corresponding relationship between the adjustment parameters and the adjustment values ​​corresponding to the same processor.

[0194] Further, in an embodiment of the present application, in an embodiment of the present application, the target adjustment value may include a target adjustment power value and a target adjustment voltage value.

[0195] It is understandable that, in the embodiment of the present application, DVFS can adjust the voltage of the processor while adjusting the power of the processor, wherein there may be no dependency between the voltage adjustment and the power adjustment.

[0196] Correspondingly, in the embodiment of the present application, the mapping relationship between the adjustment parameter and the adjustment value may also include a corresponding relationship between the adjustment parameter and a specific adjustment power value and an adjustment voltage value.

[0197] Accordingly, in an embodiment of the present application, after determining the corresponding target adjustment parameter based on the adjustment signal, the DVFS module may use a mapping relationship between the adjustment parameter and the adjustment value to determine the corresponding target adjustment power value and target adjustment voltage value.

[0198] Exemplarily, in some embodiments, the mapping relationship between the adjustment parameters and the adjustment values ​​may be as shown in Table 2, wherein the mapping relationship between the adjustment parameters and the adjustment values ​​may include a correspondence between the adjustment parameters and the adjustment power value and the adjustment voltage value corresponding to the same processor.

[0199] Further, in an embodiment of the present application, after determining the corresponding target adjustment power value and target adjustment voltage value using the mapping relationship between the adjustment parameter and the adjustment value, the DVFS module can be used to adjust the frequency of the processor according to the target adjustment power value; it can also be used to adjust the voltage of the processor according to the target adjustment voltage value.

[0200] For example, in some embodiments, Figure 6As shown, when frequency adjustment is performed based on a frequency adjustment system including a processor, a linear controller, and a DVFS module, for the actual usage rate of the processor input to the linear controller, the linear controller can determine the usage rate error in combination with the preset usage rate corresponding to the processor, and output a corresponding adjustment signal based on the usage rate error, and the DVFS module can adjust the power of the processor in response to the adjustment signal.

[0201] For example, in some embodiments, Figure 7 As shown, when frequency adjustment is performed based on a frequency adjustment system including a sensor, a processor, a linear controller, and a DVFS module, after the sensor sends the collected actual usage rate of the processor to the linear controller, the linear controller can determine the usage rate error in combination with the preset usage rate corresponding to the processor, and output a corresponding adjustment signal based on the usage rate error, and the DVFS module can adjust the power of the processor in response to the adjustment signal.

[0202] Furthermore, in an embodiment of the present application, after the DVFS module completes the frequency adjustment of the processor based on the adjustment signal, the frequency adjustment system can continue to monitor the actual utilization rate of the processor in real time to ensure that the actual utilization rate of the processor remains near the target value (preset utilization rate), thereby being able to continue to respond accurately to load changes.

[0203] Further, in an embodiment of the present application, the frequency adjustment system may include at least one processor.

[0204] Exemplarily, in some embodiments, the frequency adjustment system may include a CPU cluster consisting of multiple CPUs, wherein the CPU cluster refers to a group of host nodes with multiple CPUs, and these nodes can jointly use these CPUs to complete computing tasks.

[0205] Furthermore, in an embodiment of the present application, the frequency adjustment system may also include at least one linear controller corresponding to at least one processor.

[0206] That is to say, in the embodiment of the present application, the processors and the linear controllers are in one-to-one correspondence, wherein at least one processor includes a first processor, and at least one linear controller includes a linear controller corresponding to the first processor.

[0207] For example, in some embodiments, Figure 8 As shown, it is assumed that the frequency adjustment system includes five CPUs, and corresponding to the five CPUs, the frequency adjustment system also includes five linear controllers, wherein CPU1 is the first processor, and correspondingly, linear controller 1 is the first linear controller.

[0208] For example, in some embodiments, Fig.12The following is a schematic diagram of the implementation process of the frequency adjustment method proposed in the embodiment of the present application. Figure 2 ,like Fig.12 As shown, the frequency adjustment method may include the following steps:

[0209] Step 201: After receiving the actual usage rate of the first processor, the first linear controller generates an adjustment signal corresponding to the first processor based on the actual usage rate of the first processor and a preset usage rate corresponding to the first processor.

[0210] In an embodiment of the present application, after receiving the actual usage rate of the first processor, the first linear controller generates an adjustment signal corresponding to the first processor based on the actual usage rate of the first processor and a preset usage rate corresponding to the first processor.

[0211] In an embodiment of the present application, after receiving the actual usage rate of the first processor, the first linear controller can be used to generate an adjustment signal corresponding to the first processor based on the actual usage rate of the first processor and a preset usage rate corresponding to the first processor.

[0212] In the embodiment of the present application, the actual usage rate of the first processor is obtained by real-time monitoring of the usage rate of the first processor, which can represent the real-time usage of the first processor.

[0213] In an embodiment of the present application, the preset usage rate corresponding to the first processor may be pre-set and stored, wherein different processors may correspond to different preset usage rates, or the same preset usage rate may be used.

[0214] For example, in some embodiments, assuming that the frequency adjustment system includes a processor cluster consisting of multiple processors, a unified preset usage rate can be preset to control the frequency of the processor cluster. Alternatively, different preset usage rates can be preset for different processors to control the frequency of each processor in the processor cluster respectively.

[0215] Further, in an embodiment of the present application, after receiving the actual usage rate of the first processor, the first linear controller can determine the usage error corresponding to the first processor based on the actual usage rate of the first processor and the preset usage rate corresponding to the first processor; and then can generate an adjustment signal corresponding to the first processor based on the usage error corresponding to the first processor.

[0216] That is to say, in an embodiment of the present application, for the one-to-one corresponding processor and linear controller included in the frequency adjustment system, for example, the first processor and the first linear controller, the first linear controller can be used to generate an adjustment signal corresponding to the first processor based on the actual usage rate corresponding to the first processor, thereby adjusting and controlling the frequency of the first processor through the adjustment signal corresponding to the first processor.

[0217] Step 202: The first linear controller sends an adjustment signal corresponding to the first processor to the DVFS module.

[0218] In an embodiment of the present application, after generating an adjustment signal corresponding to the first processor according to the utilization error corresponding to the first processor, the linear controller may output the adjustment signal corresponding to the first processor to the DVFS module so that the DVFS module performs frequency adjustment based on the adjustment signal corresponding to the first processor.

[0219] Step 203: The DVFS module adjusts the frequency of the first processor based on the adjustment signal corresponding to the first processor.

[0220] In an embodiment of the present application, the DVFS module may be configured to adjust the frequency of the first processor based on an adjustment signal corresponding to the first processor.

[0221] In the embodiment of the present application, multiple processors in the frequency adjustment system may respectively correspond to multiple DVFS modules, or the same DVFS module may be used to control the frequency of the processors.

[0222] Exemplarily, in some embodiments, it is assumed that the frequency adjustment system includes five CPUs. Corresponding to the five CPUs, the frequency adjustment system further includes five DVFS modules, and the five DVFS modules are respectively integrated into the five CPUs.

[0223] For example, in some embodiments, assuming that the frequency adjustment system includes five CPUs, corresponding to the five CPUs, the frequency adjustment system uses the same DVFS module to respond to adjustment signals transmitted by different linear controllers, and the DVFS module is configured independently from the processors.

[0224] For example, in some embodiments, Fig. 9 As shown, when frequency adjustment is performed based on a frequency adjustment system including multiple processors, multiple linear controllers corresponding to the multiple processors, and a DVFS module, for the actual usage rate of the processor input to the linear controller, the linear controller can determine the usage rate error in combination with the preset usage rate corresponding to the processor, and output a corresponding adjustment signal based on the usage rate error, and the DVFS module can adjust the power of the processor in response to the adjustment signal.

[0225] For example, in some embodiments, Fig.10 As shown, when frequency adjustment is performed based on a frequency adjustment system including multiple processors, multiple linear controllers corresponding to the multiple processors, and a DVFS module, after the sensor sends the collected actual usage rate of the processor to the linear controller, the linear controller can determine the usage rate error in combination with the preset usage rate corresponding to the processor, and output a corresponding adjustment signal based on the usage rate error, and the DVFS module can adjust the power of the processor in response to the adjustment signal.

[0226] In summary, the frequency adjustment method proposed in the embodiment of the present application, on the one hand, is based on a clear utilization rate target value (preset utilization rate) pre-set for the processor, and dynamically adjusts the frequency of the processor through a linear controller to maintain the actual utilization rate of the processor near the target value (preset utilization rate), thereby achieving the best balance between performance and power consumption, extending battery life and reducing energy consumption. On the other hand, the actual utilization rate of the processor can be monitored in real time, and the fine adjustment function of the linear controller can be used to enable the processor to respond to load changes quickly and stably, thereby ensuring the stability and efficiency of task execution. On the third hand, the frequency adjustment system can realize frequency adjustment and control of any type of processor, which is not only applicable to CPU, but also can be extended to other key components such as GPU, with high scalability and versatility, thereby realizing all-round dynamic frequency management and power consumption optimization.

[0227] The embodiment of the present application proposes a frequency adjustment method, which is applied to a frequency adjustment system. The frequency adjustment system includes a processor, a linear controller, and a DVFS module. After receiving the actual usage rate of the processor, the linear controller generates an adjustment signal based on the actual usage rate and the preset usage rate corresponding to the processor; wherein the actual usage rate is obtained by real-time monitoring of the usage rate of the processor; the linear controller outputs an adjustment signal to the DVFS module; and the DVFS module adjusts the frequency of the processor based on the adjustment signal. That is, in the embodiment of the present application, the linear controller in the frequency adjustment system can adjust the frequency of the processor in real time based on the actual usage rate of the processor obtained by real-time monitoring, combined with the preset usage rate corresponding to the processor, wherein the linear processor has a fine adjustment function, so the frequency of the processor can be accurately adjusted through the linear processor. That is to say, the frequency adjustment system and method proposed in the embodiment of the present application can adjust the frequency of the processor in a timely and accurate manner, and can then respond quickly and stably to changes in the load of the processor.

[0228] Based on the above embodiments, another embodiment of the present application provides a frequency adjustment system and a frequency adjustment method, wherein the frequency adjustment system may include a processor, a linear controller, and a DVFS module. The processor may be a processor of any type or any function, for example, the processor includes but is not limited to a central processing unit CPU, a graphics processing unit GPU, etc., and the linear controller may include but is not limited to any type such as a PID controller, a P controller, an I controller, a D controller, and a PI controller.

[0229] It is understandable that in the embodiments of the present application, a PID controller and a CPU cluster (multiple CPUs) are used as examples for illustrative description, but the specific types of linear controllers and processors are not limited.

[0230] Furthermore, in an embodiment of the present application, a target utilization value (preset utilization), such as 70%, may be set for the CPU cluster to balance performance and power consumption.

[0231] That is to say, in the embodiment of the present application, different CPUs in the frequency adjustment system can be set with the same preset usage rate.

[0232] Further, in the embodiments of the present application, a high-precision sensor or professional monitoring software may be used to sample the CPU usage in real time, wherein the sampling frequency should be high enough, such as once per second or more frequently, to ensure the real-time and accuracy of the data.

[0233] For example, in some embodiments, at the end of each sampling period, the average usage rate in the period may be calculated as the actual usage rate of the CPU.

[0234] Furthermore, in an embodiment of the present application, the actual CPU usage rate (or the calculated average usage rate) acquired in real time is used as an input value and passed to the PID controller.

[0235] Exemplarily, in some embodiments, the target usage rate value is set internally in the PID controller as 70% for calculating the error between the actual usage rate and the target usage rate.

[0236] Further, in an embodiment of the present application, the PID controller calculates the error between the actual usage rate and the target usage rate, for example, error=actual usage rate-target usage rate.

[0237] Then, based on the error value, the PID controller generates an adjustment signal:

[0238] If the error is positive, indicating that the actual usage rate is higher than the target value (preset usage rate), the PID controller generates a signal (first adjustment signal) to increase the CPU frequency.

[0239] If the error is negative, indicating that the actual usage rate is lower than the target value, the PID controller generates a signal (a second adjustment signal) to reduce the CPU frequency.

[0240] Furthermore, in an embodiment of the present application, the PID controller adjusts the output signal through three parameters: proportion (P), integration (I) and differentiation (D), to ensure that the adjustment process is stable and accurate.

[0241] Further, in an embodiment of the present application, the adjustment signal is transmitted to the DVFS (DVFS module), and the DVFS dynamically adjusts the frequency and voltage of the CPU according to the adjustment signal, wherein the adjustment range of the frequency and voltage is set according to the CPU model and system requirements.

[0242] Furthermore, in an embodiment of the present application, after the frequency adjustment is completed, the frequency adjustment system continues to monitor the CPU usage in real time and repeats the above steps to ensure that the CPU usage is maintained near the target value.

[0243] It is understandable that in the embodiments of the present application, a target utilization rate (preset utilization rate) can also be set for each key component, and the same PID controller and DVFS mechanism can be used to dynamically adjust its frequency and voltage to achieve all-round dynamic power consumption management.

[0244] In summary, the frequency adjustment system and method proposed in the embodiments of the present application can set a clear utilization target value for the CPU, and realize dynamic adjustment through the PID controller to maintain the target utilization rate; the fine adjustment function of the PID controller can be used to enable the system to respond quickly and stably to load changes and maintain the target utilization rate; the frequency adjustment method can be applied not only to the CPU, but also to other key components such as the GPU, and has high scalability and versatility; through high-frequency sampling and real-time calculation, high-precision utilization monitoring and frequency adjustment can be achieved to ensure that the system runs in the best state.

[0245] It can be seen that the frequency adjustment system and method proposed in the embodiment of the present application achieves the best balance between performance and power consumption, extends battery life and reduces energy consumption by maintaining the CPU usage rate near the target value. Real-time sampling and PID control enable the system to respond quickly to load changes and ensure the stability and efficiency of task execution. Avoid energy waste caused by excessive frequency, improve the energy utilization of the system, and extend the service life of the equipment. It is not only applicable to the CPU, but can also be extended to other key components such as the GPU to achieve all-round dynamic frequency management and power consumption optimization.

[0246] Furthermore, in the embodiments of the present application, the preset usage rate is not limited to the target value of 70%, and multiple target usage rate values ​​can be set according to different application scenarios to achieve more precise control.

[0247] Furthermore, in the embodiments of the present application, the parameters of the PID controller can be intelligently adjusted through a machine learning algorithm to further optimize the control effect.

[0248] Furthermore, in an embodiment of the present application, in a multi-core CPU system, different target usage rates are set for different cores to achieve more sophisticated load balancing and power consumption management.

[0249] The embodiment of the present application provides a frequency adjustment system and method, wherein the linear controller in the frequency adjustment system can adjust the frequency of the processor in real time based on the actual usage rate of the processor obtained by real-time monitoring and in combination with the preset usage rate corresponding to the processor, wherein the linear processor has a fine adjustment function, so the frequency of the processor can be accurately adjusted by the linear processor. In other words, the frequency adjustment system and method proposed in the embodiment of the present application can adjust the frequency of the processor in a timely and accurate manner, and can then respond quickly and stably to the load changes of the processor.

[0250] Based on the above embodiment, in another embodiment of the present application, Fig.13 This is a schematic diagram of the structure of the computer device proposed in the embodiment of the present application, such as Fig.13 As shown, the computer device 110 proposed in the embodiment of the present application may include a frequency adjustment system 1101 and a memory 1102 , wherein the frequency adjustment system 1101 includes a processor 11011 , a linear controller 11012 , and a DVFS module 11013 .

[0251] In an embodiment of the present application, the processor 11011 may be at least one of an Application Specific Integrated Circuit (ASIC), a Digital Signal Processor (DSP), a Digital Signal Processing Device (DSPD), a Programmable Logic Device (PLD), a Field Programmable Gate Array (FPGA), a Central Processing Unit (CPU), a controller, a microcontroller, and a microprocessor. It is understandable that for different devices, the electronic device used to implement the above-mentioned processor function may also be other, and the embodiment of the present application is not specifically limited. The computer device 110 may also include a memory 1102, which may be connected to the frequency adjustment system 1101, wherein the memory 1202 is used to store executable program code, the program code includes computer operation instructions, and the memory 1202 may include a high-speed RAM memory, and may also include a non-volatile memory, for example, at least two disk memories.

[0252] In practical applications, the memory 1102 may be a volatile memory, such as a random access memory (RAM); or a non-volatile memory, such as a read-only memory (ROM), a flash memory, a hard disk drive (HDD) or a solid-state drive (SSD); or a combination of the above types of memories, and provide instructions and data to the frequency adjustment system 1101.

[0253] Furthermore, in the embodiment of the present application, the frequency adjustment system 1101 may implement the following processing:

[0254] After receiving the actual usage rate of the processor, the linear controller generates an adjustment signal based on the actual usage rate and a preset usage rate corresponding to the processor; wherein the actual usage rate is obtained by real-time monitoring of the usage rate of the processor;

[0255] The linear controller outputs the adjustment signal to the DVFS module;

[0256] The DVFS module adjusts the frequency of the processor based on the adjustment signal.

[0257] In addition, each functional module in this embodiment can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The above integrated unit can be implemented in the form of hardware or software functional modules.

[0258] If the integrated unit is implemented in the form of a software function module and is not sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this embodiment is essentially or the part that contributes to the prior art or the whole or part of the technical solution can be embodied in the form of a software product. The computer software product is stored in a storage medium, including several instructions for a computer device (which can be a personal computer, server, or network device, etc.) or a processor to perform all or part of the steps of the method of this embodiment. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM), random access memory (RAM), disk or optical disk, etc., various media that can store program codes.

[0259] An embodiment of the present application provides a computer-readable storage medium having a program stored thereon, and when the program is executed by a processor, the frequency adjustment method as described above is implemented.

[0260] Specifically, a program instruction corresponding to a frequency adjustment method in this embodiment can be stored in a storage medium such as a CD, a hard disk, a USB flash drive, etc. When the program instruction corresponding to a frequency adjustment method in the storage medium is read or executed by an electronic device, the following steps are included:

[0261] After receiving the actual usage rate of the processor, the linear controller generates an adjustment signal based on the actual usage rate and a preset usage rate corresponding to the processor; wherein the actual usage rate is obtained by real-time monitoring of the usage rate of the processor;

[0262] The linear controller outputs an adjustment signal to the DVFS module;

[0263] The DVFS module adjusts the frequency of the processor based on the adjustment signal.

[0264] The embodiment of the present application also provides a computer program product.

[0265] In some embodiments, the computer program product may include a computer program or instructions.

[0266] In some embodiments, the computer program product can be applied to the computer device in the embodiments of the present application, and the computer program instructions enable the computer to execute the corresponding processes implemented by the computer device in the various methods of the embodiments of the present application. For the sake of brevity, they will not be repeated here.

[0267] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems, or computer program products. Therefore, the present application may adopt the form of hardware embodiments, software embodiments, or embodiments in combination with software and hardware. Moreover, the present application may adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage and optical storage, etc.) that contain computer-usable program code.

[0268] The present application is described with reference to implementation flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the process in the flowchart. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0269] These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce a manufactured product including an instruction device, which is implemented in the implementation flow diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0270] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operation steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for executing the steps in the flowchart. Figure 1 A process or multiple processes and / or boxes Figure 1 A step that specifies a function in one or more boxes.

[0271] The above description is only a preferred embodiment of the present application and is not intended to limit the protection scope of the present application.

Claims

1. A frequency adjustment system, characterized in that: The frequency adjustment system includes a processor, a linear controller, and a DVFS module, wherein: The linear controller is used to generate an adjustment signal based on the actual usage rate and a preset usage rate corresponding to the processor after receiving the actual usage rate of the processor, and output the adjustment signal to the DVFS module; wherein the actual usage rate is obtained by real-time monitoring of the usage rate of the processor; The DVFS module is used to adjust the frequency of the processor based on the adjustment signal.

2. The frequency adjustment system according to claim 1, characterized in that: The linear controller is further used to determine a usage rate error according to the actual usage rate and a preset usage rate corresponding to the processor; and to generate the adjustment signal according to the usage rate error.

3. The frequency adjustment system according to claim 2, characterized in that: The linear controller is further configured to generate a first adjustment signal when the usage rate error indicates that the actual usage rate is greater than the preset usage rate; wherein the first adjustment signal is used to indicate an increase in frequency; The linear controller is further configured to generate a second adjustment signal when the usage rate error indicates that the actual usage rate is less than the preset usage rate; wherein the second adjustment signal is used to indicate a reduction in frequency.

4. The frequency adjustment system according to claim 1, characterized in that: The DVFS module is further configured to determine a target adjustment parameter based on the adjustment signal; and determine a target adjustment value corresponding to the target adjustment parameter based on a mapping relationship between the adjustment parameter and the adjustment value; wherein the target adjustment value includes a target adjustment power value and a target adjustment voltage value; The DVFS module is further configured to adjust the frequency of the processor according to the target adjustment power value; The DVFS module is further configured to adjust the voltage of the processor according to the target adjustment voltage value.

5. The frequency adjustment system according to any one of claims 1 to 4, characterized in that: The frequency adjustment system includes at least one processor, and the frequency adjustment system includes at least one linear controller corresponding to the at least one processor, wherein the at least one processor includes a first processor, and the at least one linear controller includes a first linear controller corresponding to the first processor. The first linear controller is configured to, after receiving an actual usage rate of the first processor, generate an adjustment signal corresponding to the first processor based on the actual usage rate of the first processor and a preset usage rate corresponding to the first processor, and send the adjustment signal corresponding to the first processor to the DVFS module; wherein the actual usage rate of the first processor is obtained by real-time monitoring of the usage rate of the first processor; The DVFS module is used to adjust the frequency of the first processor based on the adjustment signal corresponding to the first processor.

6. The frequency adjustment system according to any one of claims 1 to 4, characterized in that: The frequency adjustment system further includes a sensor, The sensor is used to monitor the usage rate of the processor in real time, obtain the actual usage rate of the processor, and send the actual usage rate of the processor to the linear controller.

7. A frequency adjustment method, characterized in that: The method is applied to a frequency adjustment system, the frequency adjustment system includes a processor, a linear controller, and a DVFS module, and the method includes: After receiving the actual usage rate of the processor, the linear controller generates an adjustment signal based on the actual usage rate and a preset usage rate corresponding to the processor; wherein the actual usage rate is obtained by real-time monitoring of the usage rate of the processor; The linear controller outputs the adjustment signal to the DVFS module; The DVFS module adjusts the frequency of the processor based on the adjustment signal.

8. The method according to claim 7, characterized in that The linear controller generates an adjustment signal based on the actual usage rate and a preset usage rate corresponding to the processor, including: The linear controller determines a usage rate error according to the actual usage rate and a preset usage rate corresponding to the processor; The linear controller generates the adjustment signal according to the usage error.

9. The method according to claim 8, characterized in that The linear controller generates the adjustment signal according to the usage rate error, comprising: When the usage rate error indicates that the actual usage rate is greater than the preset usage rate, the linear controller generates a first adjustment signal; wherein the first adjustment signal is used to indicate an increase in frequency; When the usage rate error indicates that the actual usage rate is less than the preset usage rate, the linear controller generates a second adjustment signal; wherein the second adjustment signal is used to instruct to reduce the frequency.

10. The method according to claim 7, characterized in that The DVFS module adjusts the frequency of the processor based on the adjustment signal, including: The DVFS module determines a target adjustment parameter based on the adjustment signal; The DVFS module determines the target adjustment value corresponding to the target adjustment parameter based on the mapping relationship between the adjustment parameter and the adjustment value; wherein the target adjustment value includes a target adjustment power value and a target adjustment voltage value; The DVFS module adjusts the frequency of the processor according to the target adjustment power value; The target adjustment value also includes a target adjustment voltage value, and the method further includes: The DVFS module adjusts the voltage of the processor according to the target adjustment voltage value.

11. The method according to any one of claims 7 to 10, characterized in that: The frequency adjustment system includes at least one processor, and the frequency adjustment system includes at least one linear controller corresponding to the at least one processor, wherein the at least one processor includes a first processor, and the at least one linear controller includes a first linear controller corresponding to the first processor, and the method further includes: After receiving the actual usage rate of the first processor, the first linear controller generates an adjustment signal corresponding to the first processor based on the actual usage rate of the first processor and a preset usage rate corresponding to the first processor; wherein the actual usage rate of the first processor is obtained by real-time monitoring of the usage rate of the first processor; The first linear controller sends an adjustment signal corresponding to the first processor to the DVFS module; The DVFS module adjusts the frequency of the first processor based on an adjustment signal corresponding to the first processor.

12. The method according to any one of claims 7 to 10, characterized in that: The frequency adjustment system further includes a sensor, The sensor monitors the usage rate of the processor in real time, obtains the actual usage rate of the processor, and sends the actual usage rate of the processor to the linear controller.

13. A computer device, characterized in that: The computer device includes a frequency adjustment system and a memory storing executable instructions of the frequency adjustment system. The frequency adjustment system includes a processor, a linear controller, and a DVFS module. When the instructions are executed by the frequency adjustment system, the method described in any one of claims 7 to 12 is implemented.

14. A computer-readable storage medium having a program stored thereon, characterized in that: When the program is executed by a processor, the method described in any one of claims 7 to 12 is implemented.

Images