Frequency multiplier device based on clutter cancellation and implementation method thereof

Abstract

The invention provides a clutter suppression frequency multiplier and an implementation method thereof. Specifically, on one hand, the invention provides a frequency multiplier device based on fundamental wave and third harmonic cancellation; on the other hand, the invention further provides a clutter suppression method in the circuit, low clutter level can be achieved while frequency band extension is completed, and technical conditions are provided for high-performance radar broadband LFM signal generation. The frequency multiplier based on clutter cancellation is constructed, and a fundamental wave and third harmonic suppression formula is given, so that the high-performance frequency multiplier can be realized. The method has high flexibility, practicability and universality.

Description

Technical Field

[0001] The present invention belongs to the field of microwave technology, and specifically relates to a frequency multiplier device based on noise cancellation and an implementation method thereof Background Art

[0002] How to generate high-quality broadband linear frequency modulation signals is a research topic for scientific researchers. As a typical representative of broadband signals, broadband linear frequency modulation signals have a very wide range of applications. There are also many ways to generate broadband linear frequency modulation signals, each with its own advantages and disadvantages. It is necessary to select the most suitable generation method according to different usage scenarios and project backgrounds.

[0003] In order to generate a wide bandwidth signal, a DDS or AWG is often used to generate a relatively low frequency baseband linear frequency modulation signal, and then a frequency multiplier is used to generate a larger bandwidth LFM signal. At this time, if the baseband signal is relatively large relative to the bandwidth, there are many clutters in the frequency multiplication product, among which the fundamental wave and the third harmonic are the strongest, which seriously affects the quality of subsequent processing. These exist within the signal band and cannot be filtered out by a filter. Therefore, a frequency multiplication solution is urgently needed to achieve high clutter suppression. Summary of the invention

[0004] To this end, the present invention proposes a frequency multiplier for suppressing clutter and an implementation method thereof. On the one hand, a frequency multiplier device based on fundamental wave and third harmonic cancellation is provided; on the other hand, an implementation method for suppressing clutter is also provided, which can achieve a low clutter level while completing frequency band expansion, thereby providing technical conditions for high-performance radar broadband LFM signal generation.

[0005] The invention discloses a frequency multiplier device based on noise cancellation, comprising 1-power divider-180°, 2-frequency doubler 1, 3-frequency doubler 2 and 4-power combiner.

[0006] The output end ② of the 1-power divider-180° is connected to the input end ① of the 2-doubler 1.

[0007] The output end ③ of the 1-power divider-180° is connected to the input end ① of the 3-doubler 2.

[0008] The output terminal ② of the 2-doubler 1 is connected to the input terminal ② of the 4-combiner.

[0009] The output terminal ② of the 3-doubler 2 is connected to the input terminal ③ of the 4-combiner.

[0010] The output port of the 4-power combiner is ①.

[0011] The 1-power divider -180° divides the input signal into two, port ② directly outputs, and port ③ outputs the signal after 180° phase shift; the 2-doubler 1 realizes the doubling of the input signal; the 3-doubler 2 realizes the doubling of the input signal; the 4-power combiner combines the signal power of input port ② and input port ③ and sends it to output port ①.

[0012] The clutter suppression method of the present invention specifically comprises the following steps:

[0013] Step 1: The input signal of 1-power divider-180° is: Output port ② signal is: Output port ③ signal is:

[0014] Step 2: The signal at the output terminal ② of the 2-doubler 1 is:

[0015]

[0016] Step 3: The signal at the output terminal ② of the 3-doubler 2 is:

[0017]

[0018] Step 4: The signal at the output port ① of the 4-power combiner is:

[0019]

[0020] Then the signal at the output port ① of the 4-power combiner is approximately:

[0021]

[0022] Step 5: When the input is a linear frequency modulation signal When , the signal of the combiner output port ① is:

[0023]

[0024] Step 6: The fundamental wave suppression degree is: The third-order suppression is:

[0025]

[0026] The beneficial effects of the present invention are

[0027] 1. It achieves high suppression of fundamental wave and third harmonic, and has great application prospects in broadband radar signal generation.

[0028] 2. The frequency multiplier based on noise cancellation provides a feasible solution for the development of high-performance frequency multipliers, which has strong flexibility, practicality and versatility. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 It is a schematic diagram of the working principle of the device of the present invention. DETAILED DESCRIPTION

[0030] The technical solutions in the embodiments of the present invention are described clearly and completely below. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0031] like Figure 1 As shown, a frequency multiplier device based on noise cancellation of the present invention includes: 1-power divider-180° (ZFSCJ-2-4), 2-doubler 1 (HE011), 3-doubler 2 (HE011), 4-power combiner (ZFSC-2-2).

[0032] The clutter suppression method of the frequency multiplier includes the following steps:

[0033] Step 1: The input signal of 1-power divider-180° is: The output port ② signal is: The output port ③ signal is:

[0034] Step 2: The signal at the output terminal ② of the 2-doubler 1 is:

[0035]

[0036] Step 3: The signal at the output terminal ② of the 3-doubler 2 is:

[0037]

[0038] Step 4: The signal at the output port ① of the 4-power combiner is:

[0039]

[0040] Then the signal at the output port ① of the 4-power combiner is approximately:

[0041]

[0042] Step 5: When the input is a linear frequency modulation signal When , the signal at the output port ① of the 4-power combiner is:

[0043]

[0044] Step 6: The fundamental wave suppression degree is:

[0045] The third-order suppression is:

[0046] When ΔA 31 =0.5dB, When , the fundamental wave suppression is about 14.6dB.

[0047] When ΔA 33 =0.8dB, When the third-order suppression is about 11.5dB.

[0048] The present invention is not limited to the above specific implementations, and the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made to the above implementations based on the technical essence of the present invention shall be included in the protection scope of the present invention.

Claims

1. A frequency multiplier device based on noise cancellation, characterized in that: It includes 1-power divider-180°, 2-frequency doubler 1, 3-frequency doubler 2 and 4-power combiner; The output end ② of the 1-power divider-180° is connected to the input end ① of the 2-frequency doubler 1; The output terminal ③ of the 1-power divider-180° is connected to the input terminal ① of the 3-frequency doubler 2; The output terminal ② of the 2-doubler 1 is connected to the input terminal ② of the 4-power combiner; The output terminal ② of the 3-doubler 2 is connected to the input terminal ③ of the 4-power combiner; The output port of the 4-power combiner is ①.

2. A frequency multiplier device based on noise cancellation according to claim 1, characterized in that: The 1-power divider -180° divides the input signal into two, port ② directly outputs, and port ③ outputs the signal after 180° phase shift; the 2-doubler 1 realizes the doubling of the input signal; the 3-doubler 2 realizes the doubling of the input signal; the 4-power combiner combines the signal power of input port ② and input port ③ and sends it to output port ①.

3. A method for suppressing clutter in a frequency multiplier device based on clutter cancellation according to claim 1, characterized in that: The specific steps include: Step 1: The input signal of 1-power divider-180° is: Output port ② signal is: Output port ③ signal is: Step 2: The signal at the output terminal ② of the 2-doubler 1 is: Step 3: The signal at the output terminal ② of the 3-doubler 2 is: Step 4: The signal at the output port ① of the 4-power combiner is: Then the signal at the output port ① of the 4-power combiner is approximately: Step 5: When the input is a linear frequency modulation signal When , the signal of the combiner output port ① is: Step 6: The fundamental wave suppression degree is: The third-order suppression is:

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