A segmented current limiting circuit for LoadSwitch

Abstract

A segmented current limiting circuit applied to Load_Switch includes a current source, a current mirror circuit, a current sampling circuit, a segmented comparison circuit, a logic function module, and a protection circuit; the current source, the current mirror circuit, the current sampling circuit, the segmented comparison circuit, the delay circuit, the logic function module, and the protection circuit are connected via wires. The present invention introduces segmented current limiting into the circuit system of Load Switch, and implements segmented current limiting according to the characteristics of the switch tube. The overcurrent response time of the large current segment is shorter, and the overcurrent response time of the small current segment is longer, so that the current limiting performance of the circuit is brought into play to the best, and the circuit load driving performance can be improved while protecting the switch tube, and it is suitable for more circuit driving application scenarios; it overcomes many problems existing in the existing Load Switch circuit. In summary, the present invention has good application prospects.

Description

Technical Field

[0001] The invention relates to the technical field of circuits, and in particular to a segmented current limiting circuit applied to a Load_Switch. Background Art

[0002] The basic principle of the load switch circuit is to turn on and off the power supply through the control pin. The load switch can be built using discrete devices or integrated ICs.

[0003] In the application of Load Switch circuit, in order to avoid the switch tube from burning out due to high current, current limiting design is required. Usually, the current is set within a safe value. However, this design will limit certain application scenarios. For example, during the startup of the Load Switch under heavy load, the current will be large. If the current limiting design is too small, it may cause the current limiting protection to be triggered in this case and fail to start normally. On the contrary, if the current limiting design is too large, the switch tube may burn out. According to the characteristics of the switch tube, it can be known that the switch tube has different tolerance times for different currents. A single current limiting design is obviously not the optimal solution and cannot maximize the performance of the switch tube. Therefore, there is still a lot of room for improvement in the existing Load Switch circuit. Summary of the invention

[0004] In order to overcome the drawbacks of the existing Load Switch circuit due to technical limitations as described in the background technology, the present invention provides a segmented current limiting circuit applied to Load_Switch, which realizes segmented current limiting according to the characteristics of the switch tube under the joint action of relevant modules, with a shorter overcurrent response time in the large current segment and a longer overcurrent response time in the small current segment, and can maximize the circuit current limiting performance and ensure stable and reliable operation of the load end.

[0005] The technical solution adopted by the present invention to solve its technical problem is:

[0006] A segmented current limiting circuit applied to Load_Switch, characterized in that it includes a current source, a current mirror circuit, a current sampling circuit, a segmented comparison circuit, a logic function module, and a protection circuit; the current mirror circuit has two paths, the segmented comparison circuit is equipped with three delay circuits, and the current source, the current mirror circuit, the current sampling circuit, the segmented comparison circuit, the delay circuit, the logic function module, and the protection circuit are connected via wires; the current source also has a boost circuit module, which provides the voltage required for the switch tube to turn on; the current source is used to provide a reference current, and the current mirror circuit is used to copy the reference current to other circuit branches in a certain proportion; the current sampling circuit samples the load current; the segmented comparison circuit is used to compare the voltage in the circuit; the logic function module is used for logical judgment; and the protection circuit is used to turn off the switch tube when limiting the current.

[0007] Furthermore, the first current mirror circuit includes four MOS tubes and a resistor, and the four MOS tubes and the resistor are connected via wires. The second current mirror circuit includes two MOS tubes, and the two MOS tubes are connected via wires.

[0008] Furthermore, the current sampling circuit includes two MOS tubes and a comparator, and the two MOS tubes and the comparator are connected via wires.

[0009] Furthermore, the segmented comparison circuit includes three resistors and three comparators, and the three resistors and the three comparators are connected via wires.

[0010] Furthermore, the logic function module includes four logic gate module circuits, and the four logic gate module circuits are connected via wires.

[0011] Furthermore, the protection circuit is composed of a MOS tube.

[0012] Compared with the prior art, the invention has the following beneficial effects: the invention introduces segmented current limiting into the circuit system of the Load Switch, implements segmented current limiting according to the characteristics of the switch tube, and has a shorter overcurrent response time in the large current segment and a longer overcurrent response time in the small current segment, which maximizes the circuit current limiting performance, can improve the circuit load driving performance while protecting the switch tube, and is suitable for more circuit driving application scenarios; it overcomes many problems existing in the existing Load Switch circuit. In summary, the invention has good application prospects. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] The present invention will be further described below in conjunction with the accompanying drawings and embodiments.

[0014] Figure 1 This is the Load Switch framework diagram of the present invention.

[0015] Figure 2 This is a circuit diagram of the present invention. DETAILED DESCRIPTION

[0016] Figure 1 , 2 As shown, a segmented current limiting circuit applied to Load_Switch includes a current source, a current mirror circuit, a current sampling circuit, a segmented comparison circuit, a logic function module, and a protection circuit; the current mirror circuit has two paths, and the segmented comparison circuit is equipped with three delay circuits, and the current source, the current mirror circuit, the current sampling circuit, the segmented comparison circuit, the delay circuit, the logic function module, and the protection circuit are connected through wires; the current source also has a boost circuit module, and the boost circuit module provides the voltage required for the switch tube to turn on; the current source is used to provide a reference current, and the current mirror circuit is used to copy the reference current to other circuit branches in a certain proportion; the current sampling circuit samples the load current; the segmented comparison circuit is used to compare the voltage in the circuit; the logic function module is used for logic judgment; and the protection circuit is used to turn off the switch tube when limiting the current.

[0017] Figure 1 , 2 As shown in the figure, NM1 is the Load Switch. Charge Pump is a boost circuit, which mainly provides the voltage required for the switch to turn on. Current Source is a reference current source, and the current of the current source is I0. MOS tubes NM5 and NM6 form a current mirror circuit, and the currents flowing through the MOS tubes are I2 and I3 respectively, and the size parameters satisfy the relationship Then I3=I2=I0; MOS tubes PM1 and PM2 form another current mirror circuit, the currents flowing through PM1 and PM2 are I3 and I4 respectively, and the size parameters satisfy the relationship Then I4=I3=I0; specifically, the current flowing through resistor R4 is I4, the resistance of resistor R4 is R4, the voltage difference of resistor R4 is I4*R4, that is, I0*R4, and the potential of point D is V ref =I0*R4. MOS tubes NM2, NM3, and comparator U1 form a current sampling circuit. Specifically, the function of comparator U1 and MOS tube NM3 is to clamp the source potential of MOS tube NM1 and the source potential of MOS tube NM3 to be equal. MOS tubes NM1 and NM2 form a mirror circuit. The currents flowing through NM1 and NM2 are I OUT , I1, and the size parameters of NM1 and NM2 satisfy the relationship Then there is I OUT =kI1.

[0018] Figure 1 , 2As shown, resistors R1, R2, R3 and comparators U2, U3, U4 constitute a segmented comparison circuit. Specifically, the resistance values ​​of resistors R1, R2, R3 are R1, R2, R3 respectively. When working, resistors R1, R2, R3 convert the sampled current into segmented voltage for comparison. The current flowing through resistors R1, R2, R3 is I1, and the potentials of A, B, and C are (R1+R2+R3)*I1, (R2+R3)*I1, and R3*I1 respectively; U2 is a comparator, which compares the potentials of points A and D. When the potential of point A is greater than the potential of point D, the output VOUT1 is high, that is, Indicates that the current flowing through the switch tube is greater than (defined as I limit2 ); delay1 is a delay circuit with a delay of t1; U3 is a comparator that compares the potentials of points B and D. When the potential of point B is greater than that of point D, the output VOUT2 is high, that is, Indicates that the current flowing through the switch tube is greater than (defined as I limit2 ); delay2 is a delay circuit with a delay of t2; U4 is a comparator that compares the potentials of points C and D. When the potential of point C is greater than that of point D, the output VOUT3 is high, that is, Indicates that the current flowing through the switch tube is greater than (defined as I limit3 ); delay3 is a delay circuit, and the delay is t3. In the logic function module, the logic gate module circuits U5, U6, and U7 are two-input AND logic, the logic gate module circuit U8 is three-input OR NOT logic, and the logic gate module circuit U9 is two-input AND NOT logic. The output is the current limiting signal OC, and the high level of OC indicates output overcurrent; according to the current carrying characteristics of the switch tube, select appropriate k, I0, R1, R2, R3, R4, t1, t2, and t3 to meet I limit1 <I limit2 <I limit3 and t1>t2>t3, the output current I OUT Greater than I limit1 When the time reaches t1, the current limiting is triggered and the output current I OUT Greater than I limit2 When the time reaches t2, the current limiting is triggered and the output current I OUT Greater than I limit3 When the time reaches t3, the current limiting is triggered. If any current limiting period exceeds the corresponding set time, OC will become a high level. MOS tube NM4 is a protection circuit. The operation of MOS tube NM4 is controlled by OC. When OC is a low level, MOS tube NM4 is turned off and the circuit works normally. When OC is a high level, MOS tube NM4 is turned on, and the VG signal is reduced to turn off the switch tube to prevent the switch tube from being in a high current state for a long time.

[0019] Figure 1 , 2 As shown above, the present invention introduces segmented current limiting into the circuit system of Load Switch, and implements segmented current limiting according to the characteristics of the switch tube. The overcurrent response time of the large current segment is shorter, and the overcurrent response time of the small current segment is longer, so that the circuit current limiting performance is brought into play to the best, and the circuit load driving performance can be improved while protecting the switch tube, which is suitable for more circuit driving application scenarios; it overcomes many problems existing in the existing Load Switch circuit.

[0020] The above shows and describes the basic principles and main features of the present invention and the advantages of the present invention. It is obvious to those skilled in the art that the present invention is limited to the details of the above exemplary embodiments, and the present invention can be implemented in other specific forms without departing from the spirit or basic characteristics of the present invention. Therefore, no matter from which point of view, the embodiments should be regarded as exemplary and non-restrictive. The scope of the present invention is defined by the appended claims rather than the above description, and it is intended that all changes falling within the meaning and scope of the equivalent elements of the claims are included in the present invention. Any figure mark in the claims should not be regarded as limiting the claim involved.

[0021] In addition, it should be understood that although the present specification is described according to implementation modes, not every implementation mode contains only one independent technical solution. This narrative method of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in the embodiments may also be appropriately combined to form other implementation modes that can be understood by those skilled in the art.

Claims

1. A segmented current limiting circuit applied to Load_Switch, characterized in that: It includes a current source, a current mirror circuit, a current sampling circuit, a segmented comparison circuit, a logic function module, and a protection circuit; the current mirror circuit has two paths, and the segmented comparison circuit is equipped with three delay circuits. The current source, the current mirror circuit, the current sampling circuit, the segmented comparison circuit, the delay circuit, the logic function module, and the protection circuit are connected through wires; the current source also has a boost circuit module, and the boost circuit module provides the voltage required for the switch tube to turn on; the current source is used to provide a reference current, and the current mirror circuit is used to copy the reference current to other circuit branches in a certain proportion; the current sampling circuit samples the load current; the segmented comparison circuit is used to compare the voltage in the circuit; the logic function module is used for logic judgment; the protection circuit is used to turn off the switch tube when limiting current; the first current mirror circuit includes four electrically connected MOS tubes NM5, NM6, PM1, PM2 and resistor R4, the drain and gate of the MOS tube NM5 are connected to the gate of the MOS tube NM6, and are connected to the current source, the source of the MOS tube NM5, the MOS tube The source of the MOS tube NM6 and one end of the resistor R4 are connected to the ground, the drain of the MOS tube NM6, the drain and the gate of the MOS tube PM1 are connected to the gate of the MOS tube PM2, the source of the MOS tube PM1 and the source of the MOS tube PM2 are connected to the power supply VDD, and the drain of the MOS tube PM2 is connected to the other end of the resistor R4; the second current mirror circuit includes two electrically connected MOS tubes NM1 and NM2, the gate of the MOS tube NM1 and the gate of the MOS tube NM2 are connected, the drain of the MOS tube NM1 and the drain of the MOS tube NM2 are connected to the signal input terminal VIN; the current sampling circuit includes two electrically connected MOS tubes NM2 and NM3 and a comparator U1, the source of the MOS tube NM2, the drain of the MOS tube NM3 and the non-inverting input terminal of the comparator U1 are connected, the gate of the MOS tube NM3 and the output terminal of the comparator U1 are connected, and the MOS The source of the MOS tube NM1, the inverting input terminal of the comparator U1 and the output signal terminal VOUT are connected; the segmented comparison circuit includes three electrically connected resistors R1, R2, R3 and three comparators U2, U3, U4, the source of the MOS tube NM3, the non-inverting input terminal of the comparator U2 are connected to one end of the resistor R1, the other end of the resistor R1, the non-inverting input terminal of the comparator U3 are connected to one end of the resistor R2, the other end of the resistor R2, the non-inverting input terminal of the comparator U4 are connected to one end of the resistor R3, the other end of the resistor R3 is connected to the ground, the inverting input terminal of the comparator U2, the drain of the MOS tube PM2 are connected to one end of the resistor R4, the inverting input terminal of the comparator U3 is connected to the reference voltage V ref Connect the inverting input of comparator U4 to the reference voltage V ref The protection circuit is a MOS tube NM4, the gate of the MOS tube NM4 is connected to the overcurrent signal OC, the drain of the MOS tube NM4 is connected to the gate of the MOS tube NM1, the gate of the MOS tube NM2, and the output of the boost circuit Charge Pump, and the source of the MOS tube NM4 is connected to the ground; the logic function module includes electrically connected AND logic gates U5, U6, U7, or NOT logic gate U8, NAND logic gate U9, delay logic modules delay1, delay2, delay3, the output end of the comparator U2, the input end of the delay logic module delay1, and one end of the AND logic gate U5 are connected, the output end of the delay logic module delay1 is connected to the other end of the AND logic gate U5, the output end of the comparator U3, the input end of the delay logic module delay2, and one end of the AND logic gate U6 are connected, the output end of the delay logic module delay2 is connected to the other end of the AND logic gate U6, the delay The output end of the AND logic module U4, the input end of the delay logic module delay3, and one input end of the AND logic gate U7 are connected, the output end of the delay logic module delay3 is connected to the other input end of the AND logic gate U7, the output end of the AND logic gate U5 is connected to an input end of the NOR logic gate U8, the output end of the AND logic gate U6 is connected to an input end of the NOR logic gate U8, the output end of the AND logic gate U7 is connected to an input end of the NOR logic gate U8, the output end of the NOR logic gate U8 is connected to the input end of the NAND logic gate U9, the other input end of the NAND logic gate U9 is connected to the signal end EN, and the output end of the NAND logic gate U9 is connected to the gate of the MOS tube NM4.

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