A pulse wireless ultra-wideband transmitter

Abstract

The present application relates to a kind of pulse wireless ultra-wideband transmitter chip, including sequentially connected narrow pulse generator, voltage-controlled ring oscillator, output driver, power amplifier and off-chip matching network, wherein the narrow pulse generator is used to generate narrow pulse according to receiving signal;The voltage-controlled ring oscillator is switch operating mode oscillator, for providing frequency calibration when activated, output narrow pulse oscillation signal;The output driver is used to realize the isolation between the voltage-controlled ring oscillator and power amplifier, and sharpens narrow pulse oscillation signal;The power amplifier is used to amplify narrow pulse oscillation signal;The off-chip matching network is used to match the output signal of power amplifier with antenna.Compared with prior art, the present application has ultra-low power consumption, compact area, short distance and high energy efficiency application and other advantages.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of brain-computer interface, and particularly relates to a pulse wireless ultra-wideband transmitter. BACKGROUND

[0002] Brain-machine interfaces (BMIs) represent the frontier of technological progress, enabling direct communication between external devices and the human brain. This breakthrough technology has great potential to provide new solutions for patients with severe motor disorders and neurological diseases. Figure 1 A block diagram of an existing multi-channel open-loop wireless BMI system is shown. The neural implant (Neural Implant) includes components such as low-noise amplifier LNA, multiplexer MUX, analog-to-digital converter ADC, transmitter TX, etc., among which the conventional wireless data transmission stage consumes more than 80% of the total power consumption, which ultimately limits the life of the system when using a battery. In addition, for widely used neural signal acquisition methods such as electrocorticography (ECoG) and local field potential (LFP), a data rate of 10 Mbps is required to meet the acquisition requirements of up to 500 channels, as shown in Table 1. For these applications, a wireless transmitter with ultra-low power consumption and high energy efficiency is crucial, as it can significantly extend the life of the system.

[0003] Table 1 Neural signal parameters

[0004] Neural signals ECoG LFP Bandwidth (Hz) 0.01-200 0.01-500 Sampling rate (kS / s) 2 2 Number of channels 500 500 ADC bits 10 10 Data rate (Mb / s) 10 10

[0005] Impulse radio ultra-wideband (IR-UWB) is considered as a promising technology to enhance wireless communication applications due to its ability to achieve wideband and high data rates while maintaining extremely low power consumption and relatively low architectural complexity. This is achieved by generating short pulses and ensuring a low duty cycle. Due to its ability to support large channel capacity while strictly adhering to power consumption limits, low power spectral density (PSD), and minimal damage to tissue, IR-UWB technology has become a popular choice in biomedical applications, especially in power-limited and ultra-compact short-range telemetry systems such as BMI, where creating a high-energy-efficient neural interface with real-time recording capability is a major challenge.

[0006] The choice of modulation scheme also significantly affects the performance metrics of the BCI, such as data rate, communication distance, noise immunity, power consumption, and architecture complexity. Due to its simplicity and lower implementation cost, on-off keying (OOK) modulation is considered the preferred choice for UWB transmitters. It allows the transmitter to remain in a silent state when transmitting data '0', thus significantly reducing power consumption. Larger pulse amplitude is crucial for extending the communication distance. In addition, the transmitter should comply with the regulations in terms of output power spectral density (PSD) and operating frequency. Therefore, it is crucial to make the architecture tunable to compensate for unwanted process, voltage, and temperature (PVT) variations. Although tunability of the spectrum is reported in the literature, the bandwidth and center frequency are not independently controlled, which makes it inconvenient for practical needs. SUMMARY

[0007] The purpose of the present application is to overcome the defects of the prior art and provide an ultra-low power consumption and high energy efficiency pulse wireless ultra-wideband transmitter chip with spectrum tunability.

[0008] The purpose of the present application can be achieved by the following technical solutions:

[0009] A pulse wireless ultra-wideband transmitter chip, comprising a narrow pulse generator, a voltage-controlled ring oscillator, an output driver, a power amplifier and an off-chip matching network connected in sequence, wherein,

[0010] The narrow pulse generator is used to generate narrow pulses according to the received signal, and the continuous adjustment of the duration or delay time of the narrow pulses is realized by the control voltage Vctd connected to the PMOS transistor;

[0011] The voltage-controlled ring oscillator is a switch mode oscillator, which is used to provide frequency calibration when activated, and is controlled by an external control voltage Vcont, and outputs a narrow pulse oscillation signal;

[0012] The output driver is used to realize the isolation between the voltage-controlled ring oscillator and the power amplifier, and to sharpen the narrow pulse oscillation signal;

[0013] The power amplifier is used to amplify the narrow pulse oscillation signal;

[0014] The off-chip matching network is used to match the output signal of the power amplifier with the antenna.

[0015] Further, the narrow pulse generator comprises an input end inverting unit, a delay signal generating unit, an NAND gate and an output end inverting unit, the input end inverting unit is connected with the delay signal generating unit, and the NAND gate is connected with the input end inverting unit, the delay signal generating unit and the output end inverting unit respectively.

[0016] Further, in the PMOS transistor, the source, the drain and the substrate are controlled by the control voltage Vctd as one terminal, and the gate is another terminal.

[0017] Further, the voltage-controlled ring oscillator comprises a plurality of oscillation modules, each of which comprises an activation unit, an inverter, a calibration unit, a constant resistance unit and a discharge unit.

[0018] Further, the calibration unit is controlled by an external control voltage Vcont, and the voltage-controlled ring oscillator is activated when the activation unit receives the narrow pulse.

[0019] Further, the output driver comprises a plurality of inverters with gradually increasing driving capability.

[0020] Further, the power amplifier is a two-stage parallel switch D-class amplifier.

[0021] Further, a capacitor for isolating direct current components is connected in series with each stage of the switch D-class amplifier.

[0022] Further, the off-chip matching network shapes the output signal and matches with the antenna.

[0023] Further, the transmitter is tested in performance by a performance parameter comprising a quality factor, which is defined as the ratio of normalized energy efficiency to peak voltage amplitude.

[0024] Compared with the prior art, the present application has the following beneficial effects:

[0025] 1. The transmitter of the present application is provided with control voltages Vctd and Vcont, wherein Vctd can adjust the capacitance of the PMOS, change the duration of the narrow pulse, and thus change the -10dB bandwidth of the spectrum; Vcont can control the current of the voltage-controlled ring oscillator, and thus adjust the oscillation frequency, i.e. the center frequency of the spectrum, thereby realizing the effective spectrum adjustability of the transmitter.

[0026] 2. The off-chip matching network is designed to shape the output spectrum, and suppress the signal components other than the center frequency and the -10dB bandwidth.

[0027] 3. Simulation shows that the average power consumption of the transmitter of the present application is only 34μW, which provides an energy efficiency of 3.4pJ per bit at a data transmission rate of 10Mbps, and the energy consumption is low; the peak-to-peak voltage amplitude of the radio frequency signal on a 50Ω output load is 450mV, which meets the requirements of a certain communication distance.

[0028] 4. The chip area based on the transmitter of the present application is small.

[0029] 5、In addition to the parameters such as power consumption, peak voltage amplitude and energy efficiency, a figure of merit (FOM) is introduced, which is defined as the ratio of normalized energy efficiency to peak voltage amplitude. Compared with other transmitter chips, the proposed IR-UWB transmitter significantly reduces the overall power consumption, improves the energy efficiency, and its FOM is also superior to similar transmitter chips. BRIEF DESCRIPTION OF DRAWINGS

[0030] Figure 1 Fig. 1 is a block diagram of an existing wireless brain-machine interface (BMI) system and a structural schematic diagram of the transmitter chip of the present application;

[0031] Figure 2 Fig. 4 is a detailed circuit schematic diagram of the transmitter chip of the present application;

[0032] Figure 3 Fig. 5 is a pulse curve of the output IR-UWB radio frequency signal under the condition of Vctd=0V and Vcont=0.5V in an embodiment of the present application;

[0033] Figure 4 Fig. 6 is a power spectral density (PSD) of the transmitter chip under the condition of Vctd=0V and Vcont=0.5V in an embodiment of the present application;

[0034] Figure 5 Fig. 7 is a curve of the center frequency of the PSD varying with the control voltage Vcont under the condition of Vctd=0V in an embodiment of the present application;

[0035] Figure 6 Fig. 8 is a curve of the -10dB bandwidth of the PSD varying with the control voltage Vctd under the condition of Vcont=0.5V in an embodiment of the present application;

[0036] Figure 7 Fig. 9 is a layout of the transmitter chip in an embodiment of the present application. DETAILED DESCRIPTION

[0037] The present application will be described in detail below with reference to the accompanying drawings and specific embodiments. The present embodiment is implemented on the basis of the technical solution of the present application, and gives a detailed implementation and specific operation process, but the protection scope of the present application is not limited to the following embodiments.

[0038] The present embodiment provides an ultra-low power consumption, low architecture complexity pulse wireless ultra-wideband (IR-UWB) transmitter with spectral adjustability and complete compliance with FCC regulations, which is referred to as Figure 1As shown, including the narrow pulse generator (Narrow pulse Generator), voltage controlled ring oscillator (VCRO), output driver (Driver), power amplifier (Power Amplifier, PA) and off-chip matching network (Matching Network) connected in turn, wherein the narrow pulse generator is used to generate narrow pulse according to the received signal, the continuous adjustment of the duration or delay time of the narrow pulse is realized by the control voltage Vctd connected PMOS transistor; the voltage controlled ring oscillator is an on-off VCRO, which is used to provide frequency calibration when activated, controlled by external control voltage Vcont, and outputs narrow pulse oscillation signal; the output driver is used to realize the isolation between the voltage controlled ring oscillator and the power amplifier, and sharpen the narrow pulse oscillation signal; the power amplifier is used to amplify the narrow pulse oscillation signal; the off-chip matching network is used to match the output signal of the power amplifier with the antenna (Antenna). The above transmitter is provided with control voltages Vctd and Vcont, wherein Vctd can adjust the capacitance of PMOS, change the duration of narrow pulse, and thus change the-10dB bandwidth of the spectrum; Vcont can control the current of the voltage controlled ring oscillator, so as to adjust the oscillation frequency, that is, the center frequency of the spectrum, and thus realize the effective spectrum adjustability of the transmitter.

[0039] Figure 2 A specific circuit schematic diagram for the above transmitter.

[0040] The narrow pulse generator comprises an input end inverting unit, a delay signal generating unit, an NAND gate and an output end inverting unit, the input end inverting unit is connected with the delay signal generating unit, and the NAND gate is connected with the input end inverting unit, the delay signal generating unit and the output end inverting unit respectively.

[0041] In the embodiment, the input end inverting unit is two inverters (transistors M1-M4), which are used to solve the problem that the limited signal rise and fall time may significantly affect the output power spectral density (PSD). These inverters accelerate the rising and falling edges of the data signal on node A and the delayed signal (generated by transistors M5-M 16 ) on node B. These signals are then sent to an NAND gate (transistors M 17 -M 20 ) to generate a narrow pulse signal. In order to further sharpen the narrow pulse and isolate the narrow pulse generator from the on-off VCRO circuit, an additional output end inverting unit is added in the embodiment, which is an inverter stage composed of transistors M 21 -M 22 .

[0042] The continuous adjustment of the duration of the narrow pulse or the delay time of the above narrow pulse generator is realized by a PMOS transistor and controlled by a control voltage Vctd. In this embodiment, a PMOS transistor M7, M 12 of the 2.5V type is used. In this PMOS transistor, the source, the drain and the substrate serve as one terminal and are controlled by the control voltage Vctd, and the gate serves as the other terminal. The total capacitance C ctd is equal to the series combination of the depletion zone capacitance C dep and the gate oxide capacitance C g .

[0043] C ctd = C dep C g / (C dep +C g )

[0044] Generally, LC oscillators are used as local oscillators (LO), but they result in high silicon area cost and power consumption due to the need for large inductors and large driving current. On the other hand, although ring oscillators are a potential alternative to LC oscillators, they are susceptible to process, voltage and temperature (PVT) variations, resulting in frequency instability. In order to avoid the above technical problems, the present embodiment uses a voltage-controlled ring oscillator operating in switch mode.

[0045] The voltage-controlled ring oscillator comprises a plurality of oscillation modules, each of which comprises an activation unit (transistor M 35 -M 37 ), an inverter (transistor M 23 -M 28 ), a calibration unit (transistor M 29 -M 31 ), a constant resistance unit (transistor M 32 -M 34 ) and a discharge unit (transistor M 38 -M 40 ).

[0046] Specifically, the switch VCRO provides frequency calibration by adjusting the current controlled by transistors M 29 -M 31 , which are controlled by an external voltage Vcont. When Vcont falls below the NMOS threshold voltage, the on-resistance of M 29 -M 31 rises sharply, resulting in highly nonlinear tuning characteristics and even the complete stop of oscillation. Transistors M 29 -M 31 in parallel with M 32 -M 34As a constant resistance, it ensures the lowest oscillation frequency and enhances the linearity of the tuning characteristic.

[0047] When the narrow pulse signal is applied to transistor M 35 -M 37 , the switch VCRO is activated, while most of the time is in the off state, thereby saving power consumption. The transmission delay of each inverter stage output by the switch VCRO is determined by parasitic resistance, capacitance and direct current. Transistors M 38 -M 40 help parasitic capacitance and resistance, and more importantly, their role is to discharge and zero the voltage of each inverter stage output after turning off.

[0048] The output driver includes multiple inverters (transistors M 41 -M 46 ) with gradually increasing driving capability. This output driver provides effective isolation between the switch VCRO and the PA while sharpening the oscillation signal. Transistors M 41 , M 42 are implemented with a smaller W / L ratio, thereby minimizing the large parasitic capacitance introduced at the output of the switch VCRO. Conversely, transistors M 45 , M 46 have a larger W / L ratio to ensure sufficient driving capability to the PA.

[0049] The power amplifier PA is a two-stage parallel switch class-D amplifier with a large W / L ratio to amplify the narrow pulse oscillation signal, and a capacitor is connected in series with each stage to isolate the DC component.

[0050] The off-chip matching network is used to match the output impedance to the 50Ω antenna. In addition, it also shapes the output spectrum and suppresses signal components outside the center frequency and -10dB bandwidth.

[0051] In a specific embodiment, the proposed IR-UWB transmitter operates at a supply voltage of 1.0V, designed and implemented by TSMC 40nm CMOS technology. It operates in a trigger mode with a low duty cycle and works at a data rate of 10Mbps.

[0052] Figure 3 The output pulse waveform shown is generated under the condition of Vctd=0V and Vcont=0.5V. The peak-to-peak voltage (Vpp) of the IR-UWB radio frequency signal on the 50Ω output load is 450mV, and the pulse width is 1.7ns. Larger Vpp helps to extend the communication distance. Figure 4The power spectral density (PSD) of the proposed IR-UWB transmitter is shown in the frequency range from 1 GHz to 8 GHz under the condition of Vctd= 0 V and Vcont= 0.5 V, which complies with the FCC indoor mask regulation. The -10 dB bandwidth of the PSD is 750 MHz, and its maximum value is -57.78 dBm / MHz, which occurs at the center frequency of 4.3 GHz. Although the PSD at the center frequency is far enough from the lower limit of the FCC mask to ensure that even if the data rate and Vpp are increased to improve the PSD, it will not violate the regulation, it will inevitably increase the overall power consumption of the transmitter. In addition, the Vpp of 450 mV is still sufficient for short-range transmission.

[0053] The effect of the control voltage Vcont scanning from 0 V to 1.0 V while keeping Vctd= 0 V on the center frequency of the power spectral density (PSD) is shown in Figure 5 . The increase of Vcont enhances the current through transistors M 26 , M 32 , and M 38 , thereby reducing the transmission delay and increasing the oscillation frequency of the switched voltage controlled oscillator (VCRO). The tuning range of the center frequency is from 3.7 GHz to 6.0 GHz, showing a good linear tuning range of Vcont between 0.4 V and 0.7 V. Figure 6 The variation of the -10 dB bandwidth of the PSD when Vctd scans from 0 V to 2.0 V while the control voltage Vcont remains at 0.5 V is shown. With the increase of Vctd, the -10 dB bandwidth expands to a maximum of 1.1 GHz and then gradually decreases, with a bandwidth tuning range of about 600 MHz. These results verify the effective spectral tuning of the proposed IR-UWB transmitter architecture. Figure 7 The chip area of the proposed IR-UWB transmitter is shown to be 430 x 430 μm 2 , while the core area is 38 x 28 μm 2 . Notably, it achieves an average power consumption of only 34 μW at a data stream of 10 Mbps, with an energy efficiency of 3.4 pJ / b. Table 2 summarizes the performance of the implemented IR-UWB transmitter and compares it with the current state-of-the-art IR-UWB transmitters. In addition to parameters such as power consumption, peak voltage amplitude, and energy efficiency, a figure of merit (FOM) is introduced, which is defined as the ratio of the normalized energy efficiency to the peak voltage amplitude. Compared with other transmitters, the proposed IR-UWB transmitter significantly reduces the overall power consumption, improves the energy efficiency, and its FOM is also superior to similar transmitters.

[0054] Table 2 Comparison of transmitter performance

[0055] Parameters The present invention CICC’24 ISSCC’22 IET’20 JSSC’19 TCAS-H’18 JSSC’17 Process (nm) 40 65 28 180 65 180 28 Modulation OOK OOK 4PPM+8PSK+4PAM OOK D-MPPM OOK OOK Bandwidth (GHz) 3.1-6 3.1-6 6-9 3.0-7.5 3.1-5 3.1-6 3.5-4.5 Data rate (Mbps) 10 100-800 1660 200 500 200 27.24 Peak-to-peak voltage, V pp (mv)]]> 450 400 300 320 400 260 350 TX power consumption (mw) 0.034 13.2 9.69 1.0 7.0 4.0 0.38 Energy efficiency (pJ / b) 3.4 165 5.8 5.0 14 20 14 Area (mm 2 ) 0.185, 0.001 c ]] 2.0 0.155 c ]] 0.63 2.88 b ]] 0.021 c ]] 0.095 c ]] FoM a ]]> 7.56 41.25 25.22 15.63 35.0 76.92 40.0

[0056] a FOM = normalized energy efficiency / V pp [pJ / (b·V)] b Transceiver c Core area only

[0057] The preferred embodiments of the present application have been described in detail above. It should be understood by those skilled in the art that modifications and variations to the preferred embodiments could be made without departing from the spirit and scope of the application. Accordingly, it is intended that the present application embrace all modifications and variations as fall within the scope of the appended claims.

Claims

1. A pulse wireless ultra-wideband transmitter, characterized in that: The invention comprises a narrow pulse generator, a voltage-controlled ring oscillator, an output driver, a power amplifier and an off-chip matching network connected in sequence, wherein: The narrow pulse generator is used to generate a narrow pulse according to the received signal, and the continuous adjustment of the duration or delay time of the narrow pulse is achieved by connecting the control voltage Vctd of the PMOS transistor in the narrow pulse generator; The voltage-controlled ring oscillator is a switch-mode oscillator used to provide frequency calibration when activated, controlled by an external control voltage Vcont, and output a narrow pulse oscillation signal; The output driver is used to achieve isolation between the voltage-controlled ring oscillator and the power amplifier, and to sharpen the narrow pulse oscillation signal; The power amplifier is used to amplify the narrow pulse oscillation signal; The off-chip matching network is used to match the output signal of the power amplifier with the antenna; The narrow pulse generator includes an input-end inverting unit, a delay signal generating unit, a NAND gate and an output-end inverting unit, wherein the input-end inverting unit is connected to the delay signal generating unit, and the NAND gate is respectively connected to the input-end inverting unit, the delay signal generating unit and the output-end inverting unit; The voltage-controlled ring oscillator includes a plurality of oscillation modules, each of which includes an activation unit, an inverter, a calibration unit, a constant resistance unit, and a discharge unit, all of which are composed of transistors.

2. The pulse wireless ultra-wideband transmitter according to claim 1, characterized in that In the PMOS transistor, the source, drain and substrate serve as one terminal, which is controlled by the control voltage Vctd, and the gate serves as another terminal.

3. The pulse wireless ultra-wideband transmitter according to claim 1, characterized in that The calibration unit is controlled by an external control voltage Vcont, and when the activation unit receives the narrow pulse, the voltage-controlled ring oscillator is activated.

4. The pulse wireless ultra-wideband transmitter according to claim 1, characterized in that The output driver includes a plurality of inverters with gradually increasing driving capabilities.

5. The pulse wireless ultra-wideband transmitter according to claim 1, characterized in that The power amplifier is a two-stage parallel-connected switching class D amplifier.

6. The pulse wireless ultra-wideband transmitter according to claim 5, characterized in that Each level of the switching class D amplifier is connected in series with a capacitor for isolating a DC component.

7. The pulse wireless ultra-wideband transmitter according to claim 1, characterized in that The off-chip matching network shapes the output signal and matches it with the antenna.

8. The pulse wireless ultra-wideband transmitter according to claim 1, characterized in that The transmitter is performance tested using performance parameters including a figure of merit, which is defined as the ratio of normalized energy efficiency to peak voltage amplitude.

Images